Commit | Line | Data |
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0cbdf7bc MS |
1 | /* |
2 | * Regulator driver for National Semiconductors LP3971 PMIC chip | |
3 | * | |
4 | * Copyright (C) 2009 Samsung Electronics | |
5 | * Author: Marek Szyprowski <m.szyprowski@samsung.com> | |
6 | * | |
7 | * Based on wm8350.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/bug.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/kernel.h> | |
65602c32 | 19 | #include <linux/module.h> |
0cbdf7bc MS |
20 | #include <linux/regulator/driver.h> |
21 | #include <linux/regulator/lp3971.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
0cbdf7bc MS |
23 | |
24 | struct lp3971 { | |
25 | struct device *dev; | |
26 | struct mutex io_lock; | |
27 | struct i2c_client *i2c; | |
28 | int num_regulators; | |
29 | struct regulator_dev **rdev; | |
30 | }; | |
31 | ||
32 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg); | |
33 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val); | |
34 | ||
35 | #define LP3971_SYS_CONTROL1_REG 0x07 | |
36 | ||
37 | /* System control register 1 initial value, | |
38 | bits 4 and 5 are EPROM programmable */ | |
39 | #define SYS_CONTROL1_INIT_VAL 0x40 | |
40 | #define SYS_CONTROL1_INIT_MASK 0xCF | |
41 | ||
42 | #define LP3971_BUCK_VOL_ENABLE_REG 0x10 | |
43 | #define LP3971_BUCK_VOL_CHANGE_REG 0x20 | |
44 | ||
45 | /* Voltage control registers shift: | |
46 | LP3971_BUCK1 -> 0 | |
47 | LP3971_BUCK2 -> 4 | |
48 | LP3971_BUCK3 -> 6 | |
49 | */ | |
451a73cd | 50 | #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01)) |
0cbdf7bc MS |
51 | #define BUCK_VOL_CHANGE_FLAG_GO 0x01 |
52 | #define BUCK_VOL_CHANGE_FLAG_TARGET 0x02 | |
53 | #define BUCK_VOL_CHANGE_FLAG_MASK 0x03 | |
54 | ||
55 | #define LP3971_BUCK1_BASE 0x23 | |
56 | #define LP3971_BUCK2_BASE 0x29 | |
57 | #define LP3971_BUCK3_BASE 0x32 | |
58 | ||
6faa7e0a | 59 | static const int buck_base_addr[] = { |
0cbdf7bc MS |
60 | LP3971_BUCK1_BASE, |
61 | LP3971_BUCK2_BASE, | |
62 | LP3971_BUCK3_BASE, | |
63 | }; | |
64 | ||
65 | #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x]) | |
66 | #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1) | |
67 | ||
cad8d76e AL |
68 | static const unsigned int buck_voltage_map[] = { |
69 | 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, | |
70 | 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, | |
71 | 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, | |
72 | 3000000, 3300000, | |
0cbdf7bc MS |
73 | }; |
74 | ||
75 | #define BUCK_TARGET_VOL_MASK 0x3f | |
76 | #define BUCK_TARGET_VOL_MIN_IDX 0x01 | |
77 | #define BUCK_TARGET_VOL_MAX_IDX 0x19 | |
78 | ||
79 | #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2) | |
80 | ||
81 | #define LP3971_LDO_ENABLE_REG 0x12 | |
82 | #define LP3971_LDO_VOL_CONTR_BASE 0x39 | |
83 | ||
84 | /* Voltage control registers: | |
85 | LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
86 | LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0 | |
87 | LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
88 | LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1 | |
89 | LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2 | |
90 | */ | |
91 | #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1)) | |
92 | ||
93 | /* Voltage control registers shift: | |
94 | LP3971_LDO1 -> 0, LP3971_LDO2 -> 4 | |
95 | LP3971_LDO3 -> 0, LP3971_LDO4 -> 4 | |
96 | LP3971_LDO5 -> 0 | |
97 | */ | |
98 | #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2) | |
99 | #define LDO_VOL_CONTR_MASK 0x0f | |
100 | ||
cad8d76e AL |
101 | static const unsigned int ldo45_voltage_map[] = { |
102 | 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, | |
103 | 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, | |
0cbdf7bc MS |
104 | }; |
105 | ||
cad8d76e AL |
106 | static const unsigned int ldo123_voltage_map[] = { |
107 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, | |
108 | 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, | |
0cbdf7bc MS |
109 | }; |
110 | ||
0cbdf7bc MS |
111 | #define LDO_VOL_MIN_IDX 0x00 |
112 | #define LDO_VOL_MAX_IDX 0x0f | |
113 | ||
0cbdf7bc MS |
114 | static int lp3971_ldo_is_enabled(struct regulator_dev *dev) |
115 | { | |
116 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
117 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
118 | u16 mask = 1 << (1 + ldo); | |
119 | u16 val; | |
120 | ||
121 | val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG); | |
122 | return (val & mask) != 0; | |
123 | } | |
124 | ||
125 | static int lp3971_ldo_enable(struct regulator_dev *dev) | |
126 | { | |
127 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
128 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
129 | u16 mask = 1 << (1 + ldo); | |
130 | ||
131 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask); | |
132 | } | |
133 | ||
134 | static int lp3971_ldo_disable(struct regulator_dev *dev) | |
135 | { | |
136 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
137 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
138 | u16 mask = 1 << (1 + ldo); | |
139 | ||
140 | return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0); | |
141 | } | |
142 | ||
143 | static int lp3971_ldo_get_voltage(struct regulator_dev *dev) | |
144 | { | |
145 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
146 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
147 | u16 val, reg; | |
148 | ||
149 | reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo)); | |
150 | val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK; | |
151 | ||
cad8d76e | 152 | return dev->desc->volt_table[val]; |
0cbdf7bc MS |
153 | } |
154 | ||
dd8e2314 AL |
155 | static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev, |
156 | unsigned int selector) | |
0cbdf7bc MS |
157 | { |
158 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
159 | int ldo = rdev_get_id(dev) - LP3971_LDO1; | |
3a93f2a9 | 160 | |
0cbdf7bc | 161 | return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), |
cdb868f5 | 162 | LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo), |
dd8e2314 | 163 | selector << LDO_VOL_CONTR_SHIFT(ldo)); |
0cbdf7bc MS |
164 | } |
165 | ||
166 | static struct regulator_ops lp3971_ldo_ops = { | |
cad8d76e | 167 | .list_voltage = regulator_list_voltage_table, |
0cbdf7bc MS |
168 | .is_enabled = lp3971_ldo_is_enabled, |
169 | .enable = lp3971_ldo_enable, | |
170 | .disable = lp3971_ldo_disable, | |
171 | .get_voltage = lp3971_ldo_get_voltage, | |
dd8e2314 | 172 | .set_voltage_sel = lp3971_ldo_set_voltage_sel, |
0cbdf7bc MS |
173 | }; |
174 | ||
0cbdf7bc MS |
175 | static int lp3971_dcdc_is_enabled(struct regulator_dev *dev) |
176 | { | |
177 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
178 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
179 | u16 mask = 1 << (buck * 2); | |
180 | u16 val; | |
181 | ||
182 | val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG); | |
183 | return (val & mask) != 0; | |
184 | } | |
185 | ||
186 | static int lp3971_dcdc_enable(struct regulator_dev *dev) | |
187 | { | |
188 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
189 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
190 | u16 mask = 1 << (buck * 2); | |
191 | ||
192 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask); | |
193 | } | |
194 | ||
195 | static int lp3971_dcdc_disable(struct regulator_dev *dev) | |
196 | { | |
197 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
198 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
199 | u16 mask = 1 << (buck * 2); | |
200 | ||
201 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0); | |
202 | } | |
203 | ||
204 | static int lp3971_dcdc_get_voltage(struct regulator_dev *dev) | |
205 | { | |
206 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
207 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
208 | u16 reg; | |
209 | int val; | |
210 | ||
211 | reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck)); | |
212 | reg &= BUCK_TARGET_VOL_MASK; | |
213 | ||
214 | if (reg <= BUCK_TARGET_VOL_MAX_IDX) | |
cad8d76e | 215 | val = buck_voltage_map[reg]; |
0cbdf7bc MS |
216 | else { |
217 | val = 0; | |
218 | dev_warn(&dev->dev, "chip reported incorrect voltage value.\n"); | |
219 | } | |
220 | ||
221 | return val; | |
222 | } | |
223 | ||
dd8e2314 AL |
224 | static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev, |
225 | unsigned int selector) | |
0cbdf7bc MS |
226 | { |
227 | struct lp3971 *lp3971 = rdev_get_drvdata(dev); | |
228 | int buck = rdev_get_id(dev) - LP3971_DCDC1; | |
0cbdf7bc MS |
229 | int ret; |
230 | ||
0cbdf7bc | 231 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), |
dd8e2314 | 232 | BUCK_TARGET_VOL_MASK, selector); |
0cbdf7bc MS |
233 | if (ret) |
234 | return ret; | |
235 | ||
236 | ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
237 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
238 | BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck)); | |
239 | if (ret) | |
240 | return ret; | |
241 | ||
242 | return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG, | |
243 | BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck), | |
244 | 0 << BUCK_VOL_CHANGE_SHIFT(buck)); | |
245 | } | |
246 | ||
247 | static struct regulator_ops lp3971_dcdc_ops = { | |
cad8d76e | 248 | .list_voltage = regulator_list_voltage_table, |
0cbdf7bc MS |
249 | .is_enabled = lp3971_dcdc_is_enabled, |
250 | .enable = lp3971_dcdc_enable, | |
251 | .disable = lp3971_dcdc_disable, | |
252 | .get_voltage = lp3971_dcdc_get_voltage, | |
dd8e2314 | 253 | .set_voltage_sel = lp3971_dcdc_set_voltage_sel, |
0cbdf7bc MS |
254 | }; |
255 | ||
14add4ff | 256 | static const struct regulator_desc regulators[] = { |
0cbdf7bc MS |
257 | { |
258 | .name = "LDO1", | |
259 | .id = LP3971_LDO1, | |
260 | .ops = &lp3971_ldo_ops, | |
261 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 262 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
263 | .type = REGULATOR_VOLTAGE, |
264 | .owner = THIS_MODULE, | |
265 | }, | |
266 | { | |
267 | .name = "LDO2", | |
268 | .id = LP3971_LDO2, | |
269 | .ops = &lp3971_ldo_ops, | |
270 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 271 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
272 | .type = REGULATOR_VOLTAGE, |
273 | .owner = THIS_MODULE, | |
274 | }, | |
275 | { | |
276 | .name = "LDO3", | |
277 | .id = LP3971_LDO3, | |
278 | .ops = &lp3971_ldo_ops, | |
279 | .n_voltages = ARRAY_SIZE(ldo123_voltage_map), | |
cad8d76e | 280 | .volt_table = ldo123_voltage_map, |
0cbdf7bc MS |
281 | .type = REGULATOR_VOLTAGE, |
282 | .owner = THIS_MODULE, | |
283 | }, | |
284 | { | |
285 | .name = "LDO4", | |
286 | .id = LP3971_LDO4, | |
287 | .ops = &lp3971_ldo_ops, | |
288 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
cad8d76e | 289 | .volt_table = ldo45_voltage_map, |
0cbdf7bc MS |
290 | .type = REGULATOR_VOLTAGE, |
291 | .owner = THIS_MODULE, | |
292 | }, | |
293 | { | |
294 | .name = "LDO5", | |
295 | .id = LP3971_LDO5, | |
296 | .ops = &lp3971_ldo_ops, | |
297 | .n_voltages = ARRAY_SIZE(ldo45_voltage_map), | |
cad8d76e | 298 | .volt_table = ldo45_voltage_map, |
0cbdf7bc MS |
299 | .type = REGULATOR_VOLTAGE, |
300 | .owner = THIS_MODULE, | |
301 | }, | |
302 | { | |
303 | .name = "DCDC1", | |
304 | .id = LP3971_DCDC1, | |
305 | .ops = &lp3971_dcdc_ops, | |
306 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 307 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
308 | .type = REGULATOR_VOLTAGE, |
309 | .owner = THIS_MODULE, | |
310 | }, | |
311 | { | |
312 | .name = "DCDC2", | |
313 | .id = LP3971_DCDC2, | |
314 | .ops = &lp3971_dcdc_ops, | |
315 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 316 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
317 | .type = REGULATOR_VOLTAGE, |
318 | .owner = THIS_MODULE, | |
319 | }, | |
320 | { | |
321 | .name = "DCDC3", | |
322 | .id = LP3971_DCDC3, | |
323 | .ops = &lp3971_dcdc_ops, | |
324 | .n_voltages = ARRAY_SIZE(buck_voltage_map), | |
cad8d76e | 325 | .volt_table = buck_voltage_map, |
0cbdf7bc MS |
326 | .type = REGULATOR_VOLTAGE, |
327 | .owner = THIS_MODULE, | |
328 | }, | |
329 | }; | |
330 | ||
331 | static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count, | |
332 | u16 *dest) | |
333 | { | |
334 | int ret; | |
335 | ||
336 | if (count != 1) | |
337 | return -EIO; | |
338 | ret = i2c_smbus_read_byte_data(i2c, reg); | |
27ef7f00 | 339 | if (ret < 0) |
0cbdf7bc MS |
340 | return -EIO; |
341 | ||
342 | *dest = ret; | |
343 | return 0; | |
344 | } | |
345 | ||
346 | static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count, | |
347 | const u16 *src) | |
348 | { | |
0cbdf7bc MS |
349 | if (count != 1) |
350 | return -EIO; | |
1bddc2f5 | 351 | return i2c_smbus_write_byte_data(i2c, reg, *src); |
0cbdf7bc MS |
352 | } |
353 | ||
354 | static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg) | |
355 | { | |
356 | u16 val = 0; | |
357 | ||
358 | mutex_lock(&lp3971->io_lock); | |
359 | ||
360 | lp3971_i2c_read(lp3971->i2c, reg, 1, &val); | |
361 | ||
362 | dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, | |
363 | (unsigned)val&0xff); | |
364 | ||
365 | mutex_unlock(&lp3971->io_lock); | |
366 | ||
367 | return val & 0xff; | |
368 | } | |
369 | ||
370 | static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val) | |
371 | { | |
372 | u16 tmp; | |
373 | int ret; | |
374 | ||
375 | mutex_lock(&lp3971->io_lock); | |
376 | ||
377 | ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp); | |
378 | tmp = (tmp & ~mask) | val; | |
379 | if (ret == 0) { | |
380 | ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp); | |
381 | dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, | |
382 | (unsigned)val&0xff); | |
383 | } | |
384 | mutex_unlock(&lp3971->io_lock); | |
385 | ||
386 | return ret; | |
387 | } | |
388 | ||
ebbed04f DT |
389 | static int __devinit setup_regulators(struct lp3971 *lp3971, |
390 | struct lp3971_platform_data *pdata) | |
0cbdf7bc MS |
391 | { |
392 | int i, err; | |
ebbed04f DT |
393 | |
394 | lp3971->num_regulators = pdata->num_regulators; | |
395 | lp3971->rdev = kcalloc(pdata->num_regulators, | |
396 | sizeof(struct regulator_dev *), GFP_KERNEL); | |
67e46f34 DC |
397 | if (!lp3971->rdev) { |
398 | err = -ENOMEM; | |
399 | goto err_nomem; | |
400 | } | |
0cbdf7bc MS |
401 | |
402 | /* Instantiate the regulators */ | |
ebbed04f | 403 | for (i = 0; i < pdata->num_regulators; i++) { |
c172708d | 404 | struct regulator_config config = { }; |
ebbed04f | 405 | struct lp3971_regulator_subdev *reg = &pdata->regulators[i]; |
0cbdf7bc | 406 | |
c172708d MB |
407 | config.dev = lp3971->dev; |
408 | config.init_data = reg->initdata; | |
409 | config.driver_data = lp3971; | |
410 | ||
411 | lp3971->rdev[i] = regulator_register(®ulators[reg->id], | |
412 | &config); | |
d662fc82 JL |
413 | if (IS_ERR(lp3971->rdev[i])) { |
414 | err = PTR_ERR(lp3971->rdev[i]); | |
0cbdf7bc MS |
415 | dev_err(lp3971->dev, "regulator init failed: %d\n", |
416 | err); | |
417 | goto error; | |
418 | } | |
419 | } | |
420 | ||
421 | return 0; | |
ebbed04f | 422 | |
0cbdf7bc | 423 | error: |
ebbed04f DT |
424 | while (--i >= 0) |
425 | regulator_unregister(lp3971->rdev[i]); | |
0cbdf7bc MS |
426 | kfree(lp3971->rdev); |
427 | lp3971->rdev = NULL; | |
67e46f34 | 428 | err_nomem: |
0cbdf7bc MS |
429 | return err; |
430 | } | |
431 | ||
432 | static int __devinit lp3971_i2c_probe(struct i2c_client *i2c, | |
433 | const struct i2c_device_id *id) | |
434 | { | |
435 | struct lp3971 *lp3971; | |
436 | struct lp3971_platform_data *pdata = i2c->dev.platform_data; | |
437 | int ret; | |
438 | u16 val; | |
439 | ||
ebbed04f DT |
440 | if (!pdata) { |
441 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); | |
442 | return -ENODEV; | |
0cbdf7bc MS |
443 | } |
444 | ||
ebbed04f DT |
445 | lp3971 = kzalloc(sizeof(struct lp3971), GFP_KERNEL); |
446 | if (lp3971 == NULL) | |
447 | return -ENOMEM; | |
448 | ||
0cbdf7bc MS |
449 | lp3971->i2c = i2c; |
450 | lp3971->dev = &i2c->dev; | |
0cbdf7bc MS |
451 | |
452 | mutex_init(&lp3971->io_lock); | |
453 | ||
454 | /* Detect LP3971 */ | |
455 | ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val); | |
456 | if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) | |
457 | ret = -ENODEV; | |
458 | if (ret < 0) { | |
459 | dev_err(&i2c->dev, "failed to detect device\n"); | |
460 | goto err_detect; | |
461 | } | |
462 | ||
ebbed04f DT |
463 | ret = setup_regulators(lp3971, pdata); |
464 | if (ret < 0) | |
465 | goto err_detect; | |
0cbdf7bc | 466 | |
ebbed04f | 467 | i2c_set_clientdata(i2c, lp3971); |
0cbdf7bc MS |
468 | return 0; |
469 | ||
470 | err_detect: | |
0cbdf7bc | 471 | kfree(lp3971); |
0cbdf7bc MS |
472 | return ret; |
473 | } | |
474 | ||
475 | static int __devexit lp3971_i2c_remove(struct i2c_client *i2c) | |
476 | { | |
477 | struct lp3971 *lp3971 = i2c_get_clientdata(i2c); | |
478 | int i; | |
ebbed04f | 479 | |
0cbdf7bc | 480 | for (i = 0; i < lp3971->num_regulators; i++) |
ebbed04f DT |
481 | regulator_unregister(lp3971->rdev[i]); |
482 | ||
0cbdf7bc | 483 | kfree(lp3971->rdev); |
0cbdf7bc MS |
484 | kfree(lp3971); |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | static const struct i2c_device_id lp3971_i2c_id[] = { | |
490 | { "lp3971", 0 }, | |
491 | { } | |
492 | }; | |
493 | MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id); | |
494 | ||
495 | static struct i2c_driver lp3971_i2c_driver = { | |
496 | .driver = { | |
497 | .name = "LP3971", | |
498 | .owner = THIS_MODULE, | |
499 | }, | |
500 | .probe = lp3971_i2c_probe, | |
5eb9f2b9 | 501 | .remove = lp3971_i2c_remove, |
0cbdf7bc MS |
502 | .id_table = lp3971_i2c_id, |
503 | }; | |
504 | ||
5af34e60 | 505 | module_i2c_driver(lp3971_i2c_driver); |
0cbdf7bc MS |
506 | |
507 | MODULE_LICENSE("GPL"); | |
508 | MODULE_AUTHOR("Marek Szyprowski <m.szyprowski@samsung.com>"); | |
509 | MODULE_DESCRIPTION("LP3971 PMIC driver"); |