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regulator: Sort Kconfig and Makefile entries
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
c789ca20
SI		 17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
c789ca20
SI		 21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/regulator/ab8500.h>
24
25/**
26 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 27 * @dev: device pointer
c789ca20 28 * @desc: regulator description
c789ca20
SI		 29 * @regulator_dev: regulator device
30 * @max_uV: maximum voltage (for variable voltage supplies)
31 * @min_uV: minimum voltage (for variable voltage supplies)
32 * @fixed_uV: typical voltage (for fixed voltage supplies)
47c16975 33 * @update_bank: bank to control on/off
c789ca20 34 * @update_reg: register to control on/off
e1159e6d
BJ		 35 * @update_mask: mask to enable/disable regulator
36 * @update_val_enable: bits to enable the regulator in normal (high power) mode
47c16975 37 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 38 * @voltage_reg: register to control regulator voltage
39 * @voltage_mask: mask to control regulator voltage
e1159e6d 40 * @voltages: supported voltage table
c789ca20 41 * @voltages_len: number of supported voltages for the regulator
42ab616a 42 * @delay: startup/set voltage delay in us
c789ca20
SI		 43 */
44struct ab8500_regulator_info {
45 struct device *dev;
46 struct regulator_desc desc;
c789ca20
SI		 47 struct regulator_dev *regulator;
48 int max_uV;
49 int min_uV;
50 int fixed_uV;
47c16975
MW		 51 u8 update_bank;
52 u8 update_reg;
e1159e6d
BJ		 53 u8 update_mask;
54 u8 update_val_enable;
47c16975
MW		 55 u8 voltage_bank;
56 u8 voltage_reg;
57 u8 voltage_mask;
e1159e6d 58 int const *voltages;
c789ca20 59 int voltages_len;
42ab616a 60 unsigned int delay;
c789ca20
SI		 61};
62
63/* voltage tables for the vauxn/vintcore supplies */
64static const int ldo_vauxn_voltages[] = {
65 1100000,
66 1200000,
67 1300000,
68 1400000,
69 1500000,
70 1800000,
71 1850000,
72 1900000,
73 2500000,
74 2650000,
75 2700000,
76 2750000,
77 2800000,
78 2900000,
79 3000000,
80 3300000,
81};
82
2b75151a
BJ		 83static const int ldo_vaux3_voltages[] = {
84 1200000,
85 1500000,
86 1800000,
87 2100000,
88 2500000,
89 2750000,
90 2790000,
91 2910000,
92};
93
c789ca20
SI		 94static const int ldo_vintcore_voltages[] = {
95 1200000,
96 1225000,
97 1250000,
98 1275000,
99 1300000,
100 1325000,
101 1350000,
102};
103
104static int ab8500_regulator_enable(struct regulator_dev *rdev)
105{
fc24b426 106 int ret;
c789ca20
SI		 107 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
108
fc24b426
BJ		 109 if (info == NULL) {
110 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 111 return -EINVAL;
fc24b426 112 }
c789ca20 113
47c16975 114 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 115 info->update_bank, info->update_reg,
116 info->update_mask, info->update_val_enable);
c789ca20
SI		 117 if (ret < 0)
118 dev_err(rdev_get_dev(rdev),
119 "couldn't set enable bits for regulator\n");
09aefa12
BJ		 120
121 dev_vdbg(rdev_get_dev(rdev),
122 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
123 info->desc.name, info->update_bank, info->update_reg,
124 info->update_mask, info->update_val_enable);
125
c789ca20
SI		 126 return ret;
127}
128
129static int ab8500_regulator_disable(struct regulator_dev *rdev)
130{
fc24b426 131 int ret;
c789ca20
SI		 132 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
133
fc24b426
BJ		 134 if (info == NULL) {
135 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 136 return -EINVAL;
fc24b426 137 }
c789ca20 138
47c16975 139 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 140 info->update_bank, info->update_reg,
141 info->update_mask, 0x0);
c789ca20
SI		 142 if (ret < 0)
143 dev_err(rdev_get_dev(rdev),
144 "couldn't set disable bits for regulator\n");
09aefa12
BJ		 145
146 dev_vdbg(rdev_get_dev(rdev),
147 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
148 info->desc.name, info->update_bank, info->update_reg,
149 info->update_mask, 0x0);
150
c789ca20
SI		 151 return ret;
152}
153
154static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
155{
fc24b426 156 int ret;
c789ca20 157 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 158 u8 regval;
c789ca20 159
fc24b426
BJ		 160 if (info == NULL) {
161 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 162 return -EINVAL;
fc24b426 163 }
c789ca20 164
47c16975 165 ret = abx500_get_register_interruptible(info->dev,
09aefa12 166 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 167 if (ret < 0) {
168 dev_err(rdev_get_dev(rdev),
169 "couldn't read 0x%x register\n", info->update_reg);
170 return ret;
171 }
172
09aefa12
BJ		 173 dev_vdbg(rdev_get_dev(rdev),
174 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
175 " 0x%x\n",
176 info->desc.name, info->update_bank, info->update_reg,
177 info->update_mask, regval);
178
179 if (regval & info->update_mask)
c789ca20
SI		 180 return true;
181 else
182 return false;
183}
184
185static int ab8500_list_voltage(struct regulator_dev *rdev, unsigned selector)
186{
c789ca20
SI		 187 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
188
fc24b426
BJ		 189 if (info == NULL) {
190 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 191 return -EINVAL;
fc24b426 192 }
c789ca20
SI		 193
194 /* return the uV for the fixed regulators */
195 if (info->fixed_uV)
196 return info->fixed_uV;
197
49990e6e 198 if (selector >= info->voltages_len)
c789ca20
SI		 199 return -EINVAL;
200
e1159e6d 201 return info->voltages[selector];
c789ca20
SI		 202}
203
204static int ab8500_regulator_get_voltage(struct regulator_dev *rdev)
205{
09aefa12 206 int ret, val;
c789ca20 207 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 208 u8 regval;
c789ca20 209
fc24b426
BJ		 210 if (info == NULL) {
211 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 212 return -EINVAL;
fc24b426 213 }
c789ca20 214
09aefa12
BJ		 215 ret = abx500_get_register_interruptible(info->dev,
216 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 217 if (ret < 0) {
218 dev_err(rdev_get_dev(rdev),
219 "couldn't read voltage reg for regulator\n");
220 return ret;
221 }
222
09aefa12
BJ		 223 dev_vdbg(rdev_get_dev(rdev),
224 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
225 " 0x%x\n",
226 info->desc.name, info->voltage_bank, info->voltage_reg,
227 info->voltage_mask, regval);
228
c789ca20 229 /* vintcore has a different layout */
09aefa12 230 val = regval & info->voltage_mask;
fc24b426 231 if (info->desc.id == AB8500_LDO_INTCORE)
09aefa12 232 ret = info->voltages[val >> 0x3];
c789ca20 233 else
09aefa12 234 ret = info->voltages[val];
c789ca20
SI		 235
236 return ret;
237}
238
239static int ab8500_get_best_voltage_index(struct regulator_dev *rdev,
240 int min_uV, int max_uV)
241{
242 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
243 int i;
244
245 /* check the supported voltage */
246 for (i = 0; i < info->voltages_len; i++) {
e1159e6d
BJ		 247 if ((info->voltages[i] >= min_uV) &&
248 (info->voltages[i] <= max_uV))
c789ca20
SI		 249 return i;
250 }
251
252 return -EINVAL;
253}
254
255static int ab8500_regulator_set_voltage(struct regulator_dev *rdev,
3a93f2a9
MB		 256 int min_uV, int max_uV,
257 unsigned *selector)
c789ca20 258{
fc24b426 259 int ret;
c789ca20 260 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 261 u8 regval;
c789ca20 262
fc24b426
BJ		 263 if (info == NULL) {
264 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 265 return -EINVAL;
fc24b426 266 }
c789ca20
SI		 267
268 /* get the appropriate voltages within the range */
269 ret = ab8500_get_best_voltage_index(rdev, min_uV, max_uV);
270 if (ret < 0) {
271 dev_err(rdev_get_dev(rdev),
272 "couldn't get best voltage for regulator\n");
273 return ret;
274 }
275
3a93f2a9
MB		 276 *selector = ret;
277
c789ca20 278 /* set the registers for the request */
09aefa12 279 regval = (u8)ret;
47c16975 280 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 281 info->voltage_bank, info->voltage_reg,
282 info->voltage_mask, regval);
c789ca20
SI		 283 if (ret < 0)
284 dev_err(rdev_get_dev(rdev),
285 "couldn't set voltage reg for regulator\n");
286
09aefa12
BJ		 287 dev_vdbg(rdev_get_dev(rdev),
288 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
289 " 0x%x\n",
290 info->desc.name, info->voltage_bank, info->voltage_reg,
291 info->voltage_mask, regval);
292
c789ca20
SI		 293 return ret;
294}
295
42ab616a
LW		 296static int ab8500_regulator_enable_time(struct regulator_dev *rdev)
297{
298 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
299
300 return info->delay;
301}
302
303static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
304 unsigned int old_sel,
305 unsigned int new_sel)
306{
307 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
308 int ret;
309
310 /* If the regulator isn't on, it won't take time here */
311 ret = ab8500_regulator_is_enabled(rdev);
312 if (ret < 0)
313 return ret;
314 if (!ret)
315 return 0;
316 return info->delay;
317}
318
c789ca20
SI		 319static struct regulator_ops ab8500_regulator_ops = {
320 .enable = ab8500_regulator_enable,
321 .disable = ab8500_regulator_disable,
322 .is_enabled = ab8500_regulator_is_enabled,
323 .get_voltage = ab8500_regulator_get_voltage,
324 .set_voltage = ab8500_regulator_set_voltage,
325 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 326 .enable_time = ab8500_regulator_enable_time,
327 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 328};
329
330static int ab8500_fixed_get_voltage(struct regulator_dev *rdev)
331{
c789ca20
SI		 332 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
333
fc24b426
BJ		 334 if (info == NULL) {
335 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 336 return -EINVAL;
fc24b426 337 }
c789ca20
SI		 338
339 return info->fixed_uV;
340}
341
6909b452 342static struct regulator_ops ab8500_regulator_fixed_ops = {
c789ca20
SI		 343 .enable = ab8500_regulator_enable,
344 .disable = ab8500_regulator_disable,
345 .is_enabled = ab8500_regulator_is_enabled,
346 .get_voltage = ab8500_fixed_get_voltage,
347 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 348 .enable_time = ab8500_regulator_enable_time,
349 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 350};
351
6909b452
BJ		 352static struct ab8500_regulator_info
353 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 354 /*
e1159e6d
BJ		 355 * Variable Voltage Regulators
356 * name, min mV, max mV,
357 * update bank, reg, mask, enable val
358 * volt bank, reg, mask, table, table length
c789ca20 359 */
6909b452
BJ		 360 [AB8500_LDO_AUX1] = {
361 .desc = {
362 .name = "LDO-AUX1",
363 .ops = &ab8500_regulator_ops,
364 .type = REGULATOR_VOLTAGE,
365 .id = AB8500_LDO_AUX1,
366 .owner = THIS_MODULE,
367 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
368 },
369 .min_uV = 1100000,
370 .max_uV = 3300000,
371 .update_bank = 0x04,
372 .update_reg = 0x09,
373 .update_mask = 0x03,
374 .update_val_enable = 0x01,
375 .voltage_bank = 0x04,
376 .voltage_reg = 0x1f,
377 .voltage_mask = 0x0f,
378 .voltages = ldo_vauxn_voltages,
379 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
380 },
381 [AB8500_LDO_AUX2] = {
382 .desc = {
383 .name = "LDO-AUX2",
384 .ops = &ab8500_regulator_ops,
385 .type = REGULATOR_VOLTAGE,
386 .id = AB8500_LDO_AUX2,
387 .owner = THIS_MODULE,
388 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
389 },
390 .min_uV = 1100000,
391 .max_uV = 3300000,
392 .update_bank = 0x04,
393 .update_reg = 0x09,
394 .update_mask = 0x0c,
395 .update_val_enable = 0x04,
396 .voltage_bank = 0x04,
397 .voltage_reg = 0x20,
398 .voltage_mask = 0x0f,
399 .voltages = ldo_vauxn_voltages,
400 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
401 },
402 [AB8500_LDO_AUX3] = {
403 .desc = {
404 .name = "LDO-AUX3",
405 .ops = &ab8500_regulator_ops,
406 .type = REGULATOR_VOLTAGE,
407 .id = AB8500_LDO_AUX3,
408 .owner = THIS_MODULE,
409 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
410 },
411 .min_uV = 1100000,
412 .max_uV = 3300000,
413 .update_bank = 0x04,
414 .update_reg = 0x0a,
415 .update_mask = 0x03,
416 .update_val_enable = 0x01,
417 .voltage_bank = 0x04,
418 .voltage_reg = 0x21,
419 .voltage_mask = 0x07,
420 .voltages = ldo_vaux3_voltages,
421 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
422 },
423 [AB8500_LDO_INTCORE] = {
424 .desc = {
425 .name = "LDO-INTCORE",
426 .ops = &ab8500_regulator_ops,
427 .type = REGULATOR_VOLTAGE,
428 .id = AB8500_LDO_INTCORE,
429 .owner = THIS_MODULE,
430 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
431 },
432 .min_uV = 1100000,
433 .max_uV = 3300000,
434 .update_bank = 0x03,
435 .update_reg = 0x80,
436 .update_mask = 0x44,
437 .update_val_enable = 0x04,
438 .voltage_bank = 0x03,
439 .voltage_reg = 0x80,
440 .voltage_mask = 0x38,
441 .voltages = ldo_vintcore_voltages,
442 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
443 },
c789ca20
SI		 444
445 /*
e1159e6d
BJ		 446 * Fixed Voltage Regulators
447 * name, fixed mV,
448 * update bank, reg, mask, enable val
c789ca20 449 */
6909b452
BJ		 450 [AB8500_LDO_TVOUT] = {
451 .desc = {
452 .name = "LDO-TVOUT",
453 .ops = &ab8500_regulator_fixed_ops,
454 .type = REGULATOR_VOLTAGE,
455 .id = AB8500_LDO_TVOUT,
456 .owner = THIS_MODULE,
457 .n_voltages = 1,
458 },
42ab616a 459 .delay = 10000,
6909b452
BJ		 460 .fixed_uV = 2000000,
461 .update_bank = 0x03,
462 .update_reg = 0x80,
463 .update_mask = 0x82,
464 .update_val_enable = 0x02,
465 },
ea05ef31
BJ		 466 [AB8500_LDO_USB] = {
467 .desc = {
468 .name = "LDO-USB",
469 .ops = &ab8500_regulator_fixed_ops,
470 .type = REGULATOR_VOLTAGE,
471 .id = AB8500_LDO_USB,
472 .owner = THIS_MODULE,
473 .n_voltages = 1,
474 },
475 .fixed_uV = 3300000,
476 .update_bank = 0x03,
477 .update_reg = 0x82,
478 .update_mask = 0x03,
479 .update_val_enable = 0x01,
480 },
6909b452
BJ		 481 [AB8500_LDO_AUDIO] = {
482 .desc = {
483 .name = "LDO-AUDIO",
484 .ops = &ab8500_regulator_fixed_ops,
485 .type = REGULATOR_VOLTAGE,
486 .id = AB8500_LDO_AUDIO,
487 .owner = THIS_MODULE,
488 .n_voltages = 1,
489 },
490 .fixed_uV = 2000000,
491 .update_bank = 0x03,
492 .update_reg = 0x83,
493 .update_mask = 0x02,
494 .update_val_enable = 0x02,
495 },
496 [AB8500_LDO_ANAMIC1] = {
497 .desc = {
498 .name = "LDO-ANAMIC1",
499 .ops = &ab8500_regulator_fixed_ops,
500 .type = REGULATOR_VOLTAGE,
501 .id = AB8500_LDO_ANAMIC1,
502 .owner = THIS_MODULE,
503 .n_voltages = 1,
504 },
505 .fixed_uV = 2050000,
506 .update_bank = 0x03,
507 .update_reg = 0x83,
508 .update_mask = 0x08,
509 .update_val_enable = 0x08,
510 },
511 [AB8500_LDO_ANAMIC2] = {
512 .desc = {
513 .name = "LDO-ANAMIC2",
514 .ops = &ab8500_regulator_fixed_ops,
515 .type = REGULATOR_VOLTAGE,
516 .id = AB8500_LDO_ANAMIC2,
517 .owner = THIS_MODULE,
518 .n_voltages = 1,
519 },
520 .fixed_uV = 2050000,
521 .update_bank = 0x03,
522 .update_reg = 0x83,
523 .update_mask = 0x10,
524 .update_val_enable = 0x10,
525 },
526 [AB8500_LDO_DMIC] = {
527 .desc = {
528 .name = "LDO-DMIC",
529 .ops = &ab8500_regulator_fixed_ops,
530 .type = REGULATOR_VOLTAGE,
531 .id = AB8500_LDO_DMIC,
532 .owner = THIS_MODULE,
533 .n_voltages = 1,
534 },
535 .fixed_uV = 1800000,
536 .update_bank = 0x03,
537 .update_reg = 0x83,
538 .update_mask = 0x04,
539 .update_val_enable = 0x04,
540 },
541 [AB8500_LDO_ANA] = {
542 .desc = {
543 .name = "LDO-ANA",
544 .ops = &ab8500_regulator_fixed_ops,
545 .type = REGULATOR_VOLTAGE,
546 .id = AB8500_LDO_ANA,
547 .owner = THIS_MODULE,
548 .n_voltages = 1,
549 },
550 .fixed_uV = 1200000,
551 .update_bank = 0x04,
552 .update_reg = 0x06,
553 .update_mask = 0x0c,
554 .update_val_enable = 0x04,
555 },
556
557
c789ca20
SI		 558};
559
79568b94
BJ		 560struct ab8500_reg_init {
561 u8 bank;
562 u8 addr;
563 u8 mask;
564};
565
566#define REG_INIT(_id, _bank, _addr, _mask) \
567 [_id] = { \
568 .bank = _bank, \
569 .addr = _addr, \
570 .mask = _mask, \
571 }
572
573static struct ab8500_reg_init ab8500_reg_init[] = {
574 /*
575 * 0x30, VanaRequestCtrl
576 * 0x0C, VpllRequestCtrl
577 * 0xc0, VextSupply1RequestCtrl
578 */
579 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc),
580 /*
581 * 0x03, VextSupply2RequestCtrl
582 * 0x0c, VextSupply3RequestCtrl
583 * 0x30, Vaux1RequestCtrl
584 * 0xc0, Vaux2RequestCtrl
585 */
586 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
587 /*
588 * 0x03, Vaux3RequestCtrl
589 * 0x04, SwHPReq
590 */
591 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
592 /*
593 * 0x08, VanaSysClkReq1HPValid
594 * 0x20, Vaux1SysClkReq1HPValid
595 * 0x40, Vaux2SysClkReq1HPValid
596 * 0x80, Vaux3SysClkReq1HPValid
597 */
598 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
599 /*
600 * 0x10, VextSupply1SysClkReq1HPValid
601 * 0x20, VextSupply2SysClkReq1HPValid
602 * 0x40, VextSupply3SysClkReq1HPValid
603 */
604 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
605 /*
606 * 0x08, VanaHwHPReq1Valid
607 * 0x20, Vaux1HwHPReq1Valid
608 * 0x40, Vaux2HwHPReq1Valid
609 * 0x80, Vaux3HwHPReq1Valid
610 */
611 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
612 /*
613 * 0x01, VextSupply1HwHPReq1Valid
614 * 0x02, VextSupply2HwHPReq1Valid
615 * 0x04, VextSupply3HwHPReq1Valid
616 */
617 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
618 /*
619 * 0x08, VanaHwHPReq2Valid
620 * 0x20, Vaux1HwHPReq2Valid
621 * 0x40, Vaux2HwHPReq2Valid
622 * 0x80, Vaux3HwHPReq2Valid
623 */
624 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
625 /*
626 * 0x01, VextSupply1HwHPReq2Valid
627 * 0x02, VextSupply2HwHPReq2Valid
628 * 0x04, VextSupply3HwHPReq2Valid
629 */
630 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
631 /*
632 * 0x20, VanaSwHPReqValid
633 * 0x80, Vaux1SwHPReqValid
634 */
635 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
636 /*
637 * 0x01, Vaux2SwHPReqValid
638 * 0x02, Vaux3SwHPReqValid
639 * 0x04, VextSupply1SwHPReqValid
640 * 0x08, VextSupply2SwHPReqValid
641 * 0x10, VextSupply3SwHPReqValid
642 */
643 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
644 /*
645 * 0x02, SysClkReq2Valid1
646 * ...
647 * 0x80, SysClkReq8Valid1
648 */
649 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
650 /*
651 * 0x02, SysClkReq2Valid2
652 * ...
653 * 0x80, SysClkReq8Valid2
654 */
655 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
656 /*
657 * 0x02, VTVoutEna
658 * 0x04, Vintcore12Ena
659 * 0x38, Vintcore12Sel
660 * 0x40, Vintcore12LP
661 * 0x80, VTVoutLP
662 */
663 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
664 /*
665 * 0x02, VaudioEna
666 * 0x04, VdmicEna
667 * 0x08, Vamic1Ena
668 * 0x10, Vamic2Ena
669 */
670 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
671 /*
672 * 0x01, Vamic1_dzout
673 * 0x02, Vamic2_dzout
674 */
675 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
676 /*
677 * 0x0c, VanaRegu
678 * 0x03, VpllRegu
679 */
680 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
681 /*
682 * 0x01, VrefDDREna
683 * 0x02, VrefDDRSleepMode
684 */
685 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
686 /*
687 * 0x03, VextSupply1Regu
688 * 0x0c, VextSupply2Regu
689 * 0x30, VextSupply3Regu
690 * 0x40, ExtSupply2Bypass
691 * 0x80, ExtSupply3Bypass
692 */
693 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
694 /*
695 * 0x03, Vaux1Regu
696 * 0x0c, Vaux2Regu
697 */
698 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
699 /*
700 * 0x03, Vaux3Regu
701 */
702 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
703 /*
704 * 0x3f, Vsmps1Sel1
705 */
706 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
707 /*
708 * 0x0f, Vaux1Sel
709 */
710 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
711 /*
712 * 0x0f, Vaux2Sel
713 */
714 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
715 /*
716 * 0x07, Vaux3Sel
717 */
718 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
719 /*
720 * 0x01, VextSupply12LP
721 */
722 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
723 /*
724 * 0x04, Vaux1Disch
725 * 0x08, Vaux2Disch
726 * 0x10, Vaux3Disch
727 * 0x20, Vintcore12Disch
728 * 0x40, VTVoutDisch
729 * 0x80, VaudioDisch
730 */
731 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
732 /*
733 * 0x02, VanaDisch
734 * 0x04, VdmicPullDownEna
735 * 0x10, VdmicDisch
736 */
737 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
738};
739
c789ca20
SI		 740static __devinit int ab8500_regulator_probe(struct platform_device *pdev)
741{
742 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
af54decd 743 struct ab8500_platform_data *pdata;
c789ca20
SI		 744 int i, err;
745
746 if (!ab8500) {
747 dev_err(&pdev->dev, "null mfd parent\n");
748 return -EINVAL;
749 }
af54decd 750 pdata = dev_get_platdata(ab8500->dev);
fc24b426
BJ		 751 if (!pdata) {
752 dev_err(&pdev->dev, "null pdata\n");
753 return -EINVAL;
754 }
c789ca20 755
cb189b07
BJ		 756 /* make sure the platform data has the correct size */
757 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 758 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 759 return -EINVAL;
760 }
761
79568b94
BJ		 762 /* initialize registers */
763 for (i = 0; i < pdata->num_regulator_reg_init; i++) {
764 int id;
765 u8 value;
766
767 id = pdata->regulator_reg_init[i].id;
768 value = pdata->regulator_reg_init[i].value;
769
770 /* check for configuration errors */
771 if (id >= AB8500_NUM_REGULATOR_REGISTERS) {
772 dev_err(&pdev->dev,
773 "Configuration error: id outside range.\n");
774 return -EINVAL;
775 }
776 if (value & ~ab8500_reg_init[id].mask) {
777 dev_err(&pdev->dev,
778 "Configuration error: value outside mask.\n");
779 return -EINVAL;
780 }
781
782 /* initialize register */
783 err = abx500_mask_and_set_register_interruptible(&pdev->dev,
784 ab8500_reg_init[id].bank,
785 ab8500_reg_init[id].addr,
786 ab8500_reg_init[id].mask,
787 value);
788 if (err < 0) {
789 dev_err(&pdev->dev,
790 "Failed to initialize 0x%02x, 0x%02x.\n",
791 ab8500_reg_init[id].bank,
792 ab8500_reg_init[id].addr);
793 return err;
794 }
795 dev_vdbg(&pdev->dev,
796 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
797 ab8500_reg_init[id].bank,
798 ab8500_reg_init[id].addr,
799 ab8500_reg_init[id].mask,
800 value);
801 }
802
c789ca20
SI		 803 /* register all regulators */
804 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
805 struct ab8500_regulator_info *info = NULL;
806
807 /* assign per-regulator data */
808 info = &ab8500_regulator_info[i];
809 info->dev = &pdev->dev;
c789ca20 810
2b75151a
BJ		 811 /* fix for hardware before ab8500v2.0 */
812 if (abx500_get_chip_id(info->dev) < 0x20) {
813 if (info->desc.id == AB8500_LDO_AUX3) {
814 info->desc.n_voltages =
815 ARRAY_SIZE(ldo_vauxn_voltages);
e1159e6d 816 info->voltages = ldo_vauxn_voltages;
2b75151a
BJ		 817 info->voltages_len =
818 ARRAY_SIZE(ldo_vauxn_voltages);
819 info->voltage_mask = 0xf;
820 }
821 }
822
823 /* register regulator with framework */
c789ca20 824 info->regulator = regulator_register(&info->desc, &pdev->dev,
2c043bcb 825 &pdata->regulator[i], info, NULL);
c789ca20
SI		 826 if (IS_ERR(info->regulator)) {
827 err = PTR_ERR(info->regulator);
828 dev_err(&pdev->dev, "failed to register regulator %s\n",
829 info->desc.name);
830 /* when we fail, un-register all earlier regulators */
d4876a3b 831 while (--i >= 0) {
c789ca20
SI		 832 info = &ab8500_regulator_info[i];
833 regulator_unregister(info->regulator);
c789ca20
SI		 834 }
835 return err;
836 }
09aefa12
BJ		 837
838 dev_vdbg(rdev_get_dev(info->regulator),
839 "%s-probed\n", info->desc.name);
c789ca20
SI		 840 }
841
842 return 0;
843}
844
845static __devexit int ab8500_regulator_remove(struct platform_device *pdev)
846{
847 int i;
848
849 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
850 struct ab8500_regulator_info *info = NULL;
851 info = &ab8500_regulator_info[i];
09aefa12
BJ		 852
853 dev_vdbg(rdev_get_dev(info->regulator),
854 "%s-remove\n", info->desc.name);
855
c789ca20
SI		 856 regulator_unregister(info->regulator);
857 }
858
859 return 0;
860}
861
862static struct platform_driver ab8500_regulator_driver = {
863 .probe = ab8500_regulator_probe,
864 .remove = __devexit_p(ab8500_regulator_remove),
865 .driver = {
866 .name = "ab8500-regulator",
867 .owner = THIS_MODULE,
868 },
869};
870
871static int __init ab8500_regulator_init(void)
872{
873 int ret;
874
875 ret = platform_driver_register(&ab8500_regulator_driver);
876 if (ret != 0)
877 pr_err("Failed to register ab8500 regulator: %d\n", ret);
878
879 return ret;
880}
881subsys_initcall(ab8500_regulator_init);
882
883static void __exit ab8500_regulator_exit(void)
884{
885 platform_driver_unregister(&ab8500_regulator_driver);
886}
887module_exit(ab8500_regulator_exit);
888
889MODULE_LICENSE("GPL v2");
890MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
891MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
892MODULE_ALIAS("platform:ab8500-regulator");
kernel source for telekom puls (alcatel/mediatek)