regulator: ab8500: Prepare the driver for additional platforms
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / ab8500.c
CommitLineData
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
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6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
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8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
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13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
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17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
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21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
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23#include <linux/regulator/driver.h>
24#include <linux/regulator/machine.h>
25#include <linux/regulator/ab8500.h>
3a8334b9 26#include <linux/slab.h>
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27
28/**
29 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 30 * @dev: device pointer
c789ca20 31 * @desc: regulator description
c789ca20 32 * @regulator_dev: regulator device
bd28a157 33 * @is_enabled: status of regulator (on/off)
7ce4669c 34 * @load_lp_uA: maximum load in idle (low power) mode
47c16975 35 * @update_bank: bank to control on/off
c789ca20 36 * @update_reg: register to control on/off
bd28a157
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37 * @update_mask: mask to enable/disable and set mode of regulator
38 * @update_val: bits holding the regulator current mode
39 * @update_val_idle: bits to enable the regulator in idle (low power) mode
40 * @update_val_normal: bits to enable the regulator in normal (high power) mode
47c16975 41 * @voltage_bank: bank to control regulator voltage
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42 * @voltage_reg: register to control regulator voltage
43 * @voltage_mask: mask to control regulator voltage
a0a7014c 44 * @voltage_shift: shift to control regulator voltage
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45 */
46struct ab8500_regulator_info {
47 struct device *dev;
48 struct regulator_desc desc;
c789ca20 49 struct regulator_dev *regulator;
bd28a157 50 bool is_enabled;
7ce4669c 51 int load_lp_uA;
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52 u8 update_bank;
53 u8 update_reg;
e1159e6d 54 u8 update_mask;
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55 u8 update_val;
56 u8 update_val_idle;
57 u8 update_val_normal;
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58 u8 voltage_bank;
59 u8 voltage_reg;
60 u8 voltage_mask;
a0a7014c 61 u8 voltage_shift;
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62};
63
64/* voltage tables for the vauxn/vintcore supplies */
ec1cc4d9 65static const unsigned int ldo_vauxn_voltages[] = {
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66 1100000,
67 1200000,
68 1300000,
69 1400000,
70 1500000,
71 1800000,
72 1850000,
73 1900000,
74 2500000,
75 2650000,
76 2700000,
77 2750000,
78 2800000,
79 2900000,
80 3000000,
81 3300000,
82};
83
ec1cc4d9 84static const unsigned int ldo_vaux3_voltages[] = {
2b75151a
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85 1200000,
86 1500000,
87 1800000,
88 2100000,
89 2500000,
90 2750000,
91 2790000,
92 2910000,
93};
94
ec1cc4d9 95static const unsigned int ldo_vintcore_voltages[] = {
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96 1200000,
97 1225000,
98 1250000,
99 1275000,
100 1300000,
101 1325000,
102 1350000,
103};
104
105static int ab8500_regulator_enable(struct regulator_dev *rdev)
106{
fc24b426 107 int ret;
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108 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
109
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110 if (info == NULL) {
111 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 112 return -EINVAL;
fc24b426 113 }
c789ca20 114
47c16975 115 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d 116 info->update_bank, info->update_reg,
bd28a157 117 info->update_mask, info->update_val);
f71bf528 118 if (ret < 0) {
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119 dev_err(rdev_get_dev(rdev),
120 "couldn't set enable bits for regulator\n");
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121 return ret;
122 }
09aefa12 123
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124 info->is_enabled = true;
125
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126 dev_vdbg(rdev_get_dev(rdev),
127 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
128 info->desc.name, info->update_bank, info->update_reg,
bd28a157 129 info->update_mask, info->update_val);
09aefa12 130
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131 return ret;
132}
133
134static int ab8500_regulator_disable(struct regulator_dev *rdev)
135{
fc24b426 136 int ret;
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137 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
138
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139 if (info == NULL) {
140 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 141 return -EINVAL;
fc24b426 142 }
c789ca20 143
47c16975 144 ret = abx500_mask_and_set_register_interruptible(info->dev,
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145 info->update_bank, info->update_reg,
146 info->update_mask, 0x0);
f71bf528 147 if (ret < 0) {
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148 dev_err(rdev_get_dev(rdev),
149 "couldn't set disable bits for regulator\n");
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AL
150 return ret;
151 }
09aefa12 152
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153 info->is_enabled = false;
154
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155 dev_vdbg(rdev_get_dev(rdev),
156 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
157 info->desc.name, info->update_bank, info->update_reg,
158 info->update_mask, 0x0);
159
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160 return ret;
161}
162
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163static unsigned int ab8500_regulator_get_optimum_mode(
164 struct regulator_dev *rdev, int input_uV,
165 int output_uV, int load_uA)
166{
167 unsigned int mode;
168
169 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
170
171 if (info == NULL) {
172 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
173 return -EINVAL;
174 }
175
176 if (load_uA <= info->load_lp_uA)
177 mode = REGULATOR_MODE_IDLE;
178 else
179 mode = REGULATOR_MODE_NORMAL;
180
181 return mode;
182}
183
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184static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
185 unsigned int mode)
186{
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187 int ret;
188 u8 update_val;
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189 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
190
191 if (info == NULL) {
192 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
193 return -EINVAL;
194 }
195
196 switch (mode) {
197 case REGULATOR_MODE_NORMAL:
742a7325 198 update_val = info->update_val_normal;
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199 break;
200 case REGULATOR_MODE_IDLE:
742a7325 201 update_val = info->update_val_idle;
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202 break;
203 default:
204 return -EINVAL;
205 }
206
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207 /* ab8500 regulators share mode and enable in the same register bits.
208 off = 0b00
209 low power mode= 0b11
210 full powermode = 0b01
211 (HW control mode = 0b10)
212 Thus we don't write to the register when regulator is disabled.
213 */
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214 if (info->is_enabled) {
215 ret = abx500_mask_and_set_register_interruptible(info->dev,
216 info->update_bank, info->update_reg,
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217 info->update_mask, update_val);
218 if (ret < 0) {
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219 dev_err(rdev_get_dev(rdev),
220 "couldn't set regulator mode\n");
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221 return ret;
222 }
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223
224 dev_vdbg(rdev_get_dev(rdev),
225 "%s-set_mode (bank, reg, mask, value): "
226 "0x%x, 0x%x, 0x%x, 0x%x\n",
227 info->desc.name, info->update_bank, info->update_reg,
742a7325 228 info->update_mask, update_val);
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229 }
230
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231 info->update_val = update_val;
232
233 return 0;
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234}
235
236static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
237{
238 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
239 int ret;
240
241 if (info == NULL) {
242 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
243 return -EINVAL;
244 }
245
246 if (info->update_val == info->update_val_normal)
247 ret = REGULATOR_MODE_NORMAL;
248 else if (info->update_val == info->update_val_idle)
249 ret = REGULATOR_MODE_IDLE;
250 else
251 ret = -EINVAL;
252
253 return ret;
254}
255
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256static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
257{
fc24b426 258 int ret;
c789ca20 259 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 260 u8 regval;
c789ca20 261
fc24b426
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262 if (info == NULL) {
263 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 264 return -EINVAL;
fc24b426 265 }
c789ca20 266
47c16975 267 ret = abx500_get_register_interruptible(info->dev,
09aefa12 268 info->update_bank, info->update_reg, &regval);
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269 if (ret < 0) {
270 dev_err(rdev_get_dev(rdev),
271 "couldn't read 0x%x register\n", info->update_reg);
272 return ret;
273 }
274
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275 dev_vdbg(rdev_get_dev(rdev),
276 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
277 " 0x%x\n",
278 info->desc.name, info->update_bank, info->update_reg,
279 info->update_mask, regval);
280
281 if (regval & info->update_mask)
bd28a157 282 info->is_enabled = true;
c789ca20 283 else
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284 info->is_enabled = false;
285
286 return info->is_enabled;
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287}
288
3bf6e90e 289static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
c789ca20 290{
09aefa12 291 int ret, val;
c789ca20 292 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 293 u8 regval;
c789ca20 294
fc24b426
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295 if (info == NULL) {
296 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 297 return -EINVAL;
fc24b426 298 }
c789ca20 299
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300 ret = abx500_get_register_interruptible(info->dev,
301 info->voltage_bank, info->voltage_reg, &regval);
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302 if (ret < 0) {
303 dev_err(rdev_get_dev(rdev),
304 "couldn't read voltage reg for regulator\n");
305 return ret;
306 }
307
09aefa12 308 dev_vdbg(rdev_get_dev(rdev),
a0a7014c
LW
309 "%s-get_voltage (bank, reg, mask, shift, value): "
310 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
311 info->desc.name, info->voltage_bank,
312 info->voltage_reg, info->voltage_mask,
313 info->voltage_shift, regval);
09aefa12 314
09aefa12 315 val = regval & info->voltage_mask;
a0a7014c 316 return val >> info->voltage_shift;
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317}
318
ae713d39
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319static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
320 unsigned selector)
c789ca20 321{
fc24b426 322 int ret;
c789ca20 323 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 324 u8 regval;
c789ca20 325
fc24b426
BJ
326 if (info == NULL) {
327 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 328 return -EINVAL;
fc24b426 329 }
c789ca20 330
c789ca20 331 /* set the registers for the request */
a0a7014c 332 regval = (u8)selector << info->voltage_shift;
47c16975 333 ret = abx500_mask_and_set_register_interruptible(info->dev,
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334 info->voltage_bank, info->voltage_reg,
335 info->voltage_mask, regval);
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336 if (ret < 0)
337 dev_err(rdev_get_dev(rdev),
338 "couldn't set voltage reg for regulator\n");
339
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340 dev_vdbg(rdev_get_dev(rdev),
341 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
342 " 0x%x\n",
343 info->desc.name, info->voltage_bank, info->voltage_reg,
344 info->voltage_mask, regval);
345
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346 return ret;
347}
348
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349static struct regulator_ops ab8500_regulator_volt_mode_ops = {
350 .enable = ab8500_regulator_enable,
351 .disable = ab8500_regulator_disable,
352 .is_enabled = ab8500_regulator_is_enabled,
353 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
354 .set_mode = ab8500_regulator_set_mode,
355 .get_mode = ab8500_regulator_get_mode,
356 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
357 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
358 .list_voltage = regulator_list_voltage_table,
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359};
360
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361static struct regulator_ops ab8500_regulator_mode_ops = {
362 .enable = ab8500_regulator_enable,
363 .disable = ab8500_regulator_disable,
364 .is_enabled = ab8500_regulator_is_enabled,
365 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
366 .set_mode = ab8500_regulator_set_mode,
367 .get_mode = ab8500_regulator_get_mode,
368 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 369 .list_voltage = regulator_list_voltage_linear,
7ce4669c
BJ
370};
371
372static struct regulator_ops ab8500_regulator_ops = {
373 .enable = ab8500_regulator_enable,
374 .disable = ab8500_regulator_disable,
375 .is_enabled = ab8500_regulator_is_enabled,
376 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 377 .list_voltage = regulator_list_voltage_linear,
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378};
379
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380static struct ab8500_regulator_info
381 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 382 /*
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383 * Variable Voltage Regulators
384 * name, min mV, max mV,
385 * update bank, reg, mask, enable val
ec1cc4d9 386 * volt bank, reg, mask
c789ca20 387 */
6909b452
BJ
388 [AB8500_LDO_AUX1] = {
389 .desc = {
390 .name = "LDO-AUX1",
7ce4669c 391 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ
392 .type = REGULATOR_VOLTAGE,
393 .id = AB8500_LDO_AUX1,
394 .owner = THIS_MODULE,
395 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 396 .volt_table = ldo_vauxn_voltages,
530158b6 397 .enable_time = 200,
6909b452 398 },
7ce4669c 399 .load_lp_uA = 5000,
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BJ
400 .update_bank = 0x04,
401 .update_reg = 0x09,
402 .update_mask = 0x03,
bd28a157
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403 .update_val = 0x01,
404 .update_val_idle = 0x03,
405 .update_val_normal = 0x01,
6909b452
BJ
406 .voltage_bank = 0x04,
407 .voltage_reg = 0x1f,
408 .voltage_mask = 0x0f,
6909b452
BJ
409 },
410 [AB8500_LDO_AUX2] = {
411 .desc = {
412 .name = "LDO-AUX2",
7ce4669c 413 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ
414 .type = REGULATOR_VOLTAGE,
415 .id = AB8500_LDO_AUX2,
416 .owner = THIS_MODULE,
417 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 418 .volt_table = ldo_vauxn_voltages,
530158b6 419 .enable_time = 200,
6909b452 420 },
7ce4669c 421 .load_lp_uA = 5000,
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BJ
422 .update_bank = 0x04,
423 .update_reg = 0x09,
424 .update_mask = 0x0c,
bd28a157
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425 .update_val = 0x04,
426 .update_val_idle = 0x0c,
427 .update_val_normal = 0x04,
6909b452
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428 .voltage_bank = 0x04,
429 .voltage_reg = 0x20,
430 .voltage_mask = 0x0f,
6909b452
BJ
431 },
432 [AB8500_LDO_AUX3] = {
433 .desc = {
434 .name = "LDO-AUX3",
7ce4669c 435 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ
436 .type = REGULATOR_VOLTAGE,
437 .id = AB8500_LDO_AUX3,
438 .owner = THIS_MODULE,
439 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
ec1cc4d9 440 .volt_table = ldo_vaux3_voltages,
530158b6 441 .enable_time = 450,
6909b452 442 },
7ce4669c 443 .load_lp_uA = 5000,
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BJ
444 .update_bank = 0x04,
445 .update_reg = 0x0a,
446 .update_mask = 0x03,
bd28a157
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447 .update_val = 0x01,
448 .update_val_idle = 0x03,
449 .update_val_normal = 0x01,
6909b452
BJ
450 .voltage_bank = 0x04,
451 .voltage_reg = 0x21,
452 .voltage_mask = 0x07,
6909b452
BJ
453 },
454 [AB8500_LDO_INTCORE] = {
455 .desc = {
456 .name = "LDO-INTCORE",
7ce4669c 457 .ops = &ab8500_regulator_volt_mode_ops,
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BJ
458 .type = REGULATOR_VOLTAGE,
459 .id = AB8500_LDO_INTCORE,
460 .owner = THIS_MODULE,
461 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
ec1cc4d9 462 .volt_table = ldo_vintcore_voltages,
530158b6 463 .enable_time = 750,
6909b452 464 },
7ce4669c 465 .load_lp_uA = 5000,
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BJ
466 .update_bank = 0x03,
467 .update_reg = 0x80,
468 .update_mask = 0x44,
cc40dc29 469 .update_val = 0x44,
bd28a157
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470 .update_val_idle = 0x44,
471 .update_val_normal = 0x04,
6909b452
BJ
472 .voltage_bank = 0x03,
473 .voltage_reg = 0x80,
474 .voltage_mask = 0x38,
a0a7014c 475 .voltage_shift = 3,
6909b452 476 },
c789ca20
SI
477
478 /*
e1159e6d
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479 * Fixed Voltage Regulators
480 * name, fixed mV,
481 * update bank, reg, mask, enable val
c789ca20 482 */
6909b452
BJ
483 [AB8500_LDO_TVOUT] = {
484 .desc = {
485 .name = "LDO-TVOUT",
7ce4669c 486 .ops = &ab8500_regulator_mode_ops,
6909b452
BJ
487 .type = REGULATOR_VOLTAGE,
488 .id = AB8500_LDO_TVOUT,
489 .owner = THIS_MODULE,
490 .n_voltages = 1,
7142e213 491 .min_uV = 2000000,
7fee2afb 492 .enable_time = 10000,
6909b452 493 },
7ce4669c 494 .load_lp_uA = 1000,
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BJ
495 .update_bank = 0x03,
496 .update_reg = 0x80,
497 .update_mask = 0x82,
bd28a157 498 .update_val = 0x02,
7ce4669c
BJ
499 .update_val_idle = 0x82,
500 .update_val_normal = 0x02,
6909b452
BJ
501 },
502 [AB8500_LDO_AUDIO] = {
503 .desc = {
504 .name = "LDO-AUDIO",
7ce4669c 505 .ops = &ab8500_regulator_ops,
6909b452
BJ
506 .type = REGULATOR_VOLTAGE,
507 .id = AB8500_LDO_AUDIO,
508 .owner = THIS_MODULE,
509 .n_voltages = 1,
7142e213 510 .min_uV = 2000000,
530158b6 511 .enable_time = 140,
6909b452 512 },
6909b452
BJ
513 .update_bank = 0x03,
514 .update_reg = 0x83,
515 .update_mask = 0x02,
bd28a157 516 .update_val = 0x02,
6909b452
BJ
517 },
518 [AB8500_LDO_ANAMIC1] = {
519 .desc = {
520 .name = "LDO-ANAMIC1",
7ce4669c 521 .ops = &ab8500_regulator_ops,
6909b452
BJ
522 .type = REGULATOR_VOLTAGE,
523 .id = AB8500_LDO_ANAMIC1,
524 .owner = THIS_MODULE,
525 .n_voltages = 1,
7142e213 526 .min_uV = 2050000,
530158b6 527 .enable_time = 500,
6909b452 528 },
6909b452
BJ
529 .update_bank = 0x03,
530 .update_reg = 0x83,
531 .update_mask = 0x08,
bd28a157 532 .update_val = 0x08,
6909b452
BJ
533 },
534 [AB8500_LDO_ANAMIC2] = {
535 .desc = {
536 .name = "LDO-ANAMIC2",
7ce4669c 537 .ops = &ab8500_regulator_ops,
6909b452
BJ
538 .type = REGULATOR_VOLTAGE,
539 .id = AB8500_LDO_ANAMIC2,
540 .owner = THIS_MODULE,
541 .n_voltages = 1,
7142e213 542 .min_uV = 2050000,
530158b6 543 .enable_time = 500,
6909b452 544 },
6909b452
BJ
545 .update_bank = 0x03,
546 .update_reg = 0x83,
547 .update_mask = 0x10,
bd28a157 548 .update_val = 0x10,
6909b452
BJ
549 },
550 [AB8500_LDO_DMIC] = {
551 .desc = {
552 .name = "LDO-DMIC",
7ce4669c 553 .ops = &ab8500_regulator_ops,
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554 .type = REGULATOR_VOLTAGE,
555 .id = AB8500_LDO_DMIC,
556 .owner = THIS_MODULE,
557 .n_voltages = 1,
7142e213 558 .min_uV = 1800000,
530158b6 559 .enable_time = 420,
6909b452 560 },
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561 .update_bank = 0x03,
562 .update_reg = 0x83,
563 .update_mask = 0x04,
bd28a157 564 .update_val = 0x04,
6909b452 565 },
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566
567 /*
568 * Regulators with fixed voltage and normal/idle modes
569 */
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570 [AB8500_LDO_ANA] = {
571 .desc = {
572 .name = "LDO-ANA",
7ce4669c 573 .ops = &ab8500_regulator_mode_ops,
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574 .type = REGULATOR_VOLTAGE,
575 .id = AB8500_LDO_ANA,
576 .owner = THIS_MODULE,
577 .n_voltages = 1,
7142e213 578 .min_uV = 1200000,
530158b6 579 .enable_time = 140,
6909b452 580 },
7ce4669c 581 .load_lp_uA = 1000,
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582 .update_bank = 0x04,
583 .update_reg = 0x06,
584 .update_mask = 0x0c,
bd28a157 585 .update_val = 0x04,
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586 .update_val_idle = 0x0c,
587 .update_val_normal = 0x04,
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588 },
589
590
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591};
592
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593struct ab8500_reg_init {
594 u8 bank;
595 u8 addr;
596 u8 mask;
597};
598
599#define REG_INIT(_id, _bank, _addr, _mask) \
600 [_id] = { \
601 .bank = _bank, \
602 .addr = _addr, \
603 .mask = _mask, \
604 }
605
606static struct ab8500_reg_init ab8500_reg_init[] = {
607 /*
33bc8f46 608 * 0x30, VanaRequestCtrl
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609 * 0xc0, VextSupply1RequestCtrl
610 */
43a5911b 611 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
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612 /*
613 * 0x03, VextSupply2RequestCtrl
614 * 0x0c, VextSupply3RequestCtrl
615 * 0x30, Vaux1RequestCtrl
616 * 0xc0, Vaux2RequestCtrl
617 */
618 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
619 /*
620 * 0x03, Vaux3RequestCtrl
621 * 0x04, SwHPReq
622 */
623 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
624 /*
625 * 0x08, VanaSysClkReq1HPValid
626 * 0x20, Vaux1SysClkReq1HPValid
627 * 0x40, Vaux2SysClkReq1HPValid
628 * 0x80, Vaux3SysClkReq1HPValid
629 */
43a5911b 630 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
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631 /*
632 * 0x10, VextSupply1SysClkReq1HPValid
633 * 0x20, VextSupply2SysClkReq1HPValid
634 * 0x40, VextSupply3SysClkReq1HPValid
635 */
43a5911b 636 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
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637 /*
638 * 0x08, VanaHwHPReq1Valid
639 * 0x20, Vaux1HwHPReq1Valid
640 * 0x40, Vaux2HwHPReq1Valid
641 * 0x80, Vaux3HwHPReq1Valid
642 */
43a5911b 643 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
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644 /*
645 * 0x01, VextSupply1HwHPReq1Valid
646 * 0x02, VextSupply2HwHPReq1Valid
647 * 0x04, VextSupply3HwHPReq1Valid
648 */
43a5911b 649 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
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650 /*
651 * 0x08, VanaHwHPReq2Valid
652 * 0x20, Vaux1HwHPReq2Valid
653 * 0x40, Vaux2HwHPReq2Valid
654 * 0x80, Vaux3HwHPReq2Valid
655 */
43a5911b 656 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
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657 /*
658 * 0x01, VextSupply1HwHPReq2Valid
659 * 0x02, VextSupply2HwHPReq2Valid
660 * 0x04, VextSupply3HwHPReq2Valid
661 */
43a5911b 662 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
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663 /*
664 * 0x20, VanaSwHPReqValid
665 * 0x80, Vaux1SwHPReqValid
666 */
43a5911b 667 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
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668 /*
669 * 0x01, Vaux2SwHPReqValid
670 * 0x02, Vaux3SwHPReqValid
671 * 0x04, VextSupply1SwHPReqValid
672 * 0x08, VextSupply2SwHPReqValid
673 * 0x10, VextSupply3SwHPReqValid
674 */
43a5911b 675 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
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676 /*
677 * 0x02, SysClkReq2Valid1
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678 * 0x04, SysClkReq3Valid1
679 * 0x08, SysClkReq4Valid1
680 * 0x10, SysClkReq5Valid1
681 * 0x20, SysClkReq6Valid1
682 * 0x40, SysClkReq7Valid1
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683 * 0x80, SysClkReq8Valid1
684 */
685 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
686 /*
687 * 0x02, SysClkReq2Valid2
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688 * 0x04, SysClkReq3Valid2
689 * 0x08, SysClkReq4Valid2
690 * 0x10, SysClkReq5Valid2
691 * 0x20, SysClkReq6Valid2
692 * 0x40, SysClkReq7Valid2
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693 * 0x80, SysClkReq8Valid2
694 */
695 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
696 /*
697 * 0x02, VTVoutEna
698 * 0x04, Vintcore12Ena
699 * 0x38, Vintcore12Sel
700 * 0x40, Vintcore12LP
701 * 0x80, VTVoutLP
702 */
703 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
704 /*
705 * 0x02, VaudioEna
706 * 0x04, VdmicEna
707 * 0x08, Vamic1Ena
708 * 0x10, Vamic2Ena
709 */
710 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
711 /*
712 * 0x01, Vamic1_dzout
713 * 0x02, Vamic2_dzout
714 */
715 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
d79df329 716 /*
43a5911b 717 * 0x03, VpllRegu (NOTE! PRCMU register bits)
33bc8f46 718 * 0x0c, VanaRegu
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719 */
720 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
721 /*
722 * 0x01, VrefDDREna
723 * 0x02, VrefDDRSleepMode
724 */
725 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
726 /*
727 * 0x03, VextSupply1Regu
728 * 0x0c, VextSupply2Regu
729 * 0x30, VextSupply3Regu
730 * 0x40, ExtSupply2Bypass
731 * 0x80, ExtSupply3Bypass
732 */
733 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
734 /*
735 * 0x03, Vaux1Regu
736 * 0x0c, Vaux2Regu
737 */
738 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
739 /*
740 * 0x03, Vaux3Regu
741 */
43a5911b 742 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
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743 /*
744 * 0x0f, Vaux1Sel
745 */
746 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
747 /*
748 * 0x0f, Vaux2Sel
749 */
750 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
751 /*
752 * 0x07, Vaux3Sel
753 */
43a5911b 754 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
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755 /*
756 * 0x01, VextSupply12LP
757 */
758 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
759 /*
760 * 0x04, Vaux1Disch
761 * 0x08, Vaux2Disch
762 * 0x10, Vaux3Disch
763 * 0x20, Vintcore12Disch
764 * 0x40, VTVoutDisch
765 * 0x80, VaudioDisch
766 */
43a5911b 767 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
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768 /*
769 * 0x02, VanaDisch
770 * 0x04, VdmicPullDownEna
771 * 0x10, VdmicDisch
772 */
43a5911b 773 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
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774};
775
3c1b8438 776static int ab8500_regulator_init_registers(struct platform_device *pdev,
b54969ac 777 struct ab8500_reg_init *reg_init,
3c1b8438 778 int id, int mask, int value)
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779{
780 int err;
781
3c1b8438 782 BUG_ON(value & ~mask);
b54969ac 783 BUG_ON(mask & ~reg_init[id].mask);
a7ac1d9e 784
3c1b8438 785 /* initialize register */
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786 err = abx500_mask_and_set_register_interruptible(
787 &pdev->dev,
b54969ac
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788 reg_init[id].bank,
789 reg_init[id].addr,
3c1b8438 790 mask, value);
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791 if (err < 0) {
792 dev_err(&pdev->dev,
793 "Failed to initialize 0x%02x, 0x%02x.\n",
b54969ac
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794 reg_init[id].bank,
795 reg_init[id].addr);
a7ac1d9e
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796 return err;
797 }
a7ac1d9e 798 dev_vdbg(&pdev->dev,
3c1b8438 799 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
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800 reg_init[id].bank,
801 reg_init[id].addr,
3c1b8438 802 mask, value);
a7ac1d9e
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803
804 return 0;
805}
806
a5023574 807static int ab8500_regulator_register(struct platform_device *pdev,
b54969ac
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808 struct regulator_init_data *init_data,
809 struct ab8500_regulator_info *regulator_info,
810 int id, struct device_node *np)
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811{
812 struct ab8500_regulator_info *info = NULL;
813 struct regulator_config config = { };
814 int err;
815
816 /* assign per-regulator data */
b54969ac 817 info = &regulator_info[id];
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818 info->dev = &pdev->dev;
819
820 config.dev = &pdev->dev;
821 config.init_data = init_data;
822 config.driver_data = info;
823 config.of_node = np;
824
825 /* fix for hardware before ab8500v2.0 */
826 if (abx500_get_chip_id(info->dev) < 0x20) {
827 if (info->desc.id == AB8500_LDO_AUX3) {
828 info->desc.n_voltages =
829 ARRAY_SIZE(ldo_vauxn_voltages);
ec1cc4d9 830 info->desc.volt_table = ldo_vauxn_voltages;
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831 info->voltage_mask = 0xf;
832 }
833 }
834
835 /* register regulator with framework */
836 info->regulator = regulator_register(&info->desc, &config);
837 if (IS_ERR(info->regulator)) {
838 err = PTR_ERR(info->regulator);
839 dev_err(&pdev->dev, "failed to register regulator %s\n",
840 info->desc.name);
841 /* when we fail, un-register all earlier regulators */
842 while (--id >= 0) {
b54969ac 843 info = &regulator_info[id];
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844 regulator_unregister(info->regulator);
845 }
846 return err;
847 }
848
849 return 0;
850}
851
b54969ac 852static struct of_regulator_match ab8500_regulator_match[] = {
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853 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
854 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
855 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
856 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
857 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
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858 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
859 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
860 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
861 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
862 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
3a8334b9
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863};
864
a5023574 865static int
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866ab8500_regulator_of_probe(struct platform_device *pdev,
867 struct ab8500_regulator_info *regulator_info,
868 int regulator_info_size,
869 struct of_regulator_match *match,
870 struct device_node *np)
3a8334b9
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871{
872 int err, i;
873
b54969ac 874 for (i = 0; i < regulator_info_size; i++) {
3a8334b9 875 err = ab8500_regulator_register(
b54969ac
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876 pdev, match[i].init_data, regulator_info,
877 i, match[i].of_node);
3a8334b9
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878 if (err)
879 return err;
880 }
881
882 return 0;
883}
884
a5023574 885static int ab8500_regulator_probe(struct platform_device *pdev)
c789ca20
SI
886{
887 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3a8334b9 888 struct device_node *np = pdev->dev.of_node;
b54969ac 889 struct of_regulator_match *match;
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890 struct ab8500_platform_data *ppdata;
891 struct ab8500_regulator_platform_data *pdata;
c789ca20 892 int i, err;
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893 struct ab8500_regulator_info *regulator_info;
894 int regulator_info_size;
895 struct ab8500_reg_init *reg_init;
896 int reg_init_size;
897
898 regulator_info = ab8500_regulator_info;
899 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
900 reg_init = ab8500_reg_init;
901 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS;
902 match = ab8500_regulator_match;
903 match_size = ARRAY_SIZE(ab8500_regulator_match)
c789ca20 904
3a8334b9 905 if (np) {
b54969ac 906 err = of_regulator_match(&pdev->dev, np, match, match_size);
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907 if (err < 0) {
908 dev_err(&pdev->dev,
909 "Error parsing regulator init data: %d\n", err);
910 return err;
911 }
912
b54969ac
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913 err = ab8500_regulator_of_probe(pdev, regulator_info,
914 regulator_info_size, match, np);
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915 return err;
916 }
917
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918 if (!ab8500) {
919 dev_err(&pdev->dev, "null mfd parent\n");
920 return -EINVAL;
921 }
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922
923 ppdata = dev_get_platdata(ab8500->dev);
924 if (!ppdata) {
925 dev_err(&pdev->dev, "null parent pdata\n");
926 return -EINVAL;
927 }
928
929 pdata = ppdata->regulator;
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930 if (!pdata) {
931 dev_err(&pdev->dev, "null pdata\n");
932 return -EINVAL;
933 }
c789ca20 934
cb189b07 935 /* make sure the platform data has the correct size */
b54969ac 936 if (pdata->num_regulator != regulator_info_size) {
79568b94 937 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
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938 return -EINVAL;
939 }
940
da0b0c47
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941 /* initialize debug (initial state is recorded with this call) */
942 err = ab8500_regulator_debug_init(pdev);
943 if (err)
944 return err;
945
79568b94 946 /* initialize registers */
732805a5 947 for (i = 0; i < pdata->num_reg_init; i++) {
3c1b8438 948 int id, mask, value;
79568b94 949
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950 id = pdata->reg_init[i].id;
951 mask = pdata->reg_init[i].mask;
952 value = pdata->reg_init[i].value;
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953
954 /* check for configuration errors */
3c1b8438 955 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
79568b94 956
b54969ac 957 err = ab8500_regulator_init_registers(pdev, reg_init, id, mask, value);
a7ac1d9e 958 if (err < 0)
79568b94 959 return err;
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960 }
961
d1a82001
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962 /* register external regulators (before Vaux1, 2 and 3) */
963 err = ab8500_ext_regulator_init(pdev);
964 if (err)
965 return err;
966
c789ca20 967 /* register all regulators */
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968 for (i = 0; i < regulator_info_size; i++) {
969 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
970 regulator_info, i, NULL);
a7ac1d9e 971 if (err < 0)
c789ca20 972 return err;
c789ca20
SI
973 }
974
975 return 0;
976}
977
8dc995f5 978static int ab8500_regulator_remove(struct platform_device *pdev)
c789ca20 979{
d1a82001 980 int i, err;
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981 struct ab8500_regulator_info *regulator_info;
982 int regulator_info_size;
c789ca20 983
b54969ac
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984 regulator_info = ab8500_regulator_info;
985 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
986
987 for (i = 0; i < regulator_info_size; i++) {
c789ca20 988 struct ab8500_regulator_info *info = NULL;
b54969ac 989 info = &regulator_info[i];
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990
991 dev_vdbg(rdev_get_dev(info->regulator),
992 "%s-remove\n", info->desc.name);
993
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994 regulator_unregister(info->regulator);
995 }
996
d1a82001
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997 /* remove external regulators (after Vaux1, 2 and 3) */
998 err = ab8500_ext_regulator_exit(pdev);
999 if (err)
1000 return err;
1001
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1002 /* remove regulator debug */
1003 err = ab8500_regulator_debug_exit(pdev);
1004 if (err)
1005 return err;
1006
c789ca20
SI
1007 return 0;
1008}
1009
1010static struct platform_driver ab8500_regulator_driver = {
1011 .probe = ab8500_regulator_probe,
5eb9f2b9 1012 .remove = ab8500_regulator_remove,
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1013 .driver = {
1014 .name = "ab8500-regulator",
1015 .owner = THIS_MODULE,
1016 },
1017};
1018
1019static int __init ab8500_regulator_init(void)
1020{
1021 int ret;
1022
1023 ret = platform_driver_register(&ab8500_regulator_driver);
1024 if (ret != 0)
1025 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1026
1027 return ret;
1028}
1029subsys_initcall(ab8500_regulator_init);
1030
1031static void __exit ab8500_regulator_exit(void)
1032{
1033 platform_driver_unregister(&ab8500_regulator_driver);
1034}
1035module_exit(ab8500_regulator_exit);
1036
1037MODULE_LICENSE("GPL v2");
1038MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
732805a5 1039MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
c789ca20
SI
1040MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1041MODULE_ALIAS("platform:ab8500-regulator");