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regulator: ab8500: Remove USB regulator
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
c789ca20
SI		 17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
3a8334b9
LJ		 21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
c789ca20
SI		 23#include <linux/regulator/driver.h>
24#include <linux/regulator/machine.h>
25#include <linux/regulator/ab8500.h>
3a8334b9 26#include <linux/slab.h>
c789ca20
SI		 27
28/**
29 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 30 * @dev: device pointer
c789ca20 31 * @desc: regulator description
c789ca20 32 * @regulator_dev: regulator device
bd28a157 33 * @is_enabled: status of regulator (on/off)
7ce4669c 34 * @load_lp_uA: maximum load in idle (low power) mode
47c16975 35 * @update_bank: bank to control on/off
c789ca20 36 * @update_reg: register to control on/off
bd28a157
EV		 37 * @update_mask: mask to enable/disable and set mode of regulator
38 * @update_val: bits holding the regulator current mode
39 * @update_val_idle: bits to enable the regulator in idle (low power) mode
40 * @update_val_normal: bits to enable the regulator in normal (high power) mode
47c16975 41 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 42 * @voltage_reg: register to control regulator voltage
43 * @voltage_mask: mask to control regulator voltage
a0a7014c 44 * @voltage_shift: shift to control regulator voltage
c789ca20
SI		 45 */
46struct ab8500_regulator_info {
47 struct device *dev;
48 struct regulator_desc desc;
c789ca20 49 struct regulator_dev *regulator;
bd28a157 50 bool is_enabled;
7ce4669c 51 int load_lp_uA;
47c16975
MW		 52 u8 update_bank;
53 u8 update_reg;
e1159e6d 54 u8 update_mask;
bd28a157
EV		 55 u8 update_val;
56 u8 update_val_idle;
57 u8 update_val_normal;
47c16975
MW		 58 u8 voltage_bank;
59 u8 voltage_reg;
60 u8 voltage_mask;
a0a7014c 61 u8 voltage_shift;
c789ca20
SI		 62};
63
64/* voltage tables for the vauxn/vintcore supplies */
ec1cc4d9 65static const unsigned int ldo_vauxn_voltages[] = {
c789ca20
SI		 66 1100000,
67 1200000,
68 1300000,
69 1400000,
70 1500000,
71 1800000,
72 1850000,
73 1900000,
74 2500000,
75 2650000,
76 2700000,
77 2750000,
78 2800000,
79 2900000,
80 3000000,
81 3300000,
82};
83
ec1cc4d9 84static const unsigned int ldo_vaux3_voltages[] = {
2b75151a
BJ		 85 1200000,
86 1500000,
87 1800000,
88 2100000,
89 2500000,
90 2750000,
91 2790000,
92 2910000,
93};
94
ec1cc4d9 95static const unsigned int ldo_vintcore_voltages[] = {
c789ca20
SI		 96 1200000,
97 1225000,
98 1250000,
99 1275000,
100 1300000,
101 1325000,
102 1350000,
103};
104
105static int ab8500_regulator_enable(struct regulator_dev *rdev)
106{
fc24b426 107 int ret;
c789ca20
SI		 108 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
109
fc24b426
BJ		 110 if (info == NULL) {
111 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 112 return -EINVAL;
fc24b426 113 }
c789ca20 114
47c16975 115 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d 116 info->update_bank, info->update_reg,
bd28a157 117 info->update_mask, info->update_val);
f71bf528 118 if (ret < 0) {
c789ca20
SI		 119 dev_err(rdev_get_dev(rdev),
120 "couldn't set enable bits for regulator\n");
f71bf528
AL		 121 return ret;
122 }
09aefa12 123
bd28a157
EV		 124 info->is_enabled = true;
125
09aefa12
BJ		 126 dev_vdbg(rdev_get_dev(rdev),
127 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
128 info->desc.name, info->update_bank, info->update_reg,
bd28a157 129 info->update_mask, info->update_val);
09aefa12 130
c789ca20
SI		 131 return ret;
132}
133
134static int ab8500_regulator_disable(struct regulator_dev *rdev)
135{
fc24b426 136 int ret;
c789ca20
SI		 137 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
138
fc24b426
BJ		 139 if (info == NULL) {
140 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 141 return -EINVAL;
fc24b426 142 }
c789ca20 143
47c16975 144 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 145 info->update_bank, info->update_reg,
146 info->update_mask, 0x0);
f71bf528 147 if (ret < 0) {
c789ca20
SI		 148 dev_err(rdev_get_dev(rdev),
149 "couldn't set disable bits for regulator\n");
f71bf528
AL		 150 return ret;
151 }
09aefa12 152
bd28a157
EV		 153 info->is_enabled = false;
154
09aefa12
BJ		 155 dev_vdbg(rdev_get_dev(rdev),
156 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
157 info->desc.name, info->update_bank, info->update_reg,
158 info->update_mask, 0x0);
159
c789ca20
SI		 160 return ret;
161}
162
7ce4669c
BJ		 163static unsigned int ab8500_regulator_get_optimum_mode(
164 struct regulator_dev *rdev, int input_uV,
165 int output_uV, int load_uA)
166{
167 unsigned int mode;
168
169 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
170
171 if (info == NULL) {
172 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
173 return -EINVAL;
174 }
175
176 if (load_uA <= info->load_lp_uA)
177 mode = REGULATOR_MODE_IDLE;
178 else
179 mode = REGULATOR_MODE_NORMAL;
180
181 return mode;
182}
183
bd28a157
EV		 184static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
185 unsigned int mode)
186{
187 int ret = 0;
188
189 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
190
191 if (info == NULL) {
192 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
193 return -EINVAL;
194 }
195
196 switch (mode) {
197 case REGULATOR_MODE_NORMAL:
198 info->update_val = info->update_val_normal;
199 break;
200 case REGULATOR_MODE_IDLE:
201 info->update_val = info->update_val_idle;
202 break;
203 default:
204 return -EINVAL;
205 }
206
207 if (info->is_enabled) {
208 ret = abx500_mask_and_set_register_interruptible(info->dev,
209 info->update_bank, info->update_reg,
210 info->update_mask, info->update_val);
211 if (ret < 0)
212 dev_err(rdev_get_dev(rdev),
213 "couldn't set regulator mode\n");
7ce4669c
BJ		 214
215 dev_vdbg(rdev_get_dev(rdev),
216 "%s-set_mode (bank, reg, mask, value): "
217 "0x%x, 0x%x, 0x%x, 0x%x\n",
218 info->desc.name, info->update_bank, info->update_reg,
219 info->update_mask, info->update_val);
bd28a157
EV		 220 }
221
222 return ret;
223}
224
225static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
226{
227 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
228 int ret;
229
230 if (info == NULL) {
231 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
232 return -EINVAL;
233 }
234
235 if (info->update_val == info->update_val_normal)
236 ret = REGULATOR_MODE_NORMAL;
237 else if (info->update_val == info->update_val_idle)
238 ret = REGULATOR_MODE_IDLE;
239 else
240 ret = -EINVAL;
241
242 return ret;
243}
244
c789ca20
SI		 245static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
246{
fc24b426 247 int ret;
c789ca20 248 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 249 u8 regval;
c789ca20 250
fc24b426
BJ		 251 if (info == NULL) {
252 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 253 return -EINVAL;
fc24b426 254 }
c789ca20 255
47c16975 256 ret = abx500_get_register_interruptible(info->dev,
09aefa12 257 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 258 if (ret < 0) {
259 dev_err(rdev_get_dev(rdev),
260 "couldn't read 0x%x register\n", info->update_reg);
261 return ret;
262 }
263
09aefa12
BJ		 264 dev_vdbg(rdev_get_dev(rdev),
265 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
266 " 0x%x\n",
267 info->desc.name, info->update_bank, info->update_reg,
268 info->update_mask, regval);
269
270 if (regval & info->update_mask)
bd28a157 271 info->is_enabled = true;
c789ca20 272 else
bd28a157
EV		 273 info->is_enabled = false;
274
275 return info->is_enabled;
c789ca20
SI		 276}
277
3bf6e90e 278static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
c789ca20 279{
09aefa12 280 int ret, val;
c789ca20 281 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 282 u8 regval;
c789ca20 283
fc24b426
BJ		 284 if (info == NULL) {
285 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 286 return -EINVAL;
fc24b426 287 }
c789ca20 288
09aefa12
BJ		 289 ret = abx500_get_register_interruptible(info->dev,
290 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 291 if (ret < 0) {
292 dev_err(rdev_get_dev(rdev),
293 "couldn't read voltage reg for regulator\n");
294 return ret;
295 }
296
09aefa12 297 dev_vdbg(rdev_get_dev(rdev),
a0a7014c
LW		 298 "%s-get_voltage (bank, reg, mask, shift, value): "
299 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
300 info->desc.name, info->voltage_bank,
301 info->voltage_reg, info->voltage_mask,
302 info->voltage_shift, regval);
09aefa12 303
09aefa12 304 val = regval & info->voltage_mask;
a0a7014c 305 return val >> info->voltage_shift;
c789ca20
SI		 306}
307
ae713d39
AL		 308static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
309 unsigned selector)
c789ca20 310{
fc24b426 311 int ret;
c789ca20 312 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 313 u8 regval;
c789ca20 314
fc24b426
BJ		 315 if (info == NULL) {
316 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 317 return -EINVAL;
fc24b426 318 }
c789ca20 319
c789ca20 320 /* set the registers for the request */
a0a7014c 321 regval = (u8)selector << info->voltage_shift;
47c16975 322 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 323 info->voltage_bank, info->voltage_reg,
324 info->voltage_mask, regval);
c789ca20
SI		 325 if (ret < 0)
326 dev_err(rdev_get_dev(rdev),
327 "couldn't set voltage reg for regulator\n");
328
09aefa12
BJ		 329 dev_vdbg(rdev_get_dev(rdev),
330 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
331 " 0x%x\n",
332 info->desc.name, info->voltage_bank, info->voltage_reg,
333 info->voltage_mask, regval);
334
c789ca20
SI		 335 return ret;
336}
337
7ce4669c
BJ		 338static struct regulator_ops ab8500_regulator_volt_mode_ops = {
339 .enable = ab8500_regulator_enable,
340 .disable = ab8500_regulator_disable,
341 .is_enabled = ab8500_regulator_is_enabled,
342 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
343 .set_mode = ab8500_regulator_set_mode,
344 .get_mode = ab8500_regulator_get_mode,
345 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
346 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
347 .list_voltage = regulator_list_voltage_table,
c789ca20
SI		 348};
349
7ce4669c
BJ		 350static struct regulator_ops ab8500_regulator_mode_ops = {
351 .enable = ab8500_regulator_enable,
352 .disable = ab8500_regulator_disable,
353 .is_enabled = ab8500_regulator_is_enabled,
354 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
355 .set_mode = ab8500_regulator_set_mode,
356 .get_mode = ab8500_regulator_get_mode,
357 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 358 .list_voltage = regulator_list_voltage_linear,
7ce4669c
BJ		 359};
360
361static struct regulator_ops ab8500_regulator_ops = {
362 .enable = ab8500_regulator_enable,
363 .disable = ab8500_regulator_disable,
364 .is_enabled = ab8500_regulator_is_enabled,
365 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 366 .list_voltage = regulator_list_voltage_linear,
c789ca20
SI		 367};
368
6909b452
BJ		 369static struct ab8500_regulator_info
370 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 371 /*
e1159e6d
BJ		 372 * Variable Voltage Regulators
373 * name, min mV, max mV,
374 * update bank, reg, mask, enable val
ec1cc4d9 375 * volt bank, reg, mask
c789ca20 376 */
6909b452
BJ		 377 [AB8500_LDO_AUX1] = {
378 .desc = {
379 .name = "LDO-AUX1",
7ce4669c 380 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 381 .type = REGULATOR_VOLTAGE,
382 .id = AB8500_LDO_AUX1,
383 .owner = THIS_MODULE,
384 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 385 .volt_table = ldo_vauxn_voltages,
530158b6 386 .enable_time = 200,
6909b452 387 },
7ce4669c 388 .load_lp_uA = 5000,
6909b452
BJ		 389 .update_bank = 0x04,
390 .update_reg = 0x09,
391 .update_mask = 0x03,
bd28a157
EV		 392 .update_val = 0x01,
393 .update_val_idle = 0x03,
394 .update_val_normal = 0x01,
6909b452
BJ		 395 .voltage_bank = 0x04,
396 .voltage_reg = 0x1f,
397 .voltage_mask = 0x0f,
6909b452
BJ		 398 },
399 [AB8500_LDO_AUX2] = {
400 .desc = {
401 .name = "LDO-AUX2",
7ce4669c 402 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 403 .type = REGULATOR_VOLTAGE,
404 .id = AB8500_LDO_AUX2,
405 .owner = THIS_MODULE,
406 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 407 .volt_table = ldo_vauxn_voltages,
530158b6 408 .enable_time = 200,
6909b452 409 },
7ce4669c 410 .load_lp_uA = 5000,
6909b452
BJ		 411 .update_bank = 0x04,
412 .update_reg = 0x09,
413 .update_mask = 0x0c,
bd28a157
EV		 414 .update_val = 0x04,
415 .update_val_idle = 0x0c,
416 .update_val_normal = 0x04,
6909b452
BJ		 417 .voltage_bank = 0x04,
418 .voltage_reg = 0x20,
419 .voltage_mask = 0x0f,
6909b452
BJ		 420 },
421 [AB8500_LDO_AUX3] = {
422 .desc = {
423 .name = "LDO-AUX3",
7ce4669c 424 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 425 .type = REGULATOR_VOLTAGE,
426 .id = AB8500_LDO_AUX3,
427 .owner = THIS_MODULE,
428 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
ec1cc4d9 429 .volt_table = ldo_vaux3_voltages,
530158b6 430 .enable_time = 450,
6909b452 431 },
7ce4669c 432 .load_lp_uA = 5000,
6909b452
BJ		 433 .update_bank = 0x04,
434 .update_reg = 0x0a,
435 .update_mask = 0x03,
bd28a157
EV		 436 .update_val = 0x01,
437 .update_val_idle = 0x03,
438 .update_val_normal = 0x01,
6909b452
BJ		 439 .voltage_bank = 0x04,
440 .voltage_reg = 0x21,
441 .voltage_mask = 0x07,
6909b452
BJ		 442 },
443 [AB8500_LDO_INTCORE] = {
444 .desc = {
445 .name = "LDO-INTCORE",
7ce4669c 446 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 447 .type = REGULATOR_VOLTAGE,
448 .id = AB8500_LDO_INTCORE,
449 .owner = THIS_MODULE,
450 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
ec1cc4d9 451 .volt_table = ldo_vintcore_voltages,
530158b6 452 .enable_time = 750,
6909b452 453 },
7ce4669c 454 .load_lp_uA = 5000,
6909b452
BJ		 455 .update_bank = 0x03,
456 .update_reg = 0x80,
457 .update_mask = 0x44,
cc40dc29 458 .update_val = 0x44,
bd28a157
EV		 459 .update_val_idle = 0x44,
460 .update_val_normal = 0x04,
6909b452
BJ		 461 .voltage_bank = 0x03,
462 .voltage_reg = 0x80,
463 .voltage_mask = 0x38,
a0a7014c 464 .voltage_shift = 3,
6909b452 465 },
c789ca20
SI		 466
467 /*
e1159e6d
BJ		 468 * Fixed Voltage Regulators
469 * name, fixed mV,
470 * update bank, reg, mask, enable val
c789ca20 471 */
6909b452
BJ		 472 [AB8500_LDO_TVOUT] = {
473 .desc = {
474 .name = "LDO-TVOUT",
7ce4669c 475 .ops = &ab8500_regulator_mode_ops,
6909b452
BJ		 476 .type = REGULATOR_VOLTAGE,
477 .id = AB8500_LDO_TVOUT,
478 .owner = THIS_MODULE,
479 .n_voltages = 1,
7142e213 480 .min_uV = 2000000,
7fee2afb 481 .enable_time = 10000,
6909b452 482 },
7ce4669c 483 .load_lp_uA = 1000,
6909b452
BJ		 484 .update_bank = 0x03,
485 .update_reg = 0x80,
486 .update_mask = 0x82,
bd28a157 487 .update_val = 0x02,
7ce4669c
BJ		 488 .update_val_idle = 0x82,
489 .update_val_normal = 0x02,
6909b452
BJ		 490 },
491 [AB8500_LDO_AUDIO] = {
492 .desc = {
493 .name = "LDO-AUDIO",
7ce4669c 494 .ops = &ab8500_regulator_ops,
6909b452
BJ		 495 .type = REGULATOR_VOLTAGE,
496 .id = AB8500_LDO_AUDIO,
497 .owner = THIS_MODULE,
498 .n_voltages = 1,
7142e213 499 .min_uV = 2000000,
530158b6 500 .enable_time = 140,
6909b452 501 },
6909b452
BJ		 502 .update_bank = 0x03,
503 .update_reg = 0x83,
504 .update_mask = 0x02,
bd28a157 505 .update_val = 0x02,
6909b452
BJ		 506 },
507 [AB8500_LDO_ANAMIC1] = {
508 .desc = {
509 .name = "LDO-ANAMIC1",
7ce4669c 510 .ops = &ab8500_regulator_ops,
6909b452
BJ		 511 .type = REGULATOR_VOLTAGE,
512 .id = AB8500_LDO_ANAMIC1,
513 .owner = THIS_MODULE,
514 .n_voltages = 1,
7142e213 515 .min_uV = 2050000,
530158b6 516 .enable_time = 500,
6909b452 517 },
6909b452
BJ		 518 .update_bank = 0x03,
519 .update_reg = 0x83,
520 .update_mask = 0x08,
bd28a157 521 .update_val = 0x08,
6909b452
BJ		 522 },
523 [AB8500_LDO_ANAMIC2] = {
524 .desc = {
525 .name = "LDO-ANAMIC2",
7ce4669c 526 .ops = &ab8500_regulator_ops,
6909b452
BJ		 527 .type = REGULATOR_VOLTAGE,
528 .id = AB8500_LDO_ANAMIC2,
529 .owner = THIS_MODULE,
530 .n_voltages = 1,
7142e213 531 .min_uV = 2050000,
530158b6 532 .enable_time = 500,
6909b452 533 },
6909b452
BJ		 534 .update_bank = 0x03,
535 .update_reg = 0x83,
536 .update_mask = 0x10,
bd28a157 537 .update_val = 0x10,
6909b452
BJ		 538 },
539 [AB8500_LDO_DMIC] = {
540 .desc = {
541 .name = "LDO-DMIC",
7ce4669c 542 .ops = &ab8500_regulator_ops,
6909b452
BJ		 543 .type = REGULATOR_VOLTAGE,
544 .id = AB8500_LDO_DMIC,
545 .owner = THIS_MODULE,
546 .n_voltages = 1,
7142e213 547 .min_uV = 1800000,
530158b6 548 .enable_time = 420,
6909b452 549 },
6909b452
BJ		 550 .update_bank = 0x03,
551 .update_reg = 0x83,
552 .update_mask = 0x04,
bd28a157 553 .update_val = 0x04,
6909b452 554 },
7ce4669c
BJ		 555
556 /*
557 * Regulators with fixed voltage and normal/idle modes
558 */
6909b452
BJ		 559 [AB8500_LDO_ANA] = {
560 .desc = {
561 .name = "LDO-ANA",
7ce4669c 562 .ops = &ab8500_regulator_mode_ops,
6909b452
BJ		 563 .type = REGULATOR_VOLTAGE,
564 .id = AB8500_LDO_ANA,
565 .owner = THIS_MODULE,
566 .n_voltages = 1,
7142e213 567 .min_uV = 1200000,
530158b6 568 .enable_time = 140,
6909b452 569 },
7ce4669c 570 .load_lp_uA = 1000,
6909b452
BJ		 571 .update_bank = 0x04,
572 .update_reg = 0x06,
573 .update_mask = 0x0c,
bd28a157 574 .update_val = 0x04,
7ce4669c
BJ		 575 .update_val_idle = 0x0c,
576 .update_val_normal = 0x04,
6909b452
BJ		 577 },
578
579
c789ca20
SI		 580};
581
79568b94
BJ		 582struct ab8500_reg_init {
583 u8 bank;
584 u8 addr;
585 u8 mask;
586};
587
588#define REG_INIT(_id, _bank, _addr, _mask) \
589 [_id] = { \
590 .bank = _bank, \
591 .addr = _addr, \
592 .mask = _mask, \
593 }
594
595static struct ab8500_reg_init ab8500_reg_init[] = {
596 /*
33bc8f46 597 * 0x30, VanaRequestCtrl
79568b94
BJ		 598 * 0xc0, VextSupply1RequestCtrl
599 */
43a5911b 600 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
79568b94
BJ		 601 /*
602 * 0x03, VextSupply2RequestCtrl
603 * 0x0c, VextSupply3RequestCtrl
604 * 0x30, Vaux1RequestCtrl
605 * 0xc0, Vaux2RequestCtrl
606 */
607 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
608 /*
609 * 0x03, Vaux3RequestCtrl
610 * 0x04, SwHPReq
611 */
612 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
613 /*
614 * 0x08, VanaSysClkReq1HPValid
615 * 0x20, Vaux1SysClkReq1HPValid
616 * 0x40, Vaux2SysClkReq1HPValid
617 * 0x80, Vaux3SysClkReq1HPValid
618 */
43a5911b 619 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
79568b94
BJ		 620 /*
621 * 0x10, VextSupply1SysClkReq1HPValid
622 * 0x20, VextSupply2SysClkReq1HPValid
623 * 0x40, VextSupply3SysClkReq1HPValid
624 */
43a5911b 625 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
79568b94
BJ		 626 /*
627 * 0x08, VanaHwHPReq1Valid
628 * 0x20, Vaux1HwHPReq1Valid
629 * 0x40, Vaux2HwHPReq1Valid
630 * 0x80, Vaux3HwHPReq1Valid
631 */
43a5911b 632 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
79568b94
BJ		 633 /*
634 * 0x01, VextSupply1HwHPReq1Valid
635 * 0x02, VextSupply2HwHPReq1Valid
636 * 0x04, VextSupply3HwHPReq1Valid
637 */
43a5911b 638 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
79568b94
BJ		 639 /*
640 * 0x08, VanaHwHPReq2Valid
641 * 0x20, Vaux1HwHPReq2Valid
642 * 0x40, Vaux2HwHPReq2Valid
643 * 0x80, Vaux3HwHPReq2Valid
644 */
43a5911b 645 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
79568b94
BJ		 646 /*
647 * 0x01, VextSupply1HwHPReq2Valid
648 * 0x02, VextSupply2HwHPReq2Valid
649 * 0x04, VextSupply3HwHPReq2Valid
650 */
43a5911b 651 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
79568b94
BJ		 652 /*
653 * 0x20, VanaSwHPReqValid
654 * 0x80, Vaux1SwHPReqValid
655 */
43a5911b 656 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
79568b94
BJ		 657 /*
658 * 0x01, Vaux2SwHPReqValid
659 * 0x02, Vaux3SwHPReqValid
660 * 0x04, VextSupply1SwHPReqValid
661 * 0x08, VextSupply2SwHPReqValid
662 * 0x10, VextSupply3SwHPReqValid
663 */
43a5911b 664 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
79568b94
BJ		 665 /*
666 * 0x02, SysClkReq2Valid1
43a5911b
LJ		 667 * 0x04, SysClkReq3Valid1
668 * 0x08, SysClkReq4Valid1
669 * 0x10, SysClkReq5Valid1
670 * 0x20, SysClkReq6Valid1
671 * 0x40, SysClkReq7Valid1
79568b94
BJ		 672 * 0x80, SysClkReq8Valid1
673 */
674 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
675 /*
676 * 0x02, SysClkReq2Valid2
43a5911b
LJ		 677 * 0x04, SysClkReq3Valid2
678 * 0x08, SysClkReq4Valid2
679 * 0x10, SysClkReq5Valid2
680 * 0x20, SysClkReq6Valid2
681 * 0x40, SysClkReq7Valid2
79568b94
BJ		 682 * 0x80, SysClkReq8Valid2
683 */
684 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
685 /*
686 * 0x02, VTVoutEna
687 * 0x04, Vintcore12Ena
688 * 0x38, Vintcore12Sel
689 * 0x40, Vintcore12LP
690 * 0x80, VTVoutLP
691 */
692 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
693 /*
694 * 0x02, VaudioEna
695 * 0x04, VdmicEna
696 * 0x08, Vamic1Ena
697 * 0x10, Vamic2Ena
698 */
699 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
700 /*
701 * 0x01, Vamic1_dzout
702 * 0x02, Vamic2_dzout
703 */
704 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
d79df329 705 /*
43a5911b 706 * 0x03, VpllRegu (NOTE! PRCMU register bits)
33bc8f46 707 * 0x0c, VanaRegu
79568b94
BJ		 708 */
709 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
710 /*
711 * 0x01, VrefDDREna
712 * 0x02, VrefDDRSleepMode
713 */
714 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
715 /*
716 * 0x03, VextSupply1Regu
717 * 0x0c, VextSupply2Regu
718 * 0x30, VextSupply3Regu
719 * 0x40, ExtSupply2Bypass
720 * 0x80, ExtSupply3Bypass
721 */
722 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
723 /*
724 * 0x03, Vaux1Regu
725 * 0x0c, Vaux2Regu
726 */
727 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
728 /*
729 * 0x03, Vaux3Regu
730 */
43a5911b 731 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
79568b94
BJ		 732 /*
733 * 0x0f, Vaux1Sel
734 */
735 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
736 /*
737 * 0x0f, Vaux2Sel
738 */
739 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
740 /*
741 * 0x07, Vaux3Sel
742 */
43a5911b 743 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
79568b94
BJ		 744 /*
745 * 0x01, VextSupply12LP
746 */
747 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
748 /*
749 * 0x04, Vaux1Disch
750 * 0x08, Vaux2Disch
751 * 0x10, Vaux3Disch
752 * 0x20, Vintcore12Disch
753 * 0x40, VTVoutDisch
754 * 0x80, VaudioDisch
755 */
43a5911b 756 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
79568b94
BJ		 757 /*
758 * 0x02, VanaDisch
759 * 0x04, VdmicPullDownEna
760 * 0x10, VdmicDisch
761 */
43a5911b 762 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
79568b94
BJ		 763};
764
3c1b8438
LJ		 765static int ab8500_regulator_init_registers(struct platform_device *pdev,
766 int id, int mask, int value)
a7ac1d9e
LJ		 767{
768 int err;
769
3c1b8438
LJ		 770 BUG_ON(value & ~mask);
771 BUG_ON(mask & ~ab8500_reg_init[id].mask);
a7ac1d9e 772
3c1b8438 773 /* initialize register */
a7ac1d9e
LJ		 774 err = abx500_mask_and_set_register_interruptible(
775 &pdev->dev,
776 ab8500_reg_init[id].bank,
777 ab8500_reg_init[id].addr,
3c1b8438 778 mask, value);
a7ac1d9e
LJ		 779 if (err < 0) {
780 dev_err(&pdev->dev,
781 "Failed to initialize 0x%02x, 0x%02x.\n",
782 ab8500_reg_init[id].bank,
783 ab8500_reg_init[id].addr);
784 return err;
785 }
a7ac1d9e 786 dev_vdbg(&pdev->dev,
3c1b8438
LJ		 787 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
788 ab8500_reg_init[id].bank,
789 ab8500_reg_init[id].addr,
790 mask, value);
a7ac1d9e
LJ		 791
792 return 0;
793}
794
a5023574 795static int ab8500_regulator_register(struct platform_device *pdev,
a7ac1d9e
LJ		 796 struct regulator_init_data *init_data,
797 int id,
798 struct device_node *np)
799{
800 struct ab8500_regulator_info *info = NULL;
801 struct regulator_config config = { };
802 int err;
803
804 /* assign per-regulator data */
805 info = &ab8500_regulator_info[id];
806 info->dev = &pdev->dev;
807
808 config.dev = &pdev->dev;
809 config.init_data = init_data;
810 config.driver_data = info;
811 config.of_node = np;
812
813 /* fix for hardware before ab8500v2.0 */
814 if (abx500_get_chip_id(info->dev) < 0x20) {
815 if (info->desc.id == AB8500_LDO_AUX3) {
816 info->desc.n_voltages =
817 ARRAY_SIZE(ldo_vauxn_voltages);
ec1cc4d9 818 info->desc.volt_table = ldo_vauxn_voltages;
a7ac1d9e
LJ		 819 info->voltage_mask = 0xf;
820 }
821 }
822
823 /* register regulator with framework */
824 info->regulator = regulator_register(&info->desc, &config);
825 if (IS_ERR(info->regulator)) {
826 err = PTR_ERR(info->regulator);
827 dev_err(&pdev->dev, "failed to register regulator %s\n",
828 info->desc.name);
829 /* when we fail, un-register all earlier regulators */
830 while (--id >= 0) {
831 info = &ab8500_regulator_info[id];
832 regulator_unregister(info->regulator);
833 }
834 return err;
835 }
836
837 return 0;
838}
839
3a8334b9 840static struct of_regulator_match ab8500_regulator_matches[] = {
7e715b95
LJ		 841 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
842 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
843 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
844 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
845 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
7e715b95
LJ		 846 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
847 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
848 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
849 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
850 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
3a8334b9
LJ		 851};
852
a5023574 853static int
3a8334b9
LJ		 854ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
855{
856 int err, i;
857
858 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
859 err = ab8500_regulator_register(
860 pdev, ab8500_regulator_matches[i].init_data,
861 i, ab8500_regulator_matches[i].of_node);
862 if (err)
863 return err;
864 }
865
866 return 0;
867}
868
a5023574 869static int ab8500_regulator_probe(struct platform_device *pdev)
c789ca20
SI		 870{
871 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3a8334b9 872 struct device_node *np = pdev->dev.of_node;
732805a5
BJ		 873 struct ab8500_platform_data *ppdata;
874 struct ab8500_regulator_platform_data *pdata;
c789ca20
SI		 875 int i, err;
876
3a8334b9
LJ		 877 if (np) {
878 err = of_regulator_match(&pdev->dev, np,
879 ab8500_regulator_matches,
880 ARRAY_SIZE(ab8500_regulator_matches));
881 if (err < 0) {
882 dev_err(&pdev->dev,
883 "Error parsing regulator init data: %d\n", err);
884 return err;
885 }
886
887 err = ab8500_regulator_of_probe(pdev, np);
888 return err;
889 }
890
c789ca20
SI		 891 if (!ab8500) {
892 dev_err(&pdev->dev, "null mfd parent\n");
893 return -EINVAL;
894 }
732805a5
BJ		 895
896 ppdata = dev_get_platdata(ab8500->dev);
897 if (!ppdata) {
898 dev_err(&pdev->dev, "null parent pdata\n");
899 return -EINVAL;
900 }
901
902 pdata = ppdata->regulator;
fc24b426
BJ		 903 if (!pdata) {
904 dev_err(&pdev->dev, "null pdata\n");
905 return -EINVAL;
906 }
c789ca20 907
cb189b07
BJ		 908 /* make sure the platform data has the correct size */
909 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 910 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 911 return -EINVAL;
912 }
913
79568b94 914 /* initialize registers */
732805a5 915 for (i = 0; i < pdata->num_reg_init; i++) {
3c1b8438 916 int id, mask, value;
79568b94 917
732805a5
BJ		 918 id = pdata->reg_init[i].id;
919 mask = pdata->reg_init[i].mask;
920 value = pdata->reg_init[i].value;
79568b94
BJ		 921
922 /* check for configuration errors */
3c1b8438 923 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
79568b94 924
3c1b8438 925 err = ab8500_regulator_init_registers(pdev, id, mask, value);
a7ac1d9e 926 if (err < 0)
79568b94 927 return err;
79568b94
BJ		 928 }
929
d1a82001
LJ		 930 /* register external regulators (before Vaux1, 2 and 3) */
931 err = ab8500_ext_regulator_init(pdev);
932 if (err)
933 return err;
934
c789ca20
SI		 935 /* register all regulators */
936 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
a7ac1d9e
LJ		 937 err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
938 if (err < 0)
c789ca20 939 return err;
c789ca20
SI		 940 }
941
942 return 0;
943}
944
8dc995f5 945static int ab8500_regulator_remove(struct platform_device *pdev)
c789ca20 946{
d1a82001 947 int i, err;
c789ca20
SI		 948
949 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
950 struct ab8500_regulator_info *info = NULL;
951 info = &ab8500_regulator_info[i];
09aefa12
BJ		 952
953 dev_vdbg(rdev_get_dev(info->regulator),
954 "%s-remove\n", info->desc.name);
955
c789ca20
SI		 956 regulator_unregister(info->regulator);
957 }
958
d1a82001
LJ		 959 /* remove external regulators (after Vaux1, 2 and 3) */
960 err = ab8500_ext_regulator_exit(pdev);
961 if (err)
962 return err;
963
c789ca20
SI		 964 return 0;
965}
966
967static struct platform_driver ab8500_regulator_driver = {
968 .probe = ab8500_regulator_probe,
5eb9f2b9 969 .remove = ab8500_regulator_remove,
c789ca20
SI		 970 .driver = {
971 .name = "ab8500-regulator",
972 .owner = THIS_MODULE,
973 },
974};
975
976static int __init ab8500_regulator_init(void)
977{
978 int ret;
979
980 ret = platform_driver_register(&ab8500_regulator_driver);
981 if (ret != 0)
982 pr_err("Failed to register ab8500 regulator: %d\n", ret);
983
984 return ret;
985}
986subsys_initcall(ab8500_regulator_init);
987
988static void __exit ab8500_regulator_exit(void)
989{
990 platform_driver_unregister(&ab8500_regulator_driver);
991}
992module_exit(ab8500_regulator_exit);
993
994MODULE_LICENSE("GPL v2");
995MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
732805a5 996MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
c789ca20
SI		 997MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
998MODULE_ALIAS("platform:ab8500-regulator");
kernel source for telekom puls (alcatel/mediatek)