ARM: at91: fix board-rm9200-dt after sys_timer conversion
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / power / avs / smartreflex.c
CommitLineData
984aa6db
TG
1/*
2 * OMAP SmartReflex Voltage Control
3 *
4 * Author: Thara Gopinath <thara@ti.com>
5 *
21ff63ad 6 * Copyright (C) 2012 Texas Instruments, Inc.
984aa6db
TG
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008 Nokia Corporation
10 * Kalle Jokiniemi
11 *
12 * Copyright (C) 2007 Texas Instruments, Inc.
13 * Lesly A M <x0080970@ti.com>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
a1bcc1dc 20#include <linux/module.h>
984aa6db
TG
21#include <linux/interrupt.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24#include <linux/debugfs.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/pm_runtime.h>
b86aeafc 28#include <linux/power/smartreflex.h>
984aa6db 29
ec2c0825
TL
30#include <plat/cpu.h>
31
984aa6db 32#define SMARTREFLEX_NAME_LEN 16
077fceca 33#define NVALUE_NAME_LEN 40
984aa6db
TG
34#define SR_DISABLE_TIMEOUT 200
35
984aa6db
TG
36/* sr_list contains all the instances of smartreflex module */
37static LIST_HEAD(sr_list);
38
39static struct omap_sr_class_data *sr_class;
40static struct omap_sr_pmic_data *sr_pmic_data;
633ef8b7 41static struct dentry *sr_dbg_dir;
984aa6db
TG
42
43static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
44{
45 __raw_writel(value, (sr->base + offset));
46}
47
48static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
49 u32 value)
50{
51 u32 reg_val;
984aa6db
TG
52
53 /*
54 * Smartreflex error config register is special as it contains
55 * certain status bits which if written a 1 into means a clear
56 * of those bits. So in order to make sure no accidental write of
57 * 1 happens to those status bits, do a clear of them in the read
58 * value. This mean this API doesn't rewrite values in these bits
59 * if they are currently set, but does allow the caller to write
60 * those bits.
61 */
ade6ec05
NM
62 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
63 mask |= ERRCONFIG_STATUS_V1_MASK;
64 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
65 mask |= ERRCONFIG_VPBOUNDINTST_V2;
66
67 reg_val = __raw_readl(sr->base + offset);
68 reg_val &= ~mask;
984aa6db 69
ade6ec05 70 value &= mask;
984aa6db
TG
71
72 reg_val |= value;
73
74 __raw_writel(reg_val, (sr->base + offset));
75}
76
77static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
78{
79 return __raw_readl(sr->base + offset);
80}
81
82static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
83{
84 struct omap_sr *sr_info;
85
86 if (!voltdm) {
87 pr_err("%s: Null voltage domain passed!\n", __func__);
88 return ERR_PTR(-EINVAL);
89 }
90
91 list_for_each_entry(sr_info, &sr_list, node) {
92 if (voltdm == sr_info->voltdm)
93 return sr_info;
94 }
95
96 return ERR_PTR(-ENODATA);
97}
98
99static irqreturn_t sr_interrupt(int irq, void *data)
100{
4018bfeb 101 struct omap_sr *sr_info = data;
984aa6db
TG
102 u32 status = 0;
103
4018bfeb
FB
104 switch (sr_info->ip_type) {
105 case SR_TYPE_V1:
984aa6db
TG
106 /* Read the status bits */
107 status = sr_read_reg(sr_info, ERRCONFIG_V1);
108
109 /* Clear them by writing back */
110 sr_write_reg(sr_info, ERRCONFIG_V1, status);
4018bfeb
FB
111 break;
112 case SR_TYPE_V2:
984aa6db 113 /* Read the status bits */
5a4f1844 114 status = sr_read_reg(sr_info, IRQSTATUS);
984aa6db
TG
115
116 /* Clear them by writing back */
117 sr_write_reg(sr_info, IRQSTATUS, status);
4018bfeb
FB
118 break;
119 default:
120 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
121 sr_info->ip_type);
122 return IRQ_NONE;
984aa6db
TG
123 }
124
7a89afa8 125 if (sr_class->notify)
80821c9c 126 sr_class->notify(sr_info, status);
984aa6db
TG
127
128 return IRQ_HANDLED;
129}
130
131static void sr_set_clk_length(struct omap_sr *sr)
132{
98aed08e
JP
133 struct clk *fck;
134 u32 fclk_speed;
984aa6db 135
98aed08e 136 fck = clk_get(&sr->pdev->dev, "fck");
b35cecf9 137
98aed08e
JP
138 if (IS_ERR(fck)) {
139 dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
140 __func__, dev_name(&sr->pdev->dev));
984aa6db
TG
141 return;
142 }
4018bfeb 143
98aed08e
JP
144 fclk_speed = clk_get_rate(fck);
145 clk_put(fck);
984aa6db 146
98aed08e 147 switch (fclk_speed) {
984aa6db
TG
148 case 12000000:
149 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
150 break;
151 case 13000000:
152 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
153 break;
154 case 19200000:
155 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
156 break;
157 case 26000000:
158 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
159 break;
160 case 38400000:
161 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
162 break;
163 default:
98aed08e
JP
164 dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
165 __func__, fclk_speed);
984aa6db
TG
166 break;
167 }
168}
169
984aa6db
TG
170static void sr_start_vddautocomp(struct omap_sr *sr)
171{
172 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
173 dev_warn(&sr->pdev->dev,
174 "%s: smartreflex class driver not registered\n",
175 __func__);
176 return;
177 }
178
80821c9c 179 if (!sr_class->enable(sr))
984aa6db
TG
180 sr->autocomp_active = true;
181}
182
183static void sr_stop_vddautocomp(struct omap_sr *sr)
184{
185 if (!sr_class || !(sr_class->disable)) {
186 dev_warn(&sr->pdev->dev,
187 "%s: smartreflex class driver not registered\n",
188 __func__);
189 return;
190 }
191
192 if (sr->autocomp_active) {
80821c9c 193 sr_class->disable(sr, 1);
984aa6db
TG
194 sr->autocomp_active = false;
195 }
196}
197
198/*
199 * This function handles the intializations which have to be done
200 * only when both sr device and class driver regiter has
201 * completed. This will be attempted to be called from both sr class
202 * driver register and sr device intializtion API's. Only one call
203 * will ultimately succeed.
204 *
fb914ebf 205 * Currently this function registers interrupt handler for a particular SR
984aa6db
TG
206 * if smartreflex class driver is already registered and has
207 * requested for interrupts and the SR interrupt line in present.
208 */
209static int sr_late_init(struct omap_sr *sr_info)
210{
984aa6db
TG
211 struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
212 struct resource *mem;
213 int ret = 0;
214
7a89afa8 215 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
984aa6db 216 ret = request_irq(sr_info->irq, sr_interrupt,
8b765d72 217 0, sr_info->name, sr_info);
984aa6db
TG
218 if (ret)
219 goto error;
1279ba59 220 disable_irq(sr_info->irq);
984aa6db
TG
221 }
222
223 if (pdata && pdata->enable_on_init)
224 sr_start_vddautocomp(sr_info);
225
226 return ret;
227
228error:
442155ad
NM
229 iounmap(sr_info->base);
230 mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
231 release_mem_region(mem->start, resource_size(mem));
232 list_del(&sr_info->node);
233 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
234 "interrupt handler. Smartreflex will"
235 "not function as desired\n", __func__);
442155ad 236 kfree(sr_info);
4018bfeb 237
442155ad 238 return ret;
984aa6db
TG
239}
240
241static void sr_v1_disable(struct omap_sr *sr)
242{
243 int timeout = 0;
cfec9c54
NM
244 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
245 ERRCONFIG_MCUBOUNDINTST;
984aa6db
TG
246
247 /* Enable MCUDisableAcknowledge interrupt */
248 sr_modify_reg(sr, ERRCONFIG_V1,
249 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
250
251 /* SRCONFIG - disable SR */
252 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
253
cfec9c54
NM
254 /* Disable all other SR interrupts and clear the status as needed */
255 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
256 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
984aa6db
TG
257 sr_modify_reg(sr, ERRCONFIG_V1,
258 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
259 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
cfec9c54 260 errconf_val);
984aa6db
TG
261
262 /*
263 * Wait for SR to be disabled.
264 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
265 */
50e4a7d0
JP
266 sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
267 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
268 timeout);
984aa6db
TG
269
270 if (timeout >= SR_DISABLE_TIMEOUT)
271 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
272 __func__);
273
274 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
275 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
276 ERRCONFIG_MCUDISACKINTST);
277}
278
279static void sr_v2_disable(struct omap_sr *sr)
280{
281 int timeout = 0;
282
283 /* Enable MCUDisableAcknowledge interrupt */
284 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
285
286 /* SRCONFIG - disable SR */
287 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
288
cfec9c54
NM
289 /*
290 * Disable all other SR interrupts and clear the status
291 * write to status register ONLY on need basis - only if status
292 * is set.
293 */
294 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
295 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
984aa6db 296 ERRCONFIG_VPBOUNDINTST_V2);
cfec9c54
NM
297 else
298 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
299 0x0);
984aa6db
TG
300 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
301 IRQENABLE_MCUVALIDINT |
302 IRQENABLE_MCUBOUNDSINT));
303 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
304 IRQSTATUS_MCVALIDINT |
305 IRQSTATUS_MCBOUNDSINT));
306
307 /*
308 * Wait for SR to be disabled.
309 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
310 */
50e4a7d0
JP
311 sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
312 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
313 timeout);
984aa6db
TG
314
315 if (timeout >= SR_DISABLE_TIMEOUT)
316 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
317 __func__);
318
319 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
320 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
321 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
322}
323
5e7f2e12
JP
324static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
325 struct omap_sr *sr, u32 efuse_offs)
984aa6db
TG
326{
327 int i;
328
329 if (!sr->nvalue_table) {
330 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
331 __func__);
5e7f2e12 332 return NULL;
984aa6db
TG
333 }
334
335 for (i = 0; i < sr->nvalue_count; i++) {
336 if (sr->nvalue_table[i].efuse_offs == efuse_offs)
5e7f2e12 337 return &sr->nvalue_table[i];
984aa6db
TG
338 }
339
5e7f2e12 340 return NULL;
984aa6db
TG
341}
342
343/* Public Functions */
344
345/**
346 * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
347 * error generator module.
348 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
349 *
350 * This API is to be called from the smartreflex class driver to
351 * configure the error generator module inside the smartreflex module.
352 * SR settings if using the ERROR module inside Smartreflex.
353 * SR CLASS 3 by default uses only the ERROR module where as
354 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
355 * module. Returns 0 on success and error value in case of failure.
356 */
357int sr_configure_errgen(struct voltagedomain *voltdm)
358{
4018bfeb
FB
359 u32 sr_config, sr_errconfig, errconfig_offs;
360 u32 vpboundint_en, vpboundint_st;
361 u32 senp_en = 0, senn_en = 0;
984aa6db
TG
362 u8 senp_shift, senn_shift;
363 struct omap_sr *sr = _sr_lookup(voltdm);
364
365 if (IS_ERR(sr)) {
8b765d72 366 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
63371faf 367 return PTR_ERR(sr);
984aa6db
TG
368 }
369
370 if (!sr->clk_length)
371 sr_set_clk_length(sr);
372
373 senp_en = sr->senp_mod;
374 senn_en = sr->senn_mod;
375
376 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
377 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
378
4018bfeb
FB
379 switch (sr->ip_type) {
380 case SR_TYPE_V1:
984aa6db
TG
381 sr_config |= SRCONFIG_DELAYCTRL;
382 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
383 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
384 errconfig_offs = ERRCONFIG_V1;
385 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
386 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
4018bfeb
FB
387 break;
388 case SR_TYPE_V2:
984aa6db
TG
389 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
390 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
391 errconfig_offs = ERRCONFIG_V2;
392 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
393 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
4018bfeb
FB
394 break;
395 default:
984aa6db
TG
396 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
397 "module without specifying the ip\n", __func__);
398 return -EINVAL;
399 }
400
401 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
402 sr_write_reg(sr, SRCONFIG, sr_config);
403 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
404 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
405 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
406 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
407 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
408 sr_errconfig);
409
410 /* Enabling the interrupts if the ERROR module is used */
74754cc5
NM
411 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
412 vpboundint_en);
984aa6db
TG
413
414 return 0;
415}
416
ad54c3dd
NM
417/**
418 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
419 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
420 *
421 * This API is to be called from the smartreflex class driver to
422 * disable the error generator module inside the smartreflex module.
423 *
424 * Returns 0 on success and error value in case of failure.
425 */
426int sr_disable_errgen(struct voltagedomain *voltdm)
427{
4018bfeb
FB
428 u32 errconfig_offs;
429 u32 vpboundint_en, vpboundint_st;
ad54c3dd
NM
430 struct omap_sr *sr = _sr_lookup(voltdm);
431
432 if (IS_ERR(sr)) {
8b765d72 433 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
63371faf 434 return PTR_ERR(sr);
ad54c3dd
NM
435 }
436
4018bfeb
FB
437 switch (sr->ip_type) {
438 case SR_TYPE_V1:
ad54c3dd
NM
439 errconfig_offs = ERRCONFIG_V1;
440 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
441 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
4018bfeb
FB
442 break;
443 case SR_TYPE_V2:
ad54c3dd
NM
444 errconfig_offs = ERRCONFIG_V2;
445 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
446 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
4018bfeb
FB
447 break;
448 default:
ad54c3dd
NM
449 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
450 "module without specifying the ip\n", __func__);
451 return -EINVAL;
452 }
453
454 /* Disable the interrupts of ERROR module */
455 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
456
457 /* Disable the Sensor and errorgen */
458 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
459
460 return 0;
461}
462
984aa6db
TG
463/**
464 * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
465 * minmaxavg module.
466 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
467 *
468 * This API is to be called from the smartreflex class driver to
469 * configure the minmaxavg module inside the smartreflex module.
470 * SR settings if using the ERROR module inside Smartreflex.
471 * SR CLASS 3 by default uses only the ERROR module where as
472 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
473 * module. Returns 0 on success and error value in case of failure.
474 */
475int sr_configure_minmax(struct voltagedomain *voltdm)
476{
477 u32 sr_config, sr_avgwt;
478 u32 senp_en = 0, senn_en = 0;
479 u8 senp_shift, senn_shift;
480 struct omap_sr *sr = _sr_lookup(voltdm);
481
482 if (IS_ERR(sr)) {
8b765d72 483 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
63371faf 484 return PTR_ERR(sr);
984aa6db
TG
485 }
486
487 if (!sr->clk_length)
488 sr_set_clk_length(sr);
489
490 senp_en = sr->senp_mod;
491 senn_en = sr->senn_mod;
492
493 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
494 SRCONFIG_SENENABLE |
495 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
496
4018bfeb
FB
497 switch (sr->ip_type) {
498 case SR_TYPE_V1:
984aa6db
TG
499 sr_config |= SRCONFIG_DELAYCTRL;
500 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
501 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
4018bfeb
FB
502 break;
503 case SR_TYPE_V2:
984aa6db
TG
504 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
505 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
4018bfeb
FB
506 break;
507 default:
984aa6db
TG
508 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
509 "module without specifying the ip\n", __func__);
510 return -EINVAL;
511 }
512
513 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
514 sr_write_reg(sr, SRCONFIG, sr_config);
515 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
516 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
517 sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
518
519 /*
520 * Enabling the interrupts if MINMAXAVG module is used.
521 * TODO: check if all the interrupts are mandatory
522 */
4018bfeb
FB
523 switch (sr->ip_type) {
524 case SR_TYPE_V1:
984aa6db
TG
525 sr_modify_reg(sr, ERRCONFIG_V1,
526 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
527 ERRCONFIG_MCUBOUNDINTEN),
528 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
529 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
530 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
4018bfeb
FB
531 break;
532 case SR_TYPE_V2:
984aa6db
TG
533 sr_write_reg(sr, IRQSTATUS,
534 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
535 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
536 sr_write_reg(sr, IRQENABLE_SET,
537 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
538 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
4018bfeb
FB
539 break;
540 default:
541 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
542 "module without specifying the ip\n", __func__);
543 return -EINVAL;
984aa6db
TG
544 }
545
546 return 0;
547}
548
549/**
550 * sr_enable() - Enables the smartreflex module.
551 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
552 * @volt: The voltage at which the Voltage domain associated with
553 * the smartreflex module is operating at.
554 * This is required only to program the correct Ntarget value.
555 *
556 * This API is to be called from the smartreflex class driver to
557 * enable a smartreflex module. Returns 0 on success. Returns error
558 * value if the voltage passed is wrong or if ntarget value is wrong.
559 */
560int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
561{
984aa6db
TG
562 struct omap_volt_data *volt_data;
563 struct omap_sr *sr = _sr_lookup(voltdm);
5e7f2e12 564 struct omap_sr_nvalue_table *nvalue_row;
984aa6db
TG
565 int ret;
566
567 if (IS_ERR(sr)) {
8b765d72 568 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
63371faf 569 return PTR_ERR(sr);
984aa6db
TG
570 }
571
572 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
573
574 if (IS_ERR(volt_data)) {
575 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
576 "for nominal voltage %ld\n", __func__, volt);
63371faf 577 return PTR_ERR(volt_data);
984aa6db
TG
578 }
579
5e7f2e12 580 nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
984aa6db 581
5e7f2e12
JP
582 if (!nvalue_row) {
583 dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
584 __func__, volt);
984aa6db
TG
585 return -ENODATA;
586 }
587
588 /* errminlimit is opp dependent and hence linked to voltage */
5e7f2e12 589 sr->err_minlimit = nvalue_row->errminlimit;
984aa6db
TG
590
591 pm_runtime_get_sync(&sr->pdev->dev);
592
593 /* Check if SR is already enabled. If yes do nothing */
594 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
595 return 0;
596
597 /* Configure SR */
80821c9c 598 ret = sr_class->configure(sr);
984aa6db
TG
599 if (ret)
600 return ret;
601
5e7f2e12 602 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
984aa6db
TG
603
604 /* SRCONFIG - enable SR */
605 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
606 return 0;
607}
608
609/**
610 * sr_disable() - Disables the smartreflex module.
611 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
612 *
613 * This API is to be called from the smartreflex class driver to
614 * disable a smartreflex module.
615 */
616void sr_disable(struct voltagedomain *voltdm)
617{
618 struct omap_sr *sr = _sr_lookup(voltdm);
619
620 if (IS_ERR(sr)) {
8b765d72 621 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
984aa6db
TG
622 return;
623 }
624
625 /* Check if SR clocks are already disabled. If yes do nothing */
626 if (pm_runtime_suspended(&sr->pdev->dev))
627 return;
628
629 /*
630 * Disable SR if only it is indeed enabled. Else just
631 * disable the clocks.
632 */
633 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
4018bfeb
FB
634 switch (sr->ip_type) {
635 case SR_TYPE_V1:
984aa6db 636 sr_v1_disable(sr);
4018bfeb
FB
637 break;
638 case SR_TYPE_V2:
984aa6db 639 sr_v2_disable(sr);
4018bfeb
FB
640 break;
641 default:
642 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
643 sr->ip_type);
644 }
984aa6db
TG
645 }
646
98333b3d 647 pm_runtime_put_sync_suspend(&sr->pdev->dev);
984aa6db
TG
648}
649
650/**
651 * sr_register_class() - API to register a smartreflex class parameters.
652 * @class_data: The structure containing various sr class specific data.
653 *
654 * This API is to be called by the smartreflex class driver to register itself
655 * with the smartreflex driver during init. Returns 0 on success else the
656 * error value.
657 */
658int sr_register_class(struct omap_sr_class_data *class_data)
659{
660 struct omap_sr *sr_info;
661
662 if (!class_data) {
663 pr_warning("%s:, Smartreflex class data passed is NULL\n",
664 __func__);
665 return -EINVAL;
666 }
667
668 if (sr_class) {
669 pr_warning("%s: Smartreflex class driver already registered\n",
670 __func__);
671 return -EBUSY;
672 }
673
674 sr_class = class_data;
675
676 /*
677 * Call into late init to do intializations that require
678 * both sr driver and sr class driver to be initiallized.
679 */
680 list_for_each_entry(sr_info, &sr_list, node)
681 sr_late_init(sr_info);
682
683 return 0;
684}
685
686/**
687 * omap_sr_enable() - API to enable SR clocks and to call into the
688 * registered smartreflex class enable API.
689 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
690 *
691 * This API is to be called from the kernel in order to enable
692 * a particular smartreflex module. This API will do the initial
693 * configurations to turn on the smartreflex module and in turn call
694 * into the registered smartreflex class enable API.
695 */
696void omap_sr_enable(struct voltagedomain *voltdm)
697{
698 struct omap_sr *sr = _sr_lookup(voltdm);
699
700 if (IS_ERR(sr)) {
8b765d72 701 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
984aa6db
TG
702 return;
703 }
704
705 if (!sr->autocomp_active)
706 return;
707
708 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
709 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
710 "registered\n", __func__);
711 return;
712 }
713
80821c9c 714 sr_class->enable(sr);
984aa6db
TG
715}
716
717/**
718 * omap_sr_disable() - API to disable SR without resetting the voltage
719 * processor voltage
720 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
721 *
722 * This API is to be called from the kernel in order to disable
723 * a particular smartreflex module. This API will in turn call
724 * into the registered smartreflex class disable API. This API will tell
725 * the smartreflex class disable not to reset the VP voltage after
726 * disabling smartreflex.
727 */
728void omap_sr_disable(struct voltagedomain *voltdm)
729{
730 struct omap_sr *sr = _sr_lookup(voltdm);
731
732 if (IS_ERR(sr)) {
8b765d72 733 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
984aa6db
TG
734 return;
735 }
736
737 if (!sr->autocomp_active)
738 return;
739
740 if (!sr_class || !(sr_class->disable)) {
741 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
742 "registered\n", __func__);
743 return;
744 }
745
80821c9c 746 sr_class->disable(sr, 0);
984aa6db
TG
747}
748
749/**
750 * omap_sr_disable_reset_volt() - API to disable SR and reset the
751 * voltage processor voltage
752 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
753 *
754 * This API is to be called from the kernel in order to disable
755 * a particular smartreflex module. This API will in turn call
756 * into the registered smartreflex class disable API. This API will tell
757 * the smartreflex class disable to reset the VP voltage after
758 * disabling smartreflex.
759 */
760void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
761{
762 struct omap_sr *sr = _sr_lookup(voltdm);
763
764 if (IS_ERR(sr)) {
8b765d72 765 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
984aa6db
TG
766 return;
767 }
768
769 if (!sr->autocomp_active)
770 return;
771
772 if (!sr_class || !(sr_class->disable)) {
773 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
774 "registered\n", __func__);
775 return;
776 }
777
80821c9c 778 sr_class->disable(sr, 1);
984aa6db
TG
779}
780
781/**
782 * omap_sr_register_pmic() - API to register pmic specific info.
783 * @pmic_data: The structure containing pmic specific data.
784 *
785 * This API is to be called from the PMIC specific code to register with
786 * smartreflex driver pmic specific info. Currently the only info required
787 * is the smartreflex init on the PMIC side.
788 */
789void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
790{
791 if (!pmic_data) {
792 pr_warning("%s: Trying to register NULL PMIC data structure"
793 "with smartreflex\n", __func__);
794 return;
795 }
796
797 sr_pmic_data = pmic_data;
798}
799
4018bfeb 800/* PM Debug FS entries to enable and disable smartreflex. */
984aa6db
TG
801static int omap_sr_autocomp_show(void *data, u64 *val)
802{
4018bfeb 803 struct omap_sr *sr_info = data;
984aa6db
TG
804
805 if (!sr_info) {
8353584e 806 pr_warning("%s: omap_sr struct not found\n", __func__);
984aa6db
TG
807 return -EINVAL;
808 }
809
810 *val = sr_info->autocomp_active;
811
812 return 0;
813}
814
815static int omap_sr_autocomp_store(void *data, u64 val)
816{
4018bfeb 817 struct omap_sr *sr_info = data;
984aa6db
TG
818
819 if (!sr_info) {
8353584e 820 pr_warning("%s: omap_sr struct not found\n", __func__);
984aa6db
TG
821 return -EINVAL;
822 }
823
824 /* Sanity check */
d6173692 825 if (val > 1) {
984aa6db
TG
826 pr_warning("%s: Invalid argument %lld\n", __func__, val);
827 return -EINVAL;
828 }
829
ac77a6f7
NM
830 /* control enable/disable only if there is a delta in value */
831 if (sr_info->autocomp_active != val) {
832 if (!val)
833 sr_stop_vddautocomp(sr_info);
834 else
835 sr_start_vddautocomp(sr_info);
836 }
984aa6db
TG
837
838 return 0;
839}
840
841DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
4018bfeb 842 omap_sr_autocomp_store, "%llu\n");
984aa6db
TG
843
844static int __init omap_sr_probe(struct platform_device *pdev)
845{
4018bfeb 846 struct omap_sr *sr_info;
984aa6db
TG
847 struct omap_sr_data *pdata = pdev->dev.platform_data;
848 struct resource *mem, *irq;
633ef8b7 849 struct dentry *nvalue_dir;
077fceca 850 int i, ret = 0;
984aa6db 851
4018bfeb 852 sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
984aa6db
TG
853 if (!sr_info) {
854 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
855 __func__);
856 return -ENOMEM;
857 }
858
1079a8b2
FB
859 platform_set_drvdata(pdev, sr_info);
860
984aa6db
TG
861 if (!pdata) {
862 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
720bc782
SW
863 ret = -EINVAL;
864 goto err_free_devinfo;
984aa6db
TG
865 }
866
867 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
868 if (!mem) {
869 dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
870 ret = -ENODEV;
871 goto err_free_devinfo;
872 }
873
da9e7392
AK
874 mem = request_mem_region(mem->start, resource_size(mem),
875 dev_name(&pdev->dev));
876 if (!mem) {
877 dev_err(&pdev->dev, "%s: no mem region\n", __func__);
878 ret = -EBUSY;
879 goto err_free_devinfo;
880 }
881
984aa6db
TG
882 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
883
884 pm_runtime_enable(&pdev->dev);
e13d8f38 885 pm_runtime_irq_safe(&pdev->dev);
984aa6db 886
8b765d72
JP
887 sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
888 if (!sr_info->name) {
889 dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
890 __func__);
891 ret = -ENOMEM;
892 goto err_release_region;
893 }
894
984aa6db
TG
895 sr_info->pdev = pdev;
896 sr_info->srid = pdev->id;
897 sr_info->voltdm = pdata->voltdm;
898 sr_info->nvalue_table = pdata->nvalue_table;
899 sr_info->nvalue_count = pdata->nvalue_count;
900 sr_info->senn_mod = pdata->senn_mod;
901 sr_info->senp_mod = pdata->senp_mod;
98aed08e
JP
902 sr_info->err_weight = pdata->err_weight;
903 sr_info->err_maxlimit = pdata->err_maxlimit;
904 sr_info->accum_data = pdata->accum_data;
905 sr_info->senn_avgweight = pdata->senn_avgweight;
906 sr_info->senp_avgweight = pdata->senp_avgweight;
984aa6db
TG
907 sr_info->autocomp_active = false;
908 sr_info->ip_type = pdata->ip_type;
98aed08e 909
984aa6db
TG
910 sr_info->base = ioremap(mem->start, resource_size(mem));
911 if (!sr_info->base) {
912 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
913 ret = -ENOMEM;
ce3810cd 914 goto err_free_name;
984aa6db
TG
915 }
916
917 if (irq)
918 sr_info->irq = irq->start;
919
920 sr_set_clk_length(sr_info);
984aa6db
TG
921
922 list_add(&sr_info->node, &sr_list);
923
924 /*
925 * Call into late init to do intializations that require
926 * both sr driver and sr class driver to be initiallized.
927 */
928 if (sr_class) {
929 ret = sr_late_init(sr_info);
930 if (ret) {
931 pr_warning("%s: Error in SR late init\n", __func__);
14ea9601 932 goto err_iounmap;
984aa6db
TG
933 }
934 }
935
936 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
633ef8b7
KH
937 if (!sr_dbg_dir) {
938 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
54b28cdf 939 if (IS_ERR_OR_NULL(sr_dbg_dir)) {
633ef8b7
KH
940 ret = PTR_ERR(sr_dbg_dir);
941 pr_err("%s:sr debugfs dir creation failed(%d)\n",
942 __func__, ret);
943 goto err_iounmap;
944 }
945 }
984aa6db 946
8b765d72 947 sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
54b28cdf 948 if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
984aa6db
TG
949 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
950 __func__);
b1ace380 951 ret = PTR_ERR(sr_info->dbg_dir);
ce3810cd 952 goto err_debugfs;
984aa6db
TG
953 }
954
b1ace380
AS
955 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
956 sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
957 (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
077fceca 958 &sr_info->err_weight);
b1ace380 959 (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
077fceca 960 &sr_info->err_maxlimit);
077fceca 961
b1ace380 962 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
54b28cdf 963 if (IS_ERR_OR_NULL(nvalue_dir)) {
077fceca
TG
964 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
965 "for n-values\n", __func__);
b3329a33 966 ret = PTR_ERR(nvalue_dir);
283a1c1f 967 goto err_debugfs;
077fceca
TG
968 }
969
5e7f2e12
JP
970 if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
971 dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
972 __func__, sr_info->name);
973
b3329a33 974 ret = -ENODATA;
283a1c1f 975 goto err_debugfs;
077fceca
TG
976 }
977
978 for (i = 0; i < sr_info->nvalue_count; i++) {
865212ab 979 char name[NVALUE_NAME_LEN + 1];
077fceca 980
5e7f2e12
JP
981 snprintf(name, sizeof(name), "volt_%lu",
982 sr_info->nvalue_table[i].volt_nominal);
1232a185 983 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
077fceca 984 &(sr_info->nvalue_table[i].nvalue));
308d1bd0
JP
985 snprintf(name, sizeof(name), "errminlimit_%lu",
986 sr_info->nvalue_table[i].volt_nominal);
987 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
988 &(sr_info->nvalue_table[i].errminlimit));
989
077fceca 990 }
984aa6db
TG
991
992 return ret;
993
283a1c1f
AK
994err_debugfs:
995 debugfs_remove_recursive(sr_info->dbg_dir);
0c49cc16 996err_iounmap:
833d78fc 997 list_del(&sr_info->node);
0c49cc16 998 iounmap(sr_info->base);
ce3810cd
JP
999err_free_name:
1000 kfree(sr_info->name);
984aa6db
TG
1001err_release_region:
1002 release_mem_region(mem->start, resource_size(mem));
1003err_free_devinfo:
1004 kfree(sr_info);
1005
1006 return ret;
1007}
1008
415ec69f 1009static int omap_sr_remove(struct platform_device *pdev)
984aa6db
TG
1010{
1011 struct omap_sr_data *pdata = pdev->dev.platform_data;
1012 struct omap_sr *sr_info;
1013 struct resource *mem;
1014
1015 if (!pdata) {
1016 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1017 return -EINVAL;
1018 }
1019
1020 sr_info = _sr_lookup(pdata->voltdm);
28693ec0 1021 if (IS_ERR(sr_info)) {
984aa6db
TG
1022 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1023 __func__);
63371faf 1024 return PTR_ERR(sr_info);
984aa6db
TG
1025 }
1026
1027 if (sr_info->autocomp_active)
1028 sr_stop_vddautocomp(sr_info);
b1ace380
AS
1029 if (sr_info->dbg_dir)
1030 debugfs_remove_recursive(sr_info->dbg_dir);
984aa6db
TG
1031
1032 list_del(&sr_info->node);
1033 iounmap(sr_info->base);
8b765d72 1034 kfree(sr_info->name);
984aa6db
TG
1035 kfree(sr_info);
1036 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1037 release_mem_region(mem->start, resource_size(mem));
1038
1039 return 0;
1040}
1041
415ec69f 1042static void omap_sr_shutdown(struct platform_device *pdev)
1f55bc18
NM
1043{
1044 struct omap_sr_data *pdata = pdev->dev.platform_data;
1045 struct omap_sr *sr_info;
1046
1047 if (!pdata) {
1048 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1049 return;
1050 }
1051
1052 sr_info = _sr_lookup(pdata->voltdm);
1053 if (IS_ERR(sr_info)) {
1054 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1055 __func__);
1056 return;
1057 }
1058
1059 if (sr_info->autocomp_active)
1060 sr_stop_vddautocomp(sr_info);
1061
1062 return;
1063}
1064
984aa6db 1065static struct platform_driver smartreflex_driver = {
28ea73f4
BP
1066 .remove = omap_sr_remove,
1067 .shutdown = omap_sr_shutdown,
984aa6db
TG
1068 .driver = {
1069 .name = "smartreflex",
1070 },
1071};
1072
1073static int __init sr_init(void)
1074{
1075 int ret = 0;
1076
1077 /*
1078 * sr_init is a late init. If by then a pmic specific API is not
1079 * registered either there is no need for anything to be done on
1080 * the PMIC side or somebody has forgotten to register a PMIC
1081 * handler. Warn for the second condition.
1082 */
1083 if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
1084 sr_pmic_data->sr_pmic_init();
1085 else
1086 pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
1087
1088 ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
1089 if (ret) {
1090 pr_err("%s: platform driver register failed for SR\n",
1091 __func__);
1092 return ret;
1093 }
1094
1095 return 0;
1096}
1a21a680 1097late_initcall(sr_init);
984aa6db
TG
1098
1099static void __exit sr_exit(void)
1100{
1101 platform_driver_unregister(&smartreflex_driver);
1102}
984aa6db
TG
1103module_exit(sr_exit);
1104
1105MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1106MODULE_LICENSE("GPL");
1107MODULE_ALIAS("platform:" DRIVER_NAME);
1108MODULE_AUTHOR("Texas Instruments Inc");