[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pinctrl / pinctrl-imx.c

/*
 * Core driver for the imx pin controller
 *
 * Copyright (C) 2012 Freescale Semiconductor, Inc.
 * Copyright (C) 2012 Linaro Ltd.
 *
 * Author: Dong Aisheng <dong.aisheng@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/slab.h>

#include "core.h"
#include "pinctrl-imx.h"

#define IMX_PMX_DUMP(info, p, m, c, n)			\
{							\
	int i, j;					\
	printk(KERN_DEBUG "Format: Pin Mux Config\n");	\
	for (i = 0; i < n; i++) {			\
		j = p[i];				\
		printk(KERN_DEBUG "%s %d 0x%lx\n",	\
			info->pins[j].name,		\
			m[i], c[i]);			\
	}						\
}

/* The bits in CONFIG cell defined in binding doc*/
#define IMX_NO_PAD_CTL	0x80000000	/* no pin config need */
#define IMX_PAD_SION 0x40000000		/* set SION */

/**
 * @dev: a pointer back to containing device
 * @base: the offset to the controller in virtual memory
 */
struct imx_pinctrl {
	struct device *dev;
	struct pinctrl_dev *pctl;
	void __iomem *base;
	const struct imx_pinctrl_soc_info *info;
};

static const struct imx_pin_reg *imx_find_pin_reg(
				const struct imx_pinctrl_soc_info *info,
				unsigned pin, bool is_mux, unsigned mux)
{
	const struct imx_pin_reg *pin_reg = NULL;
	int i;

	for (i = 0; i < info->npin_regs; i++) {
		pin_reg = &info->pin_regs[i];
		if (pin_reg->pid != pin)
			continue;
		if (!is_mux)
			break;
		else if (pin_reg->mux_mode == (mux & IMX_MUX_MASK))
			break;
	}

	if (!pin_reg) {
		dev_err(info->dev, "Pin(%s): unable to find pin reg map\n",
			info->pins[pin].name);
		return NULL;
	}

	return pin_reg;
}

static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
				const struct imx_pinctrl_soc_info *info,
				const char *name)
{
	const struct imx_pin_group *grp = NULL;
	int i;

	for (i = 0; i < info->ngroups; i++) {
		if (!strcmp(info->groups[i].name, name)) {
			grp = &info->groups[i];
			break;
		}
	}

	return grp;
}

static int imx_get_groups_count(struct pinctrl_dev *pctldev)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	return info->ngroups;
}

static const char *imx_get_group_name(struct pinctrl_dev *pctldev,
				       unsigned selector)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	return info->groups[selector].name;
}

static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
			       const unsigned **pins,
			       unsigned *npins)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	if (selector >= info->ngroups)
		return -EINVAL;

	*pins = info->groups[selector].pins;
	*npins = info->groups[selector].npins;

	return 0;
}

static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
		   unsigned offset)
{
	seq_printf(s, "%s", dev_name(pctldev->dev));
}

static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
			struct device_node *np,
			struct pinctrl_map **map, unsigned *num_maps)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_group *grp;
	struct pinctrl_map *new_map;
	struct device_node *parent;
	int map_num = 1;
	int i;

	/*
	 * first find the group of this node and check if we need create
	 * config maps for pins
	 */
	grp = imx_pinctrl_find_group_by_name(info, np->name);
	if (!grp) {
		dev_err(info->dev, "unable to find group for node %s\n",
			np->name);
		return -EINVAL;
	}

	for (i = 0; i < grp->npins; i++) {
		if (!(grp->configs[i] & IMX_NO_PAD_CTL))
			map_num++;
	}

	new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
	if (!new_map)
		return -ENOMEM;

	*map = new_map;
	*num_maps = map_num;

	/* create mux map */
	parent = of_get_parent(np);
	if (!parent)
		return -EINVAL;
	new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
	new_map[0].data.mux.function = parent->name;
	new_map[0].data.mux.group = np->name;
	of_node_put(parent);

	/* create config map */
	new_map++;
	for (i = 0; i < grp->npins; i++) {
		if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
			new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
			new_map[i].data.configs.group_or_pin =
					pin_get_name(pctldev, grp->pins[i]);
			new_map[i].data.configs.configs = &grp->configs[i];
			new_map[i].data.configs.num_configs = 1;
		}
	}

	dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
		new_map->data.mux.function, new_map->data.mux.group, map_num);

	return 0;
}

static void imx_dt_free_map(struct pinctrl_dev *pctldev,
				struct pinctrl_map *map, unsigned num_maps)
{
	kfree(map);
}

static struct pinctrl_ops imx_pctrl_ops = {
	.get_groups_count = imx_get_groups_count,
	.get_group_name = imx_get_group_name,
	.get_group_pins = imx_get_group_pins,
	.pin_dbg_show = imx_pin_dbg_show,
	.dt_node_to_map = imx_dt_node_to_map,
	.dt_free_map = imx_dt_free_map,

};

static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
			   unsigned group)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_reg *pin_reg;
	const unsigned *pins, *mux;
	unsigned int npins, pin_id;
	int i;

	/*
	 * Configure the mux mode for each pin in the group for a specific
	 * function.
	 */
	pins = info->groups[group].pins;
	npins = info->groups[group].npins;
	mux = info->groups[group].mux_mode;

	WARN_ON(!pins || !npins || !mux);

	dev_dbg(ipctl->dev, "enable function %s group %s\n",
		info->functions[selector].name, info->groups[group].name);

	for (i = 0; i < npins; i++) {
		pin_id = pins[i];

		pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]);
		if (!pin_reg)
			return -EINVAL;

		if (!pin_reg->mux_reg) {
			dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
				info->pins[pin_id].name);
			return -EINVAL;
		}

		writel(mux[i], ipctl->base + pin_reg->mux_reg);
		dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
			pin_reg->mux_reg, mux[i]);

		/* some pins also need select input setting, set it if found */
		if (pin_reg->input_reg) {
			writel(pin_reg->input_val, ipctl->base + pin_reg->input_reg);
			dev_dbg(ipctl->dev,
				"==>select_input: offset 0x%x val 0x%x\n",
				pin_reg->input_reg, pin_reg->input_val);
		}
	}

	return 0;
}

static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	return info->nfunctions;
}

static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,
					  unsigned selector)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	return info->functions[selector].name;
}

static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
			       const char * const **groups,
			       unsigned * const num_groups)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;

	*groups = info->functions[selector].groups;
	*num_groups = info->functions[selector].num_groups;

	return 0;
}

static struct pinmux_ops imx_pmx_ops = {
	.get_functions_count = imx_pmx_get_funcs_count,
	.get_function_name = imx_pmx_get_func_name,
	.get_function_groups = imx_pmx_get_groups,
	.enable = imx_pmx_enable,
};

static int imx_pinconf_get(struct pinctrl_dev *pctldev,
			     unsigned pin_id, unsigned long *config)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_reg *pin_reg;

	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	if (!pin_reg)
		return -EINVAL;

	if (!pin_reg->conf_reg) {
		dev_err(info->dev, "Pin(%s) does not support config function\n",
			info->pins[pin_id].name);
		return -EINVAL;
	}

	*config = readl(ipctl->base + pin_reg->conf_reg);

	return 0;
}

static int imx_pinconf_set(struct pinctrl_dev *pctldev,
			     unsigned pin_id, unsigned long config)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_reg *pin_reg;

	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	if (!pin_reg)
		return -EINVAL;

	if (!pin_reg->conf_reg) {
		dev_err(info->dev, "Pin(%s) does not support config function\n",
			info->pins[pin_id].name);
		return -EINVAL;
	}

	dev_dbg(ipctl->dev, "pinconf set pin %s\n",
		info->pins[pin_id].name);

	writel(config, ipctl->base + pin_reg->conf_reg);
	dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
		pin_reg->conf_reg, config);

	return 0;
}

static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
				   struct seq_file *s, unsigned pin_id)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_reg *pin_reg;
	unsigned long config;

	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	if (!pin_reg || !pin_reg->conf_reg) {
		seq_printf(s, "N/A");
		return;
	}

	config = readl(ipctl->base + pin_reg->conf_reg);
	seq_printf(s, "0x%lx", config);
}

static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
					 struct seq_file *s, unsigned group)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	struct imx_pin_group *grp;
	unsigned long config;
	const char *name;
	int i, ret;

	if (group > info->ngroups)
		return;

	seq_printf(s, "\n");
	grp = &info->groups[group];
	for (i = 0; i < grp->npins; i++) {
		name = pin_get_name(pctldev, grp->pins[i]);
		ret = imx_pinconf_get(pctldev, grp->pins[i], &config);
		if (ret)
			return;
		seq_printf(s, "%s: 0x%lx", name, config);
	}
}

struct pinconf_ops imx_pinconf_ops = {
	.pin_config_get = imx_pinconf_get,
	.pin_config_set = imx_pinconf_set,
	.pin_config_dbg_show = imx_pinconf_dbg_show,
	.pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
};

static struct pinctrl_desc imx_pinctrl_desc = {
	.pctlops = &imx_pctrl_ops,
	.pmxops = &imx_pmx_ops,
	.confops = &imx_pinconf_ops,
	.owner = THIS_MODULE,
};

/* decode pin id and mux from pin function id got from device tree*/
static int imx_pinctrl_get_pin_id_and_mux(const struct imx_pinctrl_soc_info *info,
				unsigned int pin_func_id, unsigned int *pin_id,
				unsigned int *mux)
{
	if (pin_func_id > info->npin_regs)
		return -EINVAL;

	*pin_id = info->pin_regs[pin_func_id].pid;
	*mux = info->pin_regs[pin_func_id].mux_mode;

	return 0;
}

static int __devinit imx_pinctrl_parse_groups(struct device_node *np,
				struct imx_pin_group *grp,
				struct imx_pinctrl_soc_info *info,
				u32 index)
{
	unsigned int pin_func_id;
	int ret, size;
	const const __be32 *list;
	int i, j;
	u32 config;

	dev_dbg(info->dev, "group(%d): %s\n", index, np->name);

	/* Initialise group */
	grp->name = np->name;

	/*
	 * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
	 * do sanity check and calculate pins number
	 */
	list = of_get_property(np, "fsl,pins", &size);
	/* we do not check return since it's safe node passed down */
	size /= sizeof(*list);
	if (!size || size % 2) {
		dev_err(info->dev, "wrong pins number or pins and configs should be pairs\n");
		return -EINVAL;
	}

	grp->npins = size / 2;
	grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
				GFP_KERNEL);
	grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
				GFP_KERNEL);
	grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
				GFP_KERNEL);
	for (i = 0, j = 0; i < size; i += 2, j++) {
		pin_func_id = be32_to_cpu(*list++);
		ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id,
					&grp->pins[j], &grp->mux_mode[j]);
		if (ret) {
			dev_err(info->dev, "get invalid pin function id\n");
			return -EINVAL;
		}
		/* SION bit is in mux register */
		config = be32_to_cpu(*list++);
		if (config & IMX_PAD_SION)
			grp->mux_mode[j] |= IOMUXC_CONFIG_SION;
		grp->configs[j] = config & ~IMX_PAD_SION;
	}

	IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins);

	return 0;
}

static int __devinit imx_pinctrl_parse_functions(struct device_node *np,
			struct imx_pinctrl_soc_info *info, u32 index)
{
	struct device_node *child;
	struct imx_pmx_func *func;
	struct imx_pin_group *grp;
	int ret;
	static u32 grp_index;
	u32 i = 0;

	dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);

	func = &info->functions[index];

	/* Initialise function */
	func->name = np->name;
	func->num_groups = of_get_child_count(np);
	if (func->num_groups <= 0) {
		dev_err(info->dev, "no groups defined\n");
		return -EINVAL;
	}
	func->groups = devm_kzalloc(info->dev,
			func->num_groups * sizeof(char *), GFP_KERNEL);

	for_each_child_of_node(np, child) {
		func->groups[i] = child->name;
		grp = &info->groups[grp_index++];
		ret = imx_pinctrl_parse_groups(child, grp, info, i++);
		if (ret)
			return ret;
	}

	return 0;
}

static int __devinit imx_pinctrl_probe_dt(struct platform_device *pdev,
				struct imx_pinctrl_soc_info *info)
{
	struct device_node *np = pdev->dev.of_node;
	struct device_node *child;
	int ret;
	u32 nfuncs = 0;
	u32 i = 0;

	if (!np)
		return -ENODEV;

	nfuncs = of_get_child_count(np);
	if (nfuncs <= 0) {
		dev_err(&pdev->dev, "no functions defined\n");
		return -EINVAL;
	}

	info->nfunctions = nfuncs;
	info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
					GFP_KERNEL);
	if (!info->functions)
		return -ENOMEM;

	info->ngroups = 0;
	for_each_child_of_node(np, child)
		info->ngroups += of_get_child_count(child);
	info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
					GFP_KERNEL);
	if (!info->groups)
		return -ENOMEM;

	for_each_child_of_node(np, child) {
		ret = imx_pinctrl_parse_functions(child, info, i++);
		if (ret) {
			dev_err(&pdev->dev, "failed to parse function\n");
			return ret;
		}
	}

	return 0;
}

int __devinit imx_pinctrl_probe(struct platform_device *pdev,
				struct imx_pinctrl_soc_info *info)
{
	struct imx_pinctrl *ipctl;
	struct resource *res;
	int ret;

	if (!info || !info->pins || !info->npins
		  || !info->pin_regs || !info->npin_regs) {
		dev_err(&pdev->dev, "wrong pinctrl info\n");
		return -EINVAL;
	}
	info->dev = &pdev->dev;

	/* Create state holders etc for this driver */
	ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
	if (!ipctl)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENOENT;

	ipctl->base = devm_request_and_ioremap(&pdev->dev, res);
	if (!ipctl->base)
		return -EBUSY;

	imx_pinctrl_desc.name = dev_name(&pdev->dev);
	imx_pinctrl_desc.pins = info->pins;
	imx_pinctrl_desc.npins = info->npins;

	ret = imx_pinctrl_probe_dt(pdev, info);
	if (ret) {
		dev_err(&pdev->dev, "fail to probe dt properties\n");
		return ret;
	}

	ipctl->info = info;
	ipctl->dev = info->dev;
	platform_set_drvdata(pdev, ipctl);
	ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
	if (!ipctl->pctl) {
		dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
		return -EINVAL;
	}

	dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");

	return 0;
}

int __devexit imx_pinctrl_remove(struct platform_device *pdev)
{
	struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);

	pinctrl_unregister(ipctl->pctl);

	return 0;
}
Commit	Line	Data
ae75ff81 DA	1	/*
	2	* Core driver for the imx pin controller
	3	*
	4	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	5	* Copyright (C) 2012 Linaro Ltd.
	6	*
	7	* Author: Dong Aisheng <dong.aisheng@linaro.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*/
	14
	15	#include <linux/err.h>
	16	#include <linux/init.h>
	17	#include <linux/io.h>
	18	#include <linux/module.h>
	19	#include <linux/of.h>
	20	#include <linux/of_device.h>
	21	#include <linux/pinctrl/machine.h>
	22	#include <linux/pinctrl/pinconf.h>
	23	#include <linux/pinctrl/pinctrl.h>
	24	#include <linux/pinctrl/pinmux.h>
	25	#include <linux/slab.h>
	26
	27	#include "core.h"
	28	#include "pinctrl-imx.h"
	29
3a86a5f8 DN	30	#define IMX_PMX_DUMP(info, p, m, c, n) \
	31	{ \
	32	int i, j; \
	33	printk(KERN_DEBUG "Format: Pin Mux Config\n"); \
	34	for (i = 0; i < n; i++) { \
	35	j = p[i]; \
	36	printk(KERN_DEBUG "%s %d 0x%lx\n", \
	37	info->pins[j].name, \
	38	m[i], c[i]); \
	39	} \
ae75ff81 DA	40	}
	41
	42	/* The bits in CONFIG cell defined in binding doc*/
	43	#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
	44	#define IMX_PAD_SION 0x40000000 /* set SION */
	45
	46	/**
	47	* @dev: a pointer back to containing device
	48	* @base: the offset to the controller in virtual memory
	49	*/
	50	struct imx_pinctrl {
	51	struct device *dev;
	52	struct pinctrl_dev *pctl;
	53	void __iomem *base;
	54	const struct imx_pinctrl_soc_info *info;
	55	};
	56
	57	static const struct imx_pin_reg *imx_find_pin_reg(
	58	const struct imx_pinctrl_soc_info *info,
	59	unsigned pin, bool is_mux, unsigned mux)
	60	{
	61	const struct imx_pin_reg *pin_reg = NULL;
	62	int i;
	63
	64	for (i = 0; i < info->npin_regs; i++) {
	65	pin_reg = &info->pin_regs[i];
	66	if (pin_reg->pid != pin)
	67	continue;
	68	if (!is_mux)
	69	break;
	70	else if (pin_reg->mux_mode == (mux & IMX_MUX_MASK))
	71	break;
	72	}
	73
	74	if (!pin_reg) {
	75	dev_err(info->dev, "Pin(%s): unable to find pin reg map\n",
	76	info->pins[pin].name);
	77	return NULL;
	78	}
	79
	80	return pin_reg;
	81	}
	82
	83	static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
	84	const struct imx_pinctrl_soc_info *info,
	85	const char *name)
	86	{
	87	const struct imx_pin_group *grp = NULL;
	88	int i;
	89
	90	for (i = 0; i < info->ngroups; i++) {
	91	if (!strcmp(info->groups[i].name, name)) {
	92	grp = &info->groups[i];
	93	break;
	94	}
	95	}
	96
	97	return grp;
	98	}
	99
	100	static int imx_get_groups_count(struct pinctrl_dev *pctldev)
	101	{
	102	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	103	const struct imx_pinctrl_soc_info *info = ipctl->info;
104
105	return info->ngroups;
106	}
107
108	static const char imx_get_group_name(struct pinctrl_dev pctldev,
109	unsigned selector)
110	{
111	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
112	const struct imx_pinctrl_soc_info *info = ipctl->info;
113
114	return info->groups[selector].name;
115	}
116
117	static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
118	const unsigned **pins,
119	unsigned *npins)
120	{
121	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
122	const struct imx_pinctrl_soc_info *info = ipctl->info;
123
124	if (selector >= info->ngroups)
125	return -EINVAL;
126
127	*pins = info->groups[selector].pins;
128	*npins = info->groups[selector].npins;
129
130	return 0;
131	}
132
133	static void imx_pin_dbg_show(struct pinctrl_dev pctldev, struct seq_file s,
134	unsigned offset)
135	{
136	seq_printf(s, "%s", dev_name(pctldev->dev));
137	}
138
139	static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
140	struct device_node *np,
141	struct pinctrl_map *map, unsigned num_maps)
142	{
143	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
144	const struct imx_pinctrl_soc_info *info = ipctl->info;
145	const struct imx_pin_group *grp;
146	struct pinctrl_map *new_map;
147	struct device_node *parent;
148	int map_num = 1;
149	int i;
150
151	/*
152	* first find the group of this node and check if we need create
153	* config maps for pins
154	*/
155	grp = imx_pinctrl_find_group_by_name(info, np->name);
156	if (!grp) {
157	dev_err(info->dev, "unable to find group for node %s\n",
158	np->name);
159	return -EINVAL;
160	}
161
162	for (i = 0; i < grp->npins; i++) {
163	if (!(grp->configs[i] & IMX_NO_PAD_CTL))
164	map_num++;
165	}
166
167	new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
168	if (!new_map)
169	return -ENOMEM;
170
171	*map = new_map;
172	*num_maps = map_num;
173
174	/* create mux map */
175	parent = of_get_parent(np);
176	if (!parent)
177	return -EINVAL;
178	new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
179	new_map[0].data.mux.function = parent->name;
180	new_map[0].data.mux.group = np->name;
181	of_node_put(parent);
182
183	/* create config map */
184	new_map++;
185	for (i = 0; i < grp->npins; i++) {
186	if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
187	new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
188	new_map[i].data.configs.group_or_pin =
189	pin_get_name(pctldev, grp->pins[i]);
190	new_map[i].data.configs.configs = &grp->configs[i];
191	new_map[i].data.configs.num_configs = 1;
192	}
193	}
194
195	dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
196	new_map->data.mux.function, new_map->data.mux.group, map_num);
197
198	return 0;
199	}
200
201	static void imx_dt_free_map(struct pinctrl_dev *pctldev,
202	struct pinctrl_map *map, unsigned num_maps)
203	{
3a86a5f8	204	kfree(map);
ae75ff81 DA	205	}
	206
	207	static struct pinctrl_ops imx_pctrl_ops = {
	208	.get_groups_count = imx_get_groups_count,
	209	.get_group_name = imx_get_group_name,
	210	.get_group_pins = imx_get_group_pins,
	211	.pin_dbg_show = imx_pin_dbg_show,
	212	.dt_node_to_map = imx_dt_node_to_map,
	213	.dt_free_map = imx_dt_free_map,
	214
	215	};
	216
	217	static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
	218	unsigned group)
	219	{
	220	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	221	const struct imx_pinctrl_soc_info *info = ipctl->info;
	222	const struct imx_pin_reg *pin_reg;
	223	const unsigned pins, mux;
	224	unsigned int npins, pin_id;
	225	int i;
	226
	227	/*
	228	* Configure the mux mode for each pin in the group for a specific
	229	* function.
	230	*/
	231	pins = info->groups[group].pins;
	232	npins = info->groups[group].npins;
	233	mux = info->groups[group].mux_mode;
	234
	235	WARN_ON(!pins \|\| !npins \|\| !mux);
	236
	237	dev_dbg(ipctl->dev, "enable function %s group %s\n",
	238	info->functions[selector].name, info->groups[group].name);
	239
	240	for (i = 0; i < npins; i++) {
	241	pin_id = pins[i];
	242
	243	pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]);
	244	if (!pin_reg)
	245	return -EINVAL;
	246
	247	if (!pin_reg->mux_reg) {
	248	dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
	249	info->pins[pin_id].name);
	250	return -EINVAL;
	251	}
	252
	253	writel(mux[i], ipctl->base + pin_reg->mux_reg);
	254	dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
	255	pin_reg->mux_reg, mux[i]);
	256
	257	/* some pins also need select input setting, set it if found */
	258	if (pin_reg->input_reg) {
	259	writel(pin_reg->input_val, ipctl->base + pin_reg->input_reg);
	260	dev_dbg(ipctl->dev,
	261	"==>select_input: offset 0x%x val 0x%x\n",
	262	pin_reg->input_reg, pin_reg->input_val);
	263	}
	264	}
	265
	266	return 0;
	267	}
	268
ae75ff81 DA	269	static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
	270	{
	271	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	272	const struct imx_pinctrl_soc_info *info = ipctl->info;
	273
	274	return info->nfunctions;
	275	}
	276
	277	static const char imx_pmx_get_func_name(struct pinctrl_dev pctldev,
	278	unsigned selector)
	279	{
	280	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	281	const struct imx_pinctrl_soc_info *info = ipctl->info;
	282
	283	return info->functions[selector].name;
	284	}
	285
	286	static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
	287	const char * const **groups,
	288	unsigned * const num_groups)
	289	{
	290	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	291	const struct imx_pinctrl_soc_info *info = ipctl->info;
	292
	293	*groups = info->functions[selector].groups;
	294	*num_groups = info->functions[selector].num_groups;
	295
	296	return 0;
	297	}
	298
	299	static struct pinmux_ops imx_pmx_ops = {
	300	.get_functions_count = imx_pmx_get_funcs_count,
	301	.get_function_name = imx_pmx_get_func_name,
	302	.get_function_groups = imx_pmx_get_groups,
	303	.enable = imx_pmx_enable,
ae75ff81 DA	304	};
	305
	306	static int imx_pinconf_get(struct pinctrl_dev *pctldev,
	307	unsigned pin_id, unsigned long *config)
	308	{
	309	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	310	const struct imx_pinctrl_soc_info *info = ipctl->info;
	311	const struct imx_pin_reg *pin_reg;
	312
	313	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	314	if (!pin_reg)
	315	return -EINVAL;
	316
	317	if (!pin_reg->conf_reg) {
	318	dev_err(info->dev, "Pin(%s) does not support config function\n",
	319	info->pins[pin_id].name);
	320	return -EINVAL;
	321	}
	322
	323	*config = readl(ipctl->base + pin_reg->conf_reg);
	324
	325	return 0;
	326	}
	327
	328	static int imx_pinconf_set(struct pinctrl_dev *pctldev,
	329	unsigned pin_id, unsigned long config)
	330	{
	331	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	332	const struct imx_pinctrl_soc_info *info = ipctl->info;
	333	const struct imx_pin_reg *pin_reg;
	334
	335	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	336	if (!pin_reg)
	337	return -EINVAL;
	338
	339	if (!pin_reg->conf_reg) {
	340	dev_err(info->dev, "Pin(%s) does not support config function\n",
	341	info->pins[pin_id].name);
	342	return -EINVAL;
	343	}
	344
	345	dev_dbg(ipctl->dev, "pinconf set pin %s\n",
	346	info->pins[pin_id].name);
	347
	348	writel(config, ipctl->base + pin_reg->conf_reg);
	349	dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
	350	pin_reg->conf_reg, config);
	351
	352	return 0;
	353	}
	354
	355	static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
	356	struct seq_file *s, unsigned pin_id)
	357	{
	358	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	359	const struct imx_pinctrl_soc_info *info = ipctl->info;
	360	const struct imx_pin_reg *pin_reg;
	361	unsigned long config;
	362
	363	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
	364	if (!pin_reg \|\| !pin_reg->conf_reg) {
	365	seq_printf(s, "N/A");
	366	return;
	367	}
368
369	config = readl(ipctl->base + pin_reg->conf_reg);
370	seq_printf(s, "0x%lx", config);
371	}
372
373	static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
374	struct seq_file *s, unsigned group)
375	{
376	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
377	const struct imx_pinctrl_soc_info *info = ipctl->info;
378	struct imx_pin_group *grp;
379	unsigned long config;
380	const char *name;
381	int i, ret;
382
383	if (group > info->ngroups)
384	return;
385
386	seq_printf(s, "\n");
387	grp = &info->groups[group];
388	for (i = 0; i < grp->npins; i++) {
389	name = pin_get_name(pctldev, grp->pins[i]);
390	ret = imx_pinconf_get(pctldev, grp->pins[i], &config);
391	if (ret)
392	return;
393	seq_printf(s, "%s: 0x%lx", name, config);
394	}
395	}
396
397	struct pinconf_ops imx_pinconf_ops = {
398	.pin_config_get = imx_pinconf_get,
399	.pin_config_set = imx_pinconf_set,
400	.pin_config_dbg_show = imx_pinconf_dbg_show,
401	.pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
402	};
403
404	static struct pinctrl_desc imx_pinctrl_desc = {
405	.pctlops = &imx_pctrl_ops,
406	.pmxops = &imx_pmx_ops,
407	.confops = &imx_pinconf_ops,
408	.owner = THIS_MODULE,
409	};
410
411	/* decode pin id and mux from pin function id got from device tree*/
412	static int imx_pinctrl_get_pin_id_and_mux(const struct imx_pinctrl_soc_info *info,
413	unsigned int pin_func_id, unsigned int *pin_id,
414	unsigned int *mux)
415	{
416	if (pin_func_id > info->npin_regs)
417	return -EINVAL;
418
419	*pin_id = info->pin_regs[pin_func_id].pid;
420	*mux = info->pin_regs[pin_func_id].mux_mode;
421
422	return 0;
423	}
424
425	static int __devinit imx_pinctrl_parse_groups(struct device_node *np,
426	struct imx_pin_group *grp,
427	struct imx_pinctrl_soc_info *info,
428	u32 index)
429	{
430	unsigned int pin_func_id;
431	int ret, size;
432	const const __be32 *list;
433	int i, j;
434	u32 config;
435
436	dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
437
438	/* Initialise group */
439	grp->name = np->name;
440
441	/*
442	* the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
443	* do sanity check and calculate pins number
444	*/
445	list = of_get_property(np, "fsl,pins", &size);
446	/* we do not check return since it's safe node passed down */
447	size /= sizeof(*list);
448	if (!size \|\| size % 2) {
449	dev_err(info->dev, "wrong pins number or pins and configs should be pairs\n");
450	return -EINVAL;
451	}
452
453	grp->npins = size / 2;
454	grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
455	GFP_KERNEL);
456	grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
457	GFP_KERNEL);
458	grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
459	GFP_KERNEL);
460	for (i = 0, j = 0; i < size; i += 2, j++) {
461	pin_func_id = be32_to_cpu(*list++);
462	ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id,
463	&grp->pins[j], &grp->mux_mode[j]);
464	if (ret) {
465	dev_err(info->dev, "get invalid pin function id\n");
466	return -EINVAL;
467	}
468	/* SION bit is in mux register */
469	config = be32_to_cpu(*list++);
470	if (config & IMX_PAD_SION)
471	grp->mux_mode[j] \|= IOMUXC_CONFIG_SION;
472	grp->configs[j] = config & ~IMX_PAD_SION;
473	}
474
ae75ff81	475	IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins);
3a86a5f8	476
ae75ff81 DA	477	return 0;
	478	}
	479
	480	static int __devinit imx_pinctrl_parse_functions(struct device_node *np,
	481	struct imx_pinctrl_soc_info *info, u32 index)
	482	{
	483	struct device_node *child;
	484	struct imx_pmx_func *func;
	485	struct imx_pin_group *grp;
	486	int ret;
	487	static u32 grp_index;
	488	u32 i = 0;
	489
	490	dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
	491
	492	func = &info->functions[index];
	493
	494	/* Initialise function */
	495	func->name = np->name;
	496	func->num_groups = of_get_child_count(np);
	497	if (func->num_groups <= 0) {
	498	dev_err(info->dev, "no groups defined\n");
	499	return -EINVAL;
	500	}
	501	func->groups = devm_kzalloc(info->dev,
	502	func->num_groups * sizeof(char *), GFP_KERNEL);
	503
	504	for_each_child_of_node(np, child) {
	505	func->groups[i] = child->name;
	506	grp = &info->groups[grp_index++];
	507	ret = imx_pinctrl_parse_groups(child, grp, info, i++);
	508	if (ret)
	509	return ret;
	510	}
	511
	512	return 0;
	513	}
	514
	515	static int __devinit imx_pinctrl_probe_dt(struct platform_device *pdev,
	516	struct imx_pinctrl_soc_info *info)
	517	{
	518	struct device_node *np = pdev->dev.of_node;
	519	struct device_node *child;
	520	int ret;
	521	u32 nfuncs = 0;
	522	u32 i = 0;
	523
	524	if (!np)
	525	return -ENODEV;
	526
	527	nfuncs = of_get_child_count(np);
	528	if (nfuncs <= 0) {
	529	dev_err(&pdev->dev, "no functions defined\n");
	530	return -EINVAL;
	531	}
	532
	533	info->nfunctions = nfuncs;
	534	info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
	535	GFP_KERNEL);
	536	if (!info->functions)
	537	return -ENOMEM;
	538
	539	info->ngroups = 0;
	540	for_each_child_of_node(np, child)
541	info->ngroups += of_get_child_count(child);
542	info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
543	GFP_KERNEL);
544	if (!info->groups)
545	return -ENOMEM;
546
547	for_each_child_of_node(np, child) {
548	ret = imx_pinctrl_parse_functions(child, info, i++);
549	if (ret) {
550	dev_err(&pdev->dev, "failed to parse function\n");
551	return ret;
552	}
553	}
554
555	return 0;
556	}
557
558	int __devinit imx_pinctrl_probe(struct platform_device *pdev,
559	struct imx_pinctrl_soc_info *info)
560	{
561	struct imx_pinctrl *ipctl;
562	struct resource *res;
563	int ret;
564
565	if (!info \|\| !info->pins \|\| !info->npins
566	\|\| !info->pin_regs \|\| !info->npin_regs) {
567	dev_err(&pdev->dev, "wrong pinctrl info\n");
568	return -EINVAL;
569	}
570	info->dev = &pdev->dev;
571
572	/* Create state holders etc for this driver */
573	ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
574	if (!ipctl)
575	return -ENOMEM;
576
577	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
578	if (!res)
579	return -ENOENT;
580
581	ipctl->base = devm_request_and_ioremap(&pdev->dev, res);
582	if (!ipctl->base)
583	return -EBUSY;
584
585	imx_pinctrl_desc.name = dev_name(&pdev->dev);
586	imx_pinctrl_desc.pins = info->pins;
587	imx_pinctrl_desc.npins = info->npins;
588
589	ret = imx_pinctrl_probe_dt(pdev, info);
590	if (ret) {
591	dev_err(&pdev->dev, "fail to probe dt properties\n");
592	return ret;
593	}
594
595	ipctl->info = info;
596	ipctl->dev = info->dev;
597	platform_set_drvdata(pdev, ipctl);
598	ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
599	if (!ipctl->pctl) {
600	dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
601	return -EINVAL;
602	}
603
604	dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
605
606	return 0;
607	}
608
609	int __devexit imx_pinctrl_remove(struct platform_device *pdev)
610	{
611	struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);
612
613	pinctrl_unregister(ipctl->pctl);
614
615	return 0;
616	}