Merge tag 'v3.10-rc1' into stable/for-linus-3.10
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pinctrl / core.h
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1/*
2 * Core private header for the pin control subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 *
7 * Author: Linus Walleij <linus.walleij@linaro.org>
8 *
9 * License terms: GNU General Public License (GPL) version 2
10 */
11
ab78029e 12#include <linux/kref.h>
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13#include <linux/mutex.h>
14#include <linux/radix-tree.h>
ae6b4d85 15#include <linux/pinctrl/pinconf.h>
872acc32 16#include <linux/pinctrl/machine.h>
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17
18struct pinctrl_gpio_range;
19
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20/**
21 * struct pinctrl_dev - pin control class device
22 * @node: node to include this pin controller in the global pin controller list
23 * @desc: the pin controller descriptor supplied when initializing this pin
24 * controller
25 * @pin_desc_tree: each pin descriptor for this pin controller is stored in
26 * this radix tree
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27 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
28 * ranges are added to this list at runtime
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29 * @dev: the device entry for this pin controller
30 * @owner: module providing the pin controller, used for refcounting
31 * @driver_data: driver data for drivers registering to the pin controller
32 * subsystem
46919ae6 33 * @p: result of pinctrl_get() for this device
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34 * @hog_default: default state for pins hogged by this device
35 * @hog_sleep: sleep state for pins hogged by this device
42fed7ba 36 * @mutex: mutex taken on each pin controller specific action
befe5bdf 37 * @device_root: debugfs root for this device
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38 */
39struct pinctrl_dev {
40 struct list_head node;
41 struct pinctrl_desc *desc;
42 struct radix_tree_root pin_desc_tree;
2744e8af 43 struct list_head gpio_ranges;
51cd24ee 44 struct device *dev;
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45 struct module *owner;
46 void *driver_data;
46919ae6 47 struct pinctrl *p;
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48 struct pinctrl_state *hog_default;
49 struct pinctrl_state *hog_sleep;
42fed7ba 50 struct mutex mutex;
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51#ifdef CONFIG_DEBUG_FS
52 struct dentry *device_root;
53#endif
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54};
55
56/**
57 * struct pinctrl - per-device pin control state holder
58 * @node: global list node
59 * @dev: the device using this pin control handle
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60 * @states: a list of states for this device
61 * @state: the current state
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62 * @dt_maps: the mapping table chunks dynamically parsed from device tree for
63 * this device, if any
ab78029e 64 * @users: reference count
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65 */
66struct pinctrl {
67 struct list_head node;
68 struct device *dev;
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69 struct list_head states;
70 struct pinctrl_state *state;
57291ce2 71 struct list_head dt_maps;
ab78029e 72 struct kref users;
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73};
74
75/**
76 * struct pinctrl_state - a pinctrl state for a device
2c9abf80 77 * @node: list node for struct pinctrl's @states field
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78 * @name: the name of this state
79 * @settings: a list of settings for this state
80 */
81struct pinctrl_state {
82 struct list_head node;
83 const char *name;
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84 struct list_head settings;
85};
86
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87/**
88 * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP
89 * @group: the group selector to program
90 * @func: the function selector to program
91 */
92struct pinctrl_setting_mux {
93 unsigned group;
94 unsigned func;
95};
96
97/**
98 * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_*
99 * @group_or_pin: the group selector or pin ID to program
100 * @configs: a pointer to an array of config parameters/values to program into
101 * hardware. Each individual pin controller defines the format and meaning
102 * of config parameters.
103 * @num_configs: the number of entries in array @configs
104 */
105struct pinctrl_setting_configs {
106 unsigned group_or_pin;
107 unsigned long *configs;
108 unsigned num_configs;
109};
110
7ecdb16f 111/**
872acc32 112 * struct pinctrl_setting - an individual mux or config setting
6e5e959d 113 * @node: list node for struct pinctrl_settings's @settings field
1e2082b5 114 * @type: the type of setting
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115 * @pctldev: pin control device handling to be programmed. Not used for
116 * PIN_MAP_TYPE_DUMMY_STATE.
1a78958d 117 * @dev_name: the name of the device using this state
1e2082b5 118 * @data: Data specific to the setting type
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119 */
120struct pinctrl_setting {
121 struct list_head node;
1e2082b5 122 enum pinctrl_map_type type;
befe5bdf 123 struct pinctrl_dev *pctldev;
1a78958d 124 const char *dev_name;
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125 union {
126 struct pinctrl_setting_mux mux;
127 struct pinctrl_setting_configs configs;
128 } data;
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129};
130
131/**
132 * struct pin_desc - pin descriptor for each physical pin in the arch
133 * @pctldev: corresponding pin control device
134 * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
135 * datasheet or such
ca53c5f1 136 * @dynamic_name: if the name of this pin was dynamically allocated
652162d4 137 * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL.
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138 * If non-zero, this pin is claimed by @owner. This field is an integer
139 * rather than a boolean, since pinctrl_get() might process multiple
140 * mapping table entries that refer to, and hence claim, the same group
141 * or pin, and each of these will increment the @usecount.
652162d4 142 * @mux_owner: The name of device that called pinctrl_get().
ba110d90 143 * @mux_setting: The most recent selected mux setting for this pin, if any.
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144 * @gpio_owner: If pinctrl_request_gpio() was called for this pin, this is
145 * the name of the GPIO that "owns" this pin.
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146 */
147struct pin_desc {
148 struct pinctrl_dev *pctldev;
9af1e44f 149 const char *name;
ca53c5f1 150 bool dynamic_name;
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151 /* These fields only added when supporting pinmux drivers */
152#ifdef CONFIG_PINMUX
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153 unsigned mux_usecount;
154 const char *mux_owner;
ba110d90 155 const struct pinctrl_setting_mux *mux_setting;
652162d4 156 const char *gpio_owner;
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157#endif
158};
159
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160/**
161 * struct pinctrl_maps - a list item containing part of the mapping table
162 * @node: mapping table list node
163 * @maps: array of mapping table entries
164 * @num_maps: the number of entries in @maps
165 */
166struct pinctrl_maps {
167 struct list_head node;
168 struct pinctrl_map const *maps;
169 unsigned num_maps;
170};
171
9dfac4fd 172struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
42fed7ba 173struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np);
ae6b4d85 174int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
dcb5dbc3 175const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
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176int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
177 const char *pin_group);
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178
179static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,
180 unsigned int pin)
181{
182 return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
183}
57b676f9 184
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185int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
186 bool dup, bool locked);
187void pinctrl_unregister_map(struct pinctrl_map const *map);
188
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189extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
190extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
191
42fed7ba 192extern struct mutex pinctrl_maps_mutex;
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193extern struct list_head pinctrl_maps;
194
195#define for_each_maps(_maps_node_, _i_, _map_) \
196 list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
197 for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
198 _i_ < _maps_node_->num_maps; \
199 _i_++, _map_ = &_maps_node_->maps[_i_])