Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba PC |
43 | /* Mutex taken to protect pinctrl_list */ |
44 | DEFINE_MUTEX(pinctrl_list_mutex); | |
45 | ||
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
50 | DEFINE_MUTEX(pinctrldev_list_mutex); | |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
104 | bool found = false; | |
105 | ||
9dfac4fd LW |
106 | if (!devname) |
107 | return NULL; | |
108 | ||
2744e8af | 109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 110 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
111 | /* Matched on device name */ |
112 | found = true; | |
113 | break; | |
114 | } | |
115 | } | |
2744e8af LW |
116 | |
117 | return found ? pctldev : NULL; | |
118 | } | |
119 | ||
42fed7ba PC |
120 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
121 | { | |
122 | struct pinctrl_dev *pctldev; | |
123 | ||
124 | mutex_lock(&pinctrldev_list_mutex); | |
125 | ||
126 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
127 | if (pctldev->dev->of_node == np) { | |
128 | mutex_unlock(&pinctrldev_list_mutex); | |
129 | return pctldev; | |
130 | } | |
131 | ||
d463f82d | 132 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
133 | |
134 | return NULL; | |
135 | } | |
136 | ||
ae6b4d85 LW |
137 | /** |
138 | * pin_get_from_name() - look up a pin number from a name | |
139 | * @pctldev: the pin control device to lookup the pin on | |
140 | * @name: the name of the pin to look up | |
141 | */ | |
142 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
143 | { | |
706e8520 | 144 | unsigned i, pin; |
ae6b4d85 | 145 | |
706e8520 CP |
146 | /* The pin number can be retrived from the pin controller descriptor */ |
147 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
148 | struct pin_desc *desc; |
149 | ||
706e8520 | 150 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
151 | desc = pin_desc_get(pctldev, pin); |
152 | /* Pin space may be sparse */ | |
153 | if (desc == NULL) | |
154 | continue; | |
155 | if (desc->name && !strcmp(name, desc->name)) | |
156 | return pin; | |
157 | } | |
158 | ||
159 | return -EINVAL; | |
160 | } | |
161 | ||
dcb5dbc3 DA |
162 | /** |
163 | * pin_get_name_from_id() - look up a pin name from a pin id | |
164 | * @pctldev: the pin control device to lookup the pin on | |
165 | * @name: the name of the pin to look up | |
166 | */ | |
167 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
168 | { | |
169 | const struct pin_desc *desc; | |
170 | ||
171 | desc = pin_desc_get(pctldev, pin); | |
172 | if (desc == NULL) { | |
173 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
174 | pin); | |
175 | return NULL; | |
176 | } | |
177 | ||
178 | return desc->name; | |
179 | } | |
180 | ||
2744e8af LW |
181 | /** |
182 | * pin_is_valid() - check if pin exists on controller | |
183 | * @pctldev: the pin control device to check the pin on | |
184 | * @pin: pin to check, use the local pin controller index number | |
185 | * | |
186 | * This tells us whether a certain pin exist on a certain pin controller or | |
187 | * not. Pin lists may be sparse, so some pins may not exist. | |
188 | */ | |
189 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
190 | { | |
191 | struct pin_desc *pindesc; | |
192 | ||
193 | if (pin < 0) | |
194 | return false; | |
195 | ||
42fed7ba | 196 | mutex_lock(&pctldev->mutex); |
2744e8af | 197 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 198 | mutex_unlock(&pctldev->mutex); |
2744e8af | 199 | |
57b676f9 | 200 | return pindesc != NULL; |
2744e8af LW |
201 | } |
202 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
203 | ||
204 | /* Deletes a range of pin descriptors */ | |
205 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
206 | const struct pinctrl_pin_desc *pins, | |
207 | unsigned num_pins) | |
208 | { | |
209 | int i; | |
210 | ||
2744e8af LW |
211 | for (i = 0; i < num_pins; i++) { |
212 | struct pin_desc *pindesc; | |
213 | ||
214 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
215 | pins[i].number); | |
216 | if (pindesc != NULL) { | |
217 | radix_tree_delete(&pctldev->pin_desc_tree, | |
218 | pins[i].number); | |
ca53c5f1 LW |
219 | if (pindesc->dynamic_name) |
220 | kfree(pindesc->name); | |
2744e8af LW |
221 | } |
222 | kfree(pindesc); | |
223 | } | |
2744e8af LW |
224 | } |
225 | ||
226 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
227 | unsigned number, const char *name) | |
228 | { | |
229 | struct pin_desc *pindesc; | |
230 | ||
231 | pindesc = pin_desc_get(pctldev, number); | |
232 | if (pindesc != NULL) { | |
233 | pr_err("pin %d already registered on %s\n", number, | |
234 | pctldev->desc->name); | |
235 | return -EINVAL; | |
236 | } | |
237 | ||
238 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
239 | if (pindesc == NULL) { |
240 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 241 | return -ENOMEM; |
95dcd4ae | 242 | } |
ae6b4d85 | 243 | |
2744e8af LW |
244 | /* Set owner */ |
245 | pindesc->pctldev = pctldev; | |
246 | ||
9af1e44f | 247 | /* Copy basic pin info */ |
8dc6ae4d | 248 | if (name) { |
ca53c5f1 LW |
249 | pindesc->name = name; |
250 | } else { | |
251 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
252 | if (pindesc->name == NULL) { |
253 | kfree(pindesc); | |
ca53c5f1 | 254 | return -ENOMEM; |
eb26cc9c | 255 | } |
ca53c5f1 LW |
256 | pindesc->dynamic_name = true; |
257 | } | |
2744e8af | 258 | |
2744e8af | 259 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 260 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 261 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
262 | return 0; |
263 | } | |
264 | ||
265 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
266 | struct pinctrl_pin_desc const *pins, | |
267 | unsigned num_descs) | |
268 | { | |
269 | unsigned i; | |
270 | int ret = 0; | |
271 | ||
272 | for (i = 0; i < num_descs; i++) { | |
273 | ret = pinctrl_register_one_pin(pctldev, | |
274 | pins[i].number, pins[i].name); | |
275 | if (ret) | |
276 | return ret; | |
277 | } | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
282 | /** | |
283 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
284 | * @pctldev: pin controller device to check | |
285 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
286 | * | |
287 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
288 | * controller, return the range or NULL | |
289 | */ | |
290 | static struct pinctrl_gpio_range * | |
291 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
292 | { | |
293 | struct pinctrl_gpio_range *range = NULL; | |
294 | ||
42fed7ba | 295 | mutex_lock(&pctldev->mutex); |
2744e8af | 296 | /* Loop over the ranges */ |
2744e8af LW |
297 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
298 | /* Check if we're in the valid range */ | |
299 | if (gpio >= range->base && | |
300 | gpio < range->base + range->npins) { | |
42fed7ba | 301 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
302 | return range; |
303 | } | |
304 | } | |
42fed7ba | 305 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
306 | return NULL; |
307 | } | |
308 | ||
51e13c24 HZ |
309 | /** |
310 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
311 | * the same GPIO chip are in range | |
312 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
313 | * | |
314 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
315 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
316 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
317 | * of the same GPIO chip don't have back-end pinctrl interface. | |
318 | * If the return value is true, it means that pinctrl device is ready & the | |
319 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
320 | * is false, it means that pinctrl device may not be ready. | |
321 | */ | |
2afe8229 | 322 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
323 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
324 | { | |
325 | struct pinctrl_dev *pctldev; | |
326 | struct pinctrl_gpio_range *range = NULL; | |
327 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
328 | ||
329 | /* Loop over the pin controllers */ | |
330 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
331 | /* Loop over the ranges */ | |
332 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
333 | /* Check if any gpio range overlapped with gpio chip */ | |
334 | if (range->base + range->npins - 1 < chip->base || | |
335 | range->base > chip->base + chip->ngpio - 1) | |
336 | continue; | |
337 | return true; | |
338 | } | |
339 | } | |
340 | return false; | |
341 | } | |
2afe8229 HZ |
342 | #else |
343 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
344 | #endif | |
51e13c24 | 345 | |
2744e8af LW |
346 | /** |
347 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
348 | * @gpio: the pin to locate the pin controller for | |
349 | * @outdev: the pin control device if found | |
350 | * @outrange: the GPIO range if found | |
351 | * | |
352 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
353 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
354 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
355 | * may still have not been registered. | |
2744e8af | 356 | */ |
4ecce45d SW |
357 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
358 | struct pinctrl_dev **outdev, | |
359 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
360 | { |
361 | struct pinctrl_dev *pctldev = NULL; | |
362 | ||
363 | /* Loop over the pin controllers */ | |
2744e8af LW |
364 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
365 | struct pinctrl_gpio_range *range; | |
366 | ||
367 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
368 | if (range != NULL) { | |
369 | *outdev = pctldev; | |
370 | *outrange = range; | |
2744e8af LW |
371 | return 0; |
372 | } | |
373 | } | |
2744e8af | 374 | |
4650b7cb | 375 | return -EPROBE_DEFER; |
2744e8af LW |
376 | } |
377 | ||
378 | /** | |
379 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
380 | * @pctldev: pin controller device to add the range to | |
381 | * @range: the GPIO range to add | |
382 | * | |
383 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
384 | * this to register handled ranges after registering your pin controller. | |
385 | */ | |
386 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
387 | struct pinctrl_gpio_range *range) | |
388 | { | |
42fed7ba | 389 | mutex_lock(&pctldev->mutex); |
8b9c139f | 390 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 391 | mutex_unlock(&pctldev->mutex); |
2744e8af | 392 | } |
4ecce45d | 393 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 394 | |
3e5e00b6 DA |
395 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
396 | struct pinctrl_gpio_range *ranges, | |
397 | unsigned nranges) | |
398 | { | |
399 | int i; | |
400 | ||
401 | for (i = 0; i < nranges; i++) | |
402 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
403 | } | |
404 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
405 | ||
192c369c | 406 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
407 | struct pinctrl_gpio_range *range) |
408 | { | |
42fed7ba PC |
409 | struct pinctrl_dev *pctldev; |
410 | ||
411 | mutex_lock(&pinctrldev_list_mutex); | |
412 | ||
413 | pctldev = get_pinctrl_dev_from_devname(devname); | |
f23f1516 | 414 | |
dfa97515 LW |
415 | /* |
416 | * If we can't find this device, let's assume that is because | |
417 | * it has not probed yet, so the driver trying to register this | |
418 | * range need to defer probing. | |
419 | */ | |
42fed7ba PC |
420 | if (!pctldev) { |
421 | mutex_unlock(&pinctrldev_list_mutex); | |
dfa97515 | 422 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 423 | } |
f23f1516 | 424 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba PC |
425 | |
426 | mutex_unlock(&pinctrldev_list_mutex); | |
427 | ||
f23f1516 SH |
428 | return pctldev; |
429 | } | |
192c369c | 430 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 431 | |
9afbefb2 LW |
432 | /** |
433 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
434 | * @pctldev: the pin controller device to look in | |
435 | * @pin: a controller-local number to find the range for | |
436 | */ | |
437 | struct pinctrl_gpio_range * | |
438 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
439 | unsigned int pin) | |
440 | { | |
441 | struct pinctrl_gpio_range *range = NULL; | |
442 | ||
42fed7ba | 443 | mutex_lock(&pctldev->mutex); |
9afbefb2 LW |
444 | /* Loop over the ranges */ |
445 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
446 | /* Check if we're in the valid range */ | |
447 | if (pin >= range->pin_base && | |
448 | pin < range->pin_base + range->npins) { | |
42fed7ba | 449 | mutex_unlock(&pctldev->mutex); |
9afbefb2 LW |
450 | return range; |
451 | } | |
452 | } | |
42fed7ba | 453 | mutex_unlock(&pctldev->mutex); |
9afbefb2 LW |
454 | |
455 | return NULL; | |
456 | } | |
457 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
458 | ||
7e10ee68 VK |
459 | /** |
460 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
461 | * @pctldev: pin controller device to remove the range from | |
462 | * @range: the GPIO range to remove | |
463 | */ | |
464 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
465 | struct pinctrl_gpio_range *range) | |
466 | { | |
42fed7ba | 467 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 468 | list_del(&range->node); |
42fed7ba | 469 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
470 | } |
471 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
472 | ||
7afde8ba LW |
473 | /** |
474 | * pinctrl_get_group_selector() - returns the group selector for a group | |
475 | * @pctldev: the pin controller handling the group | |
476 | * @pin_group: the pin group to look up | |
477 | */ | |
478 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
479 | const char *pin_group) | |
480 | { | |
481 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 482 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
483 | unsigned group_selector = 0; |
484 | ||
d1e90e9e | 485 | while (group_selector < ngroups) { |
7afde8ba LW |
486 | const char *gname = pctlops->get_group_name(pctldev, |
487 | group_selector); | |
488 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 489 | dev_dbg(pctldev->dev, |
7afde8ba LW |
490 | "found group selector %u for %s\n", |
491 | group_selector, | |
492 | pin_group); | |
493 | return group_selector; | |
494 | } | |
495 | ||
496 | group_selector++; | |
497 | } | |
498 | ||
51cd24ee | 499 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
500 | pin_group); |
501 | ||
502 | return -EINVAL; | |
503 | } | |
504 | ||
befe5bdf LW |
505 | /** |
506 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
507 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
508 | * | |
509 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
510 | * as part of their gpio_request() semantics, platforms and individual drivers | |
511 | * shall *NOT* request GPIO pins to be muxed in. | |
512 | */ | |
513 | int pinctrl_request_gpio(unsigned gpio) | |
514 | { | |
515 | struct pinctrl_dev *pctldev; | |
516 | struct pinctrl_gpio_range *range; | |
517 | int ret; | |
518 | int pin; | |
519 | ||
42fed7ba | 520 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 521 | |
befe5bdf | 522 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 | 523 | if (ret) { |
51e13c24 HZ |
524 | if (pinctrl_ready_for_gpio_range(gpio)) |
525 | ret = 0; | |
42fed7ba | 526 | mutex_unlock(&pinctrldev_list_mutex); |
4650b7cb | 527 | return ret; |
57b676f9 | 528 | } |
befe5bdf LW |
529 | |
530 | /* Convert to the pin controllers number space */ | |
531 | pin = gpio - range->base + range->pin_base; | |
532 | ||
57b676f9 SW |
533 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
534 | ||
42fed7ba | 535 | mutex_unlock(&pinctrldev_list_mutex); |
57b676f9 | 536 | return ret; |
befe5bdf LW |
537 | } |
538 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
539 | ||
540 | /** | |
541 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
542 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
543 | * | |
544 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
545 | * as part of their gpio_free() semantics, platforms and individual drivers | |
546 | * shall *NOT* request GPIO pins to be muxed out. | |
547 | */ | |
548 | void pinctrl_free_gpio(unsigned gpio) | |
549 | { | |
550 | struct pinctrl_dev *pctldev; | |
551 | struct pinctrl_gpio_range *range; | |
552 | int ret; | |
553 | int pin; | |
554 | ||
42fed7ba | 555 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 556 | |
befe5bdf | 557 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 | 558 | if (ret) { |
42fed7ba | 559 | mutex_unlock(&pinctrldev_list_mutex); |
befe5bdf | 560 | return; |
57b676f9 | 561 | } |
42fed7ba | 562 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
563 | |
564 | /* Convert to the pin controllers number space */ | |
565 | pin = gpio - range->base + range->pin_base; | |
566 | ||
57b676f9 SW |
567 | pinmux_free_gpio(pctldev, pin, range); |
568 | ||
42fed7ba PC |
569 | mutex_unlock(&pctldev->mutex); |
570 | mutex_unlock(&pinctrldev_list_mutex); | |
befe5bdf LW |
571 | } |
572 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
573 | ||
574 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
575 | { | |
576 | struct pinctrl_dev *pctldev; | |
577 | struct pinctrl_gpio_range *range; | |
578 | int ret; | |
579 | int pin; | |
580 | ||
42fed7ba PC |
581 | mutex_lock(&pinctrldev_list_mutex); |
582 | ||
befe5bdf | 583 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
42fed7ba PC |
584 | if (ret) { |
585 | mutex_unlock(&pinctrldev_list_mutex); | |
befe5bdf | 586 | return ret; |
42fed7ba PC |
587 | } |
588 | ||
589 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
590 | |
591 | /* Convert to the pin controllers number space */ | |
592 | pin = gpio - range->base + range->pin_base; | |
42fed7ba PC |
593 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
594 | ||
595 | mutex_unlock(&pctldev->mutex); | |
596 | mutex_unlock(&pinctrldev_list_mutex); | |
befe5bdf | 597 | |
42fed7ba | 598 | return ret; |
befe5bdf LW |
599 | } |
600 | ||
601 | /** | |
602 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
603 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
604 | * | |
605 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
606 | * as part of their gpio_direction_input() semantics, platforms and individual | |
607 | * drivers shall *NOT* touch pin control GPIO calls. | |
608 | */ | |
609 | int pinctrl_gpio_direction_input(unsigned gpio) | |
610 | { | |
42fed7ba | 611 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
612 | } |
613 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
614 | ||
615 | /** | |
616 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
617 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
618 | * | |
619 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
620 | * as part of their gpio_direction_output() semantics, platforms and individual | |
621 | * drivers shall *NOT* touch pin control GPIO calls. | |
622 | */ | |
623 | int pinctrl_gpio_direction_output(unsigned gpio) | |
624 | { | |
42fed7ba | 625 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
626 | } |
627 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
628 | ||
6e5e959d SW |
629 | static struct pinctrl_state *find_state(struct pinctrl *p, |
630 | const char *name) | |
befe5bdf | 631 | { |
6e5e959d SW |
632 | struct pinctrl_state *state; |
633 | ||
634 | list_for_each_entry(state, &p->states, node) | |
635 | if (!strcmp(state->name, name)) | |
636 | return state; | |
637 | ||
638 | return NULL; | |
639 | } | |
640 | ||
641 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
642 | const char *name) | |
643 | { | |
644 | struct pinctrl_state *state; | |
645 | ||
646 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
647 | if (state == NULL) { | |
648 | dev_err(p->dev, | |
649 | "failed to alloc struct pinctrl_state\n"); | |
650 | return ERR_PTR(-ENOMEM); | |
651 | } | |
652 | ||
653 | state->name = name; | |
654 | INIT_LIST_HEAD(&state->settings); | |
655 | ||
656 | list_add_tail(&state->node, &p->states); | |
657 | ||
658 | return state; | |
659 | } | |
660 | ||
661 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
662 | { | |
663 | struct pinctrl_state *state; | |
7ecdb16f | 664 | struct pinctrl_setting *setting; |
6e5e959d | 665 | int ret; |
befe5bdf | 666 | |
6e5e959d SW |
667 | state = find_state(p, map->name); |
668 | if (!state) | |
669 | state = create_state(p, map->name); | |
670 | if (IS_ERR(state)) | |
671 | return PTR_ERR(state); | |
befe5bdf | 672 | |
1e2082b5 SW |
673 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
674 | return 0; | |
675 | ||
6e5e959d SW |
676 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
677 | if (setting == NULL) { | |
678 | dev_err(p->dev, | |
679 | "failed to alloc struct pinctrl_setting\n"); | |
680 | return -ENOMEM; | |
681 | } | |
befe5bdf | 682 | |
1e2082b5 SW |
683 | setting->type = map->type; |
684 | ||
6e5e959d SW |
685 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
686 | if (setting->pctldev == NULL) { | |
6e5e959d | 687 | kfree(setting); |
89216494 LW |
688 | /* Do not defer probing of hogs (circular loop) */ |
689 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
690 | return -ENODEV; | |
c05127c4 LW |
691 | /* |
692 | * OK let us guess that the driver is not there yet, and | |
693 | * let's defer obtaining this pinctrl handle to later... | |
694 | */ | |
89216494 LW |
695 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
696 | map->ctrl_dev_name); | |
c05127c4 | 697 | return -EPROBE_DEFER; |
6e5e959d SW |
698 | } |
699 | ||
1a78958d LW |
700 | setting->dev_name = map->dev_name; |
701 | ||
1e2082b5 SW |
702 | switch (map->type) { |
703 | case PIN_MAP_TYPE_MUX_GROUP: | |
704 | ret = pinmux_map_to_setting(map, setting); | |
705 | break; | |
706 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
707 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
708 | ret = pinconf_map_to_setting(map, setting); | |
709 | break; | |
710 | default: | |
711 | ret = -EINVAL; | |
712 | break; | |
713 | } | |
6e5e959d SW |
714 | if (ret < 0) { |
715 | kfree(setting); | |
716 | return ret; | |
717 | } | |
718 | ||
719 | list_add_tail(&setting->node, &state->settings); | |
720 | ||
721 | return 0; | |
722 | } | |
723 | ||
724 | static struct pinctrl *find_pinctrl(struct device *dev) | |
725 | { | |
726 | struct pinctrl *p; | |
727 | ||
42fed7ba | 728 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 729 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
730 | if (p->dev == dev) { |
731 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 732 | return p; |
42fed7ba | 733 | } |
6e5e959d | 734 | |
42fed7ba | 735 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
736 | return NULL; |
737 | } | |
738 | ||
42fed7ba | 739 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
740 | |
741 | static struct pinctrl *create_pinctrl(struct device *dev) | |
742 | { | |
743 | struct pinctrl *p; | |
744 | const char *devname; | |
745 | struct pinctrl_maps *maps_node; | |
746 | int i; | |
747 | struct pinctrl_map const *map; | |
748 | int ret; | |
befe5bdf LW |
749 | |
750 | /* | |
751 | * create the state cookie holder struct pinctrl for each | |
752 | * mapping, this is what consumers will get when requesting | |
753 | * a pin control handle with pinctrl_get() | |
754 | */ | |
02f5b989 | 755 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
756 | if (p == NULL) { |
757 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 758 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 759 | } |
7ecdb16f | 760 | p->dev = dev; |
6e5e959d | 761 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
762 | INIT_LIST_HEAD(&p->dt_maps); |
763 | ||
764 | ret = pinctrl_dt_to_map(p); | |
765 | if (ret < 0) { | |
766 | kfree(p); | |
767 | return ERR_PTR(ret); | |
768 | } | |
6e5e959d SW |
769 | |
770 | devname = dev_name(dev); | |
befe5bdf | 771 | |
42fed7ba | 772 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 773 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 774 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
775 | /* Map must be for this device */ |
776 | if (strcmp(map->dev_name, devname)) | |
777 | continue; | |
778 | ||
6e5e959d | 779 | ret = add_setting(p, map); |
89216494 LW |
780 | /* |
781 | * At this point the adding of a setting may: | |
782 | * | |
783 | * - Defer, if the pinctrl device is not yet available | |
784 | * - Fail, if the pinctrl device is not yet available, | |
785 | * AND the setting is a hog. We cannot defer that, since | |
786 | * the hog will kick in immediately after the device | |
787 | * is registered. | |
788 | * | |
789 | * If the error returned was not -EPROBE_DEFER then we | |
790 | * accumulate the errors to see if we end up with | |
791 | * an -EPROBE_DEFER later, as that is the worst case. | |
792 | */ | |
793 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
794 | pinctrl_free(p, false); |
795 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 796 | return ERR_PTR(ret); |
7ecdb16f | 797 | } |
befe5bdf | 798 | } |
42fed7ba PC |
799 | mutex_unlock(&pinctrl_maps_mutex); |
800 | ||
89216494 LW |
801 | if (ret < 0) { |
802 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 803 | pinctrl_free(p, false); |
89216494 LW |
804 | return ERR_PTR(ret); |
805 | } | |
befe5bdf | 806 | |
ab78029e LW |
807 | kref_init(&p->users); |
808 | ||
b0666ba4 | 809 | /* Add the pinctrl handle to the global list */ |
1fc42b84 | 810 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 811 | list_add_tail(&p->node, &pinctrl_list); |
1fc42b84 | 812 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
813 | |
814 | return p; | |
6e5e959d | 815 | } |
7ecdb16f | 816 | |
42fed7ba PC |
817 | /** |
818 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
819 | * @dev: the device to obtain the handle for | |
820 | */ | |
821 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
822 | { |
823 | struct pinctrl *p; | |
7ecdb16f | 824 | |
6e5e959d SW |
825 | if (WARN_ON(!dev)) |
826 | return ERR_PTR(-EINVAL); | |
827 | ||
ab78029e LW |
828 | /* |
829 | * See if somebody else (such as the device core) has already | |
830 | * obtained a handle to the pinctrl for this device. In that case, | |
831 | * return another pointer to it. | |
832 | */ | |
6e5e959d | 833 | p = find_pinctrl(dev); |
ab78029e LW |
834 | if (p != NULL) { |
835 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
836 | kref_get(&p->users); | |
837 | return p; | |
838 | } | |
7ecdb16f | 839 | |
d599bfb3 | 840 | return create_pinctrl(dev); |
befe5bdf LW |
841 | } |
842 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
843 | ||
d3cee830 RG |
844 | static void pinctrl_free_setting(bool disable_setting, |
845 | struct pinctrl_setting *setting) | |
846 | { | |
847 | switch (setting->type) { | |
848 | case PIN_MAP_TYPE_MUX_GROUP: | |
849 | if (disable_setting) | |
850 | pinmux_disable_setting(setting); | |
851 | pinmux_free_setting(setting); | |
852 | break; | |
853 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
854 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
855 | pinconf_free_setting(setting); | |
856 | break; | |
857 | default: | |
858 | break; | |
859 | } | |
860 | } | |
861 | ||
42fed7ba | 862 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 863 | { |
6e5e959d SW |
864 | struct pinctrl_state *state, *n1; |
865 | struct pinctrl_setting *setting, *n2; | |
866 | ||
42fed7ba | 867 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
868 | list_for_each_entry_safe(state, n1, &p->states, node) { |
869 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 870 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
871 | list_del(&setting->node); |
872 | kfree(setting); | |
873 | } | |
874 | list_del(&state->node); | |
875 | kfree(state); | |
7ecdb16f | 876 | } |
befe5bdf | 877 | |
57291ce2 SW |
878 | pinctrl_dt_free_maps(p); |
879 | ||
6e5e959d SW |
880 | if (inlist) |
881 | list_del(&p->node); | |
befe5bdf | 882 | kfree(p); |
42fed7ba | 883 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 884 | } |
befe5bdf LW |
885 | |
886 | /** | |
ab78029e LW |
887 | * pinctrl_release() - release the pinctrl handle |
888 | * @kref: the kref in the pinctrl being released | |
889 | */ | |
2917e833 | 890 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
891 | { |
892 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
893 | ||
42fed7ba | 894 | pinctrl_free(p, true); |
ab78029e LW |
895 | } |
896 | ||
897 | /** | |
898 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 899 | * @p: the pinctrl handle to release |
befe5bdf | 900 | */ |
57b676f9 SW |
901 | void pinctrl_put(struct pinctrl *p) |
902 | { | |
ab78029e | 903 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
904 | } |
905 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
906 | ||
42fed7ba PC |
907 | /** |
908 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
909 | * @p: the pinctrl handle to retrieve the state from | |
910 | * @name: the state name to retrieve | |
911 | */ | |
912 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
913 | const char *name) | |
befe5bdf | 914 | { |
6e5e959d | 915 | struct pinctrl_state *state; |
befe5bdf | 916 | |
6e5e959d | 917 | state = find_state(p, name); |
5b3aa5f7 DA |
918 | if (!state) { |
919 | if (pinctrl_dummy_state) { | |
920 | /* create dummy state */ | |
921 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
922 | name); | |
923 | state = create_state(p, name); | |
d599bfb3 RG |
924 | } else |
925 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 926 | } |
57b676f9 | 927 | |
6e5e959d | 928 | return state; |
befe5bdf | 929 | } |
42fed7ba | 930 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
931 | |
932 | /** | |
42fed7ba PC |
933 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
934 | * @p: the pinctrl handle for the device that requests configuration | |
935 | * @state: the state handle to select/activate/program | |
befe5bdf | 936 | */ |
42fed7ba | 937 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 938 | { |
6e5e959d | 939 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 940 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 941 | int ret; |
7ecdb16f | 942 | |
6e5e959d SW |
943 | if (p->state == state) |
944 | return 0; | |
befe5bdf | 945 | |
6e5e959d SW |
946 | if (p->state) { |
947 | /* | |
948 | * The set of groups with a mux configuration in the old state | |
949 | * may not be identical to the set of groups with a mux setting | |
950 | * in the new state. While this might be unusual, it's entirely | |
951 | * possible for the "user"-supplied mapping table to be written | |
952 | * that way. For each group that was configured in the old state | |
953 | * but not in the new state, this code puts that group into a | |
954 | * safe/disabled state. | |
955 | */ | |
956 | list_for_each_entry(setting, &p->state->settings, node) { | |
957 | bool found = false; | |
1e2082b5 SW |
958 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
959 | continue; | |
6e5e959d | 960 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
961 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
962 | continue; | |
963 | if (setting2->data.mux.group == | |
964 | setting->data.mux.group) { | |
6e5e959d SW |
965 | found = true; |
966 | break; | |
967 | } | |
968 | } | |
969 | if (!found) | |
970 | pinmux_disable_setting(setting); | |
971 | } | |
972 | } | |
973 | ||
3102a76c | 974 | p->state = NULL; |
6e5e959d SW |
975 | |
976 | /* Apply all the settings for the new state */ | |
977 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
978 | switch (setting->type) { |
979 | case PIN_MAP_TYPE_MUX_GROUP: | |
980 | ret = pinmux_enable_setting(setting); | |
981 | break; | |
982 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
983 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
984 | ret = pinconf_apply_setting(setting); | |
985 | break; | |
986 | default: | |
987 | ret = -EINVAL; | |
988 | break; | |
989 | } | |
3102a76c | 990 | |
42fed7ba | 991 | if (ret < 0) { |
3102a76c | 992 | goto unapply_new_state; |
42fed7ba | 993 | } |
befe5bdf | 994 | } |
6e5e959d | 995 | |
3102a76c RG |
996 | p->state = state; |
997 | ||
6e5e959d | 998 | return 0; |
3102a76c RG |
999 | |
1000 | unapply_new_state: | |
da58751c | 1001 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1002 | |
3102a76c RG |
1003 | list_for_each_entry(setting2, &state->settings, node) { |
1004 | if (&setting2->node == &setting->node) | |
1005 | break; | |
af606177 RG |
1006 | /* |
1007 | * All we can do here is pinmux_disable_setting. | |
1008 | * That means that some pins are muxed differently now | |
1009 | * than they were before applying the setting (We can't | |
1010 | * "unmux a pin"!), but it's not a big deal since the pins | |
1011 | * are free to be muxed by another apply_setting. | |
1012 | */ | |
1013 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1014 | pinmux_disable_setting(setting2); | |
3102a76c | 1015 | } |
8009d5ff | 1016 | |
385d9424 RG |
1017 | /* There's no infinite recursive loop here because p->state is NULL */ |
1018 | if (old_state) | |
42fed7ba | 1019 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1020 | |
1021 | return ret; | |
befe5bdf | 1022 | } |
6e5e959d | 1023 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1024 | |
6d4ca1fb SW |
1025 | static void devm_pinctrl_release(struct device *dev, void *res) |
1026 | { | |
1027 | pinctrl_put(*(struct pinctrl **)res); | |
1028 | } | |
1029 | ||
1030 | /** | |
1031 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1032 | * @dev: the device to obtain the handle for | |
1033 | * | |
1034 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1035 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1036 | */ | |
1037 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1038 | { | |
1039 | struct pinctrl **ptr, *p; | |
1040 | ||
1041 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1042 | if (!ptr) | |
1043 | return ERR_PTR(-ENOMEM); | |
1044 | ||
1045 | p = pinctrl_get(dev); | |
1046 | if (!IS_ERR(p)) { | |
1047 | *ptr = p; | |
1048 | devres_add(dev, ptr); | |
1049 | } else { | |
1050 | devres_free(ptr); | |
1051 | } | |
1052 | ||
1053 | return p; | |
1054 | } | |
1055 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1056 | ||
1057 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1058 | { | |
1059 | struct pinctrl **p = res; | |
1060 | ||
1061 | return *p == data; | |
1062 | } | |
1063 | ||
1064 | /** | |
1065 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1066 | * @p: the pinctrl handle to release | |
1067 | * | |
1068 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1069 | * this function will not need to be called and the resource management | |
1070 | * code will ensure that the resource is freed. | |
1071 | */ | |
1072 | void devm_pinctrl_put(struct pinctrl *p) | |
1073 | { | |
a72149e8 | 1074 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1075 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1076 | } |
1077 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1078 | ||
57291ce2 | 1079 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
a854bc61 | 1080 | bool dup) |
befe5bdf | 1081 | { |
1e2082b5 | 1082 | int i, ret; |
b2b3e66e | 1083 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1084 | |
1085 | pr_debug("add %d pinmux maps\n", num_maps); | |
1086 | ||
1087 | /* First sanity check the new mapping */ | |
1088 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1089 | if (!maps[i].dev_name) { |
1090 | pr_err("failed to register map %s (%d): no device given\n", | |
1091 | maps[i].name, i); | |
1092 | return -EINVAL; | |
1093 | } | |
1094 | ||
befe5bdf LW |
1095 | if (!maps[i].name) { |
1096 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1097 | i); |
befe5bdf LW |
1098 | return -EINVAL; |
1099 | } | |
1100 | ||
1e2082b5 SW |
1101 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1102 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1103 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1104 | maps[i].name, i); | |
1105 | return -EINVAL; | |
1106 | } | |
1107 | ||
1e2082b5 SW |
1108 | switch (maps[i].type) { |
1109 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1110 | break; | |
1111 | case PIN_MAP_TYPE_MUX_GROUP: | |
1112 | ret = pinmux_validate_map(&maps[i], i); | |
1113 | if (ret < 0) | |
fde04f41 | 1114 | return ret; |
1e2082b5 SW |
1115 | break; |
1116 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1117 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1118 | ret = pinconf_validate_map(&maps[i], i); | |
1119 | if (ret < 0) | |
fde04f41 | 1120 | return ret; |
1e2082b5 SW |
1121 | break; |
1122 | default: | |
1123 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1124 | maps[i].name, i); |
1681f5ae SW |
1125 | return -EINVAL; |
1126 | } | |
befe5bdf LW |
1127 | } |
1128 | ||
b2b3e66e SW |
1129 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1130 | if (!maps_node) { | |
1131 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1132 | return -ENOMEM; | |
1133 | } | |
befe5bdf | 1134 | |
b2b3e66e | 1135 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1136 | if (dup) { |
1137 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1138 | GFP_KERNEL); | |
1139 | if (!maps_node->maps) { | |
1140 | pr_err("failed to duplicate mapping table\n"); | |
1141 | kfree(maps_node); | |
1142 | return -ENOMEM; | |
1143 | } | |
1144 | } else { | |
1145 | maps_node->maps = maps; | |
befe5bdf LW |
1146 | } |
1147 | ||
a854bc61 | 1148 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1149 | list_add_tail(&maps_node->node, &pinctrl_maps); |
a854bc61 | 1150 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1151 | |
befe5bdf LW |
1152 | return 0; |
1153 | } | |
1154 | ||
57291ce2 SW |
1155 | /** |
1156 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1157 | * @maps: the pincontrol mappings table to register. This should probably be | |
1158 | * marked with __initdata so it can be discarded after boot. This | |
1159 | * function will perform a shallow copy for the mapping entries. | |
1160 | * @num_maps: the number of maps in the mapping table | |
1161 | */ | |
1162 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1163 | unsigned num_maps) | |
1164 | { | |
a854bc61 | 1165 | return pinctrl_register_map(maps, num_maps, true); |
57291ce2 SW |
1166 | } |
1167 | ||
1168 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1169 | { | |
1170 | struct pinctrl_maps *maps_node; | |
1171 | ||
42fed7ba | 1172 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1173 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1174 | if (maps_node->maps == map) { | |
1175 | list_del(&maps_node->node); | |
42fed7ba | 1176 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1177 | return; |
1178 | } | |
1179 | } | |
42fed7ba | 1180 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1181 | } |
1182 | ||
840a47ba JD |
1183 | /** |
1184 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1185 | * @pctldev: pin controller device | |
1186 | */ | |
1187 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1188 | { | |
1189 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1190 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1191 | return 0; | |
1192 | } | |
1193 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1194 | ||
1195 | /** | |
1196 | * pinctrl_force_default() - turn a given controller device into default state | |
1197 | * @pctldev: pin controller device | |
1198 | */ | |
1199 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1200 | { | |
1201 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1202 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1203 | return 0; | |
1204 | } | |
1205 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1206 | ||
2744e8af LW |
1207 | #ifdef CONFIG_DEBUG_FS |
1208 | ||
1209 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1210 | { | |
1211 | struct pinctrl_dev *pctldev = s->private; | |
1212 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1213 | unsigned i, pin; |
2744e8af LW |
1214 | |
1215 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1216 | |
42fed7ba | 1217 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1218 | |
706e8520 CP |
1219 | /* The pin number can be retrived from the pin controller descriptor */ |
1220 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1221 | struct pin_desc *desc; |
1222 | ||
706e8520 | 1223 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1224 | desc = pin_desc_get(pctldev, pin); |
1225 | /* Pin space may be sparse */ | |
1226 | if (desc == NULL) | |
1227 | continue; | |
1228 | ||
1229 | seq_printf(s, "pin %d (%s) ", pin, | |
1230 | desc->name ? desc->name : "unnamed"); | |
1231 | ||
1232 | /* Driver-specific info per pin */ | |
1233 | if (ops->pin_dbg_show) | |
1234 | ops->pin_dbg_show(pctldev, s, pin); | |
1235 | ||
1236 | seq_puts(s, "\n"); | |
1237 | } | |
1238 | ||
42fed7ba | 1239 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1240 | |
2744e8af LW |
1241 | return 0; |
1242 | } | |
1243 | ||
1244 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1245 | { | |
1246 | struct pinctrl_dev *pctldev = s->private; | |
1247 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1248 | unsigned ngroups, selector = 0; |
2744e8af | 1249 | |
42fed7ba PC |
1250 | mutex_lock(&pctldev->mutex); |
1251 | ||
d1e90e9e | 1252 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1253 | |
2744e8af | 1254 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1255 | while (selector < ngroups) { |
a5818a8b | 1256 | const unsigned *pins; |
2744e8af LW |
1257 | unsigned num_pins; |
1258 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1259 | const char *pname; |
2744e8af LW |
1260 | int ret; |
1261 | int i; | |
1262 | ||
1263 | ret = ops->get_group_pins(pctldev, selector, | |
1264 | &pins, &num_pins); | |
1265 | if (ret) | |
1266 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1267 | gname); | |
1268 | else { | |
dcb5dbc3 DA |
1269 | seq_printf(s, "group: %s\n", gname); |
1270 | for (i = 0; i < num_pins; i++) { | |
1271 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1272 | if (WARN_ON(!pname)) { |
42fed7ba | 1273 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1274 | return -EINVAL; |
b4dd784b | 1275 | } |
dcb5dbc3 DA |
1276 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1277 | } | |
1278 | seq_puts(s, "\n"); | |
2744e8af LW |
1279 | } |
1280 | selector++; | |
1281 | } | |
1282 | ||
42fed7ba | 1283 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1284 | |
1285 | return 0; | |
1286 | } | |
1287 | ||
1288 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1289 | { | |
1290 | struct pinctrl_dev *pctldev = s->private; | |
1291 | struct pinctrl_gpio_range *range = NULL; | |
1292 | ||
1293 | seq_puts(s, "GPIO ranges handled:\n"); | |
1294 | ||
42fed7ba | 1295 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1296 | |
2744e8af | 1297 | /* Loop over the ranges */ |
2744e8af | 1298 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1299 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1300 | range->id, range->name, | |
1301 | range->base, (range->base + range->npins - 1), | |
1302 | range->pin_base, | |
1303 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1304 | } |
57b676f9 | 1305 | |
42fed7ba | 1306 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1307 | |
1308 | return 0; | |
1309 | } | |
1310 | ||
1311 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1312 | { | |
1313 | struct pinctrl_dev *pctldev; | |
1314 | ||
ae6b4d85 | 1315 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1316 | |
42fed7ba | 1317 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1318 | |
2744e8af LW |
1319 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1320 | seq_printf(s, "%s ", pctldev->desc->name); | |
1321 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1322 | seq_puts(s, "yes "); |
1323 | else | |
1324 | seq_puts(s, "no "); | |
1325 | if (pctldev->desc->confops) | |
2744e8af LW |
1326 | seq_puts(s, "yes"); |
1327 | else | |
1328 | seq_puts(s, "no"); | |
1329 | seq_puts(s, "\n"); | |
1330 | } | |
57b676f9 | 1331 | |
42fed7ba | 1332 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1333 | |
1334 | return 0; | |
1335 | } | |
1336 | ||
1e2082b5 SW |
1337 | static inline const char *map_type(enum pinctrl_map_type type) |
1338 | { | |
1339 | static const char * const names[] = { | |
1340 | "INVALID", | |
1341 | "DUMMY_STATE", | |
1342 | "MUX_GROUP", | |
1343 | "CONFIGS_PIN", | |
1344 | "CONFIGS_GROUP", | |
1345 | }; | |
1346 | ||
1347 | if (type >= ARRAY_SIZE(names)) | |
1348 | return "UNKNOWN"; | |
1349 | ||
1350 | return names[type]; | |
1351 | } | |
1352 | ||
3eedb437 SW |
1353 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1354 | { | |
1355 | struct pinctrl_maps *maps_node; | |
1356 | int i; | |
1357 | struct pinctrl_map const *map; | |
1358 | ||
1359 | seq_puts(s, "Pinctrl maps:\n"); | |
1360 | ||
42fed7ba | 1361 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1362 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1363 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1364 | map->dev_name, map->name, map_type(map->type), | |
1365 | map->type); | |
1366 | ||
1367 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1368 | seq_printf(s, "controlling device %s\n", | |
1369 | map->ctrl_dev_name); | |
1370 | ||
1371 | switch (map->type) { | |
1372 | case PIN_MAP_TYPE_MUX_GROUP: | |
1373 | pinmux_show_map(s, map); | |
1374 | break; | |
1375 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1376 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1377 | pinconf_show_map(s, map); | |
1378 | break; | |
1379 | default: | |
1380 | break; | |
1381 | } | |
1382 | ||
1383 | seq_printf(s, "\n"); | |
3eedb437 | 1384 | } |
42fed7ba | 1385 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1386 | |
1387 | return 0; | |
1388 | } | |
1389 | ||
befe5bdf LW |
1390 | static int pinctrl_show(struct seq_file *s, void *what) |
1391 | { | |
1392 | struct pinctrl *p; | |
6e5e959d | 1393 | struct pinctrl_state *state; |
7ecdb16f | 1394 | struct pinctrl_setting *setting; |
befe5bdf LW |
1395 | |
1396 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1397 | |
42fed7ba | 1398 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1399 | |
befe5bdf | 1400 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1401 | seq_printf(s, "device: %s current state: %s\n", |
1402 | dev_name(p->dev), | |
1403 | p->state ? p->state->name : "none"); | |
1404 | ||
1405 | list_for_each_entry(state, &p->states, node) { | |
1406 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1407 | |
6e5e959d | 1408 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1409 | struct pinctrl_dev *pctldev = setting->pctldev; |
1410 | ||
1411 | seq_printf(s, " type: %s controller %s ", | |
1412 | map_type(setting->type), | |
1413 | pinctrl_dev_get_name(pctldev)); | |
1414 | ||
1415 | switch (setting->type) { | |
1416 | case PIN_MAP_TYPE_MUX_GROUP: | |
1417 | pinmux_show_setting(s, setting); | |
1418 | break; | |
1419 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1420 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1421 | pinconf_show_setting(s, setting); | |
1422 | break; | |
1423 | default: | |
1424 | break; | |
1425 | } | |
6e5e959d | 1426 | } |
befe5bdf | 1427 | } |
befe5bdf LW |
1428 | } |
1429 | ||
42fed7ba | 1430 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1431 | |
befe5bdf LW |
1432 | return 0; |
1433 | } | |
1434 | ||
2744e8af LW |
1435 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1436 | { | |
1437 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1438 | } | |
1439 | ||
1440 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1441 | { | |
1442 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1443 | } | |
1444 | ||
1445 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1446 | { | |
1447 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1448 | } | |
1449 | ||
1450 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1451 | { | |
1452 | return single_open(file, pinctrl_devices_show, NULL); | |
1453 | } | |
1454 | ||
3eedb437 SW |
1455 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1456 | { | |
1457 | return single_open(file, pinctrl_maps_show, NULL); | |
1458 | } | |
1459 | ||
befe5bdf LW |
1460 | static int pinctrl_open(struct inode *inode, struct file *file) |
1461 | { | |
1462 | return single_open(file, pinctrl_show, NULL); | |
1463 | } | |
1464 | ||
2744e8af LW |
1465 | static const struct file_operations pinctrl_pins_ops = { |
1466 | .open = pinctrl_pins_open, | |
1467 | .read = seq_read, | |
1468 | .llseek = seq_lseek, | |
1469 | .release = single_release, | |
1470 | }; | |
1471 | ||
1472 | static const struct file_operations pinctrl_groups_ops = { | |
1473 | .open = pinctrl_groups_open, | |
1474 | .read = seq_read, | |
1475 | .llseek = seq_lseek, | |
1476 | .release = single_release, | |
1477 | }; | |
1478 | ||
1479 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1480 | .open = pinctrl_gpioranges_open, | |
1481 | .read = seq_read, | |
1482 | .llseek = seq_lseek, | |
1483 | .release = single_release, | |
1484 | }; | |
1485 | ||
3eedb437 SW |
1486 | static const struct file_operations pinctrl_devices_ops = { |
1487 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1488 | .read = seq_read, |
1489 | .llseek = seq_lseek, | |
1490 | .release = single_release, | |
1491 | }; | |
1492 | ||
3eedb437 SW |
1493 | static const struct file_operations pinctrl_maps_ops = { |
1494 | .open = pinctrl_maps_open, | |
2744e8af LW |
1495 | .read = seq_read, |
1496 | .llseek = seq_lseek, | |
1497 | .release = single_release, | |
1498 | }; | |
1499 | ||
befe5bdf LW |
1500 | static const struct file_operations pinctrl_ops = { |
1501 | .open = pinctrl_open, | |
1502 | .read = seq_read, | |
1503 | .llseek = seq_lseek, | |
1504 | .release = single_release, | |
1505 | }; | |
1506 | ||
2744e8af LW |
1507 | static struct dentry *debugfs_root; |
1508 | ||
1509 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1510 | { | |
02157160 | 1511 | struct dentry *device_root; |
2744e8af | 1512 | |
51cd24ee | 1513 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1514 | debugfs_root); |
02157160 TL |
1515 | pctldev->device_root = device_root; |
1516 | ||
2744e8af LW |
1517 | if (IS_ERR(device_root) || !device_root) { |
1518 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1519 | dev_name(pctldev->dev)); |
2744e8af LW |
1520 | return; |
1521 | } | |
1522 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1523 | device_root, pctldev, &pinctrl_pins_ops); | |
1524 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1525 | device_root, pctldev, &pinctrl_groups_ops); | |
1526 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1527 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1528 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1529 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1530 | } |
1531 | ||
02157160 TL |
1532 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1533 | { | |
1534 | debugfs_remove_recursive(pctldev->device_root); | |
1535 | } | |
1536 | ||
2744e8af LW |
1537 | static void pinctrl_init_debugfs(void) |
1538 | { | |
1539 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1540 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1541 | pr_warn("failed to create debugfs directory\n"); | |
1542 | debugfs_root = NULL; | |
1543 | return; | |
1544 | } | |
1545 | ||
1546 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1547 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1548 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1549 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1550 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1551 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1552 | } |
1553 | ||
1554 | #else /* CONFIG_DEBUG_FS */ | |
1555 | ||
1556 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1557 | { | |
1558 | } | |
1559 | ||
1560 | static void pinctrl_init_debugfs(void) | |
1561 | { | |
1562 | } | |
1563 | ||
02157160 TL |
1564 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1565 | { | |
1566 | } | |
1567 | ||
2744e8af LW |
1568 | #endif |
1569 | ||
d26bc49f SW |
1570 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1571 | { | |
1572 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1573 | ||
1574 | if (!ops || | |
d1e90e9e | 1575 | !ops->get_groups_count || |
d26bc49f SW |
1576 | !ops->get_group_name || |
1577 | !ops->get_group_pins) | |
1578 | return -EINVAL; | |
1579 | ||
57291ce2 SW |
1580 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1581 | return -EINVAL; | |
1582 | ||
d26bc49f SW |
1583 | return 0; |
1584 | } | |
1585 | ||
2744e8af LW |
1586 | /** |
1587 | * pinctrl_register() - register a pin controller device | |
1588 | * @pctldesc: descriptor for this pin controller | |
1589 | * @dev: parent device for this pin controller | |
1590 | * @driver_data: private pin controller data for this pin controller | |
1591 | */ | |
1592 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1593 | struct device *dev, void *driver_data) | |
1594 | { | |
2744e8af LW |
1595 | struct pinctrl_dev *pctldev; |
1596 | int ret; | |
1597 | ||
da9aecb0 | 1598 | if (!pctldesc) |
2744e8af | 1599 | return NULL; |
da9aecb0 | 1600 | if (!pctldesc->name) |
2744e8af LW |
1601 | return NULL; |
1602 | ||
02f5b989 | 1603 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1604 | if (pctldev == NULL) { |
1605 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1606 | return NULL; |
95dcd4ae | 1607 | } |
b9130b77 TL |
1608 | |
1609 | /* Initialize pin control device struct */ | |
1610 | pctldev->owner = pctldesc->owner; | |
1611 | pctldev->desc = pctldesc; | |
1612 | pctldev->driver_data = driver_data; | |
1613 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1614 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1615 | pctldev->dev = dev; |
42fed7ba | 1616 | mutex_init(&pctldev->mutex); |
b9130b77 | 1617 | |
d26bc49f | 1618 | /* check core ops for sanity */ |
da9aecb0 | 1619 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1620 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1621 | goto out_err; |
1622 | } | |
1623 | ||
2744e8af LW |
1624 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1625 | if (pctldesc->pmxops) { | |
da9aecb0 | 1626 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1627 | goto out_err; |
2744e8af LW |
1628 | } |
1629 | ||
ae6b4d85 LW |
1630 | /* If we're implementing pinconfig, check the ops for sanity */ |
1631 | if (pctldesc->confops) { | |
da9aecb0 | 1632 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1633 | goto out_err; |
ae6b4d85 LW |
1634 | } |
1635 | ||
2744e8af | 1636 | /* Register all the pins */ |
ad6e1107 | 1637 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1638 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1639 | if (ret) { | |
ad6e1107 | 1640 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1641 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1642 | pctldesc->npins); | |
51cd24ee | 1643 | goto out_err; |
2744e8af LW |
1644 | } |
1645 | ||
42fed7ba | 1646 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1647 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1648 | mutex_unlock(&pinctrldev_list_mutex); |
1649 | ||
1650 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1651 | |
6e5e959d | 1652 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1653 | pctldev->hog_default = |
42fed7ba | 1654 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1655 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1656 | dev_dbg(dev, "failed to lookup the default state\n"); |
1657 | } else { | |
42fed7ba | 1658 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1659 | pctldev->hog_default)) |
ad6e1107 JC |
1660 | dev_err(dev, |
1661 | "failed to select default state\n"); | |
ad6e1107 | 1662 | } |
840a47ba JD |
1663 | |
1664 | pctldev->hog_sleep = | |
42fed7ba | 1665 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1666 | PINCTRL_STATE_SLEEP); |
1667 | if (IS_ERR(pctldev->hog_sleep)) | |
1668 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1669 | } |
57b676f9 | 1670 | |
2304b473 SW |
1671 | pinctrl_init_device_debugfs(pctldev); |
1672 | ||
2744e8af LW |
1673 | return pctldev; |
1674 | ||
51cd24ee | 1675 | out_err: |
42fed7ba | 1676 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1677 | kfree(pctldev); |
2744e8af LW |
1678 | return NULL; |
1679 | } | |
1680 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1681 | ||
1682 | /** | |
1683 | * pinctrl_unregister() - unregister pinmux | |
1684 | * @pctldev: pin controller to unregister | |
1685 | * | |
1686 | * Called by pinmux drivers to unregister a pinmux. | |
1687 | */ | |
1688 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1689 | { | |
5d589b09 | 1690 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1691 | if (pctldev == NULL) |
1692 | return; | |
1693 | ||
42fed7ba | 1694 | mutex_lock(&pctldev->mutex); |
42fed7ba | 1695 | pinctrl_remove_device_debugfs(pctldev); |
a01bbd75 | 1696 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1697 | |
6e5e959d | 1698 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1699 | pinctrl_put(pctldev->p); |
57b676f9 | 1700 | |
a01bbd75 JL |
1701 | mutex_lock(&pinctrldev_list_mutex); |
1702 | mutex_lock(&pctldev->mutex); | |
2744e8af | 1703 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1704 | list_del(&pctldev->node); |
2744e8af LW |
1705 | /* Destroy descriptor tree */ |
1706 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1707 | pctldev->desc->npins); | |
5d589b09 DA |
1708 | /* remove gpio ranges map */ |
1709 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1710 | list_del(&range->node); | |
1711 | ||
42fed7ba PC |
1712 | mutex_unlock(&pctldev->mutex); |
1713 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1714 | kfree(pctldev); |
42fed7ba | 1715 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1716 | } |
1717 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1718 | ||
1719 | static int __init pinctrl_init(void) | |
1720 | { | |
1721 | pr_info("initialized pinctrl subsystem\n"); | |
1722 | pinctrl_init_debugfs(); | |
1723 | return 0; | |
1724 | } | |
1725 | ||
1726 | /* init early since many drivers really need to initialized pinmux early */ | |
1727 | core_initcall(pinctrl_init); |