Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba PC |
43 | /* Mutex taken to protect pinctrl_list */ |
44 | DEFINE_MUTEX(pinctrl_list_mutex); | |
45 | ||
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
50 | DEFINE_MUTEX(pinctrldev_list_mutex); | |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
156 | if (desc == NULL) | |
157 | continue; | |
158 | if (desc->name && !strcmp(name, desc->name)) | |
159 | return pin; | |
160 | } | |
161 | ||
162 | return -EINVAL; | |
163 | } | |
164 | ||
dcb5dbc3 DA |
165 | /** |
166 | * pin_get_name_from_id() - look up a pin name from a pin id | |
167 | * @pctldev: the pin control device to lookup the pin on | |
168 | * @name: the name of the pin to look up | |
169 | */ | |
170 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
171 | { | |
172 | const struct pin_desc *desc; | |
173 | ||
174 | desc = pin_desc_get(pctldev, pin); | |
175 | if (desc == NULL) { | |
176 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
177 | pin); | |
178 | return NULL; | |
179 | } | |
180 | ||
181 | return desc->name; | |
182 | } | |
183 | ||
2744e8af LW |
184 | /** |
185 | * pin_is_valid() - check if pin exists on controller | |
186 | * @pctldev: the pin control device to check the pin on | |
187 | * @pin: pin to check, use the local pin controller index number | |
188 | * | |
189 | * This tells us whether a certain pin exist on a certain pin controller or | |
190 | * not. Pin lists may be sparse, so some pins may not exist. | |
191 | */ | |
192 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
193 | { | |
194 | struct pin_desc *pindesc; | |
195 | ||
196 | if (pin < 0) | |
197 | return false; | |
198 | ||
42fed7ba | 199 | mutex_lock(&pctldev->mutex); |
2744e8af | 200 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 201 | mutex_unlock(&pctldev->mutex); |
2744e8af | 202 | |
57b676f9 | 203 | return pindesc != NULL; |
2744e8af LW |
204 | } |
205 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
206 | ||
207 | /* Deletes a range of pin descriptors */ | |
208 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
209 | const struct pinctrl_pin_desc *pins, | |
210 | unsigned num_pins) | |
211 | { | |
212 | int i; | |
213 | ||
2744e8af LW |
214 | for (i = 0; i < num_pins; i++) { |
215 | struct pin_desc *pindesc; | |
216 | ||
217 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
218 | pins[i].number); | |
219 | if (pindesc != NULL) { | |
220 | radix_tree_delete(&pctldev->pin_desc_tree, | |
221 | pins[i].number); | |
ca53c5f1 LW |
222 | if (pindesc->dynamic_name) |
223 | kfree(pindesc->name); | |
2744e8af LW |
224 | } |
225 | kfree(pindesc); | |
226 | } | |
2744e8af LW |
227 | } |
228 | ||
229 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
230 | unsigned number, const char *name) | |
231 | { | |
232 | struct pin_desc *pindesc; | |
233 | ||
234 | pindesc = pin_desc_get(pctldev, number); | |
235 | if (pindesc != NULL) { | |
236 | pr_err("pin %d already registered on %s\n", number, | |
237 | pctldev->desc->name); | |
238 | return -EINVAL; | |
239 | } | |
240 | ||
241 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
242 | if (pindesc == NULL) { |
243 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 244 | return -ENOMEM; |
95dcd4ae | 245 | } |
ae6b4d85 | 246 | |
2744e8af LW |
247 | /* Set owner */ |
248 | pindesc->pctldev = pctldev; | |
249 | ||
9af1e44f | 250 | /* Copy basic pin info */ |
8dc6ae4d | 251 | if (name) { |
ca53c5f1 LW |
252 | pindesc->name = name; |
253 | } else { | |
254 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
255 | if (pindesc->name == NULL) { |
256 | kfree(pindesc); | |
ca53c5f1 | 257 | return -ENOMEM; |
eb26cc9c | 258 | } |
ca53c5f1 LW |
259 | pindesc->dynamic_name = true; |
260 | } | |
2744e8af | 261 | |
2744e8af | 262 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 263 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 264 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
265 | return 0; |
266 | } | |
267 | ||
268 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
269 | struct pinctrl_pin_desc const *pins, | |
270 | unsigned num_descs) | |
271 | { | |
272 | unsigned i; | |
273 | int ret = 0; | |
274 | ||
275 | for (i = 0; i < num_descs; i++) { | |
276 | ret = pinctrl_register_one_pin(pctldev, | |
277 | pins[i].number, pins[i].name); | |
278 | if (ret) | |
279 | return ret; | |
280 | } | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | /** | |
286 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
287 | * @pctldev: pin controller device to check | |
288 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
289 | * | |
290 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
291 | * controller, return the range or NULL | |
292 | */ | |
293 | static struct pinctrl_gpio_range * | |
294 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
295 | { | |
296 | struct pinctrl_gpio_range *range = NULL; | |
297 | ||
42fed7ba | 298 | mutex_lock(&pctldev->mutex); |
2744e8af | 299 | /* Loop over the ranges */ |
2744e8af LW |
300 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
301 | /* Check if we're in the valid range */ | |
302 | if (gpio >= range->base && | |
303 | gpio < range->base + range->npins) { | |
42fed7ba | 304 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
305 | return range; |
306 | } | |
307 | } | |
42fed7ba | 308 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
309 | return NULL; |
310 | } | |
311 | ||
51e13c24 HZ |
312 | /** |
313 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
314 | * the same GPIO chip are in range | |
315 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
316 | * | |
317 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
318 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
319 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
320 | * of the same GPIO chip don't have back-end pinctrl interface. | |
321 | * If the return value is true, it means that pinctrl device is ready & the | |
322 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
323 | * is false, it means that pinctrl device may not be ready. | |
324 | */ | |
2afe8229 | 325 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
326 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
327 | { | |
328 | struct pinctrl_dev *pctldev; | |
329 | struct pinctrl_gpio_range *range = NULL; | |
330 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
331 | ||
44d5f7bb LW |
332 | mutex_lock(&pinctrldev_list_mutex); |
333 | ||
51e13c24 HZ |
334 | /* Loop over the pin controllers */ |
335 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
336 | /* Loop over the ranges */ | |
337 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
338 | /* Check if any gpio range overlapped with gpio chip */ | |
339 | if (range->base + range->npins - 1 < chip->base || | |
340 | range->base > chip->base + chip->ngpio - 1) | |
341 | continue; | |
44d5f7bb | 342 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
343 | return true; |
344 | } | |
345 | } | |
44d5f7bb LW |
346 | |
347 | mutex_unlock(&pinctrldev_list_mutex); | |
348 | ||
51e13c24 HZ |
349 | return false; |
350 | } | |
2afe8229 HZ |
351 | #else |
352 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
353 | #endif | |
51e13c24 | 354 | |
2744e8af LW |
355 | /** |
356 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
357 | * @gpio: the pin to locate the pin controller for | |
358 | * @outdev: the pin control device if found | |
359 | * @outrange: the GPIO range if found | |
360 | * | |
361 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
362 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
363 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
364 | * may still have not been registered. | |
2744e8af | 365 | */ |
4ecce45d SW |
366 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
367 | struct pinctrl_dev **outdev, | |
368 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
369 | { |
370 | struct pinctrl_dev *pctldev = NULL; | |
371 | ||
372 | /* Loop over the pin controllers */ | |
2744e8af LW |
373 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
374 | struct pinctrl_gpio_range *range; | |
375 | ||
376 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
377 | if (range != NULL) { | |
378 | *outdev = pctldev; | |
379 | *outrange = range; | |
2744e8af LW |
380 | return 0; |
381 | } | |
382 | } | |
2744e8af | 383 | |
4650b7cb | 384 | return -EPROBE_DEFER; |
2744e8af LW |
385 | } |
386 | ||
387 | /** | |
388 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
389 | * @pctldev: pin controller device to add the range to | |
390 | * @range: the GPIO range to add | |
391 | * | |
392 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
393 | * this to register handled ranges after registering your pin controller. | |
394 | */ | |
395 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
396 | struct pinctrl_gpio_range *range) | |
397 | { | |
42fed7ba | 398 | mutex_lock(&pctldev->mutex); |
8b9c139f | 399 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 400 | mutex_unlock(&pctldev->mutex); |
2744e8af | 401 | } |
4ecce45d | 402 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 403 | |
3e5e00b6 DA |
404 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
405 | struct pinctrl_gpio_range *ranges, | |
406 | unsigned nranges) | |
407 | { | |
408 | int i; | |
409 | ||
410 | for (i = 0; i < nranges; i++) | |
411 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
412 | } | |
413 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
414 | ||
192c369c | 415 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
416 | struct pinctrl_gpio_range *range) |
417 | { | |
42fed7ba PC |
418 | struct pinctrl_dev *pctldev; |
419 | ||
42fed7ba | 420 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 421 | |
dfa97515 LW |
422 | /* |
423 | * If we can't find this device, let's assume that is because | |
424 | * it has not probed yet, so the driver trying to register this | |
425 | * range need to defer probing. | |
426 | */ | |
42fed7ba | 427 | if (!pctldev) { |
dfa97515 | 428 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 429 | } |
f23f1516 | 430 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 431 | |
f23f1516 SH |
432 | return pctldev; |
433 | } | |
192c369c | 434 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 435 | |
9afbefb2 LW |
436 | /** |
437 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
438 | * @pctldev: the pin controller device to look in | |
439 | * @pin: a controller-local number to find the range for | |
440 | */ | |
441 | struct pinctrl_gpio_range * | |
442 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
443 | unsigned int pin) | |
444 | { | |
445 | struct pinctrl_gpio_range *range = NULL; | |
446 | ||
42fed7ba | 447 | mutex_lock(&pctldev->mutex); |
9afbefb2 LW |
448 | /* Loop over the ranges */ |
449 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
450 | /* Check if we're in the valid range */ | |
451 | if (pin >= range->pin_base && | |
452 | pin < range->pin_base + range->npins) { | |
42fed7ba | 453 | mutex_unlock(&pctldev->mutex); |
9afbefb2 LW |
454 | return range; |
455 | } | |
456 | } | |
42fed7ba | 457 | mutex_unlock(&pctldev->mutex); |
9afbefb2 LW |
458 | |
459 | return NULL; | |
460 | } | |
461 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
462 | ||
7e10ee68 VK |
463 | /** |
464 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
465 | * @pctldev: pin controller device to remove the range from | |
466 | * @range: the GPIO range to remove | |
467 | */ | |
468 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
469 | struct pinctrl_gpio_range *range) | |
470 | { | |
42fed7ba | 471 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 472 | list_del(&range->node); |
42fed7ba | 473 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
474 | } |
475 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
476 | ||
7afde8ba LW |
477 | /** |
478 | * pinctrl_get_group_selector() - returns the group selector for a group | |
479 | * @pctldev: the pin controller handling the group | |
480 | * @pin_group: the pin group to look up | |
481 | */ | |
482 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
483 | const char *pin_group) | |
484 | { | |
485 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 486 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
487 | unsigned group_selector = 0; |
488 | ||
d1e90e9e | 489 | while (group_selector < ngroups) { |
7afde8ba LW |
490 | const char *gname = pctlops->get_group_name(pctldev, |
491 | group_selector); | |
492 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 493 | dev_dbg(pctldev->dev, |
7afde8ba LW |
494 | "found group selector %u for %s\n", |
495 | group_selector, | |
496 | pin_group); | |
497 | return group_selector; | |
498 | } | |
499 | ||
500 | group_selector++; | |
501 | } | |
502 | ||
51cd24ee | 503 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
504 | pin_group); |
505 | ||
506 | return -EINVAL; | |
507 | } | |
508 | ||
befe5bdf LW |
509 | /** |
510 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
511 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
512 | * | |
513 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
514 | * as part of their gpio_request() semantics, platforms and individual drivers | |
515 | * shall *NOT* request GPIO pins to be muxed in. | |
516 | */ | |
517 | int pinctrl_request_gpio(unsigned gpio) | |
518 | { | |
519 | struct pinctrl_dev *pctldev; | |
520 | struct pinctrl_gpio_range *range; | |
521 | int ret; | |
522 | int pin; | |
523 | ||
524 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 525 | if (ret) { |
51e13c24 HZ |
526 | if (pinctrl_ready_for_gpio_range(gpio)) |
527 | ret = 0; | |
4650b7cb | 528 | return ret; |
57b676f9 | 529 | } |
befe5bdf LW |
530 | |
531 | /* Convert to the pin controllers number space */ | |
532 | pin = gpio - range->base + range->pin_base; | |
533 | ||
57b676f9 SW |
534 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
535 | ||
57b676f9 | 536 | return ret; |
befe5bdf LW |
537 | } |
538 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
539 | ||
540 | /** | |
541 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
542 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
543 | * | |
544 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
545 | * as part of their gpio_free() semantics, platforms and individual drivers | |
546 | * shall *NOT* request GPIO pins to be muxed out. | |
547 | */ | |
548 | void pinctrl_free_gpio(unsigned gpio) | |
549 | { | |
550 | struct pinctrl_dev *pctldev; | |
551 | struct pinctrl_gpio_range *range; | |
552 | int ret; | |
553 | int pin; | |
554 | ||
555 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 556 | if (ret) { |
befe5bdf | 557 | return; |
57b676f9 | 558 | } |
42fed7ba | 559 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
560 | |
561 | /* Convert to the pin controllers number space */ | |
562 | pin = gpio - range->base + range->pin_base; | |
563 | ||
57b676f9 SW |
564 | pinmux_free_gpio(pctldev, pin, range); |
565 | ||
42fed7ba | 566 | mutex_unlock(&pctldev->mutex); |
befe5bdf LW |
567 | } |
568 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
569 | ||
570 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
571 | { | |
572 | struct pinctrl_dev *pctldev; | |
573 | struct pinctrl_gpio_range *range; | |
574 | int ret; | |
575 | int pin; | |
576 | ||
577 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 578 | if (ret) { |
befe5bdf | 579 | return ret; |
42fed7ba PC |
580 | } |
581 | ||
582 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
583 | |
584 | /* Convert to the pin controllers number space */ | |
585 | pin = gpio - range->base + range->pin_base; | |
42fed7ba PC |
586 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
587 | ||
588 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 589 | |
42fed7ba | 590 | return ret; |
befe5bdf LW |
591 | } |
592 | ||
593 | /** | |
594 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
595 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
596 | * | |
597 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
598 | * as part of their gpio_direction_input() semantics, platforms and individual | |
599 | * drivers shall *NOT* touch pin control GPIO calls. | |
600 | */ | |
601 | int pinctrl_gpio_direction_input(unsigned gpio) | |
602 | { | |
42fed7ba | 603 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
604 | } |
605 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
606 | ||
607 | /** | |
608 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
609 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
610 | * | |
611 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
612 | * as part of their gpio_direction_output() semantics, platforms and individual | |
613 | * drivers shall *NOT* touch pin control GPIO calls. | |
614 | */ | |
615 | int pinctrl_gpio_direction_output(unsigned gpio) | |
616 | { | |
42fed7ba | 617 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
618 | } |
619 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
620 | ||
6e5e959d SW |
621 | static struct pinctrl_state *find_state(struct pinctrl *p, |
622 | const char *name) | |
befe5bdf | 623 | { |
6e5e959d SW |
624 | struct pinctrl_state *state; |
625 | ||
626 | list_for_each_entry(state, &p->states, node) | |
627 | if (!strcmp(state->name, name)) | |
628 | return state; | |
629 | ||
630 | return NULL; | |
631 | } | |
632 | ||
633 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
634 | const char *name) | |
635 | { | |
636 | struct pinctrl_state *state; | |
637 | ||
638 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
639 | if (state == NULL) { | |
640 | dev_err(p->dev, | |
641 | "failed to alloc struct pinctrl_state\n"); | |
642 | return ERR_PTR(-ENOMEM); | |
643 | } | |
644 | ||
645 | state->name = name; | |
646 | INIT_LIST_HEAD(&state->settings); | |
647 | ||
648 | list_add_tail(&state->node, &p->states); | |
649 | ||
650 | return state; | |
651 | } | |
652 | ||
653 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
654 | { | |
655 | struct pinctrl_state *state; | |
7ecdb16f | 656 | struct pinctrl_setting *setting; |
6e5e959d | 657 | int ret; |
befe5bdf | 658 | |
6e5e959d SW |
659 | state = find_state(p, map->name); |
660 | if (!state) | |
661 | state = create_state(p, map->name); | |
662 | if (IS_ERR(state)) | |
663 | return PTR_ERR(state); | |
befe5bdf | 664 | |
1e2082b5 SW |
665 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
666 | return 0; | |
667 | ||
6e5e959d SW |
668 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
669 | if (setting == NULL) { | |
670 | dev_err(p->dev, | |
671 | "failed to alloc struct pinctrl_setting\n"); | |
672 | return -ENOMEM; | |
673 | } | |
befe5bdf | 674 | |
1e2082b5 SW |
675 | setting->type = map->type; |
676 | ||
6e5e959d SW |
677 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
678 | if (setting->pctldev == NULL) { | |
6e5e959d | 679 | kfree(setting); |
89216494 LW |
680 | /* Do not defer probing of hogs (circular loop) */ |
681 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
682 | return -ENODEV; | |
c05127c4 LW |
683 | /* |
684 | * OK let us guess that the driver is not there yet, and | |
685 | * let's defer obtaining this pinctrl handle to later... | |
686 | */ | |
89216494 LW |
687 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
688 | map->ctrl_dev_name); | |
c05127c4 | 689 | return -EPROBE_DEFER; |
6e5e959d SW |
690 | } |
691 | ||
1a78958d LW |
692 | setting->dev_name = map->dev_name; |
693 | ||
1e2082b5 SW |
694 | switch (map->type) { |
695 | case PIN_MAP_TYPE_MUX_GROUP: | |
696 | ret = pinmux_map_to_setting(map, setting); | |
697 | break; | |
698 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
699 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
700 | ret = pinconf_map_to_setting(map, setting); | |
701 | break; | |
702 | default: | |
703 | ret = -EINVAL; | |
704 | break; | |
705 | } | |
6e5e959d SW |
706 | if (ret < 0) { |
707 | kfree(setting); | |
708 | return ret; | |
709 | } | |
710 | ||
711 | list_add_tail(&setting->node, &state->settings); | |
712 | ||
713 | return 0; | |
714 | } | |
715 | ||
716 | static struct pinctrl *find_pinctrl(struct device *dev) | |
717 | { | |
718 | struct pinctrl *p; | |
719 | ||
42fed7ba | 720 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 721 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
722 | if (p->dev == dev) { |
723 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 724 | return p; |
42fed7ba | 725 | } |
6e5e959d | 726 | |
42fed7ba | 727 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
728 | return NULL; |
729 | } | |
730 | ||
42fed7ba | 731 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
732 | |
733 | static struct pinctrl *create_pinctrl(struct device *dev) | |
734 | { | |
735 | struct pinctrl *p; | |
736 | const char *devname; | |
737 | struct pinctrl_maps *maps_node; | |
738 | int i; | |
739 | struct pinctrl_map const *map; | |
740 | int ret; | |
befe5bdf LW |
741 | |
742 | /* | |
743 | * create the state cookie holder struct pinctrl for each | |
744 | * mapping, this is what consumers will get when requesting | |
745 | * a pin control handle with pinctrl_get() | |
746 | */ | |
02f5b989 | 747 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
748 | if (p == NULL) { |
749 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 750 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 751 | } |
7ecdb16f | 752 | p->dev = dev; |
6e5e959d | 753 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
754 | INIT_LIST_HEAD(&p->dt_maps); |
755 | ||
756 | ret = pinctrl_dt_to_map(p); | |
757 | if (ret < 0) { | |
758 | kfree(p); | |
759 | return ERR_PTR(ret); | |
760 | } | |
6e5e959d SW |
761 | |
762 | devname = dev_name(dev); | |
befe5bdf | 763 | |
42fed7ba | 764 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 765 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 766 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
767 | /* Map must be for this device */ |
768 | if (strcmp(map->dev_name, devname)) | |
769 | continue; | |
770 | ||
6e5e959d | 771 | ret = add_setting(p, map); |
89216494 LW |
772 | /* |
773 | * At this point the adding of a setting may: | |
774 | * | |
775 | * - Defer, if the pinctrl device is not yet available | |
776 | * - Fail, if the pinctrl device is not yet available, | |
777 | * AND the setting is a hog. We cannot defer that, since | |
778 | * the hog will kick in immediately after the device | |
779 | * is registered. | |
780 | * | |
781 | * If the error returned was not -EPROBE_DEFER then we | |
782 | * accumulate the errors to see if we end up with | |
783 | * an -EPROBE_DEFER later, as that is the worst case. | |
784 | */ | |
785 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
786 | pinctrl_free(p, false); |
787 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 788 | return ERR_PTR(ret); |
7ecdb16f | 789 | } |
befe5bdf | 790 | } |
42fed7ba PC |
791 | mutex_unlock(&pinctrl_maps_mutex); |
792 | ||
89216494 LW |
793 | if (ret < 0) { |
794 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 795 | pinctrl_free(p, false); |
89216494 LW |
796 | return ERR_PTR(ret); |
797 | } | |
befe5bdf | 798 | |
ab78029e LW |
799 | kref_init(&p->users); |
800 | ||
b0666ba4 | 801 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 802 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
803 | |
804 | return p; | |
6e5e959d | 805 | } |
7ecdb16f | 806 | |
42fed7ba PC |
807 | /** |
808 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
809 | * @dev: the device to obtain the handle for | |
810 | */ | |
811 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
812 | { |
813 | struct pinctrl *p; | |
7ecdb16f | 814 | |
6e5e959d SW |
815 | if (WARN_ON(!dev)) |
816 | return ERR_PTR(-EINVAL); | |
817 | ||
ab78029e LW |
818 | /* |
819 | * See if somebody else (such as the device core) has already | |
820 | * obtained a handle to the pinctrl for this device. In that case, | |
821 | * return another pointer to it. | |
822 | */ | |
6e5e959d | 823 | p = find_pinctrl(dev); |
ab78029e LW |
824 | if (p != NULL) { |
825 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
826 | kref_get(&p->users); | |
827 | return p; | |
828 | } | |
7ecdb16f | 829 | |
d599bfb3 | 830 | return create_pinctrl(dev); |
befe5bdf LW |
831 | } |
832 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
833 | ||
d3cee830 RG |
834 | static void pinctrl_free_setting(bool disable_setting, |
835 | struct pinctrl_setting *setting) | |
836 | { | |
837 | switch (setting->type) { | |
838 | case PIN_MAP_TYPE_MUX_GROUP: | |
839 | if (disable_setting) | |
840 | pinmux_disable_setting(setting); | |
841 | pinmux_free_setting(setting); | |
842 | break; | |
843 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
844 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
845 | pinconf_free_setting(setting); | |
846 | break; | |
847 | default: | |
848 | break; | |
849 | } | |
850 | } | |
851 | ||
42fed7ba | 852 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 853 | { |
6e5e959d SW |
854 | struct pinctrl_state *state, *n1; |
855 | struct pinctrl_setting *setting, *n2; | |
856 | ||
42fed7ba | 857 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
858 | list_for_each_entry_safe(state, n1, &p->states, node) { |
859 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 860 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
861 | list_del(&setting->node); |
862 | kfree(setting); | |
863 | } | |
864 | list_del(&state->node); | |
865 | kfree(state); | |
7ecdb16f | 866 | } |
befe5bdf | 867 | |
57291ce2 SW |
868 | pinctrl_dt_free_maps(p); |
869 | ||
6e5e959d SW |
870 | if (inlist) |
871 | list_del(&p->node); | |
befe5bdf | 872 | kfree(p); |
42fed7ba | 873 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 874 | } |
befe5bdf LW |
875 | |
876 | /** | |
ab78029e LW |
877 | * pinctrl_release() - release the pinctrl handle |
878 | * @kref: the kref in the pinctrl being released | |
879 | */ | |
2917e833 | 880 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
881 | { |
882 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
883 | ||
42fed7ba | 884 | pinctrl_free(p, true); |
ab78029e LW |
885 | } |
886 | ||
887 | /** | |
888 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 889 | * @p: the pinctrl handle to release |
befe5bdf | 890 | */ |
57b676f9 SW |
891 | void pinctrl_put(struct pinctrl *p) |
892 | { | |
ab78029e | 893 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
894 | } |
895 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
896 | ||
42fed7ba PC |
897 | /** |
898 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
899 | * @p: the pinctrl handle to retrieve the state from | |
900 | * @name: the state name to retrieve | |
901 | */ | |
902 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
903 | const char *name) | |
befe5bdf | 904 | { |
6e5e959d | 905 | struct pinctrl_state *state; |
befe5bdf | 906 | |
6e5e959d | 907 | state = find_state(p, name); |
5b3aa5f7 DA |
908 | if (!state) { |
909 | if (pinctrl_dummy_state) { | |
910 | /* create dummy state */ | |
911 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
912 | name); | |
913 | state = create_state(p, name); | |
d599bfb3 RG |
914 | } else |
915 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 916 | } |
57b676f9 | 917 | |
6e5e959d | 918 | return state; |
befe5bdf | 919 | } |
42fed7ba | 920 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
921 | |
922 | /** | |
42fed7ba PC |
923 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
924 | * @p: the pinctrl handle for the device that requests configuration | |
925 | * @state: the state handle to select/activate/program | |
befe5bdf | 926 | */ |
42fed7ba | 927 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 928 | { |
6e5e959d | 929 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 930 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 931 | int ret; |
7ecdb16f | 932 | |
6e5e959d SW |
933 | if (p->state == state) |
934 | return 0; | |
befe5bdf | 935 | |
6e5e959d SW |
936 | if (p->state) { |
937 | /* | |
938 | * The set of groups with a mux configuration in the old state | |
939 | * may not be identical to the set of groups with a mux setting | |
940 | * in the new state. While this might be unusual, it's entirely | |
941 | * possible for the "user"-supplied mapping table to be written | |
942 | * that way. For each group that was configured in the old state | |
943 | * but not in the new state, this code puts that group into a | |
944 | * safe/disabled state. | |
945 | */ | |
946 | list_for_each_entry(setting, &p->state->settings, node) { | |
947 | bool found = false; | |
1e2082b5 SW |
948 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
949 | continue; | |
6e5e959d | 950 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
951 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
952 | continue; | |
953 | if (setting2->data.mux.group == | |
954 | setting->data.mux.group) { | |
6e5e959d SW |
955 | found = true; |
956 | break; | |
957 | } | |
958 | } | |
959 | if (!found) | |
960 | pinmux_disable_setting(setting); | |
961 | } | |
962 | } | |
963 | ||
3102a76c | 964 | p->state = NULL; |
6e5e959d SW |
965 | |
966 | /* Apply all the settings for the new state */ | |
967 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
968 | switch (setting->type) { |
969 | case PIN_MAP_TYPE_MUX_GROUP: | |
970 | ret = pinmux_enable_setting(setting); | |
971 | break; | |
972 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
973 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
974 | ret = pinconf_apply_setting(setting); | |
975 | break; | |
976 | default: | |
977 | ret = -EINVAL; | |
978 | break; | |
979 | } | |
3102a76c | 980 | |
42fed7ba | 981 | if (ret < 0) { |
3102a76c | 982 | goto unapply_new_state; |
42fed7ba | 983 | } |
befe5bdf | 984 | } |
6e5e959d | 985 | |
3102a76c RG |
986 | p->state = state; |
987 | ||
6e5e959d | 988 | return 0; |
3102a76c RG |
989 | |
990 | unapply_new_state: | |
da58751c | 991 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 992 | |
3102a76c RG |
993 | list_for_each_entry(setting2, &state->settings, node) { |
994 | if (&setting2->node == &setting->node) | |
995 | break; | |
af606177 RG |
996 | /* |
997 | * All we can do here is pinmux_disable_setting. | |
998 | * That means that some pins are muxed differently now | |
999 | * than they were before applying the setting (We can't | |
1000 | * "unmux a pin"!), but it's not a big deal since the pins | |
1001 | * are free to be muxed by another apply_setting. | |
1002 | */ | |
1003 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1004 | pinmux_disable_setting(setting2); | |
3102a76c | 1005 | } |
8009d5ff | 1006 | |
385d9424 RG |
1007 | /* There's no infinite recursive loop here because p->state is NULL */ |
1008 | if (old_state) | |
42fed7ba | 1009 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1010 | |
1011 | return ret; | |
befe5bdf | 1012 | } |
6e5e959d | 1013 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1014 | |
6d4ca1fb SW |
1015 | static void devm_pinctrl_release(struct device *dev, void *res) |
1016 | { | |
1017 | pinctrl_put(*(struct pinctrl **)res); | |
1018 | } | |
1019 | ||
1020 | /** | |
1021 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1022 | * @dev: the device to obtain the handle for | |
1023 | * | |
1024 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1025 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1026 | */ | |
1027 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1028 | { | |
1029 | struct pinctrl **ptr, *p; | |
1030 | ||
1031 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1032 | if (!ptr) | |
1033 | return ERR_PTR(-ENOMEM); | |
1034 | ||
1035 | p = pinctrl_get(dev); | |
1036 | if (!IS_ERR(p)) { | |
1037 | *ptr = p; | |
1038 | devres_add(dev, ptr); | |
1039 | } else { | |
1040 | devres_free(ptr); | |
1041 | } | |
1042 | ||
1043 | return p; | |
1044 | } | |
1045 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1046 | ||
1047 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1048 | { | |
1049 | struct pinctrl **p = res; | |
1050 | ||
1051 | return *p == data; | |
1052 | } | |
1053 | ||
1054 | /** | |
1055 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1056 | * @p: the pinctrl handle to release | |
1057 | * | |
1058 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1059 | * this function will not need to be called and the resource management | |
1060 | * code will ensure that the resource is freed. | |
1061 | */ | |
1062 | void devm_pinctrl_put(struct pinctrl *p) | |
1063 | { | |
a72149e8 | 1064 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1065 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1066 | } |
1067 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1068 | ||
57291ce2 SW |
1069 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
1070 | bool dup, bool locked) | |
befe5bdf | 1071 | { |
1e2082b5 | 1072 | int i, ret; |
b2b3e66e | 1073 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1074 | |
1075 | pr_debug("add %d pinmux maps\n", num_maps); | |
1076 | ||
1077 | /* First sanity check the new mapping */ | |
1078 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1079 | if (!maps[i].dev_name) { |
1080 | pr_err("failed to register map %s (%d): no device given\n", | |
1081 | maps[i].name, i); | |
1082 | return -EINVAL; | |
1083 | } | |
1084 | ||
befe5bdf LW |
1085 | if (!maps[i].name) { |
1086 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1087 | i); |
befe5bdf LW |
1088 | return -EINVAL; |
1089 | } | |
1090 | ||
1e2082b5 SW |
1091 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1092 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1093 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1094 | maps[i].name, i); | |
1095 | return -EINVAL; | |
1096 | } | |
1097 | ||
1e2082b5 SW |
1098 | switch (maps[i].type) { |
1099 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1100 | break; | |
1101 | case PIN_MAP_TYPE_MUX_GROUP: | |
1102 | ret = pinmux_validate_map(&maps[i], i); | |
1103 | if (ret < 0) | |
fde04f41 | 1104 | return ret; |
1e2082b5 SW |
1105 | break; |
1106 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1107 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1108 | ret = pinconf_validate_map(&maps[i], i); | |
1109 | if (ret < 0) | |
fde04f41 | 1110 | return ret; |
1e2082b5 SW |
1111 | break; |
1112 | default: | |
1113 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1114 | maps[i].name, i); |
1681f5ae SW |
1115 | return -EINVAL; |
1116 | } | |
befe5bdf LW |
1117 | } |
1118 | ||
b2b3e66e SW |
1119 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1120 | if (!maps_node) { | |
1121 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1122 | return -ENOMEM; | |
1123 | } | |
befe5bdf | 1124 | |
b2b3e66e | 1125 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1126 | if (dup) { |
1127 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1128 | GFP_KERNEL); | |
1129 | if (!maps_node->maps) { | |
1130 | pr_err("failed to duplicate mapping table\n"); | |
1131 | kfree(maps_node); | |
1132 | return -ENOMEM; | |
1133 | } | |
1134 | } else { | |
1135 | maps_node->maps = maps; | |
befe5bdf LW |
1136 | } |
1137 | ||
57291ce2 | 1138 | if (!locked) |
42fed7ba | 1139 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1140 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 | 1141 | if (!locked) |
42fed7ba | 1142 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1143 | |
befe5bdf LW |
1144 | return 0; |
1145 | } | |
1146 | ||
57291ce2 SW |
1147 | /** |
1148 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1149 | * @maps: the pincontrol mappings table to register. This should probably be | |
1150 | * marked with __initdata so it can be discarded after boot. This | |
1151 | * function will perform a shallow copy for the mapping entries. | |
1152 | * @num_maps: the number of maps in the mapping table | |
1153 | */ | |
1154 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1155 | unsigned num_maps) | |
1156 | { | |
1157 | return pinctrl_register_map(maps, num_maps, true, false); | |
1158 | } | |
1159 | ||
1160 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1161 | { | |
1162 | struct pinctrl_maps *maps_node; | |
1163 | ||
42fed7ba | 1164 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1165 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1166 | if (maps_node->maps == map) { | |
1167 | list_del(&maps_node->node); | |
42fed7ba | 1168 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1169 | return; |
1170 | } | |
1171 | } | |
42fed7ba | 1172 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1173 | } |
1174 | ||
840a47ba JD |
1175 | /** |
1176 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1177 | * @pctldev: pin controller device | |
1178 | */ | |
1179 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1180 | { | |
1181 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1182 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1183 | return 0; | |
1184 | } | |
1185 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1186 | ||
1187 | /** | |
1188 | * pinctrl_force_default() - turn a given controller device into default state | |
1189 | * @pctldev: pin controller device | |
1190 | */ | |
1191 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1192 | { | |
1193 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1194 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1195 | return 0; | |
1196 | } | |
1197 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1198 | ||
2744e8af LW |
1199 | #ifdef CONFIG_DEBUG_FS |
1200 | ||
1201 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1202 | { | |
1203 | struct pinctrl_dev *pctldev = s->private; | |
1204 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1205 | unsigned i, pin; |
2744e8af LW |
1206 | |
1207 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1208 | |
42fed7ba | 1209 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1210 | |
706e8520 CP |
1211 | /* The pin number can be retrived from the pin controller descriptor */ |
1212 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1213 | struct pin_desc *desc; |
1214 | ||
706e8520 | 1215 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1216 | desc = pin_desc_get(pctldev, pin); |
1217 | /* Pin space may be sparse */ | |
1218 | if (desc == NULL) | |
1219 | continue; | |
1220 | ||
1221 | seq_printf(s, "pin %d (%s) ", pin, | |
1222 | desc->name ? desc->name : "unnamed"); | |
1223 | ||
1224 | /* Driver-specific info per pin */ | |
1225 | if (ops->pin_dbg_show) | |
1226 | ops->pin_dbg_show(pctldev, s, pin); | |
1227 | ||
1228 | seq_puts(s, "\n"); | |
1229 | } | |
1230 | ||
42fed7ba | 1231 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1232 | |
2744e8af LW |
1233 | return 0; |
1234 | } | |
1235 | ||
1236 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1237 | { | |
1238 | struct pinctrl_dev *pctldev = s->private; | |
1239 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1240 | unsigned ngroups, selector = 0; |
2744e8af | 1241 | |
42fed7ba PC |
1242 | mutex_lock(&pctldev->mutex); |
1243 | ||
d1e90e9e | 1244 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1245 | |
2744e8af | 1246 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1247 | while (selector < ngroups) { |
a5818a8b | 1248 | const unsigned *pins; |
2744e8af LW |
1249 | unsigned num_pins; |
1250 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1251 | const char *pname; |
2744e8af LW |
1252 | int ret; |
1253 | int i; | |
1254 | ||
1255 | ret = ops->get_group_pins(pctldev, selector, | |
1256 | &pins, &num_pins); | |
1257 | if (ret) | |
1258 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1259 | gname); | |
1260 | else { | |
dcb5dbc3 DA |
1261 | seq_printf(s, "group: %s\n", gname); |
1262 | for (i = 0; i < num_pins; i++) { | |
1263 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1264 | if (WARN_ON(!pname)) { |
42fed7ba | 1265 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1266 | return -EINVAL; |
b4dd784b | 1267 | } |
dcb5dbc3 DA |
1268 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1269 | } | |
1270 | seq_puts(s, "\n"); | |
2744e8af LW |
1271 | } |
1272 | selector++; | |
1273 | } | |
1274 | ||
42fed7ba | 1275 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1276 | |
1277 | return 0; | |
1278 | } | |
1279 | ||
1280 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1281 | { | |
1282 | struct pinctrl_dev *pctldev = s->private; | |
1283 | struct pinctrl_gpio_range *range = NULL; | |
1284 | ||
1285 | seq_puts(s, "GPIO ranges handled:\n"); | |
1286 | ||
42fed7ba | 1287 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1288 | |
2744e8af | 1289 | /* Loop over the ranges */ |
2744e8af | 1290 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1291 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1292 | range->id, range->name, | |
1293 | range->base, (range->base + range->npins - 1), | |
1294 | range->pin_base, | |
1295 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1296 | } |
57b676f9 | 1297 | |
42fed7ba | 1298 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1299 | |
1300 | return 0; | |
1301 | } | |
1302 | ||
1303 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1304 | { | |
1305 | struct pinctrl_dev *pctldev; | |
1306 | ||
ae6b4d85 | 1307 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1308 | |
42fed7ba | 1309 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1310 | |
2744e8af LW |
1311 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1312 | seq_printf(s, "%s ", pctldev->desc->name); | |
1313 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1314 | seq_puts(s, "yes "); |
1315 | else | |
1316 | seq_puts(s, "no "); | |
1317 | if (pctldev->desc->confops) | |
2744e8af LW |
1318 | seq_puts(s, "yes"); |
1319 | else | |
1320 | seq_puts(s, "no"); | |
1321 | seq_puts(s, "\n"); | |
1322 | } | |
57b676f9 | 1323 | |
42fed7ba | 1324 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1325 | |
1326 | return 0; | |
1327 | } | |
1328 | ||
1e2082b5 SW |
1329 | static inline const char *map_type(enum pinctrl_map_type type) |
1330 | { | |
1331 | static const char * const names[] = { | |
1332 | "INVALID", | |
1333 | "DUMMY_STATE", | |
1334 | "MUX_GROUP", | |
1335 | "CONFIGS_PIN", | |
1336 | "CONFIGS_GROUP", | |
1337 | }; | |
1338 | ||
1339 | if (type >= ARRAY_SIZE(names)) | |
1340 | return "UNKNOWN"; | |
1341 | ||
1342 | return names[type]; | |
1343 | } | |
1344 | ||
3eedb437 SW |
1345 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1346 | { | |
1347 | struct pinctrl_maps *maps_node; | |
1348 | int i; | |
1349 | struct pinctrl_map const *map; | |
1350 | ||
1351 | seq_puts(s, "Pinctrl maps:\n"); | |
1352 | ||
42fed7ba | 1353 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1354 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1355 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1356 | map->dev_name, map->name, map_type(map->type), | |
1357 | map->type); | |
1358 | ||
1359 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1360 | seq_printf(s, "controlling device %s\n", | |
1361 | map->ctrl_dev_name); | |
1362 | ||
1363 | switch (map->type) { | |
1364 | case PIN_MAP_TYPE_MUX_GROUP: | |
1365 | pinmux_show_map(s, map); | |
1366 | break; | |
1367 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1368 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1369 | pinconf_show_map(s, map); | |
1370 | break; | |
1371 | default: | |
1372 | break; | |
1373 | } | |
1374 | ||
1375 | seq_printf(s, "\n"); | |
3eedb437 | 1376 | } |
42fed7ba | 1377 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1378 | |
1379 | return 0; | |
1380 | } | |
1381 | ||
befe5bdf LW |
1382 | static int pinctrl_show(struct seq_file *s, void *what) |
1383 | { | |
1384 | struct pinctrl *p; | |
6e5e959d | 1385 | struct pinctrl_state *state; |
7ecdb16f | 1386 | struct pinctrl_setting *setting; |
befe5bdf LW |
1387 | |
1388 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1389 | |
42fed7ba | 1390 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1391 | |
befe5bdf | 1392 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1393 | seq_printf(s, "device: %s current state: %s\n", |
1394 | dev_name(p->dev), | |
1395 | p->state ? p->state->name : "none"); | |
1396 | ||
1397 | list_for_each_entry(state, &p->states, node) { | |
1398 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1399 | |
6e5e959d | 1400 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1401 | struct pinctrl_dev *pctldev = setting->pctldev; |
1402 | ||
1403 | seq_printf(s, " type: %s controller %s ", | |
1404 | map_type(setting->type), | |
1405 | pinctrl_dev_get_name(pctldev)); | |
1406 | ||
1407 | switch (setting->type) { | |
1408 | case PIN_MAP_TYPE_MUX_GROUP: | |
1409 | pinmux_show_setting(s, setting); | |
1410 | break; | |
1411 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1412 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1413 | pinconf_show_setting(s, setting); | |
1414 | break; | |
1415 | default: | |
1416 | break; | |
1417 | } | |
6e5e959d | 1418 | } |
befe5bdf | 1419 | } |
befe5bdf LW |
1420 | } |
1421 | ||
42fed7ba | 1422 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1423 | |
befe5bdf LW |
1424 | return 0; |
1425 | } | |
1426 | ||
2744e8af LW |
1427 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1428 | { | |
1429 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1430 | } | |
1431 | ||
1432 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1433 | { | |
1434 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1435 | } | |
1436 | ||
1437 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1438 | { | |
1439 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1440 | } | |
1441 | ||
1442 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1443 | { | |
1444 | return single_open(file, pinctrl_devices_show, NULL); | |
1445 | } | |
1446 | ||
3eedb437 SW |
1447 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1448 | { | |
1449 | return single_open(file, pinctrl_maps_show, NULL); | |
1450 | } | |
1451 | ||
befe5bdf LW |
1452 | static int pinctrl_open(struct inode *inode, struct file *file) |
1453 | { | |
1454 | return single_open(file, pinctrl_show, NULL); | |
1455 | } | |
1456 | ||
2744e8af LW |
1457 | static const struct file_operations pinctrl_pins_ops = { |
1458 | .open = pinctrl_pins_open, | |
1459 | .read = seq_read, | |
1460 | .llseek = seq_lseek, | |
1461 | .release = single_release, | |
1462 | }; | |
1463 | ||
1464 | static const struct file_operations pinctrl_groups_ops = { | |
1465 | .open = pinctrl_groups_open, | |
1466 | .read = seq_read, | |
1467 | .llseek = seq_lseek, | |
1468 | .release = single_release, | |
1469 | }; | |
1470 | ||
1471 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1472 | .open = pinctrl_gpioranges_open, | |
1473 | .read = seq_read, | |
1474 | .llseek = seq_lseek, | |
1475 | .release = single_release, | |
1476 | }; | |
1477 | ||
3eedb437 SW |
1478 | static const struct file_operations pinctrl_devices_ops = { |
1479 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1480 | .read = seq_read, |
1481 | .llseek = seq_lseek, | |
1482 | .release = single_release, | |
1483 | }; | |
1484 | ||
3eedb437 SW |
1485 | static const struct file_operations pinctrl_maps_ops = { |
1486 | .open = pinctrl_maps_open, | |
2744e8af LW |
1487 | .read = seq_read, |
1488 | .llseek = seq_lseek, | |
1489 | .release = single_release, | |
1490 | }; | |
1491 | ||
befe5bdf LW |
1492 | static const struct file_operations pinctrl_ops = { |
1493 | .open = pinctrl_open, | |
1494 | .read = seq_read, | |
1495 | .llseek = seq_lseek, | |
1496 | .release = single_release, | |
1497 | }; | |
1498 | ||
2744e8af LW |
1499 | static struct dentry *debugfs_root; |
1500 | ||
1501 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1502 | { | |
02157160 | 1503 | struct dentry *device_root; |
2744e8af | 1504 | |
51cd24ee | 1505 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1506 | debugfs_root); |
02157160 TL |
1507 | pctldev->device_root = device_root; |
1508 | ||
2744e8af LW |
1509 | if (IS_ERR(device_root) || !device_root) { |
1510 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1511 | dev_name(pctldev->dev)); |
2744e8af LW |
1512 | return; |
1513 | } | |
1514 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1515 | device_root, pctldev, &pinctrl_pins_ops); | |
1516 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1517 | device_root, pctldev, &pinctrl_groups_ops); | |
1518 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1519 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1520 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1521 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1522 | } |
1523 | ||
02157160 TL |
1524 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1525 | { | |
1526 | debugfs_remove_recursive(pctldev->device_root); | |
1527 | } | |
1528 | ||
2744e8af LW |
1529 | static void pinctrl_init_debugfs(void) |
1530 | { | |
1531 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1532 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1533 | pr_warn("failed to create debugfs directory\n"); | |
1534 | debugfs_root = NULL; | |
1535 | return; | |
1536 | } | |
1537 | ||
1538 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1539 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1540 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1541 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1542 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1543 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1544 | } |
1545 | ||
1546 | #else /* CONFIG_DEBUG_FS */ | |
1547 | ||
1548 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1549 | { | |
1550 | } | |
1551 | ||
1552 | static void pinctrl_init_debugfs(void) | |
1553 | { | |
1554 | } | |
1555 | ||
02157160 TL |
1556 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1557 | { | |
1558 | } | |
1559 | ||
2744e8af LW |
1560 | #endif |
1561 | ||
d26bc49f SW |
1562 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1563 | { | |
1564 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1565 | ||
1566 | if (!ops || | |
d1e90e9e | 1567 | !ops->get_groups_count || |
d26bc49f SW |
1568 | !ops->get_group_name || |
1569 | !ops->get_group_pins) | |
1570 | return -EINVAL; | |
1571 | ||
57291ce2 SW |
1572 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1573 | return -EINVAL; | |
1574 | ||
d26bc49f SW |
1575 | return 0; |
1576 | } | |
1577 | ||
2744e8af LW |
1578 | /** |
1579 | * pinctrl_register() - register a pin controller device | |
1580 | * @pctldesc: descriptor for this pin controller | |
1581 | * @dev: parent device for this pin controller | |
1582 | * @driver_data: private pin controller data for this pin controller | |
1583 | */ | |
1584 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1585 | struct device *dev, void *driver_data) | |
1586 | { | |
2744e8af LW |
1587 | struct pinctrl_dev *pctldev; |
1588 | int ret; | |
1589 | ||
da9aecb0 | 1590 | if (!pctldesc) |
2744e8af | 1591 | return NULL; |
da9aecb0 | 1592 | if (!pctldesc->name) |
2744e8af LW |
1593 | return NULL; |
1594 | ||
02f5b989 | 1595 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1596 | if (pctldev == NULL) { |
1597 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1598 | return NULL; |
95dcd4ae | 1599 | } |
b9130b77 TL |
1600 | |
1601 | /* Initialize pin control device struct */ | |
1602 | pctldev->owner = pctldesc->owner; | |
1603 | pctldev->desc = pctldesc; | |
1604 | pctldev->driver_data = driver_data; | |
1605 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1606 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1607 | pctldev->dev = dev; |
42fed7ba | 1608 | mutex_init(&pctldev->mutex); |
b9130b77 | 1609 | |
d26bc49f | 1610 | /* check core ops for sanity */ |
da9aecb0 | 1611 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1612 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1613 | goto out_err; |
1614 | } | |
1615 | ||
2744e8af LW |
1616 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1617 | if (pctldesc->pmxops) { | |
da9aecb0 | 1618 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1619 | goto out_err; |
2744e8af LW |
1620 | } |
1621 | ||
ae6b4d85 LW |
1622 | /* If we're implementing pinconfig, check the ops for sanity */ |
1623 | if (pctldesc->confops) { | |
da9aecb0 | 1624 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1625 | goto out_err; |
ae6b4d85 LW |
1626 | } |
1627 | ||
2744e8af | 1628 | /* Register all the pins */ |
ad6e1107 | 1629 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1630 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1631 | if (ret) { | |
ad6e1107 | 1632 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1633 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1634 | pctldesc->npins); | |
51cd24ee | 1635 | goto out_err; |
2744e8af LW |
1636 | } |
1637 | ||
42fed7ba | 1638 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1639 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1640 | mutex_unlock(&pinctrldev_list_mutex); |
1641 | ||
1642 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1643 | |
6e5e959d | 1644 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1645 | pctldev->hog_default = |
42fed7ba | 1646 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1647 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1648 | dev_dbg(dev, "failed to lookup the default state\n"); |
1649 | } else { | |
42fed7ba | 1650 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1651 | pctldev->hog_default)) |
ad6e1107 JC |
1652 | dev_err(dev, |
1653 | "failed to select default state\n"); | |
ad6e1107 | 1654 | } |
840a47ba JD |
1655 | |
1656 | pctldev->hog_sleep = | |
42fed7ba | 1657 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1658 | PINCTRL_STATE_SLEEP); |
1659 | if (IS_ERR(pctldev->hog_sleep)) | |
1660 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1661 | } |
57b676f9 | 1662 | |
2304b473 SW |
1663 | pinctrl_init_device_debugfs(pctldev); |
1664 | ||
2744e8af LW |
1665 | return pctldev; |
1666 | ||
51cd24ee | 1667 | out_err: |
42fed7ba | 1668 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1669 | kfree(pctldev); |
2744e8af LW |
1670 | return NULL; |
1671 | } | |
1672 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1673 | ||
1674 | /** | |
1675 | * pinctrl_unregister() - unregister pinmux | |
1676 | * @pctldev: pin controller to unregister | |
1677 | * | |
1678 | * Called by pinmux drivers to unregister a pinmux. | |
1679 | */ | |
1680 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1681 | { | |
5d589b09 | 1682 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1683 | if (pctldev == NULL) |
1684 | return; | |
1685 | ||
42fed7ba PC |
1686 | mutex_lock(&pinctrldev_list_mutex); |
1687 | mutex_lock(&pctldev->mutex); | |
57b676f9 | 1688 | |
42fed7ba | 1689 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 | 1690 | |
6e5e959d | 1691 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1692 | pinctrl_put(pctldev->p); |
57b676f9 | 1693 | |
2744e8af | 1694 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1695 | list_del(&pctldev->node); |
2744e8af LW |
1696 | /* Destroy descriptor tree */ |
1697 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1698 | pctldev->desc->npins); | |
5d589b09 DA |
1699 | /* remove gpio ranges map */ |
1700 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1701 | list_del(&range->node); | |
1702 | ||
42fed7ba PC |
1703 | mutex_unlock(&pctldev->mutex); |
1704 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1705 | kfree(pctldev); |
42fed7ba | 1706 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1707 | } |
1708 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1709 | ||
1710 | static int __init pinctrl_init(void) | |
1711 | { | |
1712 | pr_info("initialized pinctrl subsystem\n"); | |
1713 | pinctrl_init_debugfs(); | |
1714 | return 0; | |
1715 | } | |
1716 | ||
1717 | /* init early since many drivers really need to initialized pinmux early */ | |
1718 | core_initcall(pinctrl_init); |