Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
6d4ca1fb | 26 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
27 | #include <linux/pinctrl/pinctrl.h> |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include "core.h" | |
57291ce2 | 30 | #include "devicetree.h" |
2744e8af | 31 | #include "pinmux.h" |
ae6b4d85 | 32 | #include "pinconf.h" |
2744e8af | 33 | |
b2b3e66e SW |
34 | /** |
35 | * struct pinctrl_maps - a list item containing part of the mapping table | |
36 | * @node: mapping table list node | |
37 | * @maps: array of mapping table entries | |
38 | * @num_maps: the number of entries in @maps | |
39 | */ | |
40 | struct pinctrl_maps { | |
41 | struct list_head node; | |
42 | struct pinctrl_map const *maps; | |
43 | unsigned num_maps; | |
44 | }; | |
45 | ||
5b3aa5f7 DA |
46 | static bool pinctrl_dummy_state; |
47 | ||
57b676f9 SW |
48 | /* Mutex taken by all entry points */ |
49 | DEFINE_MUTEX(pinctrl_mutex); | |
50 | ||
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 52 | LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
58 | static LIST_HEAD(pinctrl_maps); |
59 | ||
60 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
61 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
62 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
63 | _i_ < _maps_node_->num_maps; \ | |
bc66468c | 64 | _i_++, _map_ = &_maps_node_->maps[_i_]) |
befe5bdf | 65 | |
5b3aa5f7 DA |
66 | /** |
67 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
68 | * | |
69 | * Usually this function is called by platforms without pinctrl driver support | |
70 | * but run with some shared drivers using pinctrl APIs. | |
71 | * After calling this function, the pinctrl core will return successfully | |
72 | * with creating a dummy state for the driver to keep going smoothly. | |
73 | */ | |
74 | void pinctrl_provide_dummies(void) | |
75 | { | |
76 | pinctrl_dummy_state = true; | |
77 | } | |
78 | ||
2744e8af LW |
79 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
80 | { | |
81 | /* We're not allowed to register devices without name */ | |
82 | return pctldev->desc->name; | |
83 | } | |
84 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
85 | ||
86 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
87 | { | |
88 | return pctldev->driver_data; | |
89 | } | |
90 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
91 | ||
92 | /** | |
9dfac4fd LW |
93 | * get_pinctrl_dev_from_devname() - look up pin controller device |
94 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
95 | * |
96 | * Looks up a pin control device matching a certain device name or pure device | |
97 | * pointer, the pure device pointer will take precedence. | |
98 | */ | |
9dfac4fd | 99 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
100 | { |
101 | struct pinctrl_dev *pctldev = NULL; | |
102 | bool found = false; | |
103 | ||
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
2744e8af | 107 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 108 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
109 | /* Matched on device name */ |
110 | found = true; | |
111 | break; | |
112 | } | |
113 | } | |
2744e8af LW |
114 | |
115 | return found ? pctldev : NULL; | |
116 | } | |
117 | ||
ae6b4d85 LW |
118 | /** |
119 | * pin_get_from_name() - look up a pin number from a name | |
120 | * @pctldev: the pin control device to lookup the pin on | |
121 | * @name: the name of the pin to look up | |
122 | */ | |
123 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
124 | { | |
706e8520 | 125 | unsigned i, pin; |
ae6b4d85 | 126 | |
706e8520 CP |
127 | /* The pin number can be retrived from the pin controller descriptor */ |
128 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
129 | struct pin_desc *desc; |
130 | ||
706e8520 | 131 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
132 | desc = pin_desc_get(pctldev, pin); |
133 | /* Pin space may be sparse */ | |
134 | if (desc == NULL) | |
135 | continue; | |
136 | if (desc->name && !strcmp(name, desc->name)) | |
137 | return pin; | |
138 | } | |
139 | ||
140 | return -EINVAL; | |
141 | } | |
142 | ||
dcb5dbc3 DA |
143 | /** |
144 | * pin_get_name_from_id() - look up a pin name from a pin id | |
145 | * @pctldev: the pin control device to lookup the pin on | |
146 | * @name: the name of the pin to look up | |
147 | */ | |
148 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
149 | { | |
150 | const struct pin_desc *desc; | |
151 | ||
152 | desc = pin_desc_get(pctldev, pin); | |
153 | if (desc == NULL) { | |
154 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
155 | pin); | |
156 | return NULL; | |
157 | } | |
158 | ||
159 | return desc->name; | |
160 | } | |
161 | ||
2744e8af LW |
162 | /** |
163 | * pin_is_valid() - check if pin exists on controller | |
164 | * @pctldev: the pin control device to check the pin on | |
165 | * @pin: pin to check, use the local pin controller index number | |
166 | * | |
167 | * This tells us whether a certain pin exist on a certain pin controller or | |
168 | * not. Pin lists may be sparse, so some pins may not exist. | |
169 | */ | |
170 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
171 | { | |
172 | struct pin_desc *pindesc; | |
173 | ||
174 | if (pin < 0) | |
175 | return false; | |
176 | ||
57b676f9 | 177 | mutex_lock(&pinctrl_mutex); |
2744e8af | 178 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 179 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 180 | |
57b676f9 | 181 | return pindesc != NULL; |
2744e8af LW |
182 | } |
183 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
184 | ||
185 | /* Deletes a range of pin descriptors */ | |
186 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
187 | const struct pinctrl_pin_desc *pins, | |
188 | unsigned num_pins) | |
189 | { | |
190 | int i; | |
191 | ||
2744e8af LW |
192 | for (i = 0; i < num_pins; i++) { |
193 | struct pin_desc *pindesc; | |
194 | ||
195 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
196 | pins[i].number); | |
197 | if (pindesc != NULL) { | |
198 | radix_tree_delete(&pctldev->pin_desc_tree, | |
199 | pins[i].number); | |
ca53c5f1 LW |
200 | if (pindesc->dynamic_name) |
201 | kfree(pindesc->name); | |
2744e8af LW |
202 | } |
203 | kfree(pindesc); | |
204 | } | |
2744e8af LW |
205 | } |
206 | ||
207 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
208 | unsigned number, const char *name) | |
209 | { | |
210 | struct pin_desc *pindesc; | |
211 | ||
212 | pindesc = pin_desc_get(pctldev, number); | |
213 | if (pindesc != NULL) { | |
214 | pr_err("pin %d already registered on %s\n", number, | |
215 | pctldev->desc->name); | |
216 | return -EINVAL; | |
217 | } | |
218 | ||
219 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
220 | if (pindesc == NULL) { |
221 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 222 | return -ENOMEM; |
95dcd4ae | 223 | } |
ae6b4d85 | 224 | |
2744e8af LW |
225 | /* Set owner */ |
226 | pindesc->pctldev = pctldev; | |
227 | ||
9af1e44f | 228 | /* Copy basic pin info */ |
8dc6ae4d | 229 | if (name) { |
ca53c5f1 LW |
230 | pindesc->name = name; |
231 | } else { | |
232 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
233 | if (pindesc->name == NULL) { |
234 | kfree(pindesc); | |
ca53c5f1 | 235 | return -ENOMEM; |
eb26cc9c | 236 | } |
ca53c5f1 LW |
237 | pindesc->dynamic_name = true; |
238 | } | |
2744e8af | 239 | |
2744e8af | 240 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 241 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 242 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
243 | return 0; |
244 | } | |
245 | ||
246 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
247 | struct pinctrl_pin_desc const *pins, | |
248 | unsigned num_descs) | |
249 | { | |
250 | unsigned i; | |
251 | int ret = 0; | |
252 | ||
253 | for (i = 0; i < num_descs; i++) { | |
254 | ret = pinctrl_register_one_pin(pctldev, | |
255 | pins[i].number, pins[i].name); | |
256 | if (ret) | |
257 | return ret; | |
258 | } | |
259 | ||
260 | return 0; | |
261 | } | |
262 | ||
263 | /** | |
264 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
265 | * @pctldev: pin controller device to check | |
266 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
267 | * | |
268 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
269 | * controller, return the range or NULL | |
270 | */ | |
271 | static struct pinctrl_gpio_range * | |
272 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
273 | { | |
274 | struct pinctrl_gpio_range *range = NULL; | |
275 | ||
276 | /* Loop over the ranges */ | |
2744e8af LW |
277 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
278 | /* Check if we're in the valid range */ | |
279 | if (gpio >= range->base && | |
280 | gpio < range->base + range->npins) { | |
2744e8af LW |
281 | return range; |
282 | } | |
283 | } | |
2744e8af LW |
284 | |
285 | return NULL; | |
286 | } | |
287 | ||
288 | /** | |
289 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
290 | * @gpio: the pin to locate the pin controller for | |
291 | * @outdev: the pin control device if found | |
292 | * @outrange: the GPIO range if found | |
293 | * | |
294 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
295 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
296 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
297 | * may still have not been registered. | |
2744e8af | 298 | */ |
4ecce45d SW |
299 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
300 | struct pinctrl_dev **outdev, | |
301 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
302 | { |
303 | struct pinctrl_dev *pctldev = NULL; | |
304 | ||
305 | /* Loop over the pin controllers */ | |
2744e8af LW |
306 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
307 | struct pinctrl_gpio_range *range; | |
308 | ||
309 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
310 | if (range != NULL) { | |
311 | *outdev = pctldev; | |
312 | *outrange = range; | |
2744e8af LW |
313 | return 0; |
314 | } | |
315 | } | |
2744e8af | 316 | |
4650b7cb | 317 | return -EPROBE_DEFER; |
2744e8af LW |
318 | } |
319 | ||
320 | /** | |
321 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
322 | * @pctldev: pin controller device to add the range to | |
323 | * @range: the GPIO range to add | |
324 | * | |
325 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
326 | * this to register handled ranges after registering your pin controller. | |
327 | */ | |
328 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
329 | struct pinctrl_gpio_range *range) | |
330 | { | |
57b676f9 | 331 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 332 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 333 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 334 | } |
4ecce45d | 335 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 336 | |
3e5e00b6 DA |
337 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
338 | struct pinctrl_gpio_range *ranges, | |
339 | unsigned nranges) | |
340 | { | |
341 | int i; | |
342 | ||
343 | for (i = 0; i < nranges; i++) | |
344 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
345 | } | |
346 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
347 | ||
7afde8ba LW |
348 | /** |
349 | * pinctrl_get_group_selector() - returns the group selector for a group | |
350 | * @pctldev: the pin controller handling the group | |
351 | * @pin_group: the pin group to look up | |
352 | */ | |
353 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
354 | const char *pin_group) | |
355 | { | |
356 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 357 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
358 | unsigned group_selector = 0; |
359 | ||
d1e90e9e | 360 | while (group_selector < ngroups) { |
7afde8ba LW |
361 | const char *gname = pctlops->get_group_name(pctldev, |
362 | group_selector); | |
363 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 364 | dev_dbg(pctldev->dev, |
7afde8ba LW |
365 | "found group selector %u for %s\n", |
366 | group_selector, | |
367 | pin_group); | |
368 | return group_selector; | |
369 | } | |
370 | ||
371 | group_selector++; | |
372 | } | |
373 | ||
51cd24ee | 374 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
375 | pin_group); |
376 | ||
377 | return -EINVAL; | |
378 | } | |
379 | ||
befe5bdf LW |
380 | /** |
381 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
382 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
383 | * | |
384 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
385 | * as part of their gpio_request() semantics, platforms and individual drivers | |
386 | * shall *NOT* request GPIO pins to be muxed in. | |
387 | */ | |
388 | int pinctrl_request_gpio(unsigned gpio) | |
389 | { | |
390 | struct pinctrl_dev *pctldev; | |
391 | struct pinctrl_gpio_range *range; | |
392 | int ret; | |
393 | int pin; | |
394 | ||
57b676f9 SW |
395 | mutex_lock(&pinctrl_mutex); |
396 | ||
befe5bdf | 397 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
398 | if (ret) { |
399 | mutex_unlock(&pinctrl_mutex); | |
4650b7cb | 400 | return ret; |
57b676f9 | 401 | } |
befe5bdf LW |
402 | |
403 | /* Convert to the pin controllers number space */ | |
404 | pin = gpio - range->base + range->pin_base; | |
405 | ||
57b676f9 SW |
406 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
407 | ||
408 | mutex_unlock(&pinctrl_mutex); | |
409 | return ret; | |
befe5bdf LW |
410 | } |
411 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
412 | ||
413 | /** | |
414 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
415 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
416 | * | |
417 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
418 | * as part of their gpio_free() semantics, platforms and individual drivers | |
419 | * shall *NOT* request GPIO pins to be muxed out. | |
420 | */ | |
421 | void pinctrl_free_gpio(unsigned gpio) | |
422 | { | |
423 | struct pinctrl_dev *pctldev; | |
424 | struct pinctrl_gpio_range *range; | |
425 | int ret; | |
426 | int pin; | |
427 | ||
57b676f9 SW |
428 | mutex_lock(&pinctrl_mutex); |
429 | ||
befe5bdf | 430 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
431 | if (ret) { |
432 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 433 | return; |
57b676f9 | 434 | } |
befe5bdf LW |
435 | |
436 | /* Convert to the pin controllers number space */ | |
437 | pin = gpio - range->base + range->pin_base; | |
438 | ||
57b676f9 SW |
439 | pinmux_free_gpio(pctldev, pin, range); |
440 | ||
441 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
442 | } |
443 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
444 | ||
445 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
446 | { | |
447 | struct pinctrl_dev *pctldev; | |
448 | struct pinctrl_gpio_range *range; | |
449 | int ret; | |
450 | int pin; | |
451 | ||
452 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
453 | if (ret) | |
454 | return ret; | |
455 | ||
456 | /* Convert to the pin controllers number space */ | |
457 | pin = gpio - range->base + range->pin_base; | |
458 | ||
459 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
460 | } | |
461 | ||
462 | /** | |
463 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
464 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
465 | * | |
466 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
467 | * as part of their gpio_direction_input() semantics, platforms and individual | |
468 | * drivers shall *NOT* touch pin control GPIO calls. | |
469 | */ | |
470 | int pinctrl_gpio_direction_input(unsigned gpio) | |
471 | { | |
57b676f9 SW |
472 | int ret; |
473 | mutex_lock(&pinctrl_mutex); | |
474 | ret = pinctrl_gpio_direction(gpio, true); | |
475 | mutex_unlock(&pinctrl_mutex); | |
476 | return ret; | |
befe5bdf LW |
477 | } |
478 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
479 | ||
480 | /** | |
481 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
482 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
483 | * | |
484 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
485 | * as part of their gpio_direction_output() semantics, platforms and individual | |
486 | * drivers shall *NOT* touch pin control GPIO calls. | |
487 | */ | |
488 | int pinctrl_gpio_direction_output(unsigned gpio) | |
489 | { | |
57b676f9 SW |
490 | int ret; |
491 | mutex_lock(&pinctrl_mutex); | |
492 | ret = pinctrl_gpio_direction(gpio, false); | |
493 | mutex_unlock(&pinctrl_mutex); | |
494 | return ret; | |
befe5bdf LW |
495 | } |
496 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
497 | ||
6e5e959d SW |
498 | static struct pinctrl_state *find_state(struct pinctrl *p, |
499 | const char *name) | |
befe5bdf | 500 | { |
6e5e959d SW |
501 | struct pinctrl_state *state; |
502 | ||
503 | list_for_each_entry(state, &p->states, node) | |
504 | if (!strcmp(state->name, name)) | |
505 | return state; | |
506 | ||
507 | return NULL; | |
508 | } | |
509 | ||
510 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
511 | const char *name) | |
512 | { | |
513 | struct pinctrl_state *state; | |
514 | ||
515 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
516 | if (state == NULL) { | |
517 | dev_err(p->dev, | |
518 | "failed to alloc struct pinctrl_state\n"); | |
519 | return ERR_PTR(-ENOMEM); | |
520 | } | |
521 | ||
522 | state->name = name; | |
523 | INIT_LIST_HEAD(&state->settings); | |
524 | ||
525 | list_add_tail(&state->node, &p->states); | |
526 | ||
527 | return state; | |
528 | } | |
529 | ||
530 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
531 | { | |
532 | struct pinctrl_state *state; | |
7ecdb16f | 533 | struct pinctrl_setting *setting; |
6e5e959d | 534 | int ret; |
befe5bdf | 535 | |
6e5e959d SW |
536 | state = find_state(p, map->name); |
537 | if (!state) | |
538 | state = create_state(p, map->name); | |
539 | if (IS_ERR(state)) | |
540 | return PTR_ERR(state); | |
befe5bdf | 541 | |
1e2082b5 SW |
542 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
543 | return 0; | |
544 | ||
6e5e959d SW |
545 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
546 | if (setting == NULL) { | |
547 | dev_err(p->dev, | |
548 | "failed to alloc struct pinctrl_setting\n"); | |
549 | return -ENOMEM; | |
550 | } | |
befe5bdf | 551 | |
1e2082b5 SW |
552 | setting->type = map->type; |
553 | ||
6e5e959d SW |
554 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
555 | if (setting->pctldev == NULL) { | |
c05127c4 | 556 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
6e5e959d SW |
557 | map->ctrl_dev_name); |
558 | kfree(setting); | |
c05127c4 LW |
559 | /* |
560 | * OK let us guess that the driver is not there yet, and | |
561 | * let's defer obtaining this pinctrl handle to later... | |
562 | */ | |
563 | return -EPROBE_DEFER; | |
6e5e959d SW |
564 | } |
565 | ||
1e2082b5 SW |
566 | switch (map->type) { |
567 | case PIN_MAP_TYPE_MUX_GROUP: | |
568 | ret = pinmux_map_to_setting(map, setting); | |
569 | break; | |
570 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
571 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
572 | ret = pinconf_map_to_setting(map, setting); | |
573 | break; | |
574 | default: | |
575 | ret = -EINVAL; | |
576 | break; | |
577 | } | |
6e5e959d SW |
578 | if (ret < 0) { |
579 | kfree(setting); | |
580 | return ret; | |
581 | } | |
582 | ||
583 | list_add_tail(&setting->node, &state->settings); | |
584 | ||
585 | return 0; | |
586 | } | |
587 | ||
588 | static struct pinctrl *find_pinctrl(struct device *dev) | |
589 | { | |
590 | struct pinctrl *p; | |
591 | ||
1e2082b5 | 592 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
593 | if (p->dev == dev) |
594 | return p; | |
595 | ||
596 | return NULL; | |
597 | } | |
598 | ||
599 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
600 | ||
601 | static struct pinctrl *create_pinctrl(struct device *dev) | |
602 | { | |
603 | struct pinctrl *p; | |
604 | const char *devname; | |
605 | struct pinctrl_maps *maps_node; | |
606 | int i; | |
607 | struct pinctrl_map const *map; | |
608 | int ret; | |
befe5bdf LW |
609 | |
610 | /* | |
611 | * create the state cookie holder struct pinctrl for each | |
612 | * mapping, this is what consumers will get when requesting | |
613 | * a pin control handle with pinctrl_get() | |
614 | */ | |
02f5b989 | 615 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
616 | if (p == NULL) { |
617 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 618 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 619 | } |
7ecdb16f | 620 | p->dev = dev; |
6e5e959d | 621 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
622 | INIT_LIST_HEAD(&p->dt_maps); |
623 | ||
624 | ret = pinctrl_dt_to_map(p); | |
625 | if (ret < 0) { | |
626 | kfree(p); | |
627 | return ERR_PTR(ret); | |
628 | } | |
6e5e959d SW |
629 | |
630 | devname = dev_name(dev); | |
befe5bdf LW |
631 | |
632 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 633 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
634 | /* Map must be for this device */ |
635 | if (strcmp(map->dev_name, devname)) | |
636 | continue; | |
637 | ||
6e5e959d SW |
638 | ret = add_setting(p, map); |
639 | if (ret < 0) { | |
640 | pinctrl_put_locked(p, false); | |
641 | return ERR_PTR(ret); | |
7ecdb16f | 642 | } |
befe5bdf LW |
643 | } |
644 | ||
befe5bdf | 645 | /* Add the pinmux to the global list */ |
8b9c139f | 646 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
647 | |
648 | return p; | |
6e5e959d | 649 | } |
7ecdb16f | 650 | |
6e5e959d SW |
651 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
652 | { | |
653 | struct pinctrl *p; | |
7ecdb16f | 654 | |
6e5e959d SW |
655 | if (WARN_ON(!dev)) |
656 | return ERR_PTR(-EINVAL); | |
657 | ||
658 | p = find_pinctrl(dev); | |
659 | if (p != NULL) | |
660 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 661 | |
d599bfb3 | 662 | return create_pinctrl(dev); |
befe5bdf | 663 | } |
b2b3e66e SW |
664 | |
665 | /** | |
6e5e959d SW |
666 | * pinctrl_get() - retrieves the pinctrl handle for a device |
667 | * @dev: the device to obtain the handle for | |
b2b3e66e | 668 | */ |
6e5e959d | 669 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
670 | { |
671 | struct pinctrl *p; | |
672 | ||
57b676f9 | 673 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 674 | p = pinctrl_get_locked(dev); |
57b676f9 | 675 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
676 | |
677 | return p; | |
678 | } | |
befe5bdf LW |
679 | EXPORT_SYMBOL_GPL(pinctrl_get); |
680 | ||
6e5e959d | 681 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 682 | { |
6e5e959d SW |
683 | struct pinctrl_state *state, *n1; |
684 | struct pinctrl_setting *setting, *n2; | |
685 | ||
686 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
687 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
688 | switch (setting->type) { |
689 | case PIN_MAP_TYPE_MUX_GROUP: | |
690 | if (state == p->state) | |
691 | pinmux_disable_setting(setting); | |
692 | pinmux_free_setting(setting); | |
693 | break; | |
694 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
695 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
696 | pinconf_free_setting(setting); | |
697 | break; | |
698 | default: | |
699 | break; | |
700 | } | |
6e5e959d SW |
701 | list_del(&setting->node); |
702 | kfree(setting); | |
703 | } | |
704 | list_del(&state->node); | |
705 | kfree(state); | |
7ecdb16f | 706 | } |
befe5bdf | 707 | |
57291ce2 SW |
708 | pinctrl_dt_free_maps(p); |
709 | ||
6e5e959d SW |
710 | if (inlist) |
711 | list_del(&p->node); | |
befe5bdf LW |
712 | kfree(p); |
713 | } | |
befe5bdf LW |
714 | |
715 | /** | |
6e5e959d SW |
716 | * pinctrl_put() - release a previously claimed pinctrl handle |
717 | * @p: the pinctrl handle to release | |
befe5bdf | 718 | */ |
57b676f9 SW |
719 | void pinctrl_put(struct pinctrl *p) |
720 | { | |
721 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 722 | pinctrl_put_locked(p, true); |
57b676f9 SW |
723 | mutex_unlock(&pinctrl_mutex); |
724 | } | |
725 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
726 | ||
6e5e959d SW |
727 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
728 | const char *name) | |
befe5bdf | 729 | { |
6e5e959d | 730 | struct pinctrl_state *state; |
befe5bdf | 731 | |
6e5e959d | 732 | state = find_state(p, name); |
5b3aa5f7 DA |
733 | if (!state) { |
734 | if (pinctrl_dummy_state) { | |
735 | /* create dummy state */ | |
736 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
737 | name); | |
738 | state = create_state(p, name); | |
d599bfb3 RG |
739 | } else |
740 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 741 | } |
57b676f9 | 742 | |
6e5e959d | 743 | return state; |
befe5bdf | 744 | } |
befe5bdf LW |
745 | |
746 | /** | |
6e5e959d SW |
747 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
748 | * @p: the pinctrl handle to retrieve the state from | |
749 | * @name: the state name to retrieve | |
befe5bdf | 750 | */ |
6e5e959d | 751 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 752 | { |
6e5e959d SW |
753 | struct pinctrl_state *s; |
754 | ||
57b676f9 | 755 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 756 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 757 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
758 | |
759 | return s; | |
57b676f9 | 760 | } |
6e5e959d | 761 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 762 | |
6e5e959d SW |
763 | static int pinctrl_select_state_locked(struct pinctrl *p, |
764 | struct pinctrl_state *state) | |
befe5bdf | 765 | { |
6e5e959d SW |
766 | struct pinctrl_setting *setting, *setting2; |
767 | int ret; | |
7ecdb16f | 768 | |
6e5e959d SW |
769 | if (p->state == state) |
770 | return 0; | |
befe5bdf | 771 | |
6e5e959d SW |
772 | if (p->state) { |
773 | /* | |
774 | * The set of groups with a mux configuration in the old state | |
775 | * may not be identical to the set of groups with a mux setting | |
776 | * in the new state. While this might be unusual, it's entirely | |
777 | * possible for the "user"-supplied mapping table to be written | |
778 | * that way. For each group that was configured in the old state | |
779 | * but not in the new state, this code puts that group into a | |
780 | * safe/disabled state. | |
781 | */ | |
782 | list_for_each_entry(setting, &p->state->settings, node) { | |
783 | bool found = false; | |
1e2082b5 SW |
784 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
785 | continue; | |
6e5e959d | 786 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
787 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
788 | continue; | |
789 | if (setting2->data.mux.group == | |
790 | setting->data.mux.group) { | |
6e5e959d SW |
791 | found = true; |
792 | break; | |
793 | } | |
794 | } | |
795 | if (!found) | |
796 | pinmux_disable_setting(setting); | |
797 | } | |
798 | } | |
799 | ||
800 | p->state = state; | |
801 | ||
802 | /* Apply all the settings for the new state */ | |
803 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
804 | switch (setting->type) { |
805 | case PIN_MAP_TYPE_MUX_GROUP: | |
806 | ret = pinmux_enable_setting(setting); | |
807 | break; | |
808 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
809 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
810 | ret = pinconf_apply_setting(setting); | |
811 | break; | |
812 | default: | |
813 | ret = -EINVAL; | |
814 | break; | |
815 | } | |
6e5e959d SW |
816 | if (ret < 0) { |
817 | /* FIXME: Difficult to return to prev state */ | |
818 | return ret; | |
819 | } | |
befe5bdf | 820 | } |
6e5e959d SW |
821 | |
822 | return 0; | |
57b676f9 SW |
823 | } |
824 | ||
825 | /** | |
6e5e959d SW |
826 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
827 | * @p: the pinctrl handle for the device that requests configuratio | |
828 | * @state: the state handle to select/activate/program | |
57b676f9 | 829 | */ |
6e5e959d | 830 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 831 | { |
6e5e959d SW |
832 | int ret; |
833 | ||
57b676f9 | 834 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 835 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 836 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
837 | |
838 | return ret; | |
befe5bdf | 839 | } |
6e5e959d | 840 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 841 | |
6d4ca1fb SW |
842 | static void devm_pinctrl_release(struct device *dev, void *res) |
843 | { | |
844 | pinctrl_put(*(struct pinctrl **)res); | |
845 | } | |
846 | ||
847 | /** | |
848 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
849 | * @dev: the device to obtain the handle for | |
850 | * | |
851 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
852 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
853 | */ | |
854 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
855 | { | |
856 | struct pinctrl **ptr, *p; | |
857 | ||
858 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
859 | if (!ptr) | |
860 | return ERR_PTR(-ENOMEM); | |
861 | ||
862 | p = pinctrl_get(dev); | |
863 | if (!IS_ERR(p)) { | |
864 | *ptr = p; | |
865 | devres_add(dev, ptr); | |
866 | } else { | |
867 | devres_free(ptr); | |
868 | } | |
869 | ||
870 | return p; | |
871 | } | |
872 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
873 | ||
874 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
875 | { | |
876 | struct pinctrl **p = res; | |
877 | ||
878 | return *p == data; | |
879 | } | |
880 | ||
881 | /** | |
882 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
883 | * @p: the pinctrl handle to release | |
884 | * | |
885 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
886 | * this function will not need to be called and the resource management | |
887 | * code will ensure that the resource is freed. | |
888 | */ | |
889 | void devm_pinctrl_put(struct pinctrl *p) | |
890 | { | |
891 | WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, | |
892 | devm_pinctrl_match, p)); | |
893 | pinctrl_put(p); | |
894 | } | |
895 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
896 | ||
57291ce2 SW |
897 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
898 | bool dup, bool locked) | |
befe5bdf | 899 | { |
1e2082b5 | 900 | int i, ret; |
b2b3e66e | 901 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
902 | |
903 | pr_debug("add %d pinmux maps\n", num_maps); | |
904 | ||
905 | /* First sanity check the new mapping */ | |
906 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
907 | if (!maps[i].dev_name) { |
908 | pr_err("failed to register map %s (%d): no device given\n", | |
909 | maps[i].name, i); | |
910 | return -EINVAL; | |
911 | } | |
912 | ||
befe5bdf LW |
913 | if (!maps[i].name) { |
914 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 915 | i); |
befe5bdf LW |
916 | return -EINVAL; |
917 | } | |
918 | ||
1e2082b5 SW |
919 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
920 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
921 | pr_err("failed to register map %s (%d): no pin control device given\n", |
922 | maps[i].name, i); | |
923 | return -EINVAL; | |
924 | } | |
925 | ||
1e2082b5 SW |
926 | switch (maps[i].type) { |
927 | case PIN_MAP_TYPE_DUMMY_STATE: | |
928 | break; | |
929 | case PIN_MAP_TYPE_MUX_GROUP: | |
930 | ret = pinmux_validate_map(&maps[i], i); | |
931 | if (ret < 0) | |
fde04f41 | 932 | return ret; |
1e2082b5 SW |
933 | break; |
934 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
935 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
936 | ret = pinconf_validate_map(&maps[i], i); | |
937 | if (ret < 0) | |
fde04f41 | 938 | return ret; |
1e2082b5 SW |
939 | break; |
940 | default: | |
941 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 942 | maps[i].name, i); |
1681f5ae SW |
943 | return -EINVAL; |
944 | } | |
befe5bdf LW |
945 | } |
946 | ||
b2b3e66e SW |
947 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
948 | if (!maps_node) { | |
949 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
950 | return -ENOMEM; | |
951 | } | |
befe5bdf | 952 | |
b2b3e66e | 953 | maps_node->num_maps = num_maps; |
57291ce2 SW |
954 | if (dup) { |
955 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
956 | GFP_KERNEL); | |
957 | if (!maps_node->maps) { | |
958 | pr_err("failed to duplicate mapping table\n"); | |
959 | kfree(maps_node); | |
960 | return -ENOMEM; | |
961 | } | |
962 | } else { | |
963 | maps_node->maps = maps; | |
befe5bdf LW |
964 | } |
965 | ||
57291ce2 SW |
966 | if (!locked) |
967 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 968 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
969 | if (!locked) |
970 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 971 | |
befe5bdf LW |
972 | return 0; |
973 | } | |
974 | ||
57291ce2 SW |
975 | /** |
976 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
977 | * @maps: the pincontrol mappings table to register. This should probably be | |
978 | * marked with __initdata so it can be discarded after boot. This | |
979 | * function will perform a shallow copy for the mapping entries. | |
980 | * @num_maps: the number of maps in the mapping table | |
981 | */ | |
982 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
983 | unsigned num_maps) | |
984 | { | |
985 | return pinctrl_register_map(maps, num_maps, true, false); | |
986 | } | |
987 | ||
988 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
989 | { | |
990 | struct pinctrl_maps *maps_node; | |
991 | ||
992 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
993 | if (maps_node->maps == map) { | |
994 | list_del(&maps_node->node); | |
995 | return; | |
996 | } | |
997 | } | |
998 | } | |
999 | ||
2744e8af LW |
1000 | #ifdef CONFIG_DEBUG_FS |
1001 | ||
1002 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1003 | { | |
1004 | struct pinctrl_dev *pctldev = s->private; | |
1005 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1006 | unsigned i, pin; |
2744e8af LW |
1007 | |
1008 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1009 | |
57b676f9 SW |
1010 | mutex_lock(&pinctrl_mutex); |
1011 | ||
706e8520 CP |
1012 | /* The pin number can be retrived from the pin controller descriptor */ |
1013 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1014 | struct pin_desc *desc; |
1015 | ||
706e8520 | 1016 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1017 | desc = pin_desc_get(pctldev, pin); |
1018 | /* Pin space may be sparse */ | |
1019 | if (desc == NULL) | |
1020 | continue; | |
1021 | ||
1022 | seq_printf(s, "pin %d (%s) ", pin, | |
1023 | desc->name ? desc->name : "unnamed"); | |
1024 | ||
1025 | /* Driver-specific info per pin */ | |
1026 | if (ops->pin_dbg_show) | |
1027 | ops->pin_dbg_show(pctldev, s, pin); | |
1028 | ||
1029 | seq_puts(s, "\n"); | |
1030 | } | |
1031 | ||
57b676f9 SW |
1032 | mutex_unlock(&pinctrl_mutex); |
1033 | ||
2744e8af LW |
1034 | return 0; |
1035 | } | |
1036 | ||
1037 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1038 | { | |
1039 | struct pinctrl_dev *pctldev = s->private; | |
1040 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1041 | unsigned ngroups, selector = 0; |
2744e8af | 1042 | |
d1e90e9e | 1043 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1044 | mutex_lock(&pinctrl_mutex); |
1045 | ||
2744e8af | 1046 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1047 | while (selector < ngroups) { |
a5818a8b | 1048 | const unsigned *pins; |
2744e8af LW |
1049 | unsigned num_pins; |
1050 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1051 | const char *pname; |
2744e8af LW |
1052 | int ret; |
1053 | int i; | |
1054 | ||
1055 | ret = ops->get_group_pins(pctldev, selector, | |
1056 | &pins, &num_pins); | |
1057 | if (ret) | |
1058 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1059 | gname); | |
1060 | else { | |
dcb5dbc3 DA |
1061 | seq_printf(s, "group: %s\n", gname); |
1062 | for (i = 0; i < num_pins; i++) { | |
1063 | pname = pin_get_name(pctldev, pins[i]); | |
1064 | if (WARN_ON(!pname)) | |
1065 | return -EINVAL; | |
1066 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); | |
1067 | } | |
1068 | seq_puts(s, "\n"); | |
2744e8af LW |
1069 | } |
1070 | selector++; | |
1071 | } | |
1072 | ||
57b676f9 | 1073 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1074 | |
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1079 | { | |
1080 | struct pinctrl_dev *pctldev = s->private; | |
1081 | struct pinctrl_gpio_range *range = NULL; | |
1082 | ||
1083 | seq_puts(s, "GPIO ranges handled:\n"); | |
1084 | ||
57b676f9 SW |
1085 | mutex_lock(&pinctrl_mutex); |
1086 | ||
2744e8af | 1087 | /* Loop over the ranges */ |
2744e8af | 1088 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1089 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1090 | range->id, range->name, | |
1091 | range->base, (range->base + range->npins - 1), | |
1092 | range->pin_base, | |
1093 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1094 | } |
57b676f9 SW |
1095 | |
1096 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1097 | |
1098 | return 0; | |
1099 | } | |
1100 | ||
1101 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1102 | { | |
1103 | struct pinctrl_dev *pctldev; | |
1104 | ||
ae6b4d85 | 1105 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1106 | |
1107 | mutex_lock(&pinctrl_mutex); | |
1108 | ||
2744e8af LW |
1109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1110 | seq_printf(s, "%s ", pctldev->desc->name); | |
1111 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1112 | seq_puts(s, "yes "); |
1113 | else | |
1114 | seq_puts(s, "no "); | |
1115 | if (pctldev->desc->confops) | |
2744e8af LW |
1116 | seq_puts(s, "yes"); |
1117 | else | |
1118 | seq_puts(s, "no"); | |
1119 | seq_puts(s, "\n"); | |
1120 | } | |
57b676f9 SW |
1121 | |
1122 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1123 | |
1124 | return 0; | |
1125 | } | |
1126 | ||
1e2082b5 SW |
1127 | static inline const char *map_type(enum pinctrl_map_type type) |
1128 | { | |
1129 | static const char * const names[] = { | |
1130 | "INVALID", | |
1131 | "DUMMY_STATE", | |
1132 | "MUX_GROUP", | |
1133 | "CONFIGS_PIN", | |
1134 | "CONFIGS_GROUP", | |
1135 | }; | |
1136 | ||
1137 | if (type >= ARRAY_SIZE(names)) | |
1138 | return "UNKNOWN"; | |
1139 | ||
1140 | return names[type]; | |
1141 | } | |
1142 | ||
3eedb437 SW |
1143 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1144 | { | |
1145 | struct pinctrl_maps *maps_node; | |
1146 | int i; | |
1147 | struct pinctrl_map const *map; | |
1148 | ||
1149 | seq_puts(s, "Pinctrl maps:\n"); | |
1150 | ||
57b676f9 SW |
1151 | mutex_lock(&pinctrl_mutex); |
1152 | ||
3eedb437 | 1153 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1154 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1155 | map->dev_name, map->name, map_type(map->type), | |
1156 | map->type); | |
1157 | ||
1158 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1159 | seq_printf(s, "controlling device %s\n", | |
1160 | map->ctrl_dev_name); | |
1161 | ||
1162 | switch (map->type) { | |
1163 | case PIN_MAP_TYPE_MUX_GROUP: | |
1164 | pinmux_show_map(s, map); | |
1165 | break; | |
1166 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1167 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1168 | pinconf_show_map(s, map); | |
1169 | break; | |
1170 | default: | |
1171 | break; | |
1172 | } | |
1173 | ||
1174 | seq_printf(s, "\n"); | |
3eedb437 | 1175 | } |
57b676f9 SW |
1176 | |
1177 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1178 | |
1179 | return 0; | |
1180 | } | |
1181 | ||
befe5bdf LW |
1182 | static int pinctrl_show(struct seq_file *s, void *what) |
1183 | { | |
1184 | struct pinctrl *p; | |
6e5e959d | 1185 | struct pinctrl_state *state; |
7ecdb16f | 1186 | struct pinctrl_setting *setting; |
befe5bdf LW |
1187 | |
1188 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1189 | |
1190 | mutex_lock(&pinctrl_mutex); | |
1191 | ||
befe5bdf | 1192 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1193 | seq_printf(s, "device: %s current state: %s\n", |
1194 | dev_name(p->dev), | |
1195 | p->state ? p->state->name : "none"); | |
1196 | ||
1197 | list_for_each_entry(state, &p->states, node) { | |
1198 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1199 | |
6e5e959d | 1200 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1201 | struct pinctrl_dev *pctldev = setting->pctldev; |
1202 | ||
1203 | seq_printf(s, " type: %s controller %s ", | |
1204 | map_type(setting->type), | |
1205 | pinctrl_dev_get_name(pctldev)); | |
1206 | ||
1207 | switch (setting->type) { | |
1208 | case PIN_MAP_TYPE_MUX_GROUP: | |
1209 | pinmux_show_setting(s, setting); | |
1210 | break; | |
1211 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1212 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1213 | pinconf_show_setting(s, setting); | |
1214 | break; | |
1215 | default: | |
1216 | break; | |
1217 | } | |
6e5e959d | 1218 | } |
befe5bdf | 1219 | } |
befe5bdf LW |
1220 | } |
1221 | ||
57b676f9 SW |
1222 | mutex_unlock(&pinctrl_mutex); |
1223 | ||
befe5bdf LW |
1224 | return 0; |
1225 | } | |
1226 | ||
2744e8af LW |
1227 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1228 | { | |
1229 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1230 | } | |
1231 | ||
1232 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1233 | { | |
1234 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1235 | } | |
1236 | ||
1237 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1238 | { | |
1239 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1240 | } | |
1241 | ||
1242 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1243 | { | |
1244 | return single_open(file, pinctrl_devices_show, NULL); | |
1245 | } | |
1246 | ||
3eedb437 SW |
1247 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1248 | { | |
1249 | return single_open(file, pinctrl_maps_show, NULL); | |
1250 | } | |
1251 | ||
befe5bdf LW |
1252 | static int pinctrl_open(struct inode *inode, struct file *file) |
1253 | { | |
1254 | return single_open(file, pinctrl_show, NULL); | |
1255 | } | |
1256 | ||
2744e8af LW |
1257 | static const struct file_operations pinctrl_pins_ops = { |
1258 | .open = pinctrl_pins_open, | |
1259 | .read = seq_read, | |
1260 | .llseek = seq_lseek, | |
1261 | .release = single_release, | |
1262 | }; | |
1263 | ||
1264 | static const struct file_operations pinctrl_groups_ops = { | |
1265 | .open = pinctrl_groups_open, | |
1266 | .read = seq_read, | |
1267 | .llseek = seq_lseek, | |
1268 | .release = single_release, | |
1269 | }; | |
1270 | ||
1271 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1272 | .open = pinctrl_gpioranges_open, | |
1273 | .read = seq_read, | |
1274 | .llseek = seq_lseek, | |
1275 | .release = single_release, | |
1276 | }; | |
1277 | ||
3eedb437 SW |
1278 | static const struct file_operations pinctrl_devices_ops = { |
1279 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1280 | .read = seq_read, |
1281 | .llseek = seq_lseek, | |
1282 | .release = single_release, | |
1283 | }; | |
1284 | ||
3eedb437 SW |
1285 | static const struct file_operations pinctrl_maps_ops = { |
1286 | .open = pinctrl_maps_open, | |
2744e8af LW |
1287 | .read = seq_read, |
1288 | .llseek = seq_lseek, | |
1289 | .release = single_release, | |
1290 | }; | |
1291 | ||
befe5bdf LW |
1292 | static const struct file_operations pinctrl_ops = { |
1293 | .open = pinctrl_open, | |
1294 | .read = seq_read, | |
1295 | .llseek = seq_lseek, | |
1296 | .release = single_release, | |
1297 | }; | |
1298 | ||
2744e8af LW |
1299 | static struct dentry *debugfs_root; |
1300 | ||
1301 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1302 | { | |
02157160 | 1303 | struct dentry *device_root; |
2744e8af | 1304 | |
51cd24ee | 1305 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1306 | debugfs_root); |
02157160 TL |
1307 | pctldev->device_root = device_root; |
1308 | ||
2744e8af LW |
1309 | if (IS_ERR(device_root) || !device_root) { |
1310 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1311 | dev_name(pctldev->dev)); |
2744e8af LW |
1312 | return; |
1313 | } | |
1314 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1315 | device_root, pctldev, &pinctrl_pins_ops); | |
1316 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1317 | device_root, pctldev, &pinctrl_groups_ops); | |
1318 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1319 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1320 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1321 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1322 | } |
1323 | ||
02157160 TL |
1324 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1325 | { | |
1326 | debugfs_remove_recursive(pctldev->device_root); | |
1327 | } | |
1328 | ||
2744e8af LW |
1329 | static void pinctrl_init_debugfs(void) |
1330 | { | |
1331 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1332 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1333 | pr_warn("failed to create debugfs directory\n"); | |
1334 | debugfs_root = NULL; | |
1335 | return; | |
1336 | } | |
1337 | ||
1338 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1339 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1340 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1341 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1342 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1343 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1344 | } |
1345 | ||
1346 | #else /* CONFIG_DEBUG_FS */ | |
1347 | ||
1348 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1349 | { | |
1350 | } | |
1351 | ||
1352 | static void pinctrl_init_debugfs(void) | |
1353 | { | |
1354 | } | |
1355 | ||
02157160 TL |
1356 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1357 | { | |
1358 | } | |
1359 | ||
2744e8af LW |
1360 | #endif |
1361 | ||
d26bc49f SW |
1362 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1363 | { | |
1364 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1365 | ||
1366 | if (!ops || | |
d1e90e9e | 1367 | !ops->get_groups_count || |
d26bc49f SW |
1368 | !ops->get_group_name || |
1369 | !ops->get_group_pins) | |
1370 | return -EINVAL; | |
1371 | ||
57291ce2 SW |
1372 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1373 | return -EINVAL; | |
1374 | ||
d26bc49f SW |
1375 | return 0; |
1376 | } | |
1377 | ||
2744e8af LW |
1378 | /** |
1379 | * pinctrl_register() - register a pin controller device | |
1380 | * @pctldesc: descriptor for this pin controller | |
1381 | * @dev: parent device for this pin controller | |
1382 | * @driver_data: private pin controller data for this pin controller | |
1383 | */ | |
1384 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1385 | struct device *dev, void *driver_data) | |
1386 | { | |
2744e8af LW |
1387 | struct pinctrl_dev *pctldev; |
1388 | int ret; | |
1389 | ||
da9aecb0 | 1390 | if (!pctldesc) |
2744e8af | 1391 | return NULL; |
da9aecb0 | 1392 | if (!pctldesc->name) |
2744e8af LW |
1393 | return NULL; |
1394 | ||
02f5b989 | 1395 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1396 | if (pctldev == NULL) { |
1397 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1398 | return NULL; |
95dcd4ae | 1399 | } |
b9130b77 TL |
1400 | |
1401 | /* Initialize pin control device struct */ | |
1402 | pctldev->owner = pctldesc->owner; | |
1403 | pctldev->desc = pctldesc; | |
1404 | pctldev->driver_data = driver_data; | |
1405 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1406 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1407 | pctldev->dev = dev; |
1408 | ||
d26bc49f | 1409 | /* check core ops for sanity */ |
da9aecb0 | 1410 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1411 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1412 | goto out_err; |
1413 | } | |
1414 | ||
2744e8af LW |
1415 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1416 | if (pctldesc->pmxops) { | |
da9aecb0 | 1417 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1418 | goto out_err; |
2744e8af LW |
1419 | } |
1420 | ||
ae6b4d85 LW |
1421 | /* If we're implementing pinconfig, check the ops for sanity */ |
1422 | if (pctldesc->confops) { | |
da9aecb0 | 1423 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1424 | goto out_err; |
ae6b4d85 LW |
1425 | } |
1426 | ||
2744e8af | 1427 | /* Register all the pins */ |
ad6e1107 | 1428 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1429 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1430 | if (ret) { | |
ad6e1107 | 1431 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1432 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1433 | pctldesc->npins); | |
51cd24ee | 1434 | goto out_err; |
2744e8af LW |
1435 | } |
1436 | ||
57b676f9 SW |
1437 | mutex_lock(&pinctrl_mutex); |
1438 | ||
8b9c139f | 1439 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1440 | |
6e5e959d SW |
1441 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1442 | if (!IS_ERR(pctldev->p)) { | |
1443 | struct pinctrl_state *s = | |
1444 | pinctrl_lookup_state_locked(pctldev->p, | |
1445 | PINCTRL_STATE_DEFAULT); | |
ad6e1107 JC |
1446 | if (IS_ERR(s)) { |
1447 | dev_dbg(dev, "failed to lookup the default state\n"); | |
1448 | } else { | |
da9aecb0 | 1449 | if (pinctrl_select_state_locked(pctldev->p, s)) |
ad6e1107 JC |
1450 | dev_err(dev, |
1451 | "failed to select default state\n"); | |
ad6e1107 | 1452 | } |
6e5e959d | 1453 | } |
57b676f9 SW |
1454 | |
1455 | mutex_unlock(&pinctrl_mutex); | |
1456 | ||
2304b473 SW |
1457 | pinctrl_init_device_debugfs(pctldev); |
1458 | ||
2744e8af LW |
1459 | return pctldev; |
1460 | ||
51cd24ee SW |
1461 | out_err: |
1462 | kfree(pctldev); | |
2744e8af LW |
1463 | return NULL; |
1464 | } | |
1465 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1466 | ||
1467 | /** | |
1468 | * pinctrl_unregister() - unregister pinmux | |
1469 | * @pctldev: pin controller to unregister | |
1470 | * | |
1471 | * Called by pinmux drivers to unregister a pinmux. | |
1472 | */ | |
1473 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1474 | { | |
5d589b09 | 1475 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1476 | if (pctldev == NULL) |
1477 | return; | |
1478 | ||
02157160 | 1479 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1480 | |
1481 | mutex_lock(&pinctrl_mutex); | |
1482 | ||
6e5e959d SW |
1483 | if (!IS_ERR(pctldev->p)) |
1484 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1485 | |
2744e8af | 1486 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1487 | list_del(&pctldev->node); |
2744e8af LW |
1488 | /* Destroy descriptor tree */ |
1489 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1490 | pctldev->desc->npins); | |
5d589b09 DA |
1491 | /* remove gpio ranges map */ |
1492 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1493 | list_del(&range->node); | |
1494 | ||
51cd24ee | 1495 | kfree(pctldev); |
57b676f9 SW |
1496 | |
1497 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1498 | } |
1499 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1500 | ||
1501 | static int __init pinctrl_init(void) | |
1502 | { | |
1503 | pr_info("initialized pinctrl subsystem\n"); | |
1504 | pinctrl_init_debugfs(); | |
1505 | return 0; | |
1506 | } | |
1507 | ||
1508 | /* init early since many drivers really need to initialized pinmux early */ | |
1509 | core_initcall(pinctrl_init); |