[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pcmcia / at91_cf.c

/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <pcmcia/ss.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <asm/arch/at91rm9200.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>


/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 */
#define	CF_ATTR_PHYS	(AT91_CF_BASE)
#define	CF_IO_PHYS	(AT91_CF_BASE  + (1 << 23))
#define	CF_MEM_PHYS	(AT91_CF_BASE  + 0x017ff800)

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "at91_cf";

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;
};

#define	SZ_2K			(2 * SZ_1K)

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !at91_get_gpio_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket	*cf = (struct at91_cf_socket *) _cf;

	if (irq == cf->board->det_pin) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			pr_debug("%s: card %s\n", driver_name,
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= cf->board->irq_pin;	/* RDY/nIRQ */
		int vcc	= cf->board->vcc_pin;

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || at91_get_gpio_value(rdy))
			*sp |= SS_READY;
		if (!vcc || at91_get_gpio_value(vcc))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (cf->board->vcc_pin) {
		switch (s->Vcc) {
			case 0:
				at91_set_gpio_value(cf->board->vcc_pin, 0);
				break;
			case 33:
				at91_set_gpio_value(cf->board->vcc_pin, 1);
				break;
			default:
				return -EINVAL;
		}
	}

	/* toggle reset if needed */
	at91_set_gpio_value(cf->board->rst_pin, s->flags & SS_RESET);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 * Always set CSR4 ... PCMCIA won't always unmap things.
	 */
	csr = at91_sys_read(AT91_SMC_CSR(4)) & ~AT91_SMC_DBW;

	/*
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT|MAP_AUTOSZ))) {
		csr |= AT91_SMC_DBW_8;
		pr_debug("%s: 8bit i/o bus\n", driver_name);
	} else {
		csr |= AT91_SMC_DBW_16;
		pr_debug("%s: 16bit i/o bus\n", driver_name);
	}
	at91_sys_write(AT91_SMC_CSR(4), csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	if (map->flags & MAP_ATTRIB)
		map->static_start = CF_ATTR_PHYS;
	else
		map->static_start = CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board = pdev->dev.platform_data;
	struct resource		*io;
	unsigned int		csa;
	int			status;

	if (!board || !board->det_pin || !board->rst_pin)
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	platform_set_drvdata(pdev, cf);

	/* CF takes over CS4, CS5, CS6 */
	csa = at91_sys_read(AT91_EBI_CSA);
	at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);

	/* force poweron defaults for these pins ... */
	(void) at91_set_A_periph(AT91_PIN_PC9, 0);	/* A25/CFRNW */
	(void) at91_set_A_periph(AT91_PIN_PC10, 0);	/* NCS4/CFCS */
	(void) at91_set_A_periph(AT91_PIN_PC11, 0);	/* NCS5/CFCE1 */
	(void) at91_set_A_periph(AT91_PIN_PC12, 0);	/* NCS6/CFCE2 */

	/* nWAIT is _not_ a default setting */
	(void) at91_set_A_periph(AT91_PIN_PC6, 1);	/*  nWAIT */

	/*
	 * Static memory controller timing adjustments.
	 * REVISIT:  these timings are in terms of MCK cycles, so
	 * when MCK changes (cpufreq etc) so must these values...
	 */
	at91_sys_write(AT91_SMC_CSR(4),
				  AT91_SMC_ACSS_STD
				| AT91_SMC_DBW_16
				| AT91_SMC_BAT
				| AT91_SMC_WSEN
				| AT91_SMC_NWS_(32)	/* wait states */
				| AT91_SMC_RWSETUP_(6)	/* setup time */
				| AT91_SMC_RWHOLD_(4)	/* hold time */
	);

	/* must be a GPIO; ergo must trigger on both edges */
	status = request_irq(board->det_pin, at91_cf_irq,
			IRQF_SAMPLE_RANDOM, driver_name, cf);
	if (status < 0)
		goto fail0;
	device_init_wakeup(&pdev->dev, 1);

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (board->irq_pin) {
		status = request_irq(board->irq_pin, at91_cf_irq,
				IRQF_SHARED, driver_name, cf);
		if (status < 0)
			goto fail0a;
		cf->socket.pci_irq = board->irq_pin;
	} else
		cf->socket.pci_irq = NR_IRQS + 1;

	/* pcmcia layer only remaps "real" memory not iospace */
	cf->socket.io_offset = (unsigned long) ioremap(CF_IO_PHYS, SZ_2K);
	if (!cf->socket.io_offset)
		goto fail1;

	/* reserve CS4, CS5, and CS6 regions; but use just CS4 */
	if (!request_mem_region(io->start, io->end + 1 - io->start,
				driver_name))
		goto fail1;

	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
		board->det_pin, board->irq_pin);

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.dev = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	return 0;

fail2:
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(io->start, io->end + 1 - io->start);
fail1:
	if (board->irq_pin)
		free_irq(board->irq_pin, cf);
fail0a:
	free_irq(board->det_pin, cf);
	device_init_wakeup(&pdev->dev, 0);
fail0:
	at91_sys_write(AT91_EBI_CSA, csa);
	kfree(cf);
	return status;
}

static int __exit at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;
	struct resource		*io = cf->socket.io[0].res;
	unsigned int		csa;

	pcmcia_unregister_socket(&cf->socket);
	if (board->irq_pin)
		free_irq(board->irq_pin, cf);
	free_irq(board->det_pin, cf);
	device_init_wakeup(&pdev->dev, 0);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(io->start, io->end + 1 - io->start);

	csa = at91_sys_read(AT91_EBI_CSA);
	at91_sys_write(AT91_EBI_CSA, csa & ~AT91_EBI_CS4A);

	kfree(cf);
	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
	if (device_may_wakeup(&pdev->dev))
		enable_irq_wake(board->det_pin);
	else {
		disable_irq_wake(board->det_pin);
		disable_irq(board->det_pin);
	}
	if (board->irq_pin)
		disable_irq(board->irq_pin);
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (board->irq_pin)
		enable_irq(board->irq_pin);
	if (!device_may_wakeup(&pdev->dev))
		enable_irq(board->det_pin);
	pcmcia_socket_dev_resume(&pdev->dev);
	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= (char *) driver_name,
		.owner		= THIS_MODULE,
	},
	.probe		= at91_cf_probe,
	.remove		= __exit_p(at91_cf_remove),
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_init(void)
{
	return platform_driver_register(&at91_cf_driver);
}
module_init(at91_cf_init);

static void __exit at91_cf_exit(void)
{
	platform_driver_unregister(&at91_cf_driver);
}
module_exit(at91_cf_exit);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
Commit	Line	Data
2c1f3b7a AV	1	/*
	2	* at91_cf.c -- AT91 CompactFlash controller driver
	3	*
	4	* Copyright (C) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/sched.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/errno.h>
	17	#include <linux/init.h>
	18	#include <linux/interrupt.h>
	19
	20	#include <pcmcia/ss.h>
	21
	22	#include <asm/hardware.h>
	23	#include <asm/io.h>
	24	#include <asm/sizes.h>
	25
	26	#include <asm/arch/at91rm9200.h>
	27	#include <asm/arch/board.h>
	28	#include <asm/arch/gpio.h>
	29
	30
2c1f3b7a AV	31	/*
	32	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	33	* some other bit in {A24,A22..A11} is nREG to flag memory access
	34	* (vs attributes). So more than 2KB/region would just be waste.
	35	*/
	36	#define CF_ATTR_PHYS (AT91_CF_BASE)
	37	#define CF_IO_PHYS (AT91_CF_BASE + (1 << 23))
	38	#define CF_MEM_PHYS (AT91_CF_BASE + 0x017ff800)
	39
	40	/--------------------------------------------------------------------------/
	41
	42	static const char driver_name[] = "at91_cf";
	43
	44	struct at91_cf_socket {
	45	struct pcmcia_socket socket;
	46
	47	unsigned present:1;
	48
	49	struct platform_device *pdev;
	50	struct at91_cf_data *board;
	51	};
	52
	53	#define SZ_2K (2 * SZ_1K)
	54
	55	static inline int at91_cf_present(struct at91_cf_socket *cf)
	56	{
	57	return !at91_get_gpio_value(cf->board->det_pin);
	58	}
	59
	60	/--------------------------------------------------------------------------/
	61
	62	static int at91_cf_ss_init(struct pcmcia_socket *s)
	63	{
	64	return 0;
	65	}
	66
7d12e780	67	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a AV	68	{
	69	struct at91_cf_socket cf = (struct at91_cf_socket ) _cf;
	70
	71	if (irq == cf->board->det_pin) {
	72	unsigned present = at91_cf_present(cf);
	73
	74	/* kick pccard as needed */
	75	if (present != cf->present) {
	76	cf->present = present;
2c536200 DB	77	pr_debug("%s: card %s\n", driver_name,
2c536200 DB	78	present ? "present" : "gone");
2c1f3b7a AV	79	pcmcia_parse_events(&cf->socket, SS_DETECT);
	80	}
	81	}
	82
	83	return IRQ_HANDLED;
	84	}
	85
	86	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	87	{
	88	struct at91_cf_socket *cf;
	89
	90	if (!sp)
	91	return -EINVAL;
	92
	93	cf = container_of(s, struct at91_cf_socket, socket);
	94
2c536200	95	/* NOTE: CF is always 3VCARD */
2c1f3b7a AV	96	if (at91_cf_present(cf)) {
	97	int rdy = cf->board->irq_pin; /* RDY/nIRQ */
	98	int vcc = cf->board->vcc_pin;
	99
	100	*sp = SS_DETECT \| SS_3VCARD;
	101	if (!rdy \|\| at91_get_gpio_value(rdy))
	102	*sp \|= SS_READY;
	103	if (!vcc \|\| at91_get_gpio_value(vcc))
	104	*sp \|= SS_POWERON;
	105	} else
	106	*sp = 0;
	107
	108	return 0;
	109	}
	110
2c536200 DB	111	static int
2c536200 DB	112	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	113	{
	114	struct at91_cf_socket *cf;
	115
	116	cf = container_of(sock, struct at91_cf_socket, socket);
	117
	118	/* switch Vcc if needed and possible */
	119	if (cf->board->vcc_pin) {
	120	switch (s->Vcc) {
	121	case 0:
	122	at91_set_gpio_value(cf->board->vcc_pin, 0);
	123	break;
	124	case 33:
	125	at91_set_gpio_value(cf->board->vcc_pin, 1);
	126	break;
	127	default:
	128	return -EINVAL;
	129	}
	130	}
	131
	132	/* toggle reset if needed */
	133	at91_set_gpio_value(cf->board->rst_pin, s->flags & SS_RESET);
	134
	135	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	136	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	137
	138	return 0;
	139	}
	140
	141	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	142	{
	143	return at91_cf_set_socket(s, &dead_socket);
	144	}
	145
	146	/* we already mapped the I/O region */
	147	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	148	{
	149	struct at91_cf_socket *cf;
	150	u32 csr;
	151
	152	cf = container_of(s, struct at91_cf_socket, socket);
	153	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	154
	155	/*
	156	* Use 16 bit accesses unless/until we need 8-bit i/o space.
	157	* Always set CSR4 ... PCMCIA won't always unmap things.
	158	*/
	159	csr = at91_sys_read(AT91_SMC_CSR(4)) & ~AT91_SMC_DBW;
	160
	161	/*
	162	* NOTE: this CF controller ignores IOIS16, so we can't really do
	163	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	164	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	165	* purposes (and handles ide-cs).
	166	*
	167	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	168	* some cards only like that way to get at the odd byte, despite
	169	* CF 3.0 spec table 35 also giving the D8-D15 option.
	170	*/
	171	if (!(io->flags & (MAP_16BIT\|MAP_AUTOSZ))) {
	172	csr \|= AT91_SMC_DBW_8;
	173	pr_debug("%s: 8bit i/o bus\n", driver_name);
	174	} else {
	175	csr \|= AT91_SMC_DBW_16;
	176	pr_debug("%s: 16bit i/o bus\n", driver_name);
177	}
178	at91_sys_write(AT91_SMC_CSR(4), csr);
179
180	io->start = cf->socket.io_offset;
181	io->stop = io->start + SZ_2K - 1;
182
183	return 0;
184	}
185
186	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	187	static int
2c536200 DB	188	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	189	{
	190	struct at91_cf_socket *cf;
	191
	192	if (map->card_start)
	193	return -EINVAL;
	194
	195	cf = container_of(s, struct at91_cf_socket, socket);
	196
	197	map->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	198	if (map->flags & MAP_ATTRIB)
	199	map->static_start = CF_ATTR_PHYS;
	200	else
	201	map->static_start = CF_MEM_PHYS;
	202
	203	return 0;
	204	}
	205
	206	static struct pccard_operations at91_cf_ops = {
	207	.init = at91_cf_ss_init,
	208	.suspend = at91_cf_ss_suspend,
	209	.get_status = at91_cf_get_status,
	210	.set_socket = at91_cf_set_socket,
	211	.set_io_map = at91_cf_set_io_map,
	212	.set_mem_map = at91_cf_set_mem_map,
	213	};
	214
	215	/--------------------------------------------------------------------------/
	216
0db6095d	217	static int __init at91_cf_probe(struct platform_device *pdev)
2c1f3b7a AV	218	{
2c1f3b7a AV	219	struct at91_cf_socket *cf;
0db6095d	220	struct at91_cf_data *board = pdev->dev.platform_data;
2c536200	221	struct resource *io;
2c1f3b7a AV	222	unsigned int csa;
	223	int status;
	224
	225	if (!board \|\| !board->det_pin \|\| !board->rst_pin)
	226	return -ENODEV;
	227
2c536200 DB	228	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	229	if (!io)
	230	return -ENODEV;
	231
2c1f3b7a AV	232	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	233	if (!cf)
	234	return -ENOMEM;
	235
	236	cf->board = board;
	237	cf->pdev = pdev;
0db6095d	238	platform_set_drvdata(pdev, cf);
2c1f3b7a AV	239
	240	/* CF takes over CS4, CS5, CS6 */
	241	csa = at91_sys_read(AT91_EBI_CSA);
	242	at91_sys_write(AT91_EBI_CSA, csa \| AT91_EBI_CS4A_SMC_COMPACTFLASH);
	243
	244	/* force poweron defaults for these pins ... */
	245	(void) at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
	246	(void) at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
	247	(void) at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
	248	(void) at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
	249
	250	/* nWAIT is _not_ a default setting */
	251	(void) at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
	252
	253	/*
	254	* Static memory controller timing adjustments.
	255	* REVISIT: these timings are in terms of MCK cycles, so
	256	* when MCK changes (cpufreq etc) so must these values...
	257	*/
2c536200 DB	258	at91_sys_write(AT91_SMC_CSR(4),
	259	AT91_SMC_ACSS_STD
	260	\| AT91_SMC_DBW_16
	261	\| AT91_SMC_BAT
	262	\| AT91_SMC_WSEN
	263	\| AT91_SMC_NWS_(32) /* wait states */
	264	\| AT91_SMC_RWSETUP_(6) /* setup time */
	265	\| AT91_SMC_RWHOLD_(4) /* hold time */
2c1f3b7a AV	266	);
	267
	268	/* must be a GPIO; ergo must trigger on both edges */
	269	status = request_irq(board->det_pin, at91_cf_irq,
dace1453	270	IRQF_SAMPLE_RANDOM, driver_name, cf);
2c1f3b7a AV	271	if (status < 0)
2c1f3b7a AV	272	goto fail0;
0db6095d	273	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a AV	274
	275	/*
	276	* The card driver will request this irq later as needed.
	277	* but it causes lots of "irqNN: nobody cared" messages
	278	* unless we report that we handle everything (sigh).
	279	* (Note: DK board doesn't wire the IRQ pin...)
	280	*/
	281	if (board->irq_pin) {
	282	status = request_irq(board->irq_pin, at91_cf_irq,
dace1453	283	IRQF_SHARED, driver_name, cf);
2c1f3b7a AV	284	if (status < 0)
	285	goto fail0a;
	286	cf->socket.pci_irq = board->irq_pin;
2c536200	287	} else
2c1f3b7a AV	288	cf->socket.pci_irq = NR_IRQS + 1;
	289
	290	/* pcmcia layer only remaps "real" memory not iospace */
	291	cf->socket.io_offset = (unsigned long) ioremap(CF_IO_PHYS, SZ_2K);
	292	if (!cf->socket.io_offset)
	293	goto fail1;
	294
	295	/* reserve CS4, CS5, and CS6 regions; but use just CS4 */
2c536200 DB	296	if (!request_mem_region(io->start, io->end + 1 - io->start,
2c536200 DB	297	driver_name))
2c1f3b7a AV	298	goto fail1;
	299
	300	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
	301	board->det_pin, board->irq_pin);
	302
	303	cf->socket.owner = THIS_MODULE;
0db6095d	304	cf->socket.dev.dev = &pdev->dev;
2c1f3b7a AV	305	cf->socket.ops = &at91_cf_ops;
	306	cf->socket.resource_ops = &pccard_static_ops;
	307	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	308	\| SS_CAP_MEM_ALIGN;
	309	cf->socket.map_size = SZ_2K;
2c536200	310	cf->socket.io[0].res = io;
2c1f3b7a AV	311
	312	status = pcmcia_register_socket(&cf->socket);
	313	if (status < 0)
	314	goto fail2;
	315
	316	return 0;
	317
	318	fail2:
	319	iounmap((void __iomem *) cf->socket.io_offset);
2c536200	320	release_mem_region(io->start, io->end + 1 - io->start);
2c1f3b7a AV	321	fail1:
	322	if (board->irq_pin)
	323	free_irq(board->irq_pin, cf);
	324	fail0a:
	325	free_irq(board->det_pin, cf);
0db6095d	326	device_init_wakeup(&pdev->dev, 0);
2c1f3b7a AV	327	fail0:
	328	at91_sys_write(AT91_EBI_CSA, csa);
	329	kfree(cf);
	330	return status;
	331	}
	332
0db6095d	333	static int __exit at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	334	{
0db6095d DB	335	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
0db6095d DB	336	struct at91_cf_data *board = cf->board;
2c536200 DB	337	struct resource *io = cf->socket.io[0].res;
2c536200 DB	338	unsigned int csa;
2c1f3b7a AV	339
2c1f3b7a AV	340	pcmcia_unregister_socket(&cf->socket);
0db6095d DB	341	if (board->irq_pin)
	342	free_irq(board->irq_pin, cf);
	343	free_irq(board->det_pin, cf);
	344	device_init_wakeup(&pdev->dev, 0);
2c1f3b7a	345	iounmap((void __iomem *) cf->socket.io_offset);
2c536200	346	release_mem_region(io->start, io->end + 1 - io->start);
2c1f3b7a AV	347
	348	csa = at91_sys_read(AT91_EBI_CSA);
	349	at91_sys_write(AT91_EBI_CSA, csa & ~AT91_EBI_CS4A);
	350
	351	kfree(cf);
	352	return 0;
	353	}
	354
0db6095d DB	355	#ifdef CONFIG_PM
	356
	357	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	358	{
	359	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	360	struct at91_cf_data *board = cf->board;
	361
	362	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
	363	if (device_may_wakeup(&pdev->dev))
	364	enable_irq_wake(board->det_pin);
	365	else {
	366	disable_irq_wake(board->det_pin);
	367	disable_irq(board->det_pin);
	368	}
	369	if (board->irq_pin)
	370	disable_irq(board->irq_pin);
	371	return 0;
	372	}
	373
	374	static int at91_cf_resume(struct platform_device *pdev)
	375	{
	376	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	377	struct at91_cf_data *board = cf->board;
	378
	379	if (board->irq_pin)
	380	enable_irq(board->irq_pin);
	381	if (!device_may_wakeup(&pdev->dev))
	382	enable_irq(board->det_pin);
	383	pcmcia_socket_dev_resume(&pdev->dev);
	384	return 0;
	385	}
	386
	387	#else
	388	#define at91_cf_suspend NULL
	389	#define at91_cf_resume NULL
	390	#endif
	391
	392	static struct platform_driver at91_cf_driver = {
	393	.driver = {
	394	.name = (char *) driver_name,
	395	.owner = THIS_MODULE,
	396	},
2c1f3b7a AV	397	.probe = at91_cf_probe,
2c1f3b7a AV	398	.remove = __exit_p(at91_cf_remove),
0db6095d DB	399	.suspend = at91_cf_suspend,
0db6095d DB	400	.resume = at91_cf_resume,
2c1f3b7a AV	401	};
	402
	403	/--------------------------------------------------------------------------/
	404
	405	static int __init at91_cf_init(void)
	406	{
0db6095d	407	return platform_driver_register(&at91_cf_driver);
2c1f3b7a AV	408	}
	409	module_init(at91_cf_init);
	410
	411	static void __exit at91_cf_exit(void)
	412	{
0db6095d	413	platform_driver_unregister(&at91_cf_driver);
2c1f3b7a AV	414	}
	415	module_exit(at91_cf_exit);
	416
	417	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	418	MODULE_AUTHOR("David Brownell");
	419	MODULE_LICENSE("GPL");