[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / proc.c

/*
 *	$Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
 *
 *	Procfs interface for the PCI bus.
 *
 *	Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
 */

#include <linux/init.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/smp_lock.h>

#include <asm/uaccess.h>
#include <asm/byteorder.h>
#include "pci.h"

static int proc_initialized;	/* = 0 */

static loff_t
proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
{
	loff_t new = -1;
	struct inode *inode = file->f_dentry->d_inode;

	down(&inode->i_sem);
	switch (whence) {
	case 0:
		new = off;
		break;
	case 1:
		new = file->f_pos + off;
		break;
	case 2:
		new = inode->i_size + off;
		break;
	}
	if (new < 0 || new > inode->i_size)
		new = -EINVAL;
	else
		file->f_pos = new;
	up(&inode->i_sem);
	return new;
}

static ssize_t
proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
{
	const struct inode *ino = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(ino);
	struct pci_dev *dev = dp->data;
	unsigned int pos = *ppos;
	unsigned int cnt, size;

	/*
	 * Normal users can read only the standardized portion of the
	 * configuration space as several chips lock up when trying to read
	 * undefined locations (think of Intel PIIX4 as a typical example).
	 */

	if (capable(CAP_SYS_ADMIN))
		size = dev->cfg_size;
	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
		size = 128;
	else
		size = 64;

	if (pos >= size)
		return 0;
	if (nbytes >= size)
		nbytes = size;
	if (pos + nbytes > size)
		nbytes = size - pos;
	cnt = nbytes;

	if (!access_ok(VERIFY_WRITE, buf, cnt))
		return -EINVAL;

	if ((pos & 1) && cnt) {
		unsigned char val;
		pci_user_read_config_byte(dev, pos, &val);
		__put_user(val, buf);
		buf++;
		pos++;
		cnt--;
	}

	if ((pos & 3) && cnt > 2) {
		unsigned short val;
		pci_user_read_config_word(dev, pos, &val);
		__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	while (cnt >= 4) {
		unsigned int val;
		pci_user_read_config_dword(dev, pos, &val);
		__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
		buf += 4;
		pos += 4;
		cnt -= 4;
	}

	if (cnt >= 2) {
		unsigned short val;
		pci_user_read_config_word(dev, pos, &val);
		__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	if (cnt) {
		unsigned char val;
		pci_user_read_config_byte(dev, pos, &val);
		__put_user(val, buf);
		buf++;
		pos++;
		cnt--;
	}

	*ppos = pos;
	return nbytes;
}

static ssize_t
proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
{
	const struct inode *ino = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(ino);
	struct pci_dev *dev = dp->data;
	int pos = *ppos;
	int size = dev->cfg_size;
	int cnt;

	if (pos >= size)
		return 0;
	if (nbytes >= size)
		nbytes = size;
	if (pos + nbytes > size)
		nbytes = size - pos;
	cnt = nbytes;

	if (!access_ok(VERIFY_READ, buf, cnt))
		return -EINVAL;

	if ((pos & 1) && cnt) {
		unsigned char val;
		__get_user(val, buf);
		pci_user_write_config_byte(dev, pos, val);
		buf++;
		pos++;
		cnt--;
	}

	if ((pos & 3) && cnt > 2) {
		unsigned short val;
		__get_user(val, (unsigned short __user *) buf);
		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	while (cnt >= 4) {
		unsigned int val;
		__get_user(val, (unsigned int __user *) buf);
		pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
		buf += 4;
		pos += 4;
		cnt -= 4;
	}

	if (cnt >= 2) {
		unsigned short val;
		__get_user(val, (unsigned short __user *) buf);
		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	if (cnt) {
		unsigned char val;
		__get_user(val, buf);
		pci_user_write_config_byte(dev, pos, val);
		buf++;
		pos++;
		cnt--;
	}

	*ppos = pos;
	return nbytes;
}

struct pci_filp_private {
	enum pci_mmap_state mmap_state;
	int write_combine;
};

static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
	const struct proc_dir_entry *dp = PDE(inode);
	struct pci_dev *dev = dp->data;
#ifdef HAVE_PCI_MMAP
	struct pci_filp_private *fpriv = file->private_data;
#endif /* HAVE_PCI_MMAP */
	int ret = 0;

	switch (cmd) {
	case PCIIOC_CONTROLLER:
		ret = pci_domain_nr(dev->bus);
		break;

#ifdef HAVE_PCI_MMAP
	case PCIIOC_MMAP_IS_IO:
		fpriv->mmap_state = pci_mmap_io;
		break;

	case PCIIOC_MMAP_IS_MEM:
		fpriv->mmap_state = pci_mmap_mem;
		break;

	case PCIIOC_WRITE_COMBINE:
		if (arg)
			fpriv->write_combine = 1;
		else
			fpriv->write_combine = 0;
		break;

#endif /* HAVE_PCI_MMAP */

	default:
		ret = -EINVAL;
		break;
	};

	return ret;
}

#ifdef HAVE_PCI_MMAP
static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
{
	struct inode *inode = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(inode);
	struct pci_dev *dev = dp->data;
	struct pci_filp_private *fpriv = file->private_data;
	int ret;

	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;

	ret = pci_mmap_page_range(dev, vma,
				  fpriv->mmap_state,
				  fpriv->write_combine);
	if (ret < 0)
		return ret;

	return 0;
}

static int proc_bus_pci_open(struct inode *inode, struct file *file)
{
	struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);

	if (!fpriv)
		return -ENOMEM;

	fpriv->mmap_state = pci_mmap_io;
	fpriv->write_combine = 0;

	file->private_data = fpriv;

	return 0;
}

static int proc_bus_pci_release(struct inode *inode, struct file *file)
{
	kfree(file->private_data);
	file->private_data = NULL;

	return 0;
}
#endif /* HAVE_PCI_MMAP */

static struct file_operations proc_bus_pci_operations = {
	.llseek		= proc_bus_pci_lseek,
	.read		= proc_bus_pci_read,
	.write		= proc_bus_pci_write,
	.ioctl		= proc_bus_pci_ioctl,
#ifdef HAVE_PCI_MMAP
	.open		= proc_bus_pci_open,
	.release	= proc_bus_pci_release,
	.mmap		= proc_bus_pci_mmap,
#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
	.get_unmapped_area = get_pci_unmapped_area,
#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
#endif /* HAVE_PCI_MMAP */
};

#if BITS_PER_LONG == 32
#define LONG_FORMAT "\t%08lx"
#else
#define LONG_FORMAT "\t%16lx"
#endif

/* iterator */
static void *pci_seq_start(struct seq_file *m, loff_t *pos)
{
	struct pci_dev *dev = NULL;
	loff_t n = *pos;

	for_each_pci_dev(dev) {
		if (!n--)
			break;
	}
	return dev;
}

static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
{
	struct pci_dev *dev = v;

	(*pos)++;
	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
	return dev;
}

static void pci_seq_stop(struct seq_file *m, void *v)
{
	if (v) {
		struct pci_dev *dev = v;
		pci_dev_put(dev);
	}
}

static int show_device(struct seq_file *m, void *v)
{
	const struct pci_dev *dev = v;
	const struct pci_driver *drv;
	int i;

	if (dev == NULL)
		return 0;

	drv = pci_dev_driver(dev);
	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
			dev->bus->number,
			dev->devfn,
			dev->vendor,
			dev->device,
			dev->irq);
	/* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
	for (i=0; i<7; i++) {
		u64 start, end;
		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
		seq_printf(m, LONG_FORMAT,
			((unsigned long)start) |
			(dev->resource[i].flags & PCI_REGION_FLAG_MASK));
	}
	for (i=0; i<7; i++) {
		u64 start, end;
		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
		seq_printf(m, LONG_FORMAT,
			dev->resource[i].start < dev->resource[i].end ?
			(unsigned long)(end - start) + 1 : 0);
	}
	seq_putc(m, '\t');
	if (drv)
		seq_printf(m, "%s", drv->name);
	seq_putc(m, '\n');
	return 0;
}

static struct seq_operations proc_bus_pci_devices_op = {
	.start	= pci_seq_start,
	.next	= pci_seq_next,
	.stop	= pci_seq_stop,
	.show	= show_device
};

static struct proc_dir_entry *proc_bus_pci_dir;

int pci_proc_attach_device(struct pci_dev *dev)
{
	struct pci_bus *bus = dev->bus;
	struct proc_dir_entry *e;
	char name[16];

	if (!proc_initialized)
		return -EACCES;

	if (!bus->procdir) {
		if (pci_proc_domain(bus)) {
			sprintf(name, "%04x:%02x", pci_domain_nr(bus),
					bus->number);
		} else {
			sprintf(name, "%02x", bus->number);
		}
		bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
		if (!bus->procdir)
			return -ENOMEM;
	}

	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	e = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir);
	if (!e)
		return -ENOMEM;
	e->proc_fops = &proc_bus_pci_operations;
	e->data = dev;
	e->size = dev->cfg_size;
	dev->procent = e;

	return 0;
}

int pci_proc_detach_device(struct pci_dev *dev)
{
	struct proc_dir_entry *e;

	if ((e = dev->procent)) {
		if (atomic_read(&e->count))
			return -EBUSY;
		remove_proc_entry(e->name, dev->bus->procdir);
		dev->procent = NULL;
	}
	return 0;
}

int pci_proc_attach_bus(struct pci_bus* bus)
{
	struct proc_dir_entry *de = bus->procdir;

	if (!proc_initialized)
		return -EACCES;

	if (!de) {
		char name[16];
		sprintf(name, "%02x", bus->number);
		de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
		if (!de)
			return -ENOMEM;
	}
	return 0;
}

int pci_proc_detach_bus(struct pci_bus* bus)
{
	struct proc_dir_entry *de = bus->procdir;
	if (de)
		remove_proc_entry(de->name, proc_bus_pci_dir);
	return 0;
}

#ifdef CONFIG_PCI_LEGACY_PROC

/*
 *  Backward compatible /proc/pci interface.
 */

/*
 * Convert some of the configuration space registers of the device at
 * address (bus,devfn) into a string (possibly several lines each).
 * The configuration string is stored starting at buf[len].  If the
 * string would exceed the size of the buffer (SIZE), 0 is returned.
 */
static int show_dev_config(struct seq_file *m, void *v)
{
	struct pci_dev *dev = v;
	struct pci_dev *first_dev;
	struct pci_driver *drv;
	u32 class_rev;
	unsigned char latency, min_gnt, max_lat;
	int reg;

	first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
	if (dev == first_dev)
		seq_puts(m, "PCI devices found:\n");
	pci_dev_put(first_dev);

	drv = pci_dev_driver(dev);

	pci_user_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
	pci_user_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
	pci_user_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
	pci_user_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
	seq_printf(m, "  Bus %2d, device %3d, function %2d:\n",
	       dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	seq_printf(m, "    Class %04x", class_rev >> 16);
	seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
	seq_printf(m, " (rev %d).\n", class_rev & 0xff);

	if (dev->irq)
		seq_printf(m, "      IRQ %d.\n", dev->irq);

	if (latency || min_gnt || max_lat) {
		seq_printf(m, "      Master Capable.  ");
		if (latency)
			seq_printf(m, "Latency=%d.  ", latency);
		else
			seq_puts(m, "No bursts.  ");
		if (min_gnt)
			seq_printf(m, "Min Gnt=%d.", min_gnt);
		if (max_lat)
			seq_printf(m, "Max Lat=%d.", max_lat);
		seq_putc(m, '\n');
	}

	for (reg = 0; reg < 6; reg++) {
		struct resource *res = dev->resource + reg;
		unsigned long base, end, flags;

		base = res->start;
		end = res->end;
		flags = res->flags;
		if (!end)
			continue;

		if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
			seq_printf(m, "      I/O at 0x%lx [0x%lx].\n",
				base, end);
		} else {
			const char *pref, *type = "unknown";

			if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
				pref = "P";
			else
				pref = "Non-p";
			switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
			      case PCI_BASE_ADDRESS_MEM_TYPE_32:
				type = "32 bit"; break;
			      case PCI_BASE_ADDRESS_MEM_TYPE_1M:
				type = "20 bit"; break;
			      case PCI_BASE_ADDRESS_MEM_TYPE_64:
				type = "64 bit"; break;
			}
			seq_printf(m, "      %srefetchable %s memory at "
				       "0x%lx [0x%lx].\n", pref, type,
				       base,
				       end);
		}
	}
	return 0;
}

static struct seq_operations proc_pci_op = {
	.start	= pci_seq_start,
	.next	= pci_seq_next,
	.stop	= pci_seq_stop,
	.show	= show_dev_config
};

static int proc_pci_open(struct inode *inode, struct file *file)
{
	return seq_open(file, &proc_pci_op);
}
static struct file_operations proc_pci_operations = {
	.open		= proc_pci_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= seq_release,
};

static void legacy_proc_init(void)
{
	struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
	if (entry)
		entry->proc_fops = &proc_pci_operations;
}

#else

static void legacy_proc_init(void)
{

}

#endif /* CONFIG_PCI_LEGACY_PROC */

static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
{
	return seq_open(file, &proc_bus_pci_devices_op);
}
static struct file_operations proc_bus_pci_dev_operations = {
	.open		= proc_bus_pci_dev_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= seq_release,
};

static int __init pci_proc_init(void)
{
	struct proc_dir_entry *entry;
	struct pci_dev *dev = NULL;
	proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
	entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
	if (entry)
		entry->proc_fops = &proc_bus_pci_dev_operations;
	proc_initialized = 1;
	while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
		pci_proc_attach_device(dev);
	}
	legacy_proc_init();
	return 0;
}

__initcall(pci_proc_init);

#ifdef CONFIG_HOTPLUG
EXPORT_SYMBOL(pci_proc_attach_device);
EXPORT_SYMBOL(pci_proc_attach_bus);
EXPORT_SYMBOL(pci_proc_detach_bus);
#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
	3	*
	4	* Procfs interface for the PCI bus.
	5	*
	6	* Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
	7	*/
	8
	9	#include <linux/init.h>
	10	#include <linux/pci.h>
	11	#include <linux/module.h>
	12	#include <linux/proc_fs.h>
	13	#include <linux/seq_file.h>
	14	#include <linux/smp_lock.h>
	15
	16	#include <asm/uaccess.h>
	17	#include <asm/byteorder.h>
bc56b9e0	18	#include "pci.h"
1da177e4 LT	19
	20	static int proc_initialized; /* = 0 */
	21
	22	static loff_t
	23	proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
	24	{
	25	loff_t new = -1;
	26	struct inode *inode = file->f_dentry->d_inode;
	27
	28	down(&inode->i_sem);
	29	switch (whence) {
	30	case 0:
	31	new = off;
	32	break;
	33	case 1:
	34	new = file->f_pos + off;
	35	break;
	36	case 2:
	37	new = inode->i_size + off;
	38	break;
	39	}
	40	if (new < 0 \|\| new > inode->i_size)
	41	new = -EINVAL;
	42	else
	43	file->f_pos = new;
	44	up(&inode->i_sem);
	45	return new;
	46	}
	47
	48	static ssize_t
	49	proc_bus_pci_read(struct file file, char __user buf, size_t nbytes, loff_t *ppos)
	50	{
	51	const struct inode *ino = file->f_dentry->d_inode;
	52	const struct proc_dir_entry *dp = PDE(ino);
	53	struct pci_dev *dev = dp->data;
	54	unsigned int pos = *ppos;
	55	unsigned int cnt, size;
	56
	57	/*
	58	* Normal users can read only the standardized portion of the
	59	* configuration space as several chips lock up when trying to read
	60	* undefined locations (think of Intel PIIX4 as a typical example).
	61	*/
	62
	63	if (capable(CAP_SYS_ADMIN))
	64	size = dev->cfg_size;
	65	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
	66	size = 128;
	67	else
	68	size = 64;
	69
	70	if (pos >= size)
	71	return 0;
	72	if (nbytes >= size)
	73	nbytes = size;
	74	if (pos + nbytes > size)
	75	nbytes = size - pos;
	76	cnt = nbytes;
	77
	78	if (!access_ok(VERIFY_WRITE, buf, cnt))
	79	return -EINVAL;
	80
	81	if ((pos & 1) && cnt) {
	82	unsigned char val;
e04b0ea2	83	pci_user_read_config_byte(dev, pos, &val);
1da177e4 LT	84	__put_user(val, buf);
	85	buf++;
	86	pos++;
	87	cnt--;
	88	}
	89
	90	if ((pos & 3) && cnt > 2) {
	91	unsigned short val;
e04b0ea2	92	pci_user_read_config_word(dev, pos, &val);
1da177e4 LT	93	__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
	94	buf += 2;
	95	pos += 2;
	96	cnt -= 2;
	97	}
	98
	99	while (cnt >= 4) {
	100	unsigned int val;
e04b0ea2	101	pci_user_read_config_dword(dev, pos, &val);
1da177e4 LT	102	__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
	103	buf += 4;
	104	pos += 4;
	105	cnt -= 4;
	106	}
	107
	108	if (cnt >= 2) {
	109	unsigned short val;
e04b0ea2	110	pci_user_read_config_word(dev, pos, &val);
1da177e4 LT	111	__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
	112	buf += 2;
	113	pos += 2;
	114	cnt -= 2;
	115	}
	116
	117	if (cnt) {
	118	unsigned char val;
e04b0ea2	119	pci_user_read_config_byte(dev, pos, &val);
1da177e4 LT	120	__put_user(val, buf);
	121	buf++;
	122	pos++;
	123	cnt--;
	124	}
	125
	126	*ppos = pos;
	127	return nbytes;
	128	}
	129
	130	static ssize_t
	131	proc_bus_pci_write(struct file file, const char __user buf, size_t nbytes, loff_t *ppos)
	132	{
	133	const struct inode *ino = file->f_dentry->d_inode;
	134	const struct proc_dir_entry *dp = PDE(ino);
	135	struct pci_dev *dev = dp->data;
	136	int pos = *ppos;
	137	int size = dev->cfg_size;
	138	int cnt;
	139
	140	if (pos >= size)
	141	return 0;
	142	if (nbytes >= size)
	143	nbytes = size;
	144	if (pos + nbytes > size)
	145	nbytes = size - pos;
	146	cnt = nbytes;
	147
	148	if (!access_ok(VERIFY_READ, buf, cnt))
	149	return -EINVAL;
	150
	151	if ((pos & 1) && cnt) {
	152	unsigned char val;
	153	__get_user(val, buf);
e04b0ea2	154	pci_user_write_config_byte(dev, pos, val);
1da177e4 LT	155	buf++;
	156	pos++;
	157	cnt--;
	158	}
	159
	160	if ((pos & 3) && cnt > 2) {
	161	unsigned short val;
	162	__get_user(val, (unsigned short __user *) buf);
e04b0ea2	163	pci_user_write_config_word(dev, pos, le16_to_cpu(val));
1da177e4 LT	164	buf += 2;
	165	pos += 2;
	166	cnt -= 2;
	167	}
	168
	169	while (cnt >= 4) {
	170	unsigned int val;
	171	__get_user(val, (unsigned int __user *) buf);
e04b0ea2	172	pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
1da177e4 LT	173	buf += 4;
	174	pos += 4;
	175	cnt -= 4;
	176	}
	177
	178	if (cnt >= 2) {
	179	unsigned short val;
	180	__get_user(val, (unsigned short __user *) buf);
e04b0ea2	181	pci_user_write_config_word(dev, pos, le16_to_cpu(val));
1da177e4 LT	182	buf += 2;
	183	pos += 2;
	184	cnt -= 2;
	185	}
	186
	187	if (cnt) {
	188	unsigned char val;
	189	__get_user(val, buf);
e04b0ea2	190	pci_user_write_config_byte(dev, pos, val);
1da177e4 LT	191	buf++;
	192	pos++;
	193	cnt--;
	194	}
	195
	196	*ppos = pos;
	197	return nbytes;
	198	}
	199
	200	struct pci_filp_private {
	201	enum pci_mmap_state mmap_state;
	202	int write_combine;
	203	};
	204
	205	static int proc_bus_pci_ioctl(struct inode inode, struct file file, unsigned int cmd, unsigned long arg)
	206	{
	207	const struct proc_dir_entry *dp = PDE(inode);
	208	struct pci_dev *dev = dp->data;
	209	#ifdef HAVE_PCI_MMAP
	210	struct pci_filp_private *fpriv = file->private_data;
	211	#endif /* HAVE_PCI_MMAP */
	212	int ret = 0;
	213
	214	switch (cmd) {
	215	case PCIIOC_CONTROLLER:
	216	ret = pci_domain_nr(dev->bus);
	217	break;
	218
	219	#ifdef HAVE_PCI_MMAP
	220	case PCIIOC_MMAP_IS_IO:
	221	fpriv->mmap_state = pci_mmap_io;
	222	break;
	223
	224	case PCIIOC_MMAP_IS_MEM:
	225	fpriv->mmap_state = pci_mmap_mem;
	226	break;
	227
	228	case PCIIOC_WRITE_COMBINE:
	229	if (arg)
	230	fpriv->write_combine = 1;
	231	else
	232	fpriv->write_combine = 0;
	233	break;
	234
	235	#endif /* HAVE_PCI_MMAP */
	236
	237	default:
	238	ret = -EINVAL;
	239	break;
	240	};
	241
	242	return ret;
	243	}
	244
	245	#ifdef HAVE_PCI_MMAP
	246	static int proc_bus_pci_mmap(struct file file, struct vm_area_struct vma)
	247	{
	248	struct inode *inode = file->f_dentry->d_inode;
	249	const struct proc_dir_entry *dp = PDE(inode);
	250	struct pci_dev *dev = dp->data;
	251	struct pci_filp_private *fpriv = file->private_data;
	252	int ret;
	253
	254	if (!capable(CAP_SYS_RAWIO))
255	return -EPERM;
256
257	ret = pci_mmap_page_range(dev, vma,
258	fpriv->mmap_state,
259	fpriv->write_combine);
260	if (ret < 0)
261	return ret;
262
263	return 0;
264	}
265
266	static int proc_bus_pci_open(struct inode inode, struct file file)
267	{
268	struct pci_filp_private fpriv = kmalloc(sizeof(fpriv), GFP_KERNEL);
269
270	if (!fpriv)
271	return -ENOMEM;
272
273	fpriv->mmap_state = pci_mmap_io;
274	fpriv->write_combine = 0;
275
276	file->private_data = fpriv;
277
278	return 0;
279	}
280
281	static int proc_bus_pci_release(struct inode inode, struct file file)
282	{
283	kfree(file->private_data);
284	file->private_data = NULL;
285
286	return 0;
287	}
288	#endif /* HAVE_PCI_MMAP */
289
290	static struct file_operations proc_bus_pci_operations = {
291	.llseek = proc_bus_pci_lseek,
292	.read = proc_bus_pci_read,
293	.write = proc_bus_pci_write,
294	.ioctl = proc_bus_pci_ioctl,
295	#ifdef HAVE_PCI_MMAP
296	.open = proc_bus_pci_open,
297	.release = proc_bus_pci_release,
298	.mmap = proc_bus_pci_mmap,
299	#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
300	.get_unmapped_area = get_pci_unmapped_area,
301	#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
302	#endif /* HAVE_PCI_MMAP */
303	};
304
305	#if BITS_PER_LONG == 32
306	#define LONG_FORMAT "\t%08lx"
307	#else
308	#define LONG_FORMAT "\t%16lx"
309	#endif
310
311	/* iterator */
312	static void pci_seq_start(struct seq_file m, loff_t *pos)
313	{
314	struct pci_dev *dev = NULL;
315	loff_t n = *pos;
316
317	for_each_pci_dev(dev) {
318	if (!n--)
319	break;
320	}
321	return dev;
322	}
323
324	static void pci_seq_next(struct seq_file m, void v, loff_t pos)
325	{
326	struct pci_dev *dev = v;
327
328	(*pos)++;
329	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
330	return dev;
331	}
332
333	static void pci_seq_stop(struct seq_file m, void v)
334	{
335	if (v) {
336	struct pci_dev *dev = v;
337	pci_dev_put(dev);
338	}
339	}
340
341	static int show_device(struct seq_file m, void v)
342	{
343	const struct pci_dev *dev = v;
344	const struct pci_driver *drv;
345	int i;
346
347	if (dev == NULL)
348	return 0;
349
350	drv = pci_dev_driver(dev);
351	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
352	dev->bus->number,
353	dev->devfn,
354	dev->vendor,
355	dev->device,
356	dev->irq);
357	/* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
2311b1f2 ME	358	for (i=0; i<7; i++) {
	359	u64 start, end;
	360	pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
1da177e4	361	seq_printf(m, LONG_FORMAT,
2311b1f2	362	((unsigned long)start) \|
1da177e4	363	(dev->resource[i].flags & PCI_REGION_FLAG_MASK));
2311b1f2 ME	364	}
	365	for (i=0; i<7; i++) {
	366	u64 start, end;
	367	pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
1da177e4 LT	368	seq_printf(m, LONG_FORMAT,
1da177e4 LT	369	dev->resource[i].start < dev->resource[i].end ?
2311b1f2 ME	370	(unsigned long)(end - start) + 1 : 0);
2311b1f2 ME	371	}
1da177e4 LT	372	seq_putc(m, '\t');
	373	if (drv)
	374	seq_printf(m, "%s", drv->name);
	375	seq_putc(m, '\n');
	376	return 0;
	377	}
	378
	379	static struct seq_operations proc_bus_pci_devices_op = {
	380	.start = pci_seq_start,
	381	.next = pci_seq_next,
	382	.stop = pci_seq_stop,
	383	.show = show_device
	384	};
	385
	386	static struct proc_dir_entry *proc_bus_pci_dir;
	387
	388	int pci_proc_attach_device(struct pci_dev *dev)
	389	{
	390	struct pci_bus *bus = dev->bus;
	391	struct proc_dir_entry *e;
	392	char name[16];
	393
	394	if (!proc_initialized)
	395	return -EACCES;
	396
	397	if (!bus->procdir) {
	398	if (pci_proc_domain(bus)) {
	399	sprintf(name, "%04x:%02x", pci_domain_nr(bus),
	400	bus->number);
	401	} else {
	402	sprintf(name, "%02x", bus->number);
	403	}
	404	bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
	405	if (!bus->procdir)
	406	return -ENOMEM;
	407	}
	408
	409	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	410	e = create_proc_entry(name, S_IFREG \| S_IRUGO \| S_IWUSR, bus->procdir);
	411	if (!e)
	412	return -ENOMEM;
	413	e->proc_fops = &proc_bus_pci_operations;
	414	e->data = dev;
	415	e->size = dev->cfg_size;
	416	dev->procent = e;
	417
	418	return 0;
	419	}
	420
	421	int pci_proc_detach_device(struct pci_dev *dev)
	422	{
	423	struct proc_dir_entry *e;
	424
	425	if ((e = dev->procent)) {
	426	if (atomic_read(&e->count))
	427	return -EBUSY;
	428	remove_proc_entry(e->name, dev->bus->procdir);
	429	dev->procent = NULL;
	430	}
	431	return 0;
	432	}
	433
	434	int pci_proc_attach_bus(struct pci_bus* bus)
	435	{
436	struct proc_dir_entry *de = bus->procdir;
437
438	if (!proc_initialized)
439	return -EACCES;
440
441	if (!de) {
442	char name[16];
443	sprintf(name, "%02x", bus->number);
444	de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
445	if (!de)
446	return -ENOMEM;
447	}
448	return 0;
449	}
450
451	int pci_proc_detach_bus(struct pci_bus* bus)
452	{
453	struct proc_dir_entry *de = bus->procdir;
454	if (de)
455	remove_proc_entry(de->name, proc_bus_pci_dir);
456	return 0;
457	}
458
459	#ifdef CONFIG_PCI_LEGACY_PROC
460
461	/*
462	* Backward compatible /proc/pci interface.
463	*/
464
465	/*
466	* Convert some of the configuration space registers of the device at
467	* address (bus,devfn) into a string (possibly several lines each).
468	* The configuration string is stored starting at buf[len]. If the
469	* string would exceed the size of the buffer (SIZE), 0 is returned.
470	*/
471	static int show_dev_config(struct seq_file m, void v)
472	{
473	struct pci_dev *dev = v;
474	struct pci_dev *first_dev;
475	struct pci_driver *drv;
476	u32 class_rev;
982245f0	477	unsigned char latency, min_gnt, max_lat;
1da177e4 LT	478	int reg;
	479
	480	first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
	481	if (dev == first_dev)
	482	seq_puts(m, "PCI devices found:\n");
	483	pci_dev_put(first_dev);
	484
	485	drv = pci_dev_driver(dev);
	486
e04b0ea2 BK	487	pci_user_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
	488	pci_user_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
	489	pci_user_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
	490	pci_user_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
1da177e4 LT	491	seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
1da177e4 LT	492	dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
982245f0	493	seq_printf(m, " Class %04x", class_rev >> 16);
1da177e4	494	seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
1da177e4 LT	495	seq_printf(m, " (rev %d).\n", class_rev & 0xff);
	496
	497	if (dev->irq)
	498	seq_printf(m, " IRQ %d.\n", dev->irq);
	499
	500	if (latency \|\| min_gnt \|\| max_lat) {
	501	seq_printf(m, " Master Capable. ");
	502	if (latency)
	503	seq_printf(m, "Latency=%d. ", latency);
	504	else
	505	seq_puts(m, "No bursts. ");
	506	if (min_gnt)
	507	seq_printf(m, "Min Gnt=%d.", min_gnt);
	508	if (max_lat)
	509	seq_printf(m, "Max Lat=%d.", max_lat);
	510	seq_putc(m, '\n');
	511	}
	512
	513	for (reg = 0; reg < 6; reg++) {
	514	struct resource *res = dev->resource + reg;
	515	unsigned long base, end, flags;
	516
	517	base = res->start;
	518	end = res->end;
	519	flags = res->flags;
	520	if (!end)
	521	continue;
	522
	523	if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
	524	seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
	525	base, end);
	526	} else {
	527	const char pref, type = "unknown";
	528
	529	if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
	530	pref = "P";
	531	else
	532	pref = "Non-p";
	533	switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
	534	case PCI_BASE_ADDRESS_MEM_TYPE_32:
	535	type = "32 bit"; break;
	536	case PCI_BASE_ADDRESS_MEM_TYPE_1M:
	537	type = "20 bit"; break;
	538	case PCI_BASE_ADDRESS_MEM_TYPE_64:
	539	type = "64 bit"; break;
	540	}
	541	seq_printf(m, " %srefetchable %s memory at "
	542	"0x%lx [0x%lx].\n", pref, type,
	543	base,
	544	end);
	545	}
	546	}
	547	return 0;
	548	}
	549
	550	static struct seq_operations proc_pci_op = {
	551	.start = pci_seq_start,
	552	.next = pci_seq_next,
	553	.stop = pci_seq_stop,
	554	.show = show_dev_config
	555	};
	556
	557	static int proc_pci_open(struct inode inode, struct file file)
	558	{
559	return seq_open(file, &proc_pci_op);
560	}
561	static struct file_operations proc_pci_operations = {
562	.open = proc_pci_open,
563	.read = seq_read,
564	.llseek = seq_lseek,
565	.release = seq_release,
566	};
567
568	static void legacy_proc_init(void)
569	{
570	struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
571	if (entry)
572	entry->proc_fops = &proc_pci_operations;
573	}
574
575	#else
576
577	static void legacy_proc_init(void)
578	{
579
580	}
581
582	#endif /* CONFIG_PCI_LEGACY_PROC */
583
584	static int proc_bus_pci_dev_open(struct inode inode, struct file file)
585	{
586	return seq_open(file, &proc_bus_pci_devices_op);
587	}
588	static struct file_operations proc_bus_pci_dev_operations = {
589	.open = proc_bus_pci_dev_open,
590	.read = seq_read,
591	.llseek = seq_lseek,
592	.release = seq_release,
593	};
594
595	static int __init pci_proc_init(void)
596	{
597	struct proc_dir_entry *entry;
598	struct pci_dev *dev = NULL;
599	proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
600	entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
601	if (entry)
602	entry->proc_fops = &proc_bus_pci_dev_operations;
603	proc_initialized = 1;
604	while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
605	pci_proc_attach_device(dev);
606	}
607	legacy_proc_init();
608	return 0;
609	}
610
611	__initcall(pci_proc_init);
612
613	#ifdef CONFIG_HOTPLUG
614	EXPORT_SYMBOL(pci_proc_attach_device);
615	EXPORT_SYMBOL(pci_proc_attach_bus);
616	EXPORT_SYMBOL(pci_proc_detach_bus);
617	#endif
618