[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / pci-sysfs.c

/*
 * drivers/pci/pci-sysfs.c
 *
 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
 * (C) Copyright 2002-2004 IBM Corp.
 * (C) Copyright 2003 Matthew Wilcox
 * (C) Copyright 2003 Hewlett-Packard
 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
 *
 * File attributes for PCI devices
 *
 * Modeled after usb's driverfs.c 
 *
 */


#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/stat.h>
#include <linux/topology.h>
#include <linux/mm.h>

#include "pci.h"

static int sysfs_initialized;	/* = 0 */

/* show configuration fields */
#define pci_config_attr(field, format_string)				\
static ssize_t								\
field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
{									\
	struct pci_dev *pdev;						\
									\
	pdev = to_pci_dev (dev);					\
	return sprintf (buf, format_string, pdev->field);		\
}

pci_config_attr(vendor, "0x%04x\n");
pci_config_attr(device, "0x%04x\n");
pci_config_attr(subsystem_vendor, "0x%04x\n");
pci_config_attr(subsystem_device, "0x%04x\n");
pci_config_attr(class, "0x%06x\n");
pci_config_attr(irq, "%u\n");
pci_config_attr(is_enabled, "%u\n");

static ssize_t broken_parity_status_show(struct device *dev,
					 struct device_attribute *attr,
					 char *buf)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	return sprintf (buf, "%u\n", pdev->broken_parity_status);
}

static ssize_t broken_parity_status_store(struct device *dev,
					  struct device_attribute *attr,
					  const char *buf, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	ssize_t consumed = -EINVAL;

	if ((count > 0) && (*buf == '0' || *buf == '1')) {
		pdev->broken_parity_status = *buf == '1' ? 1 : 0;
		consumed = count;
	}
	return consumed;
}

static ssize_t local_cpus_show(struct device *dev,
			struct device_attribute *attr, char *buf)
{		
	cpumask_t mask;
	int len;

	mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
	strcat(buf,"\n"); 
	return 1+len;
}

/* show resources */
static ssize_t
resource_show(struct device * dev, struct device_attribute *attr, char * buf)
{
	struct pci_dev * pci_dev = to_pci_dev(dev);
	char * str = buf;
	int i;
	int max = 7;
	u64 start, end;

	if (pci_dev->subordinate)
		max = DEVICE_COUNT_RESOURCE;

	for (i = 0; i < max; i++) {
		struct resource *res =  &pci_dev->resource[i];
		pci_resource_to_user(pci_dev, i, res, &start, &end);
		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
			       (unsigned long long)start,
			       (unsigned long long)end,
			       (unsigned long long)res->flags);
	}
	return (str - buf);
}

static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct pci_dev *pci_dev = to_pci_dev(dev);

	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
		       pci_dev->vendor, pci_dev->device,
		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
		       (u8)(pci_dev->class));
}
static ssize_t
is_enabled_store(struct device *dev, struct device_attribute *attr,
		const char *buf, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(dev);

	/* this can crash the machine when done on the "wrong" device */
	if (!capable(CAP_SYS_ADMIN))
		return count;

	if (*buf == '0')
		pci_disable_device(pdev);

	if (*buf == '1')
		pci_enable_device(pdev);

	return count;
}


struct device_attribute pci_dev_attrs[] = {
	__ATTR_RO(resource),
	__ATTR_RO(vendor),
	__ATTR_RO(device),
	__ATTR_RO(subsystem_vendor),
	__ATTR_RO(subsystem_device),
	__ATTR_RO(class),
	__ATTR_RO(irq),
	__ATTR_RO(local_cpus),
	__ATTR_RO(modalias),
	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
	__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
		broken_parity_status_show,broken_parity_status_store),
	__ATTR_NULL,
};

static ssize_t
pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = 64;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	/* Several chips lock up trying to read undefined config space */
	if (capable(CAP_SYS_ADMIN)) {
		size = dev->cfg_size;
	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
		size = 128;
	}

	if (off > size)
		return 0;
	if (off + count > size) {
		size -= off;
		count = size;
	} else {
		size = count;
	}

	if ((off & 1) && size) {
		u8 val;
		pci_user_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		size--;
	}

	if ((off & 3) && size > 2) {
		u16 val;
		pci_user_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	while (size > 3) {
		u32 val;
		pci_user_read_config_dword(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		data[off - init_off + 2] = (val >> 16) & 0xff;
		data[off - init_off + 3] = (val >> 24) & 0xff;
		off += 4;
		size -= 4;
	}

	if (size >= 2) {
		u16 val;
		pci_user_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	if (size > 0) {
		u8 val;
		pci_user_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		--size;
	}

	return count;
}

static ssize_t
pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = count;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	if (off > dev->cfg_size)
		return 0;
	if (off + count > dev->cfg_size) {
		size = dev->cfg_size - off;
		count = size;
	}
	
	if ((off & 1) && size) {
		pci_user_write_config_byte(dev, off, data[off - init_off]);
		off++;
		size--;
	}
	
	if ((off & 3) && size > 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
                pci_user_write_config_word(dev, off, val);
                off += 2;
                size -= 2;
        }

	while (size > 3) {
		u32 val = data[off - init_off];
		val |= (u32) data[off - init_off + 1] << 8;
		val |= (u32) data[off - init_off + 2] << 16;
		val |= (u32) data[off - init_off + 3] << 24;
		pci_user_write_config_dword(dev, off, val);
		off += 4;
		size -= 4;
	}
	
	if (size >= 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
		pci_user_write_config_word(dev, off, val);
		off += 2;
		size -= 2;
	}

	if (size) {
		pci_user_write_config_byte(dev, off, data[off - init_off]);
		off++;
		--size;
	}

	return count;
}

#ifdef HAVE_PCI_LEGACY
/**
 * pci_read_legacy_io - read byte(s) from legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer to store results
 * @off: offset into legacy I/O port space
 * @count: number of bytes to read
 *
 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_read).
 */
ssize_t
pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_read(bus, off, (u32 *)buf, count);
}

/**
 * pci_write_legacy_io - write byte(s) to legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer containing value to be written
 * @off: offset into legacy I/O port space
 * @count: number of bytes to write
 *
 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_write).
 */
ssize_t
pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
						      struct class_device,
						      kobj));
        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_write(bus, off, *(u32 *)buf, count);
}

/**
 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
 * @kobj: kobject corresponding to device to be mapped
 * @attr: struct bin_attribute for this file
 * @vma: struct vm_area_struct passed to mmap
 *
 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
 * legacy memory space (first meg of bus space) into application virtual
 * memory space.
 */
int
pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
                    struct vm_area_struct *vma)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        return pci_mmap_legacy_page_range(bus, vma);
}
#endif /* HAVE_PCI_LEGACY */

#ifdef HAVE_PCI_MMAP
/**
 * pci_mmap_resource - map a PCI resource into user memory space
 * @kobj: kobject for mapping
 * @attr: struct bin_attribute for the file being mapped
 * @vma: struct vm_area_struct passed into the mmap
 *
 * Use the regular PCI mapping routines to map a PCI resource into userspace.
 * FIXME: write combining?  maybe automatic for prefetchable regions?
 */
static int
pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
		  struct vm_area_struct *vma)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
						       struct device, kobj));
	struct resource *res = (struct resource *)attr->private;
	enum pci_mmap_state mmap_type;
	u64 start, end;
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++)
		if (res == &pdev->resource[i])
			break;
	if (i >= PCI_ROM_RESOURCE)
		return -ENODEV;

	/* pci_mmap_page_range() expects the same kind of entry as coming
	 * from /proc/bus/pci/ which is a "user visible" value. If this is
	 * different from the resource itself, arch will do necessary fixup.
	 */
	pci_resource_to_user(pdev, i, res, &start, &end);
	vma->vm_pgoff += start >> PAGE_SHIFT;
	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;

	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
}

/**
 * pci_create_resource_files - create resource files in sysfs for @dev
 * @dev: dev in question
 *
 * Walk the resources in @dev creating files for each resource available.
 */
static void
pci_create_resource_files(struct pci_dev *pdev)
{
	int i;

	/* Expose the PCI resources from this device as files */
	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		/* skip empty resources */
		if (!pci_resource_len(pdev, i))
			continue;

		/* allocate attribute structure, piggyback attribute name */
		res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
		if (res_attr) {
			char *res_attr_name = (char *)(res_attr + 1);

			pdev->res_attr[i] = res_attr;
			sprintf(res_attr_name, "resource%d", i);
			res_attr->attr.name = res_attr_name;
			res_attr->attr.mode = S_IRUSR | S_IWUSR;
			res_attr->attr.owner = THIS_MODULE;
			res_attr->size = pci_resource_len(pdev, i);
			res_attr->mmap = pci_mmap_resource;
			res_attr->private = &pdev->resource[i];
			sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
		}
	}
}

/**
 * pci_remove_resource_files - cleanup resource files
 * @dev: dev to cleanup
 *
 * If we created resource files for @dev, remove them from sysfs and
 * free their resources.
 */
static void
pci_remove_resource_files(struct pci_dev *pdev)
{
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		res_attr = pdev->res_attr[i];
		if (res_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
			kfree(res_attr);
		}
	}
}
#else /* !HAVE_PCI_MMAP */
static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
#endif /* HAVE_PCI_MMAP */

/**
 * pci_write_rom - used to enable access to the PCI ROM display
 * @kobj: kernel object handle
 * @buf: user input
 * @off: file offset
 * @count: number of byte in input
 *
 * writing anything except 0 enables it
 */
static ssize_t
pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));

	if ((off ==  0) && (*buf == '0') && (count == 2))
		pdev->rom_attr_enabled = 0;
	else
		pdev->rom_attr_enabled = 1;

	return count;
}

/**
 * pci_read_rom - read a PCI ROM
 * @kobj: kernel object handle
 * @buf: where to put the data we read from the ROM
 * @off: file offset
 * @count: number of bytes to read
 *
 * Put @count bytes starting at @off into @buf from the ROM in the PCI
 * device corresponding to @kobj.
 */
static ssize_t
pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	void __iomem *rom;
	size_t size;

	if (!pdev->rom_attr_enabled)
		return -EINVAL;
	
	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
	if (!rom)
		return 0;
		
	if (off >= size)
		count = 0;
	else {
		if (off + count > size)
			count = size - off;
		
		memcpy_fromio(buf, rom + off, count);
	}
	pci_unmap_rom(pdev, rom);
		
	return count;
}

static struct bin_attribute pci_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 256,
	.read = pci_read_config,
	.write = pci_write_config,
};

static struct bin_attribute pcie_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 4096,
	.read = pci_read_config,
	.write = pci_write_config,
};

int pci_create_sysfs_dev_files (struct pci_dev *pdev)
{
	if (!sysfs_initialized)
		return -EACCES;

	if (pdev->cfg_size < 4096)
		sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_create_resource_files(pdev);

	/* If the device has a ROM, try to expose it in sysfs. */
	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		struct bin_attribute *rom_attr;
		
		rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
		if (rom_attr) {
			pdev->rom_attr = rom_attr;
			rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
			rom_attr->attr.name = "rom";
			rom_attr->attr.mode = S_IRUSR;
			rom_attr->attr.owner = THIS_MODULE;
			rom_attr->read = pci_read_rom;
			rom_attr->write = pci_write_rom;
			sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
		}
	}
	/* add platform-specific attributes */
	pcibios_add_platform_entries(pdev);
	
	return 0;
}

/**
 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
 * @pdev: device whose entries we should free
 *
 * Cleanup when @pdev is removed from sysfs.
 */
void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
{
	if (pdev->cfg_size < 4096)
		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_remove_resource_files(pdev);

	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		if (pdev->rom_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
			kfree(pdev->rom_attr);
		}
	}
}

static int __init pci_sysfs_init(void)
{
	struct pci_dev *pdev = NULL;
	
	sysfs_initialized = 1;
	for_each_pci_dev(pdev)
		pci_create_sysfs_dev_files(pdev);

	return 0;
}

__initcall(pci_sysfs_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* drivers/pci/pci-sysfs.c
	3	*
	4	* (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
	5	* (C) Copyright 2002-2004 IBM Corp.
	6	* (C) Copyright 2003 Matthew Wilcox
	7	* (C) Copyright 2003 Hewlett-Packard
	8	* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
	9	* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
	10	*
	11	* File attributes for PCI devices
	12	*
	13	* Modeled after usb's driverfs.c
	14	*
	15	*/
	16
	17
	18	#include <linux/config.h>
	19	#include <linux/kernel.h>
	20	#include <linux/pci.h>
	21	#include <linux/stat.h>
	22	#include <linux/topology.h>
	23	#include <linux/mm.h>
	24
	25	#include "pci.h"
	26
	27	static int sysfs_initialized; /* = 0 */
	28
	29	/* show configuration fields */
	30	#define pci_config_attr(field, format_string) \
	31	static ssize_t \
e404e274	32	field##_show(struct device dev, struct device_attribute attr, char *buf) \
1da177e4 LT	33	{ \
	34	struct pci_dev *pdev; \
	35	\
	36	pdev = to_pci_dev (dev); \
	37	return sprintf (buf, format_string, pdev->field); \
	38	}
	39
	40	pci_config_attr(vendor, "0x%04x\n");
	41	pci_config_attr(device, "0x%04x\n");
	42	pci_config_attr(subsystem_vendor, "0x%04x\n");
	43	pci_config_attr(subsystem_device, "0x%04x\n");
	44	pci_config_attr(class, "0x%06x\n");
	45	pci_config_attr(irq, "%u\n");
9f125d30	46	pci_config_attr(is_enabled, "%u\n");
1da177e4	47
bdee9d98 DT	48	static ssize_t broken_parity_status_show(struct device *dev,
	49	struct device_attribute *attr,
	50	char *buf)
	51	{
	52	struct pci_dev *pdev = to_pci_dev(dev);
	53	return sprintf (buf, "%u\n", pdev->broken_parity_status);
	54	}
	55
	56	static ssize_t broken_parity_status_store(struct device *dev,
	57	struct device_attribute *attr,
	58	const char *buf, size_t count)
	59	{
	60	struct pci_dev *pdev = to_pci_dev(dev);
	61	ssize_t consumed = -EINVAL;
	62
	63	if ((count > 0) && (buf == '0' \|\| buf == '1')) {
	64	pdev->broken_parity_status = *buf == '1' ? 1 : 0;
	65	consumed = count;
	66	}
	67	return consumed;
	68	}
	69
4327edf6 AC	70	static ssize_t local_cpus_show(struct device *dev,
4327edf6 AC	71	struct device_attribute attr, char buf)
1da177e4	72	{
4327edf6 AC	73	cpumask_t mask;
	74	int len;
	75
	76	mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	77	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4 LT	78	strcat(buf,"\n");
	79	return 1+len;
	80	}
	81
	82	/* show resources */
	83	static ssize_t
e404e274	84	resource_show(struct device * dev, struct device_attribute attr, char buf)
1da177e4 LT	85	{
	86	struct pci_dev * pci_dev = to_pci_dev(dev);
	87	char * str = buf;
	88	int i;
	89	int max = 7;
2311b1f2	90	u64 start, end;
1da177e4 LT	91
	92	if (pci_dev->subordinate)
	93	max = DEVICE_COUNT_RESOURCE;
	94
	95	for (i = 0; i < max; i++) {
2311b1f2 ME	96	struct resource *res = &pci_dev->resource[i];
	97	pci_resource_to_user(pci_dev, i, res, &start, &end);
	98	str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
	99	(unsigned long long)start,
	100	(unsigned long long)end,
	101	(unsigned long long)res->flags);
1da177e4 LT	102	}
	103	return (str - buf);
	104	}
	105
87c8a443	106	static ssize_t modalias_show(struct device dev, struct device_attribute attr, char *buf)
9888549e GKH	107	{
	108	struct pci_dev *pci_dev = to_pci_dev(dev);
	109
	110	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
	111	pci_dev->vendor, pci_dev->device,
	112	pci_dev->subsystem_vendor, pci_dev->subsystem_device,
	113	(u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
	114	(u8)(pci_dev->class));
	115	}
9f125d30 AV	116	static ssize_t
	117	is_enabled_store(struct device dev, struct device_attribute attr,
	118	const char *buf, size_t count)
	119	{
	120	struct pci_dev *pdev = to_pci_dev(dev);
	121
	122	/* this can crash the machine when done on the "wrong" device */
	123	if (!capable(CAP_SYS_ADMIN))
	124	return count;
	125
	126	if (*buf == '0')
	127	pci_disable_device(pdev);
	128
	129	if (*buf == '1')
	130	pci_enable_device(pdev);
	131
	132	return count;
	133	}
	134
9888549e	135
1da177e4 LT	136	struct device_attribute pci_dev_attrs[] = {
	137	__ATTR_RO(resource),
	138	__ATTR_RO(vendor),
	139	__ATTR_RO(device),
	140	__ATTR_RO(subsystem_vendor),
	141	__ATTR_RO(subsystem_device),
	142	__ATTR_RO(class),
	143	__ATTR_RO(irq),
	144	__ATTR_RO(local_cpus),
9888549e	145	__ATTR_RO(modalias),
9f125d30	146	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98 DT	147	__ATTR(broken_parity_status,(S_IRUGO\|S_IWUSR),
bdee9d98 DT	148	broken_parity_status_show,broken_parity_status_store),
1da177e4 LT	149	__ATTR_NULL,
	150	};
	151
	152	static ssize_t
	153	pci_read_config(struct kobject kobj, char buf, loff_t off, size_t count)
	154	{
	155	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	156	unsigned int size = 64;
	157	loff_t init_off = off;
4c0619ad	158	u8 data = (u8) buf;
1da177e4 LT	159
	160	/* Several chips lock up trying to read undefined config space */
	161	if (capable(CAP_SYS_ADMIN)) {
	162	size = dev->cfg_size;
	163	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
	164	size = 128;
	165	}
	166
	167	if (off > size)
	168	return 0;
	169	if (off + count > size) {
	170	size -= off;
	171	count = size;
	172	} else {
	173	size = count;
	174	}
	175
4c0619ad SS	176	if ((off & 1) && size) {
4c0619ad SS	177	u8 val;
e04b0ea2	178	pci_user_read_config_byte(dev, off, &val);
4c0619ad	179	data[off - init_off] = val;
1da177e4	180	off++;
4c0619ad SS	181	size--;
	182	}
	183
	184	if ((off & 3) && size > 2) {
	185	u16 val;
e04b0ea2	186	pci_user_read_config_word(dev, off, &val);
4c0619ad SS	187	data[off - init_off] = val & 0xff;
	188	data[off - init_off + 1] = (val >> 8) & 0xff;
	189	off += 2;
	190	size -= 2;
1da177e4 LT	191	}
	192
	193	while (size > 3) {
4c0619ad	194	u32 val;
e04b0ea2	195	pci_user_read_config_dword(dev, off, &val);
4c0619ad SS	196	data[off - init_off] = val & 0xff;
	197	data[off - init_off + 1] = (val >> 8) & 0xff;
	198	data[off - init_off + 2] = (val >> 16) & 0xff;
	199	data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4 LT	200	off += 4;
	201	size -= 4;
	202	}
	203
4c0619ad SS	204	if (size >= 2) {
4c0619ad SS	205	u16 val;
e04b0ea2	206	pci_user_read_config_word(dev, off, &val);
4c0619ad SS	207	data[off - init_off] = val & 0xff;
	208	data[off - init_off + 1] = (val >> 8) & 0xff;
	209	off += 2;
	210	size -= 2;
	211	}
	212
	213	if (size > 0) {
	214	u8 val;
e04b0ea2	215	pci_user_read_config_byte(dev, off, &val);
4c0619ad	216	data[off - init_off] = val;
1da177e4 LT	217	off++;
	218	--size;
	219	}
	220
	221	return count;
	222	}
	223
	224	static ssize_t
	225	pci_write_config(struct kobject kobj, char buf, loff_t off, size_t count)
	226	{
	227	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	228	unsigned int size = count;
	229	loff_t init_off = off;
4c0619ad	230	u8 data = (u8) buf;
1da177e4 LT	231
	232	if (off > dev->cfg_size)
	233	return 0;
	234	if (off + count > dev->cfg_size) {
	235	size = dev->cfg_size - off;
	236	count = size;
	237	}
4c0619ad SS	238
4c0619ad SS	239	if ((off & 1) && size) {
e04b0ea2	240	pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4	241	off++;
4c0619ad	242	size--;
1da177e4	243	}
4c0619ad SS	244
	245	if ((off & 3) && size > 2) {
	246	u16 val = data[off - init_off];
	247	val \|= (u16) data[off - init_off + 1] << 8;
e04b0ea2	248	pci_user_write_config_word(dev, off, val);
4c0619ad SS	249	off += 2;
	250	size -= 2;
	251	}
1da177e4 LT	252
1da177e4 LT	253	while (size > 3) {
4c0619ad SS	254	u32 val = data[off - init_off];
	255	val \|= (u32) data[off - init_off + 1] << 8;
	256	val \|= (u32) data[off - init_off + 2] << 16;
	257	val \|= (u32) data[off - init_off + 3] << 24;
e04b0ea2	258	pci_user_write_config_dword(dev, off, val);
1da177e4 LT	259	off += 4;
	260	size -= 4;
	261	}
4c0619ad SS	262
	263	if (size >= 2) {
	264	u16 val = data[off - init_off];
	265	val \|= (u16) data[off - init_off + 1] << 8;
e04b0ea2	266	pci_user_write_config_word(dev, off, val);
4c0619ad SS	267	off += 2;
	268	size -= 2;
	269	}
1da177e4	270
4c0619ad	271	if (size) {
e04b0ea2	272	pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 LT	273	off++;
	274	--size;
	275	}
	276
	277	return count;
	278	}
	279
	280	#ifdef HAVE_PCI_LEGACY
	281	/**
	282	* pci_read_legacy_io - read byte(s) from legacy I/O port space
	283	* @kobj: kobject corresponding to file to read from
	284	* @buf: buffer to store results
	285	* @off: offset into legacy I/O port space
	286	* @count: number of bytes to read
	287	*
	288	* Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	289	* callback routine (pci_legacy_read).
	290	*/
	291	ssize_t
	292	pci_read_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	293	{
	294	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	295	struct class_device,
	296	kobj));
	297
	298	/* Only support 1, 2 or 4 byte accesses */
	299	if (count != 1 && count != 2 && count != 4)
	300	return -EINVAL;
	301
	302	return pci_legacy_read(bus, off, (u32 *)buf, count);
	303	}
	304
	305	/**
	306	* pci_write_legacy_io - write byte(s) to legacy I/O port space
	307	* @kobj: kobject corresponding to file to read from
	308	* @buf: buffer containing value to be written
	309	* @off: offset into legacy I/O port space
	310	* @count: number of bytes to write
	311	*
	312	* Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	313	* callback routine (pci_legacy_write).
	314	*/
	315	ssize_t
	316	pci_write_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	317	{
	318	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	319	struct class_device,
	320	kobj));
	321	/* Only support 1, 2 or 4 byte accesses */
	322	if (count != 1 && count != 2 && count != 4)
	323	return -EINVAL;
	324
	325	return pci_legacy_write(bus, off, (u32 )buf, count);
	326	}
	327
	328	/**
	329	* pci_mmap_legacy_mem - map legacy PCI memory into user memory space
	330	* @kobj: kobject corresponding to device to be mapped
	331	* @attr: struct bin_attribute for this file
	332	* @vma: struct vm_area_struct passed to mmap
	333	*
	334	* Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
	335	* legacy memory space (first meg of bus space) into application virtual
	336	* memory space.
337	*/
338	int
339	pci_mmap_legacy_mem(struct kobject kobj, struct bin_attribute attr,
340	struct vm_area_struct *vma)
341	{
342	struct pci_bus *bus = to_pci_bus(container_of(kobj,
343	struct class_device,
344	kobj));
345
346	return pci_mmap_legacy_page_range(bus, vma);
347	}
348	#endif /* HAVE_PCI_LEGACY */
349
350	#ifdef HAVE_PCI_MMAP
351	/**
352	* pci_mmap_resource - map a PCI resource into user memory space
353	* @kobj: kobject for mapping
354	* @attr: struct bin_attribute for the file being mapped
355	* @vma: struct vm_area_struct passed into the mmap
356	*
357	* Use the regular PCI mapping routines to map a PCI resource into userspace.
358	* FIXME: write combining? maybe automatic for prefetchable regions?
359	*/
360	static int
361	pci_mmap_resource(struct kobject kobj, struct bin_attribute attr,
362	struct vm_area_struct *vma)
363	{
364	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
365	struct device, kobj));
366	struct resource res = (struct resource )attr->private;
367	enum pci_mmap_state mmap_type;
2311b1f2 ME	368	u64 start, end;
2311b1f2 ME	369	int i;
1da177e4	370
2311b1f2 ME	371	for (i = 0; i < PCI_ROM_RESOURCE; i++)
	372	if (res == &pdev->resource[i])
	373	break;
	374	if (i >= PCI_ROM_RESOURCE)
	375	return -ENODEV;
	376
	377	/* pci_mmap_page_range() expects the same kind of entry as coming
	378	* from /proc/bus/pci/ which is a "user visible" value. If this is
	379	* different from the resource itself, arch will do necessary fixup.
	380	*/
	381	pci_resource_to_user(pdev, i, res, &start, &end);
	382	vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4 LT	383	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
	384
	385	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
	386	}
	387
	388	/**
	389	* pci_create_resource_files - create resource files in sysfs for @dev
	390	* @dev: dev in question
	391	*
	392	* Walk the resources in @dev creating files for each resource available.
	393	*/
	394	static void
	395	pci_create_resource_files(struct pci_dev *pdev)
	396	{
	397	int i;
	398
	399	/* Expose the PCI resources from this device as files */
	400	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	401	struct bin_attribute *res_attr;
	402
	403	/* skip empty resources */
	404	if (!pci_resource_len(pdev, i))
	405	continue;
	406
d48593bf	407	/* allocate attribute structure, piggyback attribute name */
656da9da	408	res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4	409	if (res_attr) {
d48593bf DT	410	char res_attr_name = (char )(res_attr + 1);
d48593bf DT	411
1da177e4	412	pdev->res_attr[i] = res_attr;
d48593bf DT	413	sprintf(res_attr_name, "resource%d", i);
d48593bf DT	414	res_attr->attr.name = res_attr_name;
1da177e4 LT	415	res_attr->attr.mode = S_IRUSR \| S_IWUSR;
1da177e4 LT	416	res_attr->attr.owner = THIS_MODULE;
d48593bf	417	res_attr->size = pci_resource_len(pdev, i);
1da177e4 LT	418	res_attr->mmap = pci_mmap_resource;
	419	res_attr->private = &pdev->resource[i];
	420	sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
	421	}
	422	}
	423	}
	424
	425	/**
	426	* pci_remove_resource_files - cleanup resource files
	427	* @dev: dev to cleanup
	428	*
	429	* If we created resource files for @dev, remove them from sysfs and
	430	* free their resources.
	431	*/
	432	static void
	433	pci_remove_resource_files(struct pci_dev *pdev)
	434	{
	435	int i;
	436
	437	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	438	struct bin_attribute *res_attr;
	439
	440	res_attr = pdev->res_attr[i];
	441	if (res_attr) {
	442	sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
	443	kfree(res_attr);
	444	}
	445	}
	446	}
	447	#else /* !HAVE_PCI_MMAP */
	448	static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
	449	static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
	450	#endif /* HAVE_PCI_MMAP */
	451
	452	/**
	453	* pci_write_rom - used to enable access to the PCI ROM display
	454	* @kobj: kernel object handle
	455	* @buf: user input
	456	* @off: file offset
	457	* @count: number of byte in input
	458	*
	459	* writing anything except 0 enables it
	460	*/
	461	static ssize_t
	462	pci_write_rom(struct kobject kobj, char buf, loff_t off, size_t count)
	463	{
	464	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	465
	466	if ((off == 0) && (*buf == '0') && (count == 2))
	467	pdev->rom_attr_enabled = 0;
	468	else
	469	pdev->rom_attr_enabled = 1;
	470
	471	return count;
	472	}
	473
	474	/**
	475	* pci_read_rom - read a PCI ROM
	476	* @kobj: kernel object handle
	477	* @buf: where to put the data we read from the ROM
	478	* @off: file offset
	479	* @count: number of bytes to read
	480	*
	481	* Put @count bytes starting at @off into @buf from the ROM in the PCI
482	* device corresponding to @kobj.
483	*/
484	static ssize_t
485	pci_read_rom(struct kobject kobj, char buf, loff_t off, size_t count)
486	{
487	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
488	void __iomem *rom;
489	size_t size;
490
491	if (!pdev->rom_attr_enabled)
492	return -EINVAL;
493
494	rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
495	if (!rom)
496	return 0;
497
498	if (off >= size)
499	count = 0;
500	else {
501	if (off + count > size)
502	count = size - off;
503
504	memcpy_fromio(buf, rom + off, count);
505	}
506	pci_unmap_rom(pdev, rom);
507
508	return count;
509	}
510
511	static struct bin_attribute pci_config_attr = {
512	.attr = {
513	.name = "config",
514	.mode = S_IRUGO \| S_IWUSR,
515	.owner = THIS_MODULE,
516	},
517	.size = 256,
518	.read = pci_read_config,
519	.write = pci_write_config,
520	};
521
522	static struct bin_attribute pcie_config_attr = {
523	.attr = {
524	.name = "config",
525	.mode = S_IRUGO \| S_IWUSR,
526	.owner = THIS_MODULE,
527	},
528	.size = 4096,
529	.read = pci_read_config,
530	.write = pci_write_config,
531	};
532
533	int pci_create_sysfs_dev_files (struct pci_dev *pdev)
534	{
535	if (!sysfs_initialized)
536	return -EACCES;
537
538	if (pdev->cfg_size < 4096)
539	sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
540	else
541	sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
542
543	pci_create_resource_files(pdev);
544
545	/* If the device has a ROM, try to expose it in sysfs. */
546	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
547	struct bin_attribute *rom_attr;
548
f5afe806	549	rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4	550	if (rom_attr) {
1da177e4 LT	551	pdev->rom_attr = rom_attr;
	552	rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
	553	rom_attr->attr.name = "rom";
	554	rom_attr->attr.mode = S_IRUSR;
	555	rom_attr->attr.owner = THIS_MODULE;
	556	rom_attr->read = pci_read_rom;
	557	rom_attr->write = pci_write_rom;
	558	sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
	559	}
	560	}
	561	/* add platform-specific attributes */
	562	pcibios_add_platform_entries(pdev);
	563
	564	return 0;
	565	}
	566
	567	/**
	568	* pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
	569	* @pdev: device whose entries we should free
	570	*
	571	* Cleanup when @pdev is removed from sysfs.
	572	*/
	573	void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
	574	{
	575	if (pdev->cfg_size < 4096)
	576	sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
	577	else
	578	sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
	579
	580	pci_remove_resource_files(pdev);
	581
	582	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
	583	if (pdev->rom_attr) {
	584	sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
	585	kfree(pdev->rom_attr);
	586	}
	587	}
	588	}
	589
	590	static int __init pci_sysfs_init(void)
	591	{
	592	struct pci_dev *pdev = NULL;
	593
	594	sysfs_initialized = 1;
	595	for_each_pci_dev(pdev)
	596	pci_create_sysfs_dev_files(pdev);
	597
	598	return 0;
	599	}
	600
	601	__initcall(pci_sysfs_init);