Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/pci/pci-sysfs.c | |
3 | * | |
4 | * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> | |
5 | * (C) Copyright 2002-2004 IBM Corp. | |
6 | * (C) Copyright 2003 Matthew Wilcox | |
7 | * (C) Copyright 2003 Hewlett-Packard | |
8 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
9 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
10 | * | |
11 | * File attributes for PCI devices | |
12 | * | |
13 | * Modeled after usb's driverfs.c | |
14 | * | |
15 | */ | |
16 | ||
17 | ||
1da177e4 | 18 | #include <linux/kernel.h> |
b5ff7df3 | 19 | #include <linux/sched.h> |
1da177e4 LT |
20 | #include <linux/pci.h> |
21 | #include <linux/stat.h> | |
22 | #include <linux/topology.h> | |
23 | #include <linux/mm.h> | |
aa0ac365 | 24 | #include <linux/capability.h> |
7d715a6c | 25 | #include <linux/pci-aspm.h> |
1da177e4 LT |
26 | #include "pci.h" |
27 | ||
28 | static int sysfs_initialized; /* = 0 */ | |
29 | ||
30 | /* show configuration fields */ | |
31 | #define pci_config_attr(field, format_string) \ | |
32 | static ssize_t \ | |
e404e274 | 33 | field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
34 | { \ |
35 | struct pci_dev *pdev; \ | |
36 | \ | |
37 | pdev = to_pci_dev (dev); \ | |
38 | return sprintf (buf, format_string, pdev->field); \ | |
39 | } | |
40 | ||
41 | pci_config_attr(vendor, "0x%04x\n"); | |
42 | pci_config_attr(device, "0x%04x\n"); | |
43 | pci_config_attr(subsystem_vendor, "0x%04x\n"); | |
44 | pci_config_attr(subsystem_device, "0x%04x\n"); | |
45 | pci_config_attr(class, "0x%06x\n"); | |
46 | pci_config_attr(irq, "%u\n"); | |
47 | ||
bdee9d98 DT |
48 | static ssize_t broken_parity_status_show(struct device *dev, |
49 | struct device_attribute *attr, | |
50 | char *buf) | |
51 | { | |
52 | struct pci_dev *pdev = to_pci_dev(dev); | |
53 | return sprintf (buf, "%u\n", pdev->broken_parity_status); | |
54 | } | |
55 | ||
56 | static ssize_t broken_parity_status_store(struct device *dev, | |
57 | struct device_attribute *attr, | |
58 | const char *buf, size_t count) | |
59 | { | |
60 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 61 | unsigned long val; |
bdee9d98 | 62 | |
92425a40 TP |
63 | if (strict_strtoul(buf, 0, &val) < 0) |
64 | return -EINVAL; | |
65 | ||
66 | pdev->broken_parity_status = !!val; | |
67 | ||
68 | return count; | |
bdee9d98 DT |
69 | } |
70 | ||
4327edf6 AC |
71 | static ssize_t local_cpus_show(struct device *dev, |
72 | struct device_attribute *attr, char *buf) | |
1da177e4 | 73 | { |
3be83050 | 74 | const struct cpumask *mask; |
4327edf6 AC |
75 | int len; |
76 | ||
3be83050 MT |
77 | mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); |
78 | len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); | |
39106dcf MT |
79 | buf[len++] = '\n'; |
80 | buf[len] = '\0'; | |
81 | return len; | |
82 | } | |
83 | ||
84 | ||
85 | static ssize_t local_cpulist_show(struct device *dev, | |
86 | struct device_attribute *attr, char *buf) | |
87 | { | |
3be83050 | 88 | const struct cpumask *mask; |
39106dcf MT |
89 | int len; |
90 | ||
3be83050 MT |
91 | mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); |
92 | len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); | |
39106dcf MT |
93 | buf[len++] = '\n'; |
94 | buf[len] = '\0'; | |
95 | return len; | |
1da177e4 LT |
96 | } |
97 | ||
98 | /* show resources */ | |
99 | static ssize_t | |
e404e274 | 100 | resource_show(struct device * dev, struct device_attribute *attr, char * buf) |
1da177e4 LT |
101 | { |
102 | struct pci_dev * pci_dev = to_pci_dev(dev); | |
103 | char * str = buf; | |
104 | int i; | |
fde09c6d | 105 | int max; |
e31dd6e4 | 106 | resource_size_t start, end; |
1da177e4 LT |
107 | |
108 | if (pci_dev->subordinate) | |
109 | max = DEVICE_COUNT_RESOURCE; | |
fde09c6d YZ |
110 | else |
111 | max = PCI_BRIDGE_RESOURCES; | |
1da177e4 LT |
112 | |
113 | for (i = 0; i < max; i++) { | |
2311b1f2 ME |
114 | struct resource *res = &pci_dev->resource[i]; |
115 | pci_resource_to_user(pci_dev, i, res, &start, &end); | |
116 | str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", | |
117 | (unsigned long long)start, | |
118 | (unsigned long long)end, | |
119 | (unsigned long long)res->flags); | |
1da177e4 LT |
120 | } |
121 | return (str - buf); | |
122 | } | |
123 | ||
87c8a443 | 124 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) |
9888549e GKH |
125 | { |
126 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
127 | ||
128 | return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", | |
129 | pci_dev->vendor, pci_dev->device, | |
130 | pci_dev->subsystem_vendor, pci_dev->subsystem_device, | |
131 | (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), | |
132 | (u8)(pci_dev->class)); | |
133 | } | |
bae94d02 IPG |
134 | |
135 | static ssize_t is_enabled_store(struct device *dev, | |
136 | struct device_attribute *attr, const char *buf, | |
137 | size_t count) | |
9f125d30 AV |
138 | { |
139 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 TP |
140 | unsigned long val; |
141 | ssize_t result = strict_strtoul(buf, 0, &val); | |
142 | ||
143 | if (result < 0) | |
144 | return result; | |
9f125d30 AV |
145 | |
146 | /* this can crash the machine when done on the "wrong" device */ | |
147 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 148 | return -EPERM; |
9f125d30 | 149 | |
92425a40 | 150 | if (!val) { |
bae94d02 IPG |
151 | if (atomic_read(&pdev->enable_cnt) != 0) |
152 | pci_disable_device(pdev); | |
153 | else | |
154 | result = -EIO; | |
92425a40 | 155 | } else |
bae94d02 | 156 | result = pci_enable_device(pdev); |
9f125d30 | 157 | |
bae94d02 IPG |
158 | return result < 0 ? result : count; |
159 | } | |
160 | ||
161 | static ssize_t is_enabled_show(struct device *dev, | |
162 | struct device_attribute *attr, char *buf) | |
163 | { | |
164 | struct pci_dev *pdev; | |
9f125d30 | 165 | |
bae94d02 IPG |
166 | pdev = to_pci_dev (dev); |
167 | return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); | |
9f125d30 AV |
168 | } |
169 | ||
81bb0e19 BG |
170 | #ifdef CONFIG_NUMA |
171 | static ssize_t | |
172 | numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) | |
173 | { | |
174 | return sprintf (buf, "%d\n", dev->numa_node); | |
175 | } | |
176 | #endif | |
177 | ||
fe97064c BG |
178 | static ssize_t |
179 | msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) | |
180 | { | |
181 | struct pci_dev *pdev = to_pci_dev(dev); | |
182 | ||
183 | if (!pdev->subordinate) | |
184 | return 0; | |
185 | ||
186 | return sprintf (buf, "%u\n", | |
187 | !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); | |
188 | } | |
189 | ||
190 | static ssize_t | |
191 | msi_bus_store(struct device *dev, struct device_attribute *attr, | |
192 | const char *buf, size_t count) | |
193 | { | |
194 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 TP |
195 | unsigned long val; |
196 | ||
197 | if (strict_strtoul(buf, 0, &val) < 0) | |
198 | return -EINVAL; | |
fe97064c BG |
199 | |
200 | /* bad things may happen if the no_msi flag is changed | |
201 | * while some drivers are loaded */ | |
202 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 203 | return -EPERM; |
fe97064c | 204 | |
92425a40 TP |
205 | /* Maybe pci devices without subordinate busses shouldn't even have this |
206 | * attribute in the first place? */ | |
fe97064c BG |
207 | if (!pdev->subordinate) |
208 | return count; | |
209 | ||
92425a40 TP |
210 | /* Is the flag going to change, or keep the value it already had? */ |
211 | if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ | |
212 | !!val) { | |
213 | pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; | |
fe97064c | 214 | |
92425a40 TP |
215 | dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," |
216 | " bad things could happen\n", val ? "" : " not"); | |
fe97064c BG |
217 | } |
218 | ||
219 | return count; | |
220 | } | |
9888549e | 221 | |
1da177e4 LT |
222 | struct device_attribute pci_dev_attrs[] = { |
223 | __ATTR_RO(resource), | |
224 | __ATTR_RO(vendor), | |
225 | __ATTR_RO(device), | |
226 | __ATTR_RO(subsystem_vendor), | |
227 | __ATTR_RO(subsystem_device), | |
228 | __ATTR_RO(class), | |
229 | __ATTR_RO(irq), | |
230 | __ATTR_RO(local_cpus), | |
39106dcf | 231 | __ATTR_RO(local_cpulist), |
9888549e | 232 | __ATTR_RO(modalias), |
81bb0e19 BG |
233 | #ifdef CONFIG_NUMA |
234 | __ATTR_RO(numa_node), | |
235 | #endif | |
9f125d30 | 236 | __ATTR(enable, 0600, is_enabled_show, is_enabled_store), |
bdee9d98 DT |
237 | __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), |
238 | broken_parity_status_show,broken_parity_status_store), | |
fe97064c | 239 | __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), |
1da177e4 LT |
240 | __ATTR_NULL, |
241 | }; | |
242 | ||
243 | static ssize_t | |
91a69029 ZR |
244 | pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr, |
245 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
246 | { |
247 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
248 | unsigned int size = 64; | |
249 | loff_t init_off = off; | |
4c0619ad | 250 | u8 *data = (u8*) buf; |
1da177e4 LT |
251 | |
252 | /* Several chips lock up trying to read undefined config space */ | |
253 | if (capable(CAP_SYS_ADMIN)) { | |
254 | size = dev->cfg_size; | |
255 | } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { | |
256 | size = 128; | |
257 | } | |
258 | ||
259 | if (off > size) | |
260 | return 0; | |
261 | if (off + count > size) { | |
262 | size -= off; | |
263 | count = size; | |
264 | } else { | |
265 | size = count; | |
266 | } | |
267 | ||
4c0619ad SS |
268 | if ((off & 1) && size) { |
269 | u8 val; | |
e04b0ea2 | 270 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 271 | data[off - init_off] = val; |
1da177e4 | 272 | off++; |
4c0619ad SS |
273 | size--; |
274 | } | |
275 | ||
276 | if ((off & 3) && size > 2) { | |
277 | u16 val; | |
e04b0ea2 | 278 | pci_user_read_config_word(dev, off, &val); |
4c0619ad SS |
279 | data[off - init_off] = val & 0xff; |
280 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
281 | off += 2; | |
282 | size -= 2; | |
1da177e4 LT |
283 | } |
284 | ||
285 | while (size > 3) { | |
4c0619ad | 286 | u32 val; |
e04b0ea2 | 287 | pci_user_read_config_dword(dev, off, &val); |
4c0619ad SS |
288 | data[off - init_off] = val & 0xff; |
289 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
290 | data[off - init_off + 2] = (val >> 16) & 0xff; | |
291 | data[off - init_off + 3] = (val >> 24) & 0xff; | |
1da177e4 LT |
292 | off += 4; |
293 | size -= 4; | |
294 | } | |
295 | ||
4c0619ad SS |
296 | if (size >= 2) { |
297 | u16 val; | |
e04b0ea2 | 298 | pci_user_read_config_word(dev, off, &val); |
4c0619ad SS |
299 | data[off - init_off] = val & 0xff; |
300 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
301 | off += 2; | |
302 | size -= 2; | |
303 | } | |
304 | ||
305 | if (size > 0) { | |
306 | u8 val; | |
e04b0ea2 | 307 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 308 | data[off - init_off] = val; |
1da177e4 LT |
309 | off++; |
310 | --size; | |
311 | } | |
312 | ||
313 | return count; | |
314 | } | |
315 | ||
316 | static ssize_t | |
91a69029 ZR |
317 | pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr, |
318 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
319 | { |
320 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
321 | unsigned int size = count; | |
322 | loff_t init_off = off; | |
4c0619ad | 323 | u8 *data = (u8*) buf; |
1da177e4 LT |
324 | |
325 | if (off > dev->cfg_size) | |
326 | return 0; | |
327 | if (off + count > dev->cfg_size) { | |
328 | size = dev->cfg_size - off; | |
329 | count = size; | |
330 | } | |
4c0619ad SS |
331 | |
332 | if ((off & 1) && size) { | |
e04b0ea2 | 333 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 334 | off++; |
4c0619ad | 335 | size--; |
1da177e4 | 336 | } |
4c0619ad SS |
337 | |
338 | if ((off & 3) && size > 2) { | |
339 | u16 val = data[off - init_off]; | |
340 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 341 | pci_user_write_config_word(dev, off, val); |
4c0619ad SS |
342 | off += 2; |
343 | size -= 2; | |
344 | } | |
1da177e4 LT |
345 | |
346 | while (size > 3) { | |
4c0619ad SS |
347 | u32 val = data[off - init_off]; |
348 | val |= (u32) data[off - init_off + 1] << 8; | |
349 | val |= (u32) data[off - init_off + 2] << 16; | |
350 | val |= (u32) data[off - init_off + 3] << 24; | |
e04b0ea2 | 351 | pci_user_write_config_dword(dev, off, val); |
1da177e4 LT |
352 | off += 4; |
353 | size -= 4; | |
354 | } | |
4c0619ad SS |
355 | |
356 | if (size >= 2) { | |
357 | u16 val = data[off - init_off]; | |
358 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 359 | pci_user_write_config_word(dev, off, val); |
4c0619ad SS |
360 | off += 2; |
361 | size -= 2; | |
362 | } | |
1da177e4 | 363 | |
4c0619ad | 364 | if (size) { |
e04b0ea2 | 365 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 LT |
366 | off++; |
367 | --size; | |
368 | } | |
369 | ||
370 | return count; | |
371 | } | |
372 | ||
94e61088 | 373 | static ssize_t |
287d19ce SH |
374 | read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr, |
375 | char *buf, loff_t off, size_t count) | |
94e61088 BH |
376 | { |
377 | struct pci_dev *dev = | |
378 | to_pci_dev(container_of(kobj, struct device, kobj)); | |
94e61088 BH |
379 | |
380 | if (off > bin_attr->size) | |
381 | count = 0; | |
382 | else if (count > bin_attr->size - off) | |
383 | count = bin_attr->size - off; | |
94e61088 | 384 | |
287d19ce | 385 | return pci_read_vpd(dev, off, count, buf); |
94e61088 BH |
386 | } |
387 | ||
388 | static ssize_t | |
287d19ce SH |
389 | write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr, |
390 | char *buf, loff_t off, size_t count) | |
94e61088 BH |
391 | { |
392 | struct pci_dev *dev = | |
393 | to_pci_dev(container_of(kobj, struct device, kobj)); | |
94e61088 BH |
394 | |
395 | if (off > bin_attr->size) | |
396 | count = 0; | |
397 | else if (count > bin_attr->size - off) | |
398 | count = bin_attr->size - off; | |
94e61088 | 399 | |
287d19ce | 400 | return pci_write_vpd(dev, off, count, buf); |
94e61088 BH |
401 | } |
402 | ||
1da177e4 LT |
403 | #ifdef HAVE_PCI_LEGACY |
404 | /** | |
405 | * pci_read_legacy_io - read byte(s) from legacy I/O port space | |
406 | * @kobj: kobject corresponding to file to read from | |
407 | * @buf: buffer to store results | |
408 | * @off: offset into legacy I/O port space | |
409 | * @count: number of bytes to read | |
410 | * | |
411 | * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
412 | * callback routine (pci_legacy_read). | |
413 | */ | |
f19aeb1f | 414 | static ssize_t |
91a69029 ZR |
415 | pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr, |
416 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
417 | { |
418 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 419 | struct device, |
1da177e4 LT |
420 | kobj)); |
421 | ||
422 | /* Only support 1, 2 or 4 byte accesses */ | |
423 | if (count != 1 && count != 2 && count != 4) | |
424 | return -EINVAL; | |
425 | ||
426 | return pci_legacy_read(bus, off, (u32 *)buf, count); | |
427 | } | |
428 | ||
429 | /** | |
430 | * pci_write_legacy_io - write byte(s) to legacy I/O port space | |
431 | * @kobj: kobject corresponding to file to read from | |
432 | * @buf: buffer containing value to be written | |
433 | * @off: offset into legacy I/O port space | |
434 | * @count: number of bytes to write | |
435 | * | |
436 | * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
437 | * callback routine (pci_legacy_write). | |
438 | */ | |
f19aeb1f | 439 | static ssize_t |
91a69029 ZR |
440 | pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr, |
441 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
442 | { |
443 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 444 | struct device, |
1da177e4 LT |
445 | kobj)); |
446 | /* Only support 1, 2 or 4 byte accesses */ | |
447 | if (count != 1 && count != 2 && count != 4) | |
448 | return -EINVAL; | |
449 | ||
450 | return pci_legacy_write(bus, off, *(u32 *)buf, count); | |
451 | } | |
452 | ||
453 | /** | |
454 | * pci_mmap_legacy_mem - map legacy PCI memory into user memory space | |
455 | * @kobj: kobject corresponding to device to be mapped | |
456 | * @attr: struct bin_attribute for this file | |
457 | * @vma: struct vm_area_struct passed to mmap | |
458 | * | |
f19aeb1f | 459 | * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap |
1da177e4 LT |
460 | * legacy memory space (first meg of bus space) into application virtual |
461 | * memory space. | |
462 | */ | |
f19aeb1f | 463 | static int |
1da177e4 LT |
464 | pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr, |
465 | struct vm_area_struct *vma) | |
466 | { | |
467 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 468 | struct device, |
1da177e4 LT |
469 | kobj)); |
470 | ||
f19aeb1f BH |
471 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); |
472 | } | |
473 | ||
474 | /** | |
475 | * pci_mmap_legacy_io - map legacy PCI IO into user memory space | |
476 | * @kobj: kobject corresponding to device to be mapped | |
477 | * @attr: struct bin_attribute for this file | |
478 | * @vma: struct vm_area_struct passed to mmap | |
479 | * | |
480 | * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap | |
481 | * legacy IO space (first meg of bus space) into application virtual | |
482 | * memory space. Returns -ENOSYS if the operation isn't supported | |
483 | */ | |
484 | static int | |
485 | pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr, | |
486 | struct vm_area_struct *vma) | |
487 | { | |
488 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
489 | struct device, | |
490 | kobj)); | |
491 | ||
492 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); | |
493 | } | |
494 | ||
495 | /** | |
496 | * pci_create_legacy_files - create legacy I/O port and memory files | |
497 | * @b: bus to create files under | |
498 | * | |
499 | * Some platforms allow access to legacy I/O port and ISA memory space on | |
500 | * a per-bus basis. This routine creates the files and ties them into | |
501 | * their associated read, write and mmap files from pci-sysfs.c | |
502 | * | |
503 | * On error unwind, but don't propogate the error to the caller | |
504 | * as it is ok to set up the PCI bus without these files. | |
505 | */ | |
506 | void pci_create_legacy_files(struct pci_bus *b) | |
507 | { | |
508 | int error; | |
509 | ||
510 | b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, | |
511 | GFP_ATOMIC); | |
512 | if (!b->legacy_io) | |
513 | goto kzalloc_err; | |
514 | ||
515 | b->legacy_io->attr.name = "legacy_io"; | |
516 | b->legacy_io->size = 0xffff; | |
517 | b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; | |
518 | b->legacy_io->read = pci_read_legacy_io; | |
519 | b->legacy_io->write = pci_write_legacy_io; | |
520 | b->legacy_io->mmap = pci_mmap_legacy_io; | |
521 | error = device_create_bin_file(&b->dev, b->legacy_io); | |
522 | if (error) | |
523 | goto legacy_io_err; | |
524 | ||
525 | /* Allocated above after the legacy_io struct */ | |
526 | b->legacy_mem = b->legacy_io + 1; | |
527 | b->legacy_mem->attr.name = "legacy_mem"; | |
528 | b->legacy_mem->size = 1024*1024; | |
529 | b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; | |
530 | b->legacy_mem->mmap = pci_mmap_legacy_mem; | |
531 | error = device_create_bin_file(&b->dev, b->legacy_mem); | |
532 | if (error) | |
533 | goto legacy_mem_err; | |
534 | ||
535 | return; | |
536 | ||
537 | legacy_mem_err: | |
538 | device_remove_bin_file(&b->dev, b->legacy_io); | |
539 | legacy_io_err: | |
540 | kfree(b->legacy_io); | |
541 | b->legacy_io = NULL; | |
542 | kzalloc_err: | |
543 | printk(KERN_WARNING "pci: warning: could not create legacy I/O port " | |
544 | "and ISA memory resources to sysfs\n"); | |
545 | return; | |
546 | } | |
547 | ||
548 | void pci_remove_legacy_files(struct pci_bus *b) | |
549 | { | |
550 | if (b->legacy_io) { | |
551 | device_remove_bin_file(&b->dev, b->legacy_io); | |
552 | device_remove_bin_file(&b->dev, b->legacy_mem); | |
553 | kfree(b->legacy_io); /* both are allocated here */ | |
554 | } | |
1da177e4 LT |
555 | } |
556 | #endif /* HAVE_PCI_LEGACY */ | |
557 | ||
558 | #ifdef HAVE_PCI_MMAP | |
b5ff7df3 | 559 | |
9eff02e2 | 560 | int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma) |
b5ff7df3 LT |
561 | { |
562 | unsigned long nr, start, size; | |
563 | ||
564 | nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; | |
565 | start = vma->vm_pgoff; | |
88e7df0b | 566 | size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; |
b5ff7df3 LT |
567 | if (start < size && size - start >= nr) |
568 | return 1; | |
569 | WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n", | |
570 | current->comm, start, start+nr, pci_name(pdev), resno, size); | |
571 | return 0; | |
572 | } | |
573 | ||
1da177e4 LT |
574 | /** |
575 | * pci_mmap_resource - map a PCI resource into user memory space | |
576 | * @kobj: kobject for mapping | |
577 | * @attr: struct bin_attribute for the file being mapped | |
578 | * @vma: struct vm_area_struct passed into the mmap | |
45aec1ae | 579 | * @write_combine: 1 for write_combine mapping |
1da177e4 LT |
580 | * |
581 | * Use the regular PCI mapping routines to map a PCI resource into userspace. | |
1da177e4 LT |
582 | */ |
583 | static int | |
584 | pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, | |
45aec1ae | 585 | struct vm_area_struct *vma, int write_combine) |
1da177e4 LT |
586 | { |
587 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, | |
588 | struct device, kobj)); | |
589 | struct resource *res = (struct resource *)attr->private; | |
590 | enum pci_mmap_state mmap_type; | |
e31dd6e4 | 591 | resource_size_t start, end; |
2311b1f2 | 592 | int i; |
1da177e4 | 593 | |
2311b1f2 ME |
594 | for (i = 0; i < PCI_ROM_RESOURCE; i++) |
595 | if (res == &pdev->resource[i]) | |
596 | break; | |
597 | if (i >= PCI_ROM_RESOURCE) | |
598 | return -ENODEV; | |
599 | ||
b5ff7df3 LT |
600 | if (!pci_mmap_fits(pdev, i, vma)) |
601 | return -EINVAL; | |
602 | ||
2311b1f2 ME |
603 | /* pci_mmap_page_range() expects the same kind of entry as coming |
604 | * from /proc/bus/pci/ which is a "user visible" value. If this is | |
605 | * different from the resource itself, arch will do necessary fixup. | |
606 | */ | |
607 | pci_resource_to_user(pdev, i, res, &start, &end); | |
608 | vma->vm_pgoff += start >> PAGE_SHIFT; | |
1da177e4 LT |
609 | mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; |
610 | ||
e8de1481 AV |
611 | if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) |
612 | return -EINVAL; | |
613 | ||
45aec1ae | 614 | return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); |
615 | } | |
616 | ||
617 | static int | |
618 | pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr, | |
619 | struct vm_area_struct *vma) | |
620 | { | |
621 | return pci_mmap_resource(kobj, attr, vma, 0); | |
622 | } | |
623 | ||
624 | static int | |
625 | pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr, | |
626 | struct vm_area_struct *vma) | |
627 | { | |
628 | return pci_mmap_resource(kobj, attr, vma, 1); | |
1da177e4 LT |
629 | } |
630 | ||
b19441af GKH |
631 | /** |
632 | * pci_remove_resource_files - cleanup resource files | |
633 | * @dev: dev to cleanup | |
634 | * | |
635 | * If we created resource files for @dev, remove them from sysfs and | |
636 | * free their resources. | |
637 | */ | |
638 | static void | |
639 | pci_remove_resource_files(struct pci_dev *pdev) | |
640 | { | |
641 | int i; | |
642 | ||
643 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
644 | struct bin_attribute *res_attr; | |
645 | ||
646 | res_attr = pdev->res_attr[i]; | |
647 | if (res_attr) { | |
648 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
649 | kfree(res_attr); | |
650 | } | |
45aec1ae | 651 | |
652 | res_attr = pdev->res_attr_wc[i]; | |
653 | if (res_attr) { | |
654 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
655 | kfree(res_attr); | |
656 | } | |
b19441af GKH |
657 | } |
658 | } | |
659 | ||
45aec1ae | 660 | static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) |
661 | { | |
662 | /* allocate attribute structure, piggyback attribute name */ | |
663 | int name_len = write_combine ? 13 : 10; | |
664 | struct bin_attribute *res_attr; | |
665 | int retval; | |
666 | ||
667 | res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); | |
668 | if (res_attr) { | |
669 | char *res_attr_name = (char *)(res_attr + 1); | |
670 | ||
671 | if (write_combine) { | |
672 | pdev->res_attr_wc[num] = res_attr; | |
673 | sprintf(res_attr_name, "resource%d_wc", num); | |
674 | res_attr->mmap = pci_mmap_resource_wc; | |
675 | } else { | |
676 | pdev->res_attr[num] = res_attr; | |
677 | sprintf(res_attr_name, "resource%d", num); | |
678 | res_attr->mmap = pci_mmap_resource_uc; | |
679 | } | |
680 | res_attr->attr.name = res_attr_name; | |
681 | res_attr->attr.mode = S_IRUSR | S_IWUSR; | |
682 | res_attr->size = pci_resource_len(pdev, num); | |
683 | res_attr->private = &pdev->resource[num]; | |
684 | retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); | |
685 | } else | |
686 | retval = -ENOMEM; | |
687 | ||
688 | return retval; | |
689 | } | |
690 | ||
1da177e4 LT |
691 | /** |
692 | * pci_create_resource_files - create resource files in sysfs for @dev | |
693 | * @dev: dev in question | |
694 | * | |
695 | * Walk the resources in @dev creating files for each resource available. | |
696 | */ | |
b19441af | 697 | static int pci_create_resource_files(struct pci_dev *pdev) |
1da177e4 LT |
698 | { |
699 | int i; | |
b19441af | 700 | int retval; |
1da177e4 LT |
701 | |
702 | /* Expose the PCI resources from this device as files */ | |
703 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
1da177e4 LT |
704 | |
705 | /* skip empty resources */ | |
706 | if (!pci_resource_len(pdev, i)) | |
707 | continue; | |
708 | ||
45aec1ae | 709 | retval = pci_create_attr(pdev, i, 0); |
710 | /* for prefetchable resources, create a WC mappable file */ | |
711 | if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) | |
712 | retval = pci_create_attr(pdev, i, 1); | |
713 | ||
714 | if (retval) { | |
715 | pci_remove_resource_files(pdev); | |
716 | return retval; | |
1da177e4 LT |
717 | } |
718 | } | |
b19441af | 719 | return 0; |
1da177e4 LT |
720 | } |
721 | #else /* !HAVE_PCI_MMAP */ | |
b19441af | 722 | static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; } |
1da177e4 LT |
723 | static inline void pci_remove_resource_files(struct pci_dev *dev) { return; } |
724 | #endif /* HAVE_PCI_MMAP */ | |
725 | ||
726 | /** | |
727 | * pci_write_rom - used to enable access to the PCI ROM display | |
728 | * @kobj: kernel object handle | |
729 | * @buf: user input | |
730 | * @off: file offset | |
731 | * @count: number of byte in input | |
732 | * | |
733 | * writing anything except 0 enables it | |
734 | */ | |
735 | static ssize_t | |
91a69029 ZR |
736 | pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr, |
737 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
738 | { |
739 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
740 | ||
741 | if ((off == 0) && (*buf == '0') && (count == 2)) | |
742 | pdev->rom_attr_enabled = 0; | |
743 | else | |
744 | pdev->rom_attr_enabled = 1; | |
745 | ||
746 | return count; | |
747 | } | |
748 | ||
749 | /** | |
750 | * pci_read_rom - read a PCI ROM | |
751 | * @kobj: kernel object handle | |
752 | * @buf: where to put the data we read from the ROM | |
753 | * @off: file offset | |
754 | * @count: number of bytes to read | |
755 | * | |
756 | * Put @count bytes starting at @off into @buf from the ROM in the PCI | |
757 | * device corresponding to @kobj. | |
758 | */ | |
759 | static ssize_t | |
91a69029 ZR |
760 | pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr, |
761 | char *buf, loff_t off, size_t count) | |
1da177e4 LT |
762 | { |
763 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
764 | void __iomem *rom; | |
765 | size_t size; | |
766 | ||
767 | if (!pdev->rom_attr_enabled) | |
768 | return -EINVAL; | |
769 | ||
770 | rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ | |
97c44836 TN |
771 | if (!rom || !size) |
772 | return -EIO; | |
1da177e4 LT |
773 | |
774 | if (off >= size) | |
775 | count = 0; | |
776 | else { | |
777 | if (off + count > size) | |
778 | count = size - off; | |
779 | ||
780 | memcpy_fromio(buf, rom + off, count); | |
781 | } | |
782 | pci_unmap_rom(pdev, rom); | |
783 | ||
784 | return count; | |
785 | } | |
786 | ||
787 | static struct bin_attribute pci_config_attr = { | |
788 | .attr = { | |
789 | .name = "config", | |
790 | .mode = S_IRUGO | S_IWUSR, | |
1da177e4 | 791 | }, |
557848c3 | 792 | .size = PCI_CFG_SPACE_SIZE, |
1da177e4 LT |
793 | .read = pci_read_config, |
794 | .write = pci_write_config, | |
795 | }; | |
796 | ||
797 | static struct bin_attribute pcie_config_attr = { | |
798 | .attr = { | |
799 | .name = "config", | |
800 | .mode = S_IRUGO | S_IWUSR, | |
1da177e4 | 801 | }, |
557848c3 | 802 | .size = PCI_CFG_SPACE_EXP_SIZE, |
1da177e4 LT |
803 | .read = pci_read_config, |
804 | .write = pci_write_config, | |
805 | }; | |
806 | ||
a2cd52ca | 807 | int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev) |
575e3348 | 808 | { |
a2cd52ca | 809 | return 0; |
575e3348 ME |
810 | } |
811 | ||
280c73d3 ZY |
812 | static int pci_create_capabilities_sysfs(struct pci_dev *dev) |
813 | { | |
814 | int retval; | |
815 | struct bin_attribute *attr; | |
816 | ||
817 | /* If the device has VPD, try to expose it in sysfs. */ | |
818 | if (dev->vpd) { | |
819 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); | |
820 | if (!attr) | |
821 | return -ENOMEM; | |
822 | ||
823 | attr->size = dev->vpd->len; | |
824 | attr->attr.name = "vpd"; | |
825 | attr->attr.mode = S_IRUSR | S_IWUSR; | |
287d19ce SH |
826 | attr->read = read_vpd_attr; |
827 | attr->write = write_vpd_attr; | |
280c73d3 ZY |
828 | retval = sysfs_create_bin_file(&dev->dev.kobj, attr); |
829 | if (retval) { | |
830 | kfree(dev->vpd->attr); | |
831 | return retval; | |
832 | } | |
833 | dev->vpd->attr = attr; | |
834 | } | |
835 | ||
836 | /* Active State Power Management */ | |
837 | pcie_aspm_create_sysfs_dev_files(dev); | |
838 | ||
839 | return 0; | |
840 | } | |
841 | ||
b19441af | 842 | int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) |
1da177e4 | 843 | { |
b19441af | 844 | int retval; |
280c73d3 ZY |
845 | int rom_size = 0; |
846 | struct bin_attribute *attr; | |
b19441af | 847 | |
1da177e4 LT |
848 | if (!sysfs_initialized) |
849 | return -EACCES; | |
850 | ||
557848c3 | 851 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
b19441af | 852 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); |
1da177e4 | 853 | else |
b19441af GKH |
854 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); |
855 | if (retval) | |
856 | goto err; | |
1da177e4 | 857 | |
b19441af GKH |
858 | retval = pci_create_resource_files(pdev); |
859 | if (retval) | |
280c73d3 ZY |
860 | goto err_config_file; |
861 | ||
862 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) | |
863 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
864 | else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) | |
865 | rom_size = 0x20000; | |
1da177e4 LT |
866 | |
867 | /* If the device has a ROM, try to expose it in sysfs. */ | |
280c73d3 | 868 | if (rom_size) { |
94e61088 | 869 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); |
280c73d3 | 870 | if (!attr) { |
b19441af | 871 | retval = -ENOMEM; |
9890b12a | 872 | goto err_resource_files; |
1da177e4 | 873 | } |
280c73d3 ZY |
874 | attr->size = rom_size; |
875 | attr->attr.name = "rom"; | |
876 | attr->attr.mode = S_IRUSR; | |
877 | attr->read = pci_read_rom; | |
878 | attr->write = pci_write_rom; | |
879 | retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); | |
880 | if (retval) { | |
881 | kfree(attr); | |
882 | goto err_resource_files; | |
883 | } | |
884 | pdev->rom_attr = attr; | |
1da177e4 | 885 | } |
280c73d3 | 886 | |
1da177e4 | 887 | /* add platform-specific attributes */ |
280c73d3 ZY |
888 | retval = pcibios_add_platform_entries(pdev); |
889 | if (retval) | |
a2cd52ca | 890 | goto err_rom_file; |
b19441af | 891 | |
280c73d3 ZY |
892 | /* add sysfs entries for various capabilities */ |
893 | retval = pci_create_capabilities_sysfs(pdev); | |
894 | if (retval) | |
895 | goto err_rom_file; | |
7d715a6c | 896 | |
1da177e4 | 897 | return 0; |
b19441af | 898 | |
a2cd52ca | 899 | err_rom_file: |
280c73d3 | 900 | if (rom_size) { |
94e61088 | 901 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); |
280c73d3 ZY |
902 | kfree(pdev->rom_attr); |
903 | pdev->rom_attr = NULL; | |
904 | } | |
9890b12a ME |
905 | err_resource_files: |
906 | pci_remove_resource_files(pdev); | |
94e61088 | 907 | err_config_file: |
557848c3 | 908 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
b19441af GKH |
909 | sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); |
910 | else | |
911 | sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
912 | err: | |
913 | return retval; | |
1da177e4 LT |
914 | } |
915 | ||
280c73d3 ZY |
916 | static void pci_remove_capabilities_sysfs(struct pci_dev *dev) |
917 | { | |
918 | if (dev->vpd && dev->vpd->attr) { | |
919 | sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); | |
920 | kfree(dev->vpd->attr); | |
921 | } | |
922 | ||
923 | pcie_aspm_remove_sysfs_dev_files(dev); | |
924 | } | |
925 | ||
1da177e4 LT |
926 | /** |
927 | * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files | |
928 | * @pdev: device whose entries we should free | |
929 | * | |
930 | * Cleanup when @pdev is removed from sysfs. | |
931 | */ | |
932 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev) | |
933 | { | |
280c73d3 ZY |
934 | int rom_size = 0; |
935 | ||
d67afe5e DM |
936 | if (!sysfs_initialized) |
937 | return; | |
938 | ||
280c73d3 | 939 | pci_remove_capabilities_sysfs(pdev); |
7d715a6c | 940 | |
557848c3 | 941 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
1da177e4 LT |
942 | sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); |
943 | else | |
944 | sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
945 | ||
946 | pci_remove_resource_files(pdev); | |
947 | ||
280c73d3 ZY |
948 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) |
949 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
950 | else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) | |
951 | rom_size = 0x20000; | |
952 | ||
953 | if (rom_size && pdev->rom_attr) { | |
954 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); | |
955 | kfree(pdev->rom_attr); | |
1da177e4 LT |
956 | } |
957 | } | |
958 | ||
959 | static int __init pci_sysfs_init(void) | |
960 | { | |
961 | struct pci_dev *pdev = NULL; | |
b19441af GKH |
962 | int retval; |
963 | ||
1da177e4 | 964 | sysfs_initialized = 1; |
b19441af GKH |
965 | for_each_pci_dev(pdev) { |
966 | retval = pci_create_sysfs_dev_files(pdev); | |
151fc5df JL |
967 | if (retval) { |
968 | pci_dev_put(pdev); | |
b19441af | 969 | return retval; |
151fc5df | 970 | } |
b19441af | 971 | } |
1da177e4 LT |
972 | |
973 | return 0; | |
974 | } | |
975 | ||
40ee9e9f | 976 | late_initcall(pci_sysfs_init); |