projects / GitHub / LineageOS / android_kernel_samsung_universal7580.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * Copyright (C) 2003-2004 Intel | |
| 3 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
| 4 | */ | |
| 5 | ||
| 6 | #ifndef MSI_H | |
| 7 | #define MSI_H | |
| 8 | ||
| 1da177e4 LT |
9 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) |
| 10 | #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) | |
| 11 | #define msi_data_reg(base, is64bit) \ | |
| 67b5db65 HS |
12 | (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) |
| 13 | #define msi_mask_reg(base, is64bit) \ | |
| 14 | (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) | |
| dd159eec EB |
15 | #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) |
| 16 | #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) | |
| 1da177e4 | 17 | |
| db500419 HS |
18 | #define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) |
| 19 | #define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) | |
| 1da177e4 | 20 | #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) |
| 04846b5b | 21 | #define multi_msix_capable(control) msix_table_size((control)) |
| 1da177e4 | 22 | |
| 1da177e4 | 23 | #endif /* MSI_H */ |