Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / hotplug / cpqphp_core.c
CommitLineData
1da177e4
LT
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
861fefbf 28 * Torben Mathiasen <torben.mathiasen@hp.com>
1da177e4
LT
29 */
30
1da177e4
LT
31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/kernel.h>
34#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h>
7a54f25c 39#include <linux/pci_hotplug.h>
1da177e4
LT
40#include <linux/init.h>
41#include <linux/interrupt.h>
42
43#include <asm/uaccess.h>
44
45#include "cpqphp.h"
46#include "cpqphp_nvram.h"
1da177e4
LT
47
48
49/* Global variables */
50int cpqhp_debug;
51int cpqhp_legacy_mode;
52struct controller *cpqhp_ctrl_list; /* = NULL */
53struct pci_func *cpqhp_slot_list[256];
b019ee67 54struct irq_routing_table *cpqhp_routing_table;
1da177e4
LT
55
56/* local variables */
57static void __iomem *smbios_table;
58static void __iomem *smbios_start;
59static void __iomem *cpqhp_rom_start;
60static int power_mode;
61static int debug;
4002307d 62static int initialized;
1da177e4
LT
63
64#define DRIVER_VERSION "0.9.8"
65#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66#define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68MODULE_AUTHOR(DRIVER_AUTHOR);
69MODULE_DESCRIPTION(DRIVER_DESC);
70MODULE_LICENSE("GPL");
71
72module_param(power_mode, bool, 0644);
73MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75module_param(debug, bool, 0644);
76MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78#define CPQHPC_MODULE_MINOR 208
79
1da177e4
LT
80static inline int is_slot64bit(struct slot *slot)
81{
82 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
83}
84
85static inline int is_slot66mhz(struct slot *slot)
86{
87 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
88}
89
90/**
91 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
1da177e4
LT
92 * @begin: begin pointer for region to be scanned.
93 * @end: end pointer for region to be scanned.
94 *
26e6c66e 95 * Returns pointer to the head of the SMBIOS tables (or %NULL).
1da177e4
LT
96 */
97static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
98{
99 void __iomem *fp;
100 void __iomem *endp;
101 u8 temp1, temp2, temp3, temp4;
102 int status = 0;
103
104 endp = (end - sizeof(u32) + 1);
105
106 for (fp = begin; fp <= endp; fp += 16) {
107 temp1 = readb(fp);
108 temp2 = readb(fp+1);
109 temp3 = readb(fp+2);
110 temp4 = readb(fp+3);
111 if (temp1 == '_' &&
112 temp2 == 'S' &&
113 temp3 == 'M' &&
114 temp4 == '_') {
115 status = 1;
116 break;
117 }
118 }
861fefbf 119
1da177e4
LT
120 if (!status)
121 fp = NULL;
122
123 dbg("Discovered SMBIOS Entry point at %p\n", fp);
124
125 return fp;
126}
127
128/**
129 * init_SERR - Initializes the per slot SERR generation.
26e6c66e 130 * @ctrl: controller to use
1da177e4
LT
131 *
132 * For unexpected switch opens
1da177e4
LT
133 */
134static int init_SERR(struct controller * ctrl)
135{
136 u32 tempdword;
137 u32 number_of_slots;
138 u8 physical_slot;
139
140 if (!ctrl)
141 return 1;
142
143 tempdword = ctrl->first_slot;
144
145 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
427438c6 146 /* Loop through slots */
1da177e4
LT
147 while (number_of_slots) {
148 physical_slot = tempdword;
149 writeb(0, ctrl->hpc_reg + SLOT_SERR);
150 tempdword++;
151 number_of_slots--;
152 }
153
154 return 0;
155}
156
b019ee67 157static int init_cpqhp_routing_table(void)
1da177e4 158{
1da177e4 159 int len;
1da177e4 160
b019ee67
AC
161 cpqhp_routing_table = pcibios_get_irq_routing_table();
162 if (cpqhp_routing_table == NULL)
1da177e4 163 return -ENOMEM;
1da177e4 164
b019ee67 165 len = cpqhp_routing_table_length();
1da177e4 166 if (len == 0) {
b019ee67
AC
167 kfree(cpqhp_routing_table);
168 cpqhp_routing_table = NULL;
1da177e4
LT
169 return -1;
170 }
171
b019ee67
AC
172 return 0;
173}
174
175/* nice debugging output */
176static void pci_print_IRQ_route(void)
177{
178 int len;
179 int loop;
180 u8 tbus, tdevice, tslot;
181
182 len = cpqhp_routing_table_length();
1da177e4 183
b019ee67 184 dbg("bus dev func slot\n");
1da177e4 185 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
186 tbus = cpqhp_routing_table->slots[loop].bus;
187 tdevice = cpqhp_routing_table->slots[loop].devfn;
188 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
189 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
190
191 }
b019ee67 192 return;
1da177e4
LT
193}
194
195
196/**
197 * get_subsequent_smbios_entry: get the next entry from bios table.
26e6c66e
RD
198 * @smbios_start: where to start in the SMBIOS table
199 * @smbios_table: location of the SMBIOS table
1da177e4
LT
200 * @curr: %NULL or pointer to previously returned structure
201 *
26e6c66e
RD
202 * Gets the first entry if previous == NULL;
203 * otherwise, returns the next entry.
204 * Uses global SMBIOS Table pointer.
205 *
206 * Returns a pointer to an SMBIOS structure or NULL if none found.
1da177e4
LT
207 */
208static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
209 void __iomem *smbios_table,
210 void __iomem *curr)
211{
212 u8 bail = 0;
213 u8 previous_byte = 1;
214 void __iomem *p_temp;
215 void __iomem *p_max;
216
217 if (!smbios_table || !curr)
04225fe7 218 return NULL;
1da177e4 219
427438c6 220 /* set p_max to the end of the table */
1da177e4
LT
221 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
222
223 p_temp = curr;
224 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
225
226 while ((p_temp < p_max) && !bail) {
227 /* Look for the double NULL terminator
228 * The first condition is the previous byte
427438c6
AC
229 * and the second is the curr
230 */
04225fe7 231 if (!previous_byte && !(readb(p_temp)))
1da177e4 232 bail = 1;
1da177e4
LT
233
234 previous_byte = readb(p_temp);
235 p_temp++;
236 }
237
04225fe7 238 if (p_temp < p_max)
1da177e4 239 return p_temp;
04225fe7 240 else
1da177e4 241 return NULL;
1da177e4
LT
242}
243
244
245/**
26e6c66e
RD
246 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
247 * @smbios_start: where to start in the SMBIOS table
248 * @smbios_table: location of the SMBIOS table
249 * @type: SMBIOS structure type to be returned
1da177e4
LT
250 * @previous: %NULL or pointer to previously returned structure
251 *
26e6c66e 252 * Gets the first entry of the specified type if previous == %NULL;
1da177e4 253 * Otherwise, returns the next entry of the given type.
26e6c66e
RD
254 * Uses global SMBIOS Table pointer.
255 * Uses get_subsequent_smbios_entry.
1da177e4 256 *
26e6c66e 257 * Returns a pointer to an SMBIOS structure or %NULL if none found.
1da177e4
LT
258 */
259static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
260 void __iomem *smbios_table,
261 u8 type,
262 void __iomem *previous)
263{
264 if (!smbios_table)
265 return NULL;
266
04225fe7 267 if (!previous)
1da177e4 268 previous = smbios_start;
04225fe7 269 else
1da177e4
LT
270 previous = get_subsequent_smbios_entry(smbios_start,
271 smbios_table, previous);
1da177e4 272
04225fe7
AC
273 while (previous)
274 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
1da177e4
LT
275 previous = get_subsequent_smbios_entry(smbios_start,
276 smbios_table, previous);
04225fe7 277 else
1da177e4 278 break;
1da177e4
LT
279
280 return previous;
281}
282
283static void release_slot(struct hotplug_slot *hotplug_slot)
284{
285 struct slot *slot = hotplug_slot->private;
286
30ac7acd 287 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
288
289 kfree(slot->hotplug_slot->info);
1da177e4
LT
290 kfree(slot->hotplug_slot);
291 kfree(slot);
292}
293
1da177e4
LT
294static int ctrl_slot_cleanup (struct controller * ctrl)
295{
296 struct slot *old_slot, *next_slot;
297
298 old_slot = ctrl->slot;
299 ctrl->slot = NULL;
300
301 while (old_slot) {
302 /* memory will be freed by the release_slot callback */
303 next_slot = old_slot->next;
304 pci_hp_deregister (old_slot->hotplug_slot);
305 old_slot = next_slot;
306 }
307
9f3f4681
GKH
308 cpqhp_remove_debugfs_files(ctrl);
309
427438c6 310 /* Free IRQ associated with hot plug device */
1da177e4 311 free_irq(ctrl->interrupt, ctrl);
427438c6 312 /* Unmap the memory */
1da177e4 313 iounmap(ctrl->hpc_reg);
427438c6 314 /* Finally reclaim PCI mem */
1da177e4
LT
315 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
316 pci_resource_len(ctrl->pci_dev, 0));
317
04225fe7 318 return 0;
1da177e4
LT
319}
320
321
427438c6
AC
322/**
323 * get_slot_mapping - determine logical slot mapping for PCI device
324 *
325 * Won't work for more than one PCI-PCI bridge in a slot.
326 *
327 * @bus_num - bus number of PCI device
328 * @dev_num - device number of PCI device
329 * @slot - Pointer to u8 where slot number will be returned
330 *
331 * Output: SUCCESS or FAILURE
332 */
1da177e4
LT
333static int
334get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
335{
1da177e4
LT
336 u32 work;
337 long len;
338 long loop;
339
340 u8 tbus, tdevice, tslot, bridgeSlot;
341
66bef8c0 342 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
1da177e4
LT
343
344 bridgeSlot = 0xFF;
345
b019ee67 346 len = cpqhp_routing_table_length();
1da177e4 347 for (loop = 0; loop < len; ++loop) {
b019ee67
AC
348 tbus = cpqhp_routing_table->slots[loop].bus;
349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
350 tslot = cpqhp_routing_table->slots[loop].slot;
1da177e4
LT
351
352 if ((tbus == bus_num) && (tdevice == dev_num)) {
353 *slot = tslot;
1da177e4
LT
354 return 0;
355 } else {
356 /* Did not get a match on the target PCI device. Check
427438c6
AC
357 * if the current IRQ table entry is a PCI-to-PCI
358 * bridge device. If so, and it's secondary bus
359 * matches the bus number for the target device, I need
360 * to save the bridge's slot number. If I can not find
361 * an entry for the target device, I will have to
362 * assume it's on the other side of the bridge, and
363 * assign it the bridge's slot.
364 */
1da177e4
LT
365 bus->number = tbus;
366 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
3799a4e7 367 PCI_CLASS_REVISION, &work);
1da177e4
LT
368
369 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
370 pci_bus_read_config_dword(bus,
371 PCI_DEVFN(tdevice, 0),
372 PCI_PRIMARY_BUS, &work);
373 // See if bridge's secondary bus matches target bus.
04225fe7 374 if (((work >> 8) & 0x000000FF) == (long) bus_num)
1da177e4 375 bridgeSlot = tslot;
1da177e4
LT
376 }
377 }
378
379 }
380
427438c6
AC
381 /* If we got here, we didn't find an entry in the IRQ mapping table for
382 * the target PCI device. If we did determine that the target device
383 * is on the other side of a PCI-to-PCI bridge, return the slot number
384 * for the bridge.
385 */
1da177e4
LT
386 if (bridgeSlot != 0xFF) {
387 *slot = bridgeSlot;
1da177e4
LT
388 return 0;
389 }
427438c6 390 /* Couldn't find an entry in the routing table for this PCI device */
1da177e4
LT
391 return -1;
392}
393
394
395/**
396 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
397 * @ctrl: struct controller to use
398 * @func: PCI device/function info
399 * @status: LED control flag: 1 = LED on, 0 = LED off
1da177e4
LT
400 */
401static int
402cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
403 u32 status)
404{
405 u8 hp_slot;
406
407 if (func == NULL)
04225fe7 408 return 1;
1da177e4
LT
409
410 hp_slot = func->device - ctrl->slot_device_offset;
411
427438c6 412 /* Wait for exclusive access to hardware */
6aa4cdd0 413 mutex_lock(&ctrl->crit_sect);
1da177e4 414
04225fe7 415 if (status == 1)
1da177e4 416 amber_LED_on (ctrl, hp_slot);
04225fe7 417 else if (status == 0)
1da177e4 418 amber_LED_off (ctrl, hp_slot);
04225fe7 419 else {
427438c6 420 /* Done with exclusive hardware access */
6aa4cdd0 421 mutex_unlock(&ctrl->crit_sect);
04225fe7 422 return 1;
1da177e4
LT
423 }
424
425 set_SOGO(ctrl);
426
427438c6 427 /* Wait for SOBS to be unset */
1da177e4
LT
428 wait_for_ctrl_irq (ctrl);
429
427438c6 430 /* Done with exclusive hardware access */
6aa4cdd0 431 mutex_unlock(&ctrl->crit_sect);
1da177e4 432
04225fe7 433 return 0;
1da177e4
LT
434}
435
436
437/**
438 * set_attention_status - Turns the Amber LED for a slot on or off
26e6c66e
RD
439 * @hotplug_slot: slot to change LED on
440 * @status: LED control flag
1da177e4
LT
441 */
442static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
443{
444 struct pci_func *slot_func;
445 struct slot *slot = hotplug_slot->private;
446 struct controller *ctrl = slot->ctrl;
447 u8 bus;
448 u8 devfn;
449 u8 device;
450 u8 function;
451
30ac7acd 452 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
453
454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
455 return -ENODEV;
456
457 device = devfn >> 3;
458 function = devfn & 0x7;
459 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
460
461 slot_func = cpqhp_slot_find(bus, device, function);
462 if (!slot_func)
463 return -ENODEV;
464
465 return cpqhp_set_attention_status(ctrl, slot_func, status);
466}
467
468
469static int process_SI(struct hotplug_slot *hotplug_slot)
470{
471 struct pci_func *slot_func;
472 struct slot *slot = hotplug_slot->private;
473 struct controller *ctrl = slot->ctrl;
474 u8 bus;
475 u8 devfn;
476 u8 device;
477 u8 function;
478
30ac7acd 479 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
480
481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
482 return -ENODEV;
483
484 device = devfn >> 3;
485 function = devfn & 0x7;
486 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
487
488 slot_func = cpqhp_slot_find(bus, device, function);
489 if (!slot_func)
490 return -ENODEV;
491
492 slot_func->bus = bus;
493 slot_func->device = device;
494 slot_func->function = function;
495 slot_func->configured = 0;
496 dbg("board_added(%p, %p)\n", slot_func, ctrl);
497 return cpqhp_process_SI(ctrl, slot_func);
498}
499
500
501static int process_SS(struct hotplug_slot *hotplug_slot)
502{
503 struct pci_func *slot_func;
504 struct slot *slot = hotplug_slot->private;
505 struct controller *ctrl = slot->ctrl;
506 u8 bus;
507 u8 devfn;
508 u8 device;
509 u8 function;
510
30ac7acd 511 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
512
513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
514 return -ENODEV;
515
516 device = devfn >> 3;
517 function = devfn & 0x7;
518 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
519
520 slot_func = cpqhp_slot_find(bus, device, function);
521 if (!slot_func)
522 return -ENODEV;
523
66bef8c0 524 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
1da177e4
LT
525 return cpqhp_process_SS(ctrl, slot_func);
526}
527
528
529static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
530{
531 struct slot *slot = hotplug_slot->private;
532 struct controller *ctrl = slot->ctrl;
533
30ac7acd 534 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4 535
861fefbf 536 return cpqhp_hardware_test(ctrl, value);
1da177e4
LT
537}
538
539
540static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
541{
542 struct slot *slot = hotplug_slot->private;
543 struct controller *ctrl = slot->ctrl;
544
30ac7acd 545 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
546
547 *value = get_slot_enabled(ctrl, slot);
548 return 0;
549}
550
551static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
552{
553 struct slot *slot = hotplug_slot->private;
554 struct controller *ctrl = slot->ctrl;
861fefbf 555
30ac7acd 556 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
557
558 *value = cpq_get_attention_status(ctrl, slot);
559 return 0;
560}
561
562static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
563{
564 struct slot *slot = hotplug_slot->private;
565 struct controller *ctrl = slot->ctrl;
566
30ac7acd 567 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
568
569 *value = cpq_get_latch_status(ctrl, slot);
570
571 return 0;
572}
573
574static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
575{
576 struct slot *slot = hotplug_slot->private;
577 struct controller *ctrl = slot->ctrl;
578
30ac7acd 579 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
580
581 *value = get_presence_status(ctrl, slot);
582
583 return 0;
584}
585
586static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
587{
588 struct slot *slot = hotplug_slot->private;
589 struct controller *ctrl = slot->ctrl;
590
30ac7acd 591 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
592
593 *value = ctrl->speed_capability;
594
595 return 0;
596}
597
598static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
599{
600 struct slot *slot = hotplug_slot->private;
601 struct controller *ctrl = slot->ctrl;
602
30ac7acd 603 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
1da177e4
LT
604
605 *value = ctrl->speed;
606
607 return 0;
608}
609
b4d897a4 610static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
b4d897a4
AC
611 .set_attention_status = set_attention_status,
612 .enable_slot = process_SI,
613 .disable_slot = process_SS,
614 .hardware_test = hardware_test,
615 .get_power_status = get_power_status,
616 .get_attention_status = get_attention_status,
617 .get_latch_status = get_latch_status,
618 .get_adapter_status = get_adapter_status,
619 .get_max_bus_speed = get_max_bus_speed,
620 .get_cur_bus_speed = get_cur_bus_speed,
621};
622
623#define SLOT_NAME_SIZE 10
624
625static int ctrl_slot_setup(struct controller *ctrl,
626 void __iomem *smbios_start,
627 void __iomem *smbios_table)
628{
629 struct slot *slot;
630 struct hotplug_slot *hotplug_slot;
631 struct hotplug_slot_info *hotplug_slot_info;
632 u8 number_of_slots;
633 u8 slot_device;
634 u8 slot_number;
635 u8 ctrl_slot;
636 u32 tempdword;
637 char name[SLOT_NAME_SIZE];
638 void __iomem *slot_entry= NULL;
639 int result = -ENOMEM;
640
641 dbg("%s\n", __func__);
642
643 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
644
645 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
646 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
647 slot_number = ctrl->first_slot;
648
649 while (number_of_slots) {
650 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
651 if (!slot)
652 goto error;
653
654 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
655 GFP_KERNEL);
656 if (!slot->hotplug_slot)
657 goto error_slot;
658 hotplug_slot = slot->hotplug_slot;
659
04225fe7 660 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
b4d897a4
AC
661 GFP_KERNEL);
662 if (!hotplug_slot->info)
663 goto error_hpslot;
664 hotplug_slot_info = hotplug_slot->info;
665
666 slot->ctrl = ctrl;
667 slot->bus = ctrl->bus;
668 slot->device = slot_device;
669 slot->number = slot_number;
670 dbg("slot->number = %u\n", slot->number);
671
672 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
673 slot_entry);
674
675 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
676 slot->number)) {
677 slot_entry = get_SMBIOS_entry(smbios_start,
678 smbios_table, 9, slot_entry);
679 }
680
681 slot->p_sm_slot = slot_entry;
682
683 init_timer(&slot->task_event);
684 slot->task_event.expires = jiffies + 5 * HZ;
685 slot->task_event.function = cpqhp_pushbutton_thread;
686
687 /*FIXME: these capabilities aren't used but if they are
688 * they need to be correctly implemented
689 */
690 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
691 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
692
693 if (is_slot64bit(slot))
694 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
695 if (is_slot66mhz(slot))
696 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
697 if (ctrl->speed == PCI_SPEED_66MHz)
698 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
699
700 ctrl_slot =
701 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
702
703 /* Check presence */
704 slot->capabilities |=
705 ((((~tempdword) >> 23) |
706 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
707 /* Check the switch state */
708 slot->capabilities |=
709 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
710 /* Check the slot enable */
711 slot->capabilities |=
712 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
713
714 /* register this slot with the hotplug pci core */
715 hotplug_slot->release = &release_slot;
716 hotplug_slot->private = slot;
717 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
718 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
719
720 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
721 hotplug_slot_info->attention_status =
722 cpq_get_attention_status(ctrl, slot);
723 hotplug_slot_info->latch_status =
724 cpq_get_latch_status(ctrl, slot);
725 hotplug_slot_info->adapter_status =
726 get_presence_status(ctrl, slot);
727
728 dbg("registering bus %d, dev %d, number %d, "
729 "ctrl->slot_device_offset %d, slot %d\n",
730 slot->bus, slot->device,
731 slot->number, ctrl->slot_device_offset,
732 slot_number);
733 result = pci_hp_register(hotplug_slot,
734 ctrl->pci_dev->bus,
735 slot->device,
736 name);
737 if (result) {
738 err("pci_hp_register failed with error %d\n", result);
739 goto error_info;
740 }
741
742 slot->next = ctrl->slot;
743 ctrl->slot = slot;
744
745 number_of_slots--;
746 slot_device++;
747 slot_number++;
748 }
749
750 return 0;
751error_info:
752 kfree(hotplug_slot_info);
753error_hpslot:
754 kfree(hotplug_slot);
755error_slot:
756 kfree(slot);
757error:
758 return result;
759}
760
761static int one_time_init(void)
762{
763 int loop;
764 int retval = 0;
765
766 if (initialized)
767 return 0;
768
769 power_mode = 0;
770
b019ee67 771 retval = init_cpqhp_routing_table();
b4d897a4
AC
772 if (retval)
773 goto error;
774
b019ee67
AC
775 if (cpqhp_debug)
776 pci_print_IRQ_route();
777
b4d897a4
AC
778 dbg("Initialize + Start the notification mechanism \n");
779
780 retval = cpqhp_event_start_thread();
781 if (retval)
782 goto error;
783
784 dbg("Initialize slot lists\n");
04225fe7 785 for (loop = 0; loop < 256; loop++)
b4d897a4 786 cpqhp_slot_list[loop] = NULL;
b4d897a4
AC
787
788 /* FIXME: We also need to hook the NMI handler eventually.
789 * this also needs to be worked with Christoph
790 * register_NMI_handler();
791 */
792 /* Map rom address */
793 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
794 if (!cpqhp_rom_start) {
795 err ("Could not ioremap memory region for ROM\n");
796 retval = -EIO;
797 goto error;
798 }
799
800 /* Now, map the int15 entry point if we are on compaq specific
801 * hardware
802 */
803 compaq_nvram_init(cpqhp_rom_start);
804
805 /* Map smbios table entry point structure */
806 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
807 cpqhp_rom_start + ROM_PHY_LEN);
808 if (!smbios_table) {
809 err ("Could not find the SMBIOS pointer in memory\n");
810 retval = -EIO;
811 goto error_rom_start;
812 }
813
814 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
815 readw(smbios_table + ST_LENGTH));
816 if (!smbios_start) {
817 err ("Could not ioremap memory region taken from SMBIOS values\n");
818 retval = -EIO;
819 goto error_smbios_start;
820 }
821
822 initialized = 1;
823
824 return retval;
825
826error_smbios_start:
827 iounmap(smbios_start);
828error_rom_start:
829 iounmap(cpqhp_rom_start);
830error:
831 return retval;
832}
833
1da177e4
LT
834static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
835{
836 u8 num_of_slots = 0;
837 u8 hp_slot = 0;
838 u8 device;
1da177e4
LT
839 u8 bus_cap;
840 u16 temp_word;
841 u16 vendor_id;
842 u16 subsystem_vid;
843 u16 subsystem_deviceid;
844 u32 rc;
845 struct controller *ctrl;
846 struct pci_func *func;
fe89cf4c
BH
847 int err;
848
849 err = pci_enable_device(pdev);
850 if (err) {
851 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
852 pci_name(pdev), err);
853 return err;
854 }
1da177e4 855
427438c6
AC
856 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
857 * discovery
858 */
1da177e4
LT
859 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
860 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
861 err(msg_HPC_non_compaq_or_intel);
fe89cf4c
BH
862 rc = -ENODEV;
863 goto err_disable_device;
1da177e4
LT
864 }
865 dbg("Vendor ID: %x\n", vendor_id);
866
44c10138
AK
867 dbg("revision: %d\n", pdev->revision);
868 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
1da177e4 869 err(msg_HPC_rev_error);
fe89cf4c
BH
870 rc = -ENODEV;
871 goto err_disable_device;
1da177e4
LT
872 }
873
874 /* Check for the proper subsytem ID's
861fefbf 875 * Intel uses a different SSID programming model than Compaq.
1da177e4
LT
876 * For Intel, each SSID bit identifies a PHP capability.
877 * Also Intel HPC's may have RID=0.
878 */
867556fe
AC
879 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
880 err(msg_HPC_not_supported);
881 return -ENODEV;
882 }
883
884 /* TODO: This code can be made to support non-Compaq or Intel
885 * subsystem IDs
886 */
887 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
888 if (rc) {
889 err("%s : pci_read_config_word failed\n", __func__);
890 goto err_disable_device;
891 }
892 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
893 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
894 err(msg_HPC_non_compaq_or_intel);
895 rc = -ENODEV;
896 goto err_disable_device;
897 }
898
899 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
900 if (!ctrl) {
901 err("%s : out of memory\n", __func__);
902 rc = -ENOMEM;
903 goto err_disable_device;
904 }
905
906 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
907 if (rc) {
908 err("%s : pci_read_config_word failed\n", __func__);
909 goto err_free_ctrl;
910 }
911
912 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
913
914 /* Set Vendor ID, so it can be accessed later from other
915 * functions
916 */
917 ctrl->vendor_id = vendor_id;
918
919 switch (subsystem_vid) {
920 case PCI_VENDOR_ID_COMPAQ:
921 if (pdev->revision >= 0x13) { /* CIOBX */
922 ctrl->push_flag = 1;
923 ctrl->slot_switch_type = 1;
924 ctrl->push_button = 1;
925 ctrl->pci_config_space = 1;
926 ctrl->defeature_PHP = 1;
927 ctrl->pcix_support = 1;
928 ctrl->pcix_speed_capability = 1;
929 pci_read_config_byte(pdev, 0x41, &bus_cap);
930 if (bus_cap & 0x80) {
931 dbg("bus max supports 133MHz PCI-X\n");
932 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
933 break;
934 }
935 if (bus_cap & 0x40) {
936 dbg("bus max supports 100MHz PCI-X\n");
937 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
938 break;
939 }
940 if (bus_cap & 20) {
941 dbg("bus max supports 66MHz PCI-X\n");
942 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
943 break;
944 }
945 if (bus_cap & 10) {
946 dbg("bus max supports 66MHz PCI\n");
947 ctrl->speed_capability = PCI_SPEED_66MHz;
948 break;
949 }
1da177e4 950
867556fe 951 break;
1da177e4 952 }
1da177e4 953
867556fe
AC
954 switch (subsystem_deviceid) {
955 case PCI_SUB_HPC_ID:
956 /* Original 6500/7000 implementation */
957 ctrl->slot_switch_type = 1;
958 ctrl->speed_capability = PCI_SPEED_33MHz;
959 ctrl->push_button = 0;
960 ctrl->pci_config_space = 1;
961 ctrl->defeature_PHP = 1;
962 ctrl->pcix_support = 0;
963 ctrl->pcix_speed_capability = 0;
964 break;
965 case PCI_SUB_HPC_ID2:
966 /* First Pushbutton implementation */
967 ctrl->push_flag = 1;
968 ctrl->slot_switch_type = 1;
969 ctrl->speed_capability = PCI_SPEED_33MHz;
970 ctrl->push_button = 1;
971 ctrl->pci_config_space = 1;
972 ctrl->defeature_PHP = 1;
973 ctrl->pcix_support = 0;
974 ctrl->pcix_speed_capability = 0;
975 break;
976 case PCI_SUB_HPC_ID_INTC:
977 /* Third party (6500/7000) */
978 ctrl->slot_switch_type = 1;
979 ctrl->speed_capability = PCI_SPEED_33MHz;
980 ctrl->push_button = 0;
981 ctrl->pci_config_space = 1;
982 ctrl->defeature_PHP = 1;
983 ctrl->pcix_support = 0;
984 ctrl->pcix_speed_capability = 0;
985 break;
986 case PCI_SUB_HPC_ID3:
987 /* First 66 Mhz implementation */
988 ctrl->push_flag = 1;
989 ctrl->slot_switch_type = 1;
990 ctrl->speed_capability = PCI_SPEED_66MHz;
991 ctrl->push_button = 1;
992 ctrl->pci_config_space = 1;
993 ctrl->defeature_PHP = 1;
994 ctrl->pcix_support = 0;
995 ctrl->pcix_speed_capability = 0;
996 break;
997 case PCI_SUB_HPC_ID4:
998 /* First PCI-X implementation, 100MHz */
999 ctrl->push_flag = 1;
1000 ctrl->slot_switch_type = 1;
1001 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
1002 ctrl->push_button = 1;
1003 ctrl->pci_config_space = 1;
1004 ctrl->defeature_PHP = 1;
1005 ctrl->pcix_support = 1;
1006 ctrl->pcix_speed_capability = 0;
1007 break;
1008 default:
1009 err(msg_HPC_not_supported);
1010 rc = -ENODEV;
1da177e4
LT
1011 goto err_free_ctrl;
1012 }
867556fe 1013 break;
1da177e4 1014
867556fe
AC
1015 case PCI_VENDOR_ID_INTEL:
1016 /* Check for speed capability (0=33, 1=66) */
1017 if (subsystem_deviceid & 0x0001)
1018 ctrl->speed_capability = PCI_SPEED_66MHz;
1019 else
1020 ctrl->speed_capability = PCI_SPEED_33MHz;
1da177e4 1021
867556fe
AC
1022 /* Check for push button */
1023 if (subsystem_deviceid & 0x0002)
1024 ctrl->push_button = 0;
1025 else
1026 ctrl->push_button = 1;
1da177e4 1027
867556fe
AC
1028 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1029 if (subsystem_deviceid & 0x0004)
1030 ctrl->slot_switch_type = 0;
1031 else
1032 ctrl->slot_switch_type = 1;
1033
1034 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1035 if (subsystem_deviceid & 0x0008)
1036 ctrl->defeature_PHP = 1; /* PHP supported */
1037 else
1038 ctrl->defeature_PHP = 0; /* PHP not supported */
1039
1040 /* Alternate Base Address Register Interface
1041 * (0=not supported, 1=supported)
1042 */
1043 if (subsystem_deviceid & 0x0010)
1044 ctrl->alternate_base_address = 1;
1045 else
1046 ctrl->alternate_base_address = 0;
1da177e4 1047
867556fe
AC
1048 /* PCI Config Space Index (0=not supported, 1=supported) */
1049 if (subsystem_deviceid & 0x0020)
1050 ctrl->pci_config_space = 1;
1051 else
1052 ctrl->pci_config_space = 0;
1053
1054 /* PCI-X support */
1055 if (subsystem_deviceid & 0x0080) {
1056 ctrl->pcix_support = 1;
1057 if (subsystem_deviceid & 0x0040)
1058 /* 133MHz PCI-X if bit 7 is 1 */
1059 ctrl->pcix_speed_capability = 1;
1060 else
1061 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1062 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1063 ctrl->pcix_speed_capability = 0;
1064 } else {
1065 /* Conventional PCI */
1066 ctrl->pcix_support = 0;
1067 ctrl->pcix_speed_capability = 0;
1da177e4 1068 }
867556fe 1069 break;
1da177e4 1070
867556fe 1071 default:
1da177e4 1072 err(msg_HPC_not_supported);
867556fe
AC
1073 rc = -ENODEV;
1074 goto err_free_ctrl;
1da177e4
LT
1075 }
1076
427438c6 1077 /* Tell the user that we found one. */
1da177e4
LT
1078 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1079 pdev->bus->number);
1080
1081 dbg("Hotplug controller capabilities:\n");
1082 dbg(" speed_capability %d\n", ctrl->speed_capability);
1083 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1084 "switch present" : "no switch");
1085 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1086 "PHP supported" : "PHP not supported");
1087 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1088 "supported" : "not supported");
1089 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1090 "supported" : "not supported");
1091 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1092 "supported" : "not supported");
1093 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1094 "supported" : "not supported");
1095
1096 ctrl->pci_dev = pdev;
1097 pci_set_drvdata(pdev, ctrl);
1098
1099 /* make our own copy of the pci bus structure,
1100 * as we like tweaking it a lot */
1101 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1102 if (!ctrl->pci_bus) {
1103 err("out of memory\n");
1104 rc = -ENOMEM;
1105 goto err_free_ctrl;
1106 }
1107 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1108
1109 ctrl->bus = pdev->bus->number;
44c10138 1110 ctrl->rev = pdev->revision;
1da177e4
LT
1111 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1112 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1113
6aa4cdd0 1114 mutex_init(&ctrl->crit_sect);
1da177e4
LT
1115 init_waitqueue_head(&ctrl->queue);
1116
1117 /* initialize our threads if they haven't already been started up */
1118 rc = one_time_init();
1119 if (rc) {
1120 goto err_free_bus;
1121 }
861fefbf 1122
1da177e4 1123 dbg("pdev = %p\n", pdev);
1396a8c3
GKH
1124 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1125 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1da177e4
LT
1126
1127 if (!request_mem_region(pci_resource_start(pdev, 0),
1128 pci_resource_len(pdev, 0), MY_NAME)) {
1129 err("cannot reserve MMIO region\n");
1130 rc = -ENOMEM;
1131 goto err_free_bus;
1132 }
1133
1134 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1135 pci_resource_len(pdev, 0));
1136 if (!ctrl->hpc_reg) {
1396a8c3
GKH
1137 err("cannot remap MMIO region %llx @ %llx\n",
1138 (unsigned long long)pci_resource_len(pdev, 0),
1139 (unsigned long long)pci_resource_start(pdev, 0));
1da177e4
LT
1140 rc = -ENODEV;
1141 goto err_free_mem_region;
1142 }
1143
867556fe 1144 /* Check for 66Mhz operation */
1da177e4
LT
1145 ctrl->speed = get_controller_speed(ctrl);
1146
1147
1148 /********************************************************
1149 *
1150 * Save configuration headers for this and
1151 * subordinate PCI buses
1152 *
1153 ********************************************************/
1154
427438c6 1155 /* find the physical slot number of the first hot plug slot */
1da177e4
LT
1156
1157 /* Get slot won't work for devices behind bridges, but
1158 * in this case it will always be called for the "base"
1159 * bus/dev/func of a slot.
1160 * CS: this is leveraging the PCIIRQ routing code from the kernel
1161 * (pci-pc.c: get_irq_routing_table) */
1162 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1163 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1164 &(ctrl->first_slot));
1165 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1166 ctrl->first_slot, rc);
1167 if (rc) {
1168 err(msg_initialization_err, rc);
1169 goto err_iounmap;
1170 }
1171
427438c6 1172 /* Store PCI Config Space for all devices on this bus */
1da177e4
LT
1173 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1174 if (rc) {
1175 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1176 __func__, rc);
1da177e4
LT
1177 goto err_iounmap;
1178 }
1179
1180 /*
1181 * Get IO, memory, and IRQ resources for new devices
1182 */
427438c6 1183 /* The next line is required for cpqhp_find_available_resources */
1da177e4
LT
1184 ctrl->interrupt = pdev->irq;
1185 if (ctrl->interrupt < 0x10) {
1186 cpqhp_legacy_mode = 1;
1187 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1188 }
1189
1190 ctrl->cfgspc_irq = 0;
1191 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1192
1193 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1194 ctrl->add_support = !rc;
1195 if (rc) {
1196 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1197 err("unable to locate PCI configuration resources for hot plug add.\n");
1198 goto err_iounmap;
1199 }
1200
1201 /*
1202 * Finish setting up the hot plug ctrl device
1203 */
1204 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1205 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1206
1207 ctrl->next_event = 0;
1208
1209 /* Setup the slot information structures */
1210 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1211 if (rc) {
1212 err(msg_initialization_err, 6);
1213 err("%s: unable to save PCI configuration data, error %d\n",
66bef8c0 1214 __func__, rc);
1da177e4
LT
1215 goto err_iounmap;
1216 }
861fefbf 1217
1da177e4
LT
1218 /* Mask all general input interrupts */
1219 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1220
1221 /* set up the interrupt */
1222 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1223 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
6b4486e2 1224 IRQF_SHARED, MY_NAME, ctrl)) {
1da177e4
LT
1225 err("Can't get irq %d for the hotplug pci controller\n",
1226 ctrl->interrupt);
1227 rc = -ENODEV;
1228 goto err_iounmap;
1229 }
1230
427438c6
AC
1231 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1232 * fault
1233 */
1da177e4
LT
1234 temp_word = readw(ctrl->hpc_reg + MISC);
1235 temp_word |= 0x4006;
1236 writew(temp_word, ctrl->hpc_reg + MISC);
1237
427438c6 1238 /* Changed 05/05/97 to clear all interrupts at start */
1da177e4
LT
1239 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1240
1241 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1242
1243 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1244
1245 if (!cpqhp_ctrl_list) {
1246 cpqhp_ctrl_list = ctrl;
1247 ctrl->next = NULL;
1248 } else {
1249 ctrl->next = cpqhp_ctrl_list;
1250 cpqhp_ctrl_list = ctrl;
1251 }
1252
427438c6
AC
1253 /* turn off empty slots here unless command line option "ON" set
1254 * Wait for exclusive access to hardware
1255 */
6aa4cdd0 1256 mutex_lock(&ctrl->crit_sect);
1da177e4
LT
1257
1258 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1259
427438c6 1260 /* find first device number for the ctrl */
1da177e4
LT
1261 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1262
1263 while (num_of_slots) {
1264 dbg("num_of_slots: %d\n", num_of_slots);
1265 func = cpqhp_slot_find(ctrl->bus, device, 0);
1266 if (!func)
1267 break;
1268
1269 hp_slot = func->device - ctrl->slot_device_offset;
1270 dbg("hp_slot: %d\n", hp_slot);
1271
427438c6 1272 /* We have to save the presence info for these slots */
1da177e4
LT
1273 temp_word = ctrl->ctrl_int_comp >> 16;
1274 func->presence_save = (temp_word >> hp_slot) & 0x01;
1275 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1276
04225fe7 1277 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1da177e4 1278 func->switch_save = 0;
04225fe7 1279 else
1da177e4 1280 func->switch_save = 0x10;
1da177e4 1281
04225fe7 1282 if (!power_mode)
1da177e4
LT
1283 if (!func->is_a_board) {
1284 green_LED_off(ctrl, hp_slot);
1285 slot_disable(ctrl, hp_slot);
1286 }
1da177e4
LT
1287
1288 device++;
1289 num_of_slots--;
1290 }
1291
1292 if (!power_mode) {
1293 set_SOGO(ctrl);
427438c6 1294 /* Wait for SOBS to be unset */
1da177e4
LT
1295 wait_for_ctrl_irq(ctrl);
1296 }
1297
1298 rc = init_SERR(ctrl);
1299 if (rc) {
1300 err("init_SERR failed\n");
6aa4cdd0 1301 mutex_unlock(&ctrl->crit_sect);
1da177e4
LT
1302 goto err_free_irq;
1303 }
1304
427438c6 1305 /* Done with exclusive hardware access */
6aa4cdd0 1306 mutex_unlock(&ctrl->crit_sect);
1da177e4 1307
9f3f4681 1308 cpqhp_create_debugfs_files(ctrl);
1da177e4
LT
1309
1310 return 0;
1311
1312err_free_irq:
1313 free_irq(ctrl->interrupt, ctrl);
1314err_iounmap:
1315 iounmap(ctrl->hpc_reg);
1316err_free_mem_region:
1317 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1318err_free_bus:
1319 kfree(ctrl->pci_bus);
1320err_free_ctrl:
1321 kfree(ctrl);
fe89cf4c
BH
1322err_disable_device:
1323 pci_disable_device(pdev);
1da177e4
LT
1324 return rc;
1325}
1326
1da177e4
LT
1327static void __exit unload_cpqphpd(void)
1328{
1329 struct pci_func *next;
1330 struct pci_func *TempSlot;
1331 int loop;
1332 u32 rc;
1333 struct controller *ctrl;
1334 struct controller *tctrl;
1335 struct pci_resource *res;
1336 struct pci_resource *tres;
1337
1338 rc = compaq_nvram_store(cpqhp_rom_start);
1339
1340 ctrl = cpqhp_ctrl_list;
1341
1342 while (ctrl) {
1343 if (ctrl->hpc_reg) {
1344 u16 misc;
1345 rc = read_slot_enable (ctrl);
861fefbf 1346
1da177e4
LT
1347 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1348 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
861fefbf 1349
1da177e4
LT
1350 misc = readw(ctrl->hpc_reg + MISC);
1351 misc &= 0xFFFD;
1352 writew(misc, ctrl->hpc_reg + MISC);
1353 }
1354
1355 ctrl_slot_cleanup(ctrl);
1356
1357 res = ctrl->io_head;
1358 while (res) {
1359 tres = res;
1360 res = res->next;
1361 kfree(tres);
1362 }
1363
1364 res = ctrl->mem_head;
1365 while (res) {
1366 tres = res;
1367 res = res->next;
1368 kfree(tres);
1369 }
1370
1371 res = ctrl->p_mem_head;
1372 while (res) {
1373 tres = res;
1374 res = res->next;
1375 kfree(tres);
1376 }
1377
1378 res = ctrl->bus_head;
1379 while (res) {
1380 tres = res;
1381 res = res->next;
1382 kfree(tres);
1383 }
1384
1385 kfree (ctrl->pci_bus);
1386
1387 tctrl = ctrl;
1388 ctrl = ctrl->next;
1389 kfree(tctrl);
1390 }
1391
1392 for (loop = 0; loop < 256; loop++) {
1393 next = cpqhp_slot_list[loop];
1394 while (next != NULL) {
1395 res = next->io_head;
1396 while (res) {
1397 tres = res;
1398 res = res->next;
1399 kfree(tres);
1400 }
1401
1402 res = next->mem_head;
1403 while (res) {
1404 tres = res;
1405 res = res->next;
1406 kfree(tres);
1407 }
1408
1409 res = next->p_mem_head;
1410 while (res) {
1411 tres = res;
1412 res = res->next;
1413 kfree(tres);
1414 }
1415
1416 res = next->bus_head;
1417 while (res) {
1418 tres = res;
1419 res = res->next;
1420 kfree(tres);
1421 }
1422
1423 TempSlot = next;
1424 next = next->next;
1425 kfree(TempSlot);
1426 }
1427 }
1428
427438c6 1429 /* Stop the notification mechanism */
4002307d
KM
1430 if (initialized)
1431 cpqhp_event_stop_thread();
1da177e4 1432
427438c6 1433 /* unmap the rom address */
1da177e4
LT
1434 if (cpqhp_rom_start)
1435 iounmap(cpqhp_rom_start);
1436 if (smbios_start)
1437 iounmap(smbios_start);
1438}
1439
1da177e4
LT
1440static struct pci_device_id hpcd_pci_tbl[] = {
1441 {
1442 /* handle any PCI Hotplug controller */
1443 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1444 .class_mask = ~0,
861fefbf 1445
1da177e4
LT
1446 /* no matter who makes it */
1447 .vendor = PCI_ANY_ID,
1448 .device = PCI_ANY_ID,
1449 .subvendor = PCI_ANY_ID,
1450 .subdevice = PCI_ANY_ID,
861fefbf 1451
1da177e4
LT
1452 }, { /* end: all zeroes */ }
1453};
1454
1455MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1456
1da177e4
LT
1457static struct pci_driver cpqhpc_driver = {
1458 .name = "compaq_pci_hotplug",
1459 .id_table = hpcd_pci_tbl,
1460 .probe = cpqhpc_probe,
1461 /* remove: cpqhpc_remove_one, */
1462};
1463
1da177e4
LT
1464static int __init cpqhpc_init(void)
1465{
1466 int result;
1467
1468 cpqhp_debug = debug;
1469
1470 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
9f3f4681 1471 cpqhp_initialize_debugfs();
1da177e4
LT
1472 result = pci_register_driver(&cpqhpc_driver);
1473 dbg("pci_register_driver = %d\n", result);
1474 return result;
1475}
1476
1da177e4
LT
1477static void __exit cpqhpc_cleanup(void)
1478{
1479 dbg("unload_cpqphpd()\n");
1480 unload_cpqphpd();
1481
1482 dbg("pci_unregister_driver\n");
1483 pci_unregister_driver(&cpqhpc_driver);
9f3f4681 1484 cpqhp_shutdown_debugfs();
1da177e4
LT
1485}
1486
1da177e4
LT
1487module_init(cpqhpc_init);
1488module_exit(cpqhpc_cleanup);