[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / parisc / superio.c

/*      National Semiconductor NS87560UBD Super I/O controller used in
 *      HP [BCJ]x000 workstations.
 *
 *      This chip is a horrid piece of engineering, and National
 *      denies any knowledge of its existence. Thus no datasheet is
 *      available off www.national.com. 
 *
 *	(C) Copyright 2000 Linuxcare, Inc.
 * 	(C) Copyright 2000 Linuxcare Canada, Inc.
 *	(C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
 * 	(C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
 *      (C) Copyright 2001 John Marvin <jsm fc hp com>
 *      (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
 *	(C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
 *	(C) Copyright 2006 Helge Deller <deller@gmx.de>
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License as
 *	published by the Free Software Foundation; either version 2 of
 *	the License, or (at your option) any later version.  
 *
 *	The initial version of this is by Martin Peterson.  Alex deVries
 *	has spent a bit of time trying to coax it into working.
 *
 *      Major changes to get basic interrupt infrastructure working to
 *      hopefully be able to support all SuperIO devices. Currently
 *      works with serial. -- John Marvin <jsm@fc.hp.com>
 *
 *	Converted superio_init() to be a PCI_FIXUP_FINAL callee.
 *         -- Kyle McMartin <kyle@parisc-linux.org>
 */


/* NOTES:
 * 
 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
 * controller (and identifies itself as such).
 *
 * Function 1 is a "Legacy I/O" controller. Under this function is a
 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
 * all the functionality in hardware, but the following is available:
 *
 *      Two 16550A compatible serial controllers
 *      An IEEE 1284 compatible parallel port
 *      A floppy disk controller
 *
 * Function 2 is a USB controller.
 *
 * We must be incredibly careful during initialization.  Since all
 * interrupts are routed through function 1 (which is not allowed by
 * the PCI spec), we need to program the PICs on the legacy I/O port
 * *before* we attempt to set up IDE and USB.  @#$!&
 *
 * According to HP, devices are only enabled by firmware if they have
 * a physical device connected.
 *
 * Configuration register bits:
 *     0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
 *     0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
 *
 */

#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/serial.h>
#include <linux/pci.h>
#include <linux/parport.h>
#include <linux/parport_pc.h>
#include <linux/termios.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
#include <linux/delay.h>

#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/superio.h>

static struct superio_device sio_dev;


#undef DEBUG_SUPERIO_INIT

#ifdef DEBUG_SUPERIO_INIT
#define DBG_INIT(x...)  printk(x)
#else
#define DBG_INIT(x...)
#endif

#define SUPERIO	"SuperIO"
#define PFX	SUPERIO ": "

static irqreturn_t
superio_interrupt(int parent_irq, void *devp)
{
	u8 results;
	u8 local_irq;

	/* Poll the 8259 to see if there's an interrupt. */
	outb (OCW3_POLL,IC_PIC1+0);

	results = inb(IC_PIC1+0);

	/*
	 * Bit    7:	1 = active Interrupt; 0 = no Interrupt pending
	 * Bits 6-3:	zero
	 * Bits 2-0:	highest priority, active requesting interrupt ID (0-7)
	 */
	if ((results & 0x80) == 0) {
		/* I suspect "spurious" interrupts are from unmasking an IRQ.
		 * We don't know if an interrupt was/is pending and thus
		 * just call the handler for that IRQ as if it were pending.
		 */
		return IRQ_NONE;
	}

	/* Check to see which device is interrupting */
	local_irq = results & 0x0f;

	if (local_irq == 2 || local_irq > 7) {
		printk(KERN_ERR PFX "slave interrupted!\n");
		return IRQ_HANDLED;
	}

	if (local_irq == 7) {

		/* Could be spurious. Check in service bits */

		outb(OCW3_ISR,IC_PIC1+0);
		results = inb(IC_PIC1+0);
		if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
			printk(KERN_WARNING PFX "spurious interrupt!\n");
			return IRQ_HANDLED;
		}
	}

	/* Call the appropriate device's interrupt */
	__do_IRQ(local_irq);

	/* set EOI - forces a new interrupt if a lower priority device
	 * still needs service.
	 */
	outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
	return IRQ_HANDLED;
}

/* Initialize Super I/O device */
static void
superio_init(struct pci_dev *pcidev)
{
	struct superio_device *sio = &sio_dev;
	struct pci_dev *pdev = sio->lio_pdev;
	u16 word;

	if (sio->suckyio_irq_enabled)
		return;

	BUG_ON(!pdev);
	BUG_ON(!sio->usb_pdev);

	/* use the IRQ iosapic found for USB INT D... */
	pdev->irq = sio->usb_pdev->irq;

	/* ...then properly fixup the USB to point at suckyio PIC */
	sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);

	printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
	       pci_name(pdev), pdev->irq);

	pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
	sio->sp1_base &= ~1;
	printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);

	pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
	sio->sp2_base &= ~1;
	printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);

	pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
	sio->pp_base &= ~1;
	printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);

	pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
	sio->fdc_base &= ~1;
	printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
	pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
	sio->acpi_base &= ~1;
	printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);

	request_region (IC_PIC1, 0x1f, "pic1");
	request_region (IC_PIC2, 0x1f, "pic2");
	request_region (sio->acpi_base, 0x1f, "acpi");

	/* Enable the legacy I/O function */
	pci_read_config_word (pdev, PCI_COMMAND, &word);
	word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
	pci_write_config_word (pdev, PCI_COMMAND, word);

	pci_set_master (pdev);
	pci_enable_device(pdev);

	/*
	 * Next project is programming the onboard interrupt controllers.
	 * PDC hasn't done this for us, since it's using polled I/O.
	 *
	 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
	 *     space access.  PCI is by nature a 32-bit bus and config
	 *     space can be sensitive to that.
	 */

	/* 0x64 - 0x67 :
		DMA Rtg 2
		DMA Rtg 3
		DMA Chan Ctl
		TRIGGER_1    == 0x82   USB & IDE level triggered, rest to edge
	*/
	pci_write_config_dword (pdev, 0x64,         0x82000000U);

	/* 0x68 - 0x6b :
		TRIGGER_2    == 0x00   all edge triggered (not used)
		CFG_IR_SER   == 0x43   SerPort1 = IRQ3, SerPort2 = IRQ4
		CFG_IR_PF    == 0x65   ParPort  = IRQ5, FloppyCtlr = IRQ6
		CFG_IR_IDE   == 0x07   IDE1 = IRQ7, reserved
	*/
	pci_write_config_dword (pdev, TRIGGER_2,    0x07654300U);

	/* 0x6c - 0x6f :
		CFG_IR_INTAB == 0x00
		CFG_IR_INTCD == 0x10   USB = IRQ1
		CFG_IR_PS2   == 0x00
		CFG_IR_FXBUS == 0x00
	*/
	pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);

	/* 0x70 - 0x73 :
		CFG_IR_USB   == 0x00  not used. USB is connected to INTD.
		CFG_IR_ACPI  == 0x00  not used.
		DMA Priority == 0x4c88  Power on default value. NFC.
	*/
	pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);

	/* PIC1 Initialization Command Word register programming */
	outb (0x11,IC_PIC1+0);	/* ICW1: ICW4 write req | ICW1 */
	outb (0x00,IC_PIC1+1);	/* ICW2: interrupt vector table - not used */
	outb (0x04,IC_PIC1+1);	/* ICW3: Cascade */
	outb (0x01,IC_PIC1+1);	/* ICW4: x86 mode */

	/* PIC1 Program Operational Control Words */
	outb (0xff,IC_PIC1+1);	/* OCW1: Mask all interrupts */
	outb (0xc2,IC_PIC1+0);  /* OCW2: priority (3-7,0-2) */

	/* PIC2 Initialization Command Word register programming */
	outb (0x11,IC_PIC2+0);	/* ICW1: ICW4 write req | ICW1 */
	outb (0x00,IC_PIC2+1);	/* ICW2: N/A */
	outb (0x02,IC_PIC2+1);	/* ICW3: Slave ID code */
	outb (0x01,IC_PIC2+1);	/* ICW4: x86 mode */
		
	/* Program Operational Control Words */
	outb (0xff,IC_PIC1+1);	/* OCW1: Mask all interrupts */
	outb (0x68,IC_PIC1+0);	/* OCW3: OCW3 select | ESMM | SMM */

	/* Write master mask reg */
	outb (0xff,IC_PIC1+1);

	/* Setup USB power regulation */
	outb(1, sio->acpi_base + USB_REG_CR);
	if (inb(sio->acpi_base + USB_REG_CR) & 1)
		printk(KERN_INFO PFX "USB regulator enabled\n");
	else
		printk(KERN_ERR PFX "USB regulator not initialized!\n");

	if (request_irq(pdev->irq, superio_interrupt, IRQF_DISABLED,
			SUPERIO, (void *)sio)) {

		printk(KERN_ERR PFX "could not get irq\n");
		BUG();
		return;
	}

	sio->suckyio_irq_enabled = 1;
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);

static void superio_disable_irq(unsigned int irq)
{
	u8 r8;

	if ((irq < 1) || (irq == 2) || (irq > 7)) {
		printk(KERN_ERR PFX "Illegal irq number.\n");
		BUG();
		return;
	}

	/* Mask interrupt */

	r8 = inb(IC_PIC1+1);
	r8 |= (1 << irq);
	outb (r8,IC_PIC1+1);
}

static void superio_enable_irq(unsigned int irq)
{
	u8 r8;

	if ((irq < 1) || (irq == 2) || (irq > 7)) {
		printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
		BUG();
		return;
	}

	/* Unmask interrupt */
	r8 = inb(IC_PIC1+1);
	r8 &= ~(1 << irq);
	outb (r8,IC_PIC1+1);
}

static unsigned int superio_startup_irq(unsigned int irq)
{
	superio_enable_irq(irq);
	return 0;
}

static struct hw_interrupt_type superio_interrupt_type = {
	.typename =	SUPERIO,
	.startup =	superio_startup_irq,
	.shutdown =	superio_disable_irq,
	.enable =	superio_enable_irq,
	.disable =	superio_disable_irq,
	.ack =		no_ack_irq,
	.end =		no_end_irq,
};

#ifdef DEBUG_SUPERIO_INIT
static unsigned short expected_device[3] = {
	PCI_DEVICE_ID_NS_87415,
	PCI_DEVICE_ID_NS_87560_LIO,
	PCI_DEVICE_ID_NS_87560_USB
};
#endif

int superio_fixup_irq(struct pci_dev *pcidev)
{
	int local_irq, i;

#ifdef DEBUG_SUPERIO_INIT
	int fn;
	fn = PCI_FUNC(pcidev->devfn);

	/* Verify the function number matches the expected device id. */
	if (expected_device[fn] != pcidev->device) {
		BUG();
		return -1;
	}
	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
		pci_name(pcidev),
		pcidev->vendor, pcidev->device,
		__builtin_return_address(0));
#endif

	for (i = 0; i < 16; i++) {
		irq_desc[i].chip = &superio_interrupt_type;
	}

	/*
	 * We don't allocate a SuperIO irq for the legacy IO function,
	 * since it is a "bridge". Instead, we will allocate irq's for
	 * each legacy device as they are initialized.
	 */

	switch(pcidev->device) {
	case PCI_DEVICE_ID_NS_87415:		/* Function 0 */
		local_irq = IDE_IRQ;
		break;
	case PCI_DEVICE_ID_NS_87560_LIO:	/* Function 1 */
		sio_dev.lio_pdev = pcidev;	/* save for superio_init() */
		return -1;
	case PCI_DEVICE_ID_NS_87560_USB:	/* Function 2 */
		sio_dev.usb_pdev = pcidev;	/* save for superio_init() */
		local_irq = USB_IRQ;
		break;
	default:
		local_irq = -1;
		BUG();
		break;
	}

	return local_irq;
}

static void __devinit superio_serial_init(void)
{
#ifdef CONFIG_SERIAL_8250
	int retval;
	struct uart_port serial_port;

	memset(&serial_port, 0, sizeof(serial_port));
	serial_port.iotype	= UPIO_PORT;
	serial_port.type	= PORT_16550A;
	serial_port.uartclk	= 115200*16;
	serial_port.fifosize	= 16;
	spin_lock_init(&serial_port.lock);

	/* serial port #1 */
	serial_port.iobase	= sio_dev.sp1_base;
	serial_port.irq		= SP1_IRQ;
	serial_port.line	= 0;
	retval = early_serial_setup(&serial_port);
	if (retval < 0) {
		printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
		return;
	}

	/* serial port #2 */
	serial_port.iobase	= sio_dev.sp2_base;
	serial_port.irq		= SP2_IRQ;
	serial_port.line	= 1;
	retval = early_serial_setup(&serial_port);
	if (retval < 0)
		printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
#endif /* CONFIG_SERIAL_8250 */
}


static void __devinit superio_parport_init(void)
{
#ifdef CONFIG_PARPORT_PC
	if (!parport_pc_probe_port(sio_dev.pp_base,
			0 /*base_hi*/,
			PAR_IRQ, 
			PARPORT_DMA_NONE /* dma */,
			NULL /*struct pci_dev* */) )

		printk(KERN_WARNING PFX "Probing parallel port failed.\n");
#endif	/* CONFIG_PARPORT_PC */
}


static void superio_fixup_pci(struct pci_dev *pdev)
{
	u8 prog;

	pdev->class |= 0x5;
	pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);

	pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
	printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);


static int __devinit
superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct superio_device *sio = &sio_dev;

	/*
	** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
	** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
	** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
	*/
	DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
		pci_name(dev),
		dev->vendor, dev->device,
		dev->subsystem_vendor, dev->subsystem_device,
		dev->class);

	BUG_ON(!sio->suckyio_irq_enabled);	/* Enabled by PCI_FIXUP_FINAL */

	if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) {	/* Function 1 */
		superio_parport_init();
		superio_serial_init();
		/* REVISIT XXX : superio_fdc_init() ? */
		return 0;
	} else if (dev->device == PCI_DEVICE_ID_NS_87415) {	/* Function 0 */
		DBG_INIT("superio_probe: ignoring IDE 87415\n");
	} else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) {	/* Function 2 */
		DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
	} else {
		DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
	}

	/* Let appropriate other driver claim this device. */
	return -ENODEV;
}

static struct pci_device_id superio_tbl[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
	{ 0, }
};

static struct pci_driver superio_driver = {
	.name =         SUPERIO,
	.id_table =     superio_tbl,
	.probe =        superio_probe,
};

static int __init superio_modinit(void)
{
	return pci_register_driver(&superio_driver);
}

static void __exit superio_exit(void)
{
	pci_unregister_driver(&superio_driver);
}

module_init(superio_modinit);
module_exit(superio_exit);
Commit	Line	Data
1da177e4 LT	1	/* National Semiconductor NS87560UBD Super I/O controller used in
	2	* HP [BCJ]x000 workstations.
	3	*
	4	* This chip is a horrid piece of engineering, and National
	5	* denies any knowledge of its existence. Thus no datasheet is
	6	* available off www.national.com.
	7	*
	8	* (C) Copyright 2000 Linuxcare, Inc.
	9	* (C) Copyright 2000 Linuxcare Canada, Inc.
	10	* (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
	11	* (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
	12	* (C) Copyright 2001 John Marvin <jsm fc hp com>
	13	* (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
7efe1611	14	* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
5076c158	15	* (C) Copyright 2006 Helge Deller <deller@gmx.de>
1da177e4 LT	16	*
	17	* This program is free software; you can redistribute it and/or
	18	* modify it under the terms of the GNU General Public License as
	19	* published by the Free Software Foundation; either version 2 of
	20	* the License, or (at your option) any later version.
	21	*
	22	* The initial version of this is by Martin Peterson. Alex deVries
	23	* has spent a bit of time trying to coax it into working.
	24	*
	25	* Major changes to get basic interrupt infrastructure working to
	26	* hopefully be able to support all SuperIO devices. Currently
	27	* works with serial. -- John Marvin <jsm@fc.hp.com>
a39cf72c KM	28	*
	29	* Converted superio_init() to be a PCI_FIXUP_FINAL callee.
	30	* -- Kyle McMartin <kyle@parisc-linux.org>
1da177e4 LT	31	*/
	32
	33
	34	/* NOTES:
	35	*
	36	* Function 0 is an IDE controller. It is identical to a PC87415 IDE
	37	* controller (and identifies itself as such).
	38	*
	39	* Function 1 is a "Legacy I/O" controller. Under this function is a
	40	* whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
	41	* all the functionality in hardware, but the following is available:
	42	*
	43	* Two 16550A compatible serial controllers
	44	* An IEEE 1284 compatible parallel port
	45	* A floppy disk controller
	46	*
	47	* Function 2 is a USB controller.
	48	*
	49	* We must be incredibly careful during initialization. Since all
	50	* interrupts are routed through function 1 (which is not allowed by
	51	* the PCI spec), we need to program the PICs on the legacy I/O port
	52	* before we attempt to set up IDE and USB. @#$!&
	53	*
	54	* According to HP, devices are only enabled by firmware if they have
	55	* a physical device connected.
	56	*
	57	* Configuration register bits:
	58	* 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
	59	* 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
	60	*
	61	*/
	62
	63	#include <linux/errno.h>
	64	#include <linux/init.h>
	65	#include <linux/module.h>
	66	#include <linux/types.h>
	67	#include <linux/interrupt.h>
	68	#include <linux/ioport.h>
	69	#include <linux/serial.h>
	70	#include <linux/pci.h>
	71	#include <linux/parport.h>
	72	#include <linux/parport_pc.h>
	73	#include <linux/termios.h>
	74	#include <linux/tty.h>
	75	#include <linux/serial_core.h>
	76	#include <linux/delay.h>
	77
	78	#include <asm/io.h>
	79	#include <asm/hardware.h>
	80	#include <asm/superio.h>
	81
	82	static struct superio_device sio_dev;
	83
	84
	85	#undef DEBUG_SUPERIO_INIT
	86
	87	#ifdef DEBUG_SUPERIO_INIT
	88	#define DBG_INIT(x...) printk(x)
	89	#else
	90	#define DBG_INIT(x...)
	91	#endif
	92
16541c87 KM	93	#define SUPERIO "SuperIO"
	94	#define PFX SUPERIO ": "
	95
1da177e4	96	static irqreturn_t
7d12e780	97	superio_interrupt(int parent_irq, void *devp)
1da177e4 LT	98	{
	99	u8 results;
	100	u8 local_irq;
	101
	102	/* Poll the 8259 to see if there's an interrupt. */
	103	outb (OCW3_POLL,IC_PIC1+0);
	104
	105	results = inb(IC_PIC1+0);
	106
	107	/*
	108	* Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
	109	* Bits 6-3: zero
	110	* Bits 2-0: highest priority, active requesting interrupt ID (0-7)
	111	*/
	112	if ((results & 0x80) == 0) {
	113	/* I suspect "spurious" interrupts are from unmasking an IRQ.
	114	* We don't know if an interrupt was/is pending and thus
	115	* just call the handler for that IRQ as if it were pending.
	116	*/
	117	return IRQ_NONE;
	118	}
	119
	120	/* Check to see which device is interrupting */
	121	local_irq = results & 0x0f;
	122
	123	if (local_irq == 2 \|\| local_irq > 7) {
16541c87	124	printk(KERN_ERR PFX "slave interrupted!\n");
1da177e4 LT	125	return IRQ_HANDLED;
	126	}
	127
	128	if (local_irq == 7) {
	129
	130	/* Could be spurious. Check in service bits */
	131
	132	outb(OCW3_ISR,IC_PIC1+0);
	133	results = inb(IC_PIC1+0);
	134	if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
16541c87	135	printk(KERN_WARNING PFX "spurious interrupt!\n");
1da177e4 LT	136	return IRQ_HANDLED;
	137	}
	138	}
	139
	140	/* Call the appropriate device's interrupt */
7d12e780	141	__do_IRQ(local_irq);
1da177e4 LT	142
	143	/* set EOI - forces a new interrupt if a lower priority device
	144	* still needs service.
	145	*/
	146	outb((OCW2_SEOI\|local_irq),IC_PIC1 + 0);
	147	return IRQ_HANDLED;
	148	}
	149
	150	/* Initialize Super I/O device */
a39cf72c KM	151	static void
a39cf72c KM	152	superio_init(struct pci_dev *pcidev)
1da177e4	153	{
a39cf72c	154	struct superio_device *sio = &sio_dev;
1da177e4 LT	155	struct pci_dev *pdev = sio->lio_pdev;
	156	u16 word;
	157
67a5a59d	158	if (sio->suckyio_irq_enabled)
1da177e4 LT	159	return;
1da177e4 LT	160
b7494554 ES	161	BUG_ON(!pdev);
b7494554 ES	162	BUG_ON(!sio->usb_pdev);
1da177e4 LT	163
	164	/* use the IRQ iosapic found for USB INT D... */
	165	pdev->irq = sio->usb_pdev->irq;
	166
	167	/* ...then properly fixup the USB to point at suckyio PIC */
	168	sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
	169
16541c87	170	printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
a39cf72c	171	pci_name(pdev), pdev->irq);
1da177e4 LT	172
	173	pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
	174	sio->sp1_base &= ~1;
16541c87	175	printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
1da177e4 LT	176
	177	pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
	178	sio->sp2_base &= ~1;
16541c87	179	printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
1da177e4 LT	180
	181	pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
	182	sio->pp_base &= ~1;
16541c87	183	printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
1da177e4 LT	184
	185	pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
	186	sio->fdc_base &= ~1;
16541c87	187	printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
1da177e4 LT	188	pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
1da177e4 LT	189	sio->acpi_base &= ~1;
16541c87	190	printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
1da177e4 LT	191
	192	request_region (IC_PIC1, 0x1f, "pic1");
	193	request_region (IC_PIC2, 0x1f, "pic2");
	194	request_region (sio->acpi_base, 0x1f, "acpi");
	195
	196	/* Enable the legacy I/O function */
67a5a59d	197	pci_read_config_word (pdev, PCI_COMMAND, &word);
1da177e4 LT	198	word \|= PCI_COMMAND_SERR \| PCI_COMMAND_PARITY \| PCI_COMMAND_IO;
	199	pci_write_config_word (pdev, PCI_COMMAND, word);
	200
	201	pci_set_master (pdev);
	202	pci_enable_device(pdev);
	203
	204	/*
	205	* Next project is programming the onboard interrupt controllers.
	206	* PDC hasn't done this for us, since it's using polled I/O.
	207	*
	208	* XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
	209	* space access. PCI is by nature a 32-bit bus and config
	210	* space can be sensitive to that.
	211	*/
	212
	213	/* 0x64 - 0x67 :
	214	DMA Rtg 2
	215	DMA Rtg 3
	216	DMA Chan Ctl
	217	TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
	218	*/
	219	pci_write_config_dword (pdev, 0x64, 0x82000000U);
	220
	221	/* 0x68 - 0x6b :
	222	TRIGGER_2 == 0x00 all edge triggered (not used)
	223	CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
	224	CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
	225	CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
	226	*/
	227	pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
	228
	229	/* 0x6c - 0x6f :
	230	CFG_IR_INTAB == 0x00
	231	CFG_IR_INTCD == 0x10 USB = IRQ1
	232	CFG_IR_PS2 == 0x00
	233	CFG_IR_FXBUS == 0x00
	234	*/
	235	pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
	236
	237	/* 0x70 - 0x73 :
	238	CFG_IR_USB == 0x00 not used. USB is connected to INTD.
	239	CFG_IR_ACPI == 0x00 not used.
	240	DMA Priority == 0x4c88 Power on default value. NFC.
	241	*/
	242	pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
	243
	244	/* PIC1 Initialization Command Word register programming */
	245	outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req \| ICW1 */
	246	outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
	247	outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
	248	outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
	249
	250	/* PIC1 Program Operational Control Words */
	251	outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
	252	outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
	253
	254	/* PIC2 Initialization Command Word register programming */
	255	outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req \| ICW1 */
	256	outb (0x00,IC_PIC2+1); /* ICW2: N/A */
	257	outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
	258	outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
	259
	260	/* Program Operational Control Words */
	261	outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
262	outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select \| ESMM \| SMM */
263
264	/* Write master mask reg */
265	outb (0xff,IC_PIC1+1);
266
267	/* Setup USB power regulation */
268	outb(1, sio->acpi_base + USB_REG_CR);
269	if (inb(sio->acpi_base + USB_REG_CR) & 1)
16541c87	270	printk(KERN_INFO PFX "USB regulator enabled\n");
1da177e4	271	else
16541c87	272	printk(KERN_ERR PFX "USB regulator not initialized!\n");
1da177e4	273
8c56e721	274	if (request_irq(pdev->irq, superio_interrupt, IRQF_DISABLED,
16541c87	275	SUPERIO, (void *)sio)) {
1da177e4	276
16541c87	277	printk(KERN_ERR PFX "could not get irq\n");
1da177e4 LT	278	BUG();
	279	return;
	280	}
	281
	282	sio->suckyio_irq_enabled = 1;
	283	}
a39cf72c	284	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
1da177e4 LT	285
	286	static void superio_disable_irq(unsigned int irq)
	287	{
	288	u8 r8;
	289
	290	if ((irq < 1) \|\| (irq == 2) \|\| (irq > 7)) {
16541c87	291	printk(KERN_ERR PFX "Illegal irq number.\n");
1da177e4 LT	292	BUG();
	293	return;
	294	}
	295
	296	/* Mask interrupt */
	297
	298	r8 = inb(IC_PIC1+1);
	299	r8 \|= (1 << irq);
	300	outb (r8,IC_PIC1+1);
	301	}
	302
	303	static void superio_enable_irq(unsigned int irq)
	304	{
	305	u8 r8;
	306
	307	if ((irq < 1) \|\| (irq == 2) \|\| (irq > 7)) {
16541c87	308	printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
1da177e4 LT	309	BUG();
	310	return;
	311	}
	312
	313	/* Unmask interrupt */
	314	r8 = inb(IC_PIC1+1);
	315	r8 &= ~(1 << irq);
	316	outb (r8,IC_PIC1+1);
	317	}
	318
	319	static unsigned int superio_startup_irq(unsigned int irq)
	320	{
	321	superio_enable_irq(irq);
	322	return 0;
	323	}
	324
	325	static struct hw_interrupt_type superio_interrupt_type = {
16541c87	326	.typename = SUPERIO,
1da177e4 LT	327	.startup = superio_startup_irq,
	328	.shutdown = superio_disable_irq,
	329	.enable = superio_enable_irq,
	330	.disable = superio_disable_irq,
	331	.ack = no_ack_irq,
	332	.end = no_end_irq,
	333	};
	334
	335	#ifdef DEBUG_SUPERIO_INIT
	336	static unsigned short expected_device[3] = {
	337	PCI_DEVICE_ID_NS_87415,
	338	PCI_DEVICE_ID_NS_87560_LIO,
	339	PCI_DEVICE_ID_NS_87560_USB
	340	};
	341	#endif
	342
	343	int superio_fixup_irq(struct pci_dev *pcidev)
	344	{
	345	int local_irq, i;
	346
	347	#ifdef DEBUG_SUPERIO_INIT
	348	int fn;
	349	fn = PCI_FUNC(pcidev->devfn);
	350
	351	/* Verify the function number matches the expected device id. */
	352	if (expected_device[fn] != pcidev->device) {
	353	BUG();
	354	return -1;
	355	}
	356	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
	357	pci_name(pcidev),
	358	pcidev->vendor, pcidev->device,
	359	__builtin_return_address(0));
	360	#endif
	361
	362	for (i = 0; i < 16; i++) {
d1bef4ed	363	irq_desc[i].chip = &superio_interrupt_type;
1da177e4 LT	364	}
	365
	366	/*
	367	* We don't allocate a SuperIO irq for the legacy IO function,
	368	* since it is a "bridge". Instead, we will allocate irq's for
	369	* each legacy device as they are initialized.
	370	*/
	371
	372	switch(pcidev->device) {
	373	case PCI_DEVICE_ID_NS_87415: /* Function 0 */
	374	local_irq = IDE_IRQ;
	375	break;
	376	case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
	377	sio_dev.lio_pdev = pcidev; /* save for superio_init() */
	378	return -1;
	379	case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
	380	sio_dev.usb_pdev = pcidev; /* save for superio_init() */
	381	local_irq = USB_IRQ;
	382	break;
	383	default:
	384	local_irq = -1;
	385	BUG();
	386	break;
	387	}
	388
	389	return local_irq;
	390	}
	391
1da177e4 LT	392	static void __devinit superio_serial_init(void)
	393	{
	394	#ifdef CONFIG_SERIAL_8250
	395	int retval;
5076c158 HD	396	struct uart_port serial_port;
	397
	398	memset(&serial_port, 0, sizeof(serial_port));
	399	serial_port.iotype = UPIO_PORT;
	400	serial_port.type = PORT_16550A;
	401	serial_port.uartclk = 115200*16;
	402	serial_port.fifosize = 16;
	403	spin_lock_init(&serial_port.lock);
	404
	405	/* serial port #1 */
	406	serial_port.iobase = sio_dev.sp1_base;
	407	serial_port.irq = SP1_IRQ;
	408	serial_port.line = 0;
	409	retval = early_serial_setup(&serial_port);
1da177e4	410	if (retval < 0) {
16541c87	411	printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
1da177e4 LT	412	return;
	413	}
	414
5076c158 HD	415	/* serial port #2 */
	416	serial_port.iobase = sio_dev.sp2_base;
	417	serial_port.irq = SP2_IRQ;
	418	serial_port.line = 1;
	419	retval = early_serial_setup(&serial_port);
1da177e4	420	if (retval < 0)
16541c87	421	printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
1da177e4 LT	422	#endif /* CONFIG_SERIAL_8250 */
	423	}
	424
	425
	426	static void __devinit superio_parport_init(void)
	427	{
	428	#ifdef CONFIG_PARPORT_PC
	429	if (!parport_pc_probe_port(sio_dev.pp_base,
	430	0 /base_hi/,
	431	PAR_IRQ,
	432	PARPORT_DMA_NONE /* dma */,
	433	NULL /struct pci_dev */) )
	434
16541c87	435	printk(KERN_WARNING PFX "Probing parallel port failed.\n");
1da177e4 LT	436	#endif /* CONFIG_PARPORT_PC */
	437	}
	438
	439
	440	static void superio_fixup_pci(struct pci_dev *pdev)
	441	{
	442	u8 prog;
	443
	444	pdev->class \|= 0x5;
	445	pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
	446
	447	pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
	448	printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
	449	}
	450	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
	451
	452
a39cf72c KM	453	static int __devinit
a39cf72c KM	454	superio_probe(struct pci_dev dev, const struct pci_device_id id)
1da177e4	455	{
a39cf72c	456	struct superio_device *sio = &sio_dev;
1da177e4 LT	457
	458	/*
	459	** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
	460	** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
	461	** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
	462	*/
	463	DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
	464	pci_name(dev),
	465	dev->vendor, dev->device,
	466	dev->subsystem_vendor, dev->subsystem_device,
	467	dev->class);
	468
b7494554	469	BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
1da177e4 LT	470
	471	if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
	472	superio_parport_init();
	473	superio_serial_init();
	474	/* REVISIT XXX : superio_fdc_init() ? */
	475	return 0;
	476	} else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
	477	DBG_INIT("superio_probe: ignoring IDE 87415\n");
	478	} else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
	479	DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
	480	} else {
	481	DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
	482	}
	483
a39cf72c	484	/* Let appropriate other driver claim this device. */
1da177e4 LT	485	return -ENODEV;
	486	}
	487
	488	static struct pci_device_id superio_tbl[] = {
a39cf72c KM	489	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
	490	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
	491	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
1da177e4 LT	492	{ 0, }
	493	};
	494
	495	static struct pci_driver superio_driver = {
16541c87	496	.name = SUPERIO,
a39cf72c KM	497	.id_table = superio_tbl,
a39cf72c KM	498	.probe = superio_probe,
1da177e4 LT	499	};
	500
	501	static int __init superio_modinit(void)
	502	{
	503	return pci_register_driver(&superio_driver);
	504	}
	505
	506	static void __exit superio_exit(void)
	507	{
	508	pci_unregister_driver(&superio_driver);
	509	}
	510
1da177e4 LT	511	module_init(superio_modinit);
1da177e4 LT	512	module_exit(superio_exit);