Merge branch 'next/fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / of / address.c
CommitLineData
6b884a8d
GL
1
2#include <linux/io.h>
3#include <linux/ioport.h>
dbbdee94 4#include <linux/module.h>
6b884a8d 5#include <linux/of_address.h>
dbbdee94
GL
6#include <linux/pci_regs.h>
7#include <linux/string.h>
6b884a8d 8
dbbdee94
GL
9/* Max address size we deal with */
10#define OF_MAX_ADDR_CELLS 4
11#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
12 (ns) > 0)
13
14static struct of_bus *of_match_bus(struct device_node *np);
0131d897
SAS
15static int __of_address_to_resource(struct device_node *dev,
16 const __be32 *addrp, u64 size, unsigned int flags,
dbbdee94
GL
17 struct resource *r);
18
19/* Debug utility */
20#ifdef DEBUG
0131d897 21static void of_dump_addr(const char *s, const __be32 *addr, int na)
dbbdee94
GL
22{
23 printk(KERN_DEBUG "%s", s);
24 while (na--)
154063a9 25 printk(" %08x", be32_to_cpu(*(addr++)));
dbbdee94
GL
26 printk("\n");
27}
28#else
0131d897 29static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
dbbdee94
GL
30#endif
31
32/* Callbacks for bus specific translators */
33struct of_bus {
34 const char *name;
35 const char *addresses;
36 int (*match)(struct device_node *parent);
37 void (*count_cells)(struct device_node *child,
38 int *addrc, int *sizec);
0131d897 39 u64 (*map)(u32 *addr, const __be32 *range,
dbbdee94
GL
40 int na, int ns, int pna);
41 int (*translate)(u32 *addr, u64 offset, int na);
0131d897 42 unsigned int (*get_flags)(const __be32 *addr);
dbbdee94
GL
43};
44
45/*
46 * Default translator (generic bus)
47 */
48
49static void of_bus_default_count_cells(struct device_node *dev,
50 int *addrc, int *sizec)
51{
52 if (addrc)
53 *addrc = of_n_addr_cells(dev);
54 if (sizec)
55 *sizec = of_n_size_cells(dev);
56}
57
0131d897 58static u64 of_bus_default_map(u32 *addr, const __be32 *range,
dbbdee94
GL
59 int na, int ns, int pna)
60{
61 u64 cp, s, da;
62
63 cp = of_read_number(range, na);
64 s = of_read_number(range + na + pna, ns);
65 da = of_read_number(addr, na);
66
67 pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
68 (unsigned long long)cp, (unsigned long long)s,
69 (unsigned long long)da);
70
71 if (da < cp || da >= (cp + s))
72 return OF_BAD_ADDR;
73 return da - cp;
74}
75
76static int of_bus_default_translate(u32 *addr, u64 offset, int na)
77{
78 u64 a = of_read_number(addr, na);
79 memset(addr, 0, na * 4);
80 a += offset;
81 if (na > 1)
154063a9
GL
82 addr[na - 2] = cpu_to_be32(a >> 32);
83 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
dbbdee94
GL
84
85 return 0;
86}
87
0131d897 88static unsigned int of_bus_default_get_flags(const __be32 *addr)
dbbdee94
GL
89{
90 return IORESOURCE_MEM;
91}
92
93#ifdef CONFIG_PCI
94/*
95 * PCI bus specific translator
96 */
97
98static int of_bus_pci_match(struct device_node *np)
99{
100 /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */
101 return !strcmp(np->type, "pci") || !strcmp(np->type, "vci");
102}
103
104static void of_bus_pci_count_cells(struct device_node *np,
105 int *addrc, int *sizec)
106{
107 if (addrc)
108 *addrc = 3;
109 if (sizec)
110 *sizec = 2;
111}
112
0131d897 113static unsigned int of_bus_pci_get_flags(const __be32 *addr)
dbbdee94
GL
114{
115 unsigned int flags = 0;
0131d897 116 u32 w = be32_to_cpup(addr);
dbbdee94
GL
117
118 switch((w >> 24) & 0x03) {
119 case 0x01:
120 flags |= IORESOURCE_IO;
121 break;
122 case 0x02: /* 32 bits */
123 case 0x03: /* 64 bits */
124 flags |= IORESOURCE_MEM;
125 break;
126 }
127 if (w & 0x40000000)
128 flags |= IORESOURCE_PREFETCH;
129 return flags;
130}
131
0131d897
SAS
132static u64 of_bus_pci_map(u32 *addr, const __be32 *range, int na, int ns,
133 int pna)
dbbdee94
GL
134{
135 u64 cp, s, da;
136 unsigned int af, rf;
137
138 af = of_bus_pci_get_flags(addr);
139 rf = of_bus_pci_get_flags(range);
140
141 /* Check address type match */
142 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
143 return OF_BAD_ADDR;
144
145 /* Read address values, skipping high cell */
146 cp = of_read_number(range + 1, na - 1);
147 s = of_read_number(range + na + pna, ns);
148 da = of_read_number(addr + 1, na - 1);
149
150 pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
151 (unsigned long long)cp, (unsigned long long)s,
152 (unsigned long long)da);
153
154 if (da < cp || da >= (cp + s))
155 return OF_BAD_ADDR;
156 return da - cp;
157}
158
159static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
160{
161 return of_bus_default_translate(addr + 1, offset, na - 1);
162}
163
0131d897 164const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
dbbdee94
GL
165 unsigned int *flags)
166{
a9fadeef 167 const __be32 *prop;
dbbdee94
GL
168 unsigned int psize;
169 struct device_node *parent;
170 struct of_bus *bus;
171 int onesize, i, na, ns;
172
173 /* Get parent & match bus type */
174 parent = of_get_parent(dev);
175 if (parent == NULL)
176 return NULL;
177 bus = of_match_bus(parent);
178 if (strcmp(bus->name, "pci")) {
179 of_node_put(parent);
180 return NULL;
181 }
182 bus->count_cells(dev, &na, &ns);
183 of_node_put(parent);
184 if (!OF_CHECK_COUNTS(na, ns))
185 return NULL;
186
187 /* Get "reg" or "assigned-addresses" property */
188 prop = of_get_property(dev, bus->addresses, &psize);
189 if (prop == NULL)
190 return NULL;
191 psize /= 4;
192
193 onesize = na + ns;
154063a9
GL
194 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
195 u32 val = be32_to_cpu(prop[0]);
196 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
dbbdee94
GL
197 if (size)
198 *size = of_read_number(prop + na, ns);
199 if (flags)
200 *flags = bus->get_flags(prop);
201 return prop;
202 }
154063a9 203 }
dbbdee94
GL
204 return NULL;
205}
206EXPORT_SYMBOL(of_get_pci_address);
207
208int of_pci_address_to_resource(struct device_node *dev, int bar,
209 struct resource *r)
210{
0131d897 211 const __be32 *addrp;
dbbdee94
GL
212 u64 size;
213 unsigned int flags;
214
215 addrp = of_get_pci_address(dev, bar, &size, &flags);
216 if (addrp == NULL)
217 return -EINVAL;
218 return __of_address_to_resource(dev, addrp, size, flags, r);
219}
220EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
221#endif /* CONFIG_PCI */
222
223/*
224 * ISA bus specific translator
225 */
226
227static int of_bus_isa_match(struct device_node *np)
228{
229 return !strcmp(np->name, "isa");
230}
231
232static void of_bus_isa_count_cells(struct device_node *child,
233 int *addrc, int *sizec)
234{
235 if (addrc)
236 *addrc = 2;
237 if (sizec)
238 *sizec = 1;
239}
240
0131d897
SAS
241static u64 of_bus_isa_map(u32 *addr, const __be32 *range, int na, int ns,
242 int pna)
dbbdee94
GL
243{
244 u64 cp, s, da;
245
246 /* Check address type match */
0131d897 247 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
dbbdee94
GL
248 return OF_BAD_ADDR;
249
250 /* Read address values, skipping high cell */
251 cp = of_read_number(range + 1, na - 1);
252 s = of_read_number(range + na + pna, ns);
253 da = of_read_number(addr + 1, na - 1);
254
255 pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
256 (unsigned long long)cp, (unsigned long long)s,
257 (unsigned long long)da);
258
259 if (da < cp || da >= (cp + s))
260 return OF_BAD_ADDR;
261 return da - cp;
262}
263
264static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
265{
266 return of_bus_default_translate(addr + 1, offset, na - 1);
267}
268
0131d897 269static unsigned int of_bus_isa_get_flags(const __be32 *addr)
dbbdee94
GL
270{
271 unsigned int flags = 0;
0131d897 272 u32 w = be32_to_cpup(addr);
dbbdee94
GL
273
274 if (w & 1)
275 flags |= IORESOURCE_IO;
276 else
277 flags |= IORESOURCE_MEM;
278 return flags;
279}
280
281/*
282 * Array of bus specific translators
283 */
284
285static struct of_bus of_busses[] = {
286#ifdef CONFIG_PCI
287 /* PCI */
288 {
289 .name = "pci",
290 .addresses = "assigned-addresses",
291 .match = of_bus_pci_match,
292 .count_cells = of_bus_pci_count_cells,
293 .map = of_bus_pci_map,
294 .translate = of_bus_pci_translate,
295 .get_flags = of_bus_pci_get_flags,
296 },
297#endif /* CONFIG_PCI */
298 /* ISA */
299 {
300 .name = "isa",
301 .addresses = "reg",
302 .match = of_bus_isa_match,
303 .count_cells = of_bus_isa_count_cells,
304 .map = of_bus_isa_map,
305 .translate = of_bus_isa_translate,
306 .get_flags = of_bus_isa_get_flags,
307 },
308 /* Default */
309 {
310 .name = "default",
311 .addresses = "reg",
312 .match = NULL,
313 .count_cells = of_bus_default_count_cells,
314 .map = of_bus_default_map,
315 .translate = of_bus_default_translate,
316 .get_flags = of_bus_default_get_flags,
317 },
318};
319
320static struct of_bus *of_match_bus(struct device_node *np)
321{
322 int i;
323
324 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
325 if (!of_busses[i].match || of_busses[i].match(np))
326 return &of_busses[i];
327 BUG();
328 return NULL;
329}
330
331static int of_translate_one(struct device_node *parent, struct of_bus *bus,
332 struct of_bus *pbus, u32 *addr,
333 int na, int ns, int pna, const char *rprop)
334{
0131d897 335 const __be32 *ranges;
dbbdee94
GL
336 unsigned int rlen;
337 int rone;
338 u64 offset = OF_BAD_ADDR;
339
340 /* Normally, an absence of a "ranges" property means we are
341 * crossing a non-translatable boundary, and thus the addresses
342 * below the current not cannot be converted to CPU physical ones.
343 * Unfortunately, while this is very clear in the spec, it's not
344 * what Apple understood, and they do have things like /uni-n or
345 * /ht nodes with no "ranges" property and a lot of perfectly
346 * useable mapped devices below them. Thus we treat the absence of
347 * "ranges" as equivalent to an empty "ranges" property which means
348 * a 1:1 translation at that level. It's up to the caller not to try
349 * to translate addresses that aren't supposed to be translated in
350 * the first place. --BenH.
3930f294
GL
351 *
352 * As far as we know, this damage only exists on Apple machines, so
353 * This code is only enabled on powerpc. --gcl
dbbdee94
GL
354 */
355 ranges = of_get_property(parent, rprop, &rlen);
3930f294
GL
356#if !defined(CONFIG_PPC)
357 if (ranges == NULL) {
358 pr_err("OF: no ranges; cannot translate\n");
359 return 1;
360 }
361#endif /* !defined(CONFIG_PPC) */
dbbdee94
GL
362 if (ranges == NULL || rlen == 0) {
363 offset = of_read_number(addr, na);
364 memset(addr, 0, pna * 4);
3930f294 365 pr_debug("OF: empty ranges; 1:1 translation\n");
dbbdee94
GL
366 goto finish;
367 }
368
369 pr_debug("OF: walking ranges...\n");
370
371 /* Now walk through the ranges */
372 rlen /= 4;
373 rone = na + pna + ns;
374 for (; rlen >= rone; rlen -= rone, ranges += rone) {
375 offset = bus->map(addr, ranges, na, ns, pna);
376 if (offset != OF_BAD_ADDR)
377 break;
378 }
379 if (offset == OF_BAD_ADDR) {
380 pr_debug("OF: not found !\n");
381 return 1;
382 }
383 memcpy(addr, ranges + na, 4 * pna);
384
385 finish:
386 of_dump_addr("OF: parent translation for:", addr, pna);
387 pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
388
389 /* Translate it into parent bus space */
390 return pbus->translate(addr, offset, pna);
391}
392
393/*
394 * Translate an address from the device-tree into a CPU physical address,
395 * this walks up the tree and applies the various bus mappings on the
396 * way.
397 *
398 * Note: We consider that crossing any level with #size-cells == 0 to mean
399 * that translation is impossible (that is we are not dealing with a value
400 * that can be mapped to a cpu physical address). This is not really specified
401 * that way, but this is traditionally the way IBM at least do things
402 */
0131d897 403u64 __of_translate_address(struct device_node *dev, const __be32 *in_addr,
dbbdee94
GL
404 const char *rprop)
405{
406 struct device_node *parent = NULL;
407 struct of_bus *bus, *pbus;
408 u32 addr[OF_MAX_ADDR_CELLS];
409 int na, ns, pna, pns;
410 u64 result = OF_BAD_ADDR;
411
412 pr_debug("OF: ** translation for device %s **\n", dev->full_name);
413
414 /* Increase refcount at current level */
415 of_node_get(dev);
416
417 /* Get parent & match bus type */
418 parent = of_get_parent(dev);
419 if (parent == NULL)
420 goto bail;
421 bus = of_match_bus(parent);
422
423 /* Cound address cells & copy address locally */
424 bus->count_cells(dev, &na, &ns);
425 if (!OF_CHECK_COUNTS(na, ns)) {
426 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
427 dev->full_name);
428 goto bail;
429 }
430 memcpy(addr, in_addr, na * 4);
431
432 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
433 bus->name, na, ns, parent->full_name);
434 of_dump_addr("OF: translating address:", addr, na);
435
436 /* Translate */
437 for (;;) {
438 /* Switch to parent bus */
439 of_node_put(dev);
440 dev = parent;
441 parent = of_get_parent(dev);
442
443 /* If root, we have finished */
444 if (parent == NULL) {
445 pr_debug("OF: reached root node\n");
446 result = of_read_number(addr, na);
447 break;
448 }
449
450 /* Get new parent bus and counts */
451 pbus = of_match_bus(parent);
452 pbus->count_cells(dev, &pna, &pns);
453 if (!OF_CHECK_COUNTS(pna, pns)) {
454 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
455 dev->full_name);
456 break;
457 }
458
459 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
460 pbus->name, pna, pns, parent->full_name);
461
462 /* Apply bus translation */
463 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
464 break;
465
466 /* Complete the move up one level */
467 na = pna;
468 ns = pns;
469 bus = pbus;
470
471 of_dump_addr("OF: one level translation:", addr, na);
472 }
473 bail:
474 of_node_put(parent);
475 of_node_put(dev);
476
477 return result;
478}
479
0131d897 480u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94
GL
481{
482 return __of_translate_address(dev, in_addr, "ranges");
483}
484EXPORT_SYMBOL(of_translate_address);
485
0131d897 486u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94
GL
487{
488 return __of_translate_address(dev, in_addr, "dma-ranges");
489}
490EXPORT_SYMBOL(of_translate_dma_address);
491
0131d897 492const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
dbbdee94
GL
493 unsigned int *flags)
494{
0131d897 495 const __be32 *prop;
dbbdee94
GL
496 unsigned int psize;
497 struct device_node *parent;
498 struct of_bus *bus;
499 int onesize, i, na, ns;
500
501 /* Get parent & match bus type */
502 parent = of_get_parent(dev);
503 if (parent == NULL)
504 return NULL;
505 bus = of_match_bus(parent);
506 bus->count_cells(dev, &na, &ns);
507 of_node_put(parent);
508 if (!OF_CHECK_COUNTS(na, ns))
509 return NULL;
510
511 /* Get "reg" or "assigned-addresses" property */
512 prop = of_get_property(dev, bus->addresses, &psize);
513 if (prop == NULL)
514 return NULL;
515 psize /= 4;
516
517 onesize = na + ns;
518 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
519 if (i == index) {
520 if (size)
521 *size = of_read_number(prop + na, ns);
522 if (flags)
523 *flags = bus->get_flags(prop);
524 return prop;
525 }
526 return NULL;
527}
528EXPORT_SYMBOL(of_get_address);
529
0131d897
SAS
530static int __of_address_to_resource(struct device_node *dev,
531 const __be32 *addrp, u64 size, unsigned int flags,
dbbdee94 532 struct resource *r)
1f5bef30
GL
533{
534 u64 taddr;
535
536 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
537 return -EINVAL;
538 taddr = of_translate_address(dev, addrp);
539 if (taddr == OF_BAD_ADDR)
540 return -EINVAL;
541 memset(r, 0, sizeof(struct resource));
542 if (flags & IORESOURCE_IO) {
543 unsigned long port;
544 port = pci_address_to_pio(taddr);
545 if (port == (unsigned long)-1)
546 return -EINVAL;
547 r->start = port;
548 r->end = port + size - 1;
549 } else {
550 r->start = taddr;
551 r->end = taddr + size - 1;
552 }
553 r->flags = flags;
d3571c3a 554 r->name = dev->full_name;
1f5bef30
GL
555 return 0;
556}
557
558/**
559 * of_address_to_resource - Translate device tree address and return as resource
560 *
561 * Note that if your address is a PIO address, the conversion will fail if
562 * the physical address can't be internally converted to an IO token with
563 * pci_address_to_pio(), that is because it's either called to early or it
564 * can't be matched to any host bridge IO space
565 */
566int of_address_to_resource(struct device_node *dev, int index,
567 struct resource *r)
568{
0131d897 569 const __be32 *addrp;
1f5bef30
GL
570 u64 size;
571 unsigned int flags;
572
573 addrp = of_get_address(dev, index, &size, &flags);
574 if (addrp == NULL)
575 return -EINVAL;
576 return __of_address_to_resource(dev, addrp, size, flags, r);
577}
578EXPORT_SYMBOL_GPL(of_address_to_resource);
579
90e33f62
GL
580struct device_node *of_find_matching_node_by_address(struct device_node *from,
581 const struct of_device_id *matches,
582 u64 base_address)
583{
584 struct device_node *dn = of_find_matching_node(from, matches);
585 struct resource res;
586
587 while (dn) {
588 if (of_address_to_resource(dn, 0, &res))
589 continue;
590 if (res.start == base_address)
591 return dn;
592 dn = of_find_matching_node(dn, matches);
593 }
594
595 return NULL;
596}
597
1f5bef30 598
6b884a8d
GL
599/**
600 * of_iomap - Maps the memory mapped IO for a given device_node
601 * @device: the device whose io range will be mapped
602 * @index: index of the io range
603 *
604 * Returns a pointer to the mapped memory
605 */
606void __iomem *of_iomap(struct device_node *np, int index)
607{
608 struct resource res;
609
610 if (of_address_to_resource(np, index, &res))
611 return NULL;
612
613 return ioremap(res.start, 1 + res.end - res.start);
614}
615EXPORT_SYMBOL(of_iomap);