Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * WaveLAN ISA driver | |
3 | * | |
4 | * Jean II - HPLB '96 | |
5 | * | |
6 | * Reorganisation and extension of the driver. | |
7 | * Original copyright follows (also see the end of this file). | |
8 | * See wavelan.p.h for details. | |
9 | * | |
10 | * | |
11 | * | |
12 | * AT&T GIS (nee NCR) WaveLAN card: | |
13 | * An Ethernet-like radio transceiver | |
14 | * controlled by an Intel 82586 coprocessor. | |
15 | */ | |
16 | ||
17 | #include "wavelan.p.h" /* Private header */ | |
18 | ||
19 | /************************* MISC SUBROUTINES **************************/ | |
20 | /* | |
21 | * Subroutines which won't fit in one of the following category | |
22 | * (WaveLAN modem or i82586) | |
23 | */ | |
24 | ||
25 | /*------------------------------------------------------------------*/ | |
26 | /* | |
27 | * Translate irq number to PSA irq parameter | |
28 | */ | |
29 | static u8 wv_irq_to_psa(int irq) | |
30 | { | |
0a92dd0a | 31 | if (irq < 0 || irq >= ARRAY_SIZE(irqvals)) |
1da177e4 LT |
32 | return 0; |
33 | ||
34 | return irqvals[irq]; | |
35 | } | |
36 | ||
37 | /*------------------------------------------------------------------*/ | |
38 | /* | |
39 | * Translate PSA irq parameter to irq number | |
40 | */ | |
41 | static int __init wv_psa_to_irq(u8 irqval) | |
42 | { | |
49c4a5dc | 43 | int i; |
1da177e4 | 44 | |
49c4a5dc HE |
45 | for (i = 0; i < ARRAY_SIZE(irqvals); i++) |
46 | if (irqvals[i] == irqval) | |
47 | return i; | |
1da177e4 LT |
48 | |
49 | return -1; | |
50 | } | |
51 | ||
1da177e4 LT |
52 | /********************* HOST ADAPTER SUBROUTINES *********************/ |
53 | /* | |
54 | * Useful subroutines to manage the WaveLAN ISA interface | |
55 | * | |
56 | * One major difference with the PCMCIA hardware (except the port mapping) | |
57 | * is that we have to keep the state of the Host Control Register | |
58 | * because of the interrupt enable & bus size flags. | |
59 | */ | |
60 | ||
61 | /*------------------------------------------------------------------*/ | |
62 | /* | |
63 | * Read from card's Host Adaptor Status Register. | |
64 | */ | |
65 | static inline u16 hasr_read(unsigned long ioaddr) | |
66 | { | |
67 | return (inw(HASR(ioaddr))); | |
68 | } /* hasr_read */ | |
69 | ||
70 | /*------------------------------------------------------------------*/ | |
71 | /* | |
72 | * Write to card's Host Adapter Command Register. | |
73 | */ | |
74 | static inline void hacr_write(unsigned long ioaddr, u16 hacr) | |
75 | { | |
76 | outw(hacr, HACR(ioaddr)); | |
77 | } /* hacr_write */ | |
78 | ||
79 | /*------------------------------------------------------------------*/ | |
80 | /* | |
81 | * Write to card's Host Adapter Command Register. Include a delay for | |
82 | * those times when it is needed. | |
83 | */ | |
858119e1 | 84 | static void hacr_write_slow(unsigned long ioaddr, u16 hacr) |
1da177e4 LT |
85 | { |
86 | hacr_write(ioaddr, hacr); | |
87 | /* delay might only be needed sometimes */ | |
88 | mdelay(1); | |
89 | } /* hacr_write_slow */ | |
90 | ||
91 | /*------------------------------------------------------------------*/ | |
92 | /* | |
93 | * Set the channel attention bit. | |
94 | */ | |
95 | static inline void set_chan_attn(unsigned long ioaddr, u16 hacr) | |
96 | { | |
97 | hacr_write(ioaddr, hacr | HACR_CA); | |
98 | } /* set_chan_attn */ | |
99 | ||
100 | /*------------------------------------------------------------------*/ | |
101 | /* | |
102 | * Reset, and then set host adaptor into default mode. | |
103 | */ | |
104 | static inline void wv_hacr_reset(unsigned long ioaddr) | |
105 | { | |
106 | hacr_write_slow(ioaddr, HACR_RESET); | |
107 | hacr_write(ioaddr, HACR_DEFAULT); | |
108 | } /* wv_hacr_reset */ | |
109 | ||
110 | /*------------------------------------------------------------------*/ | |
111 | /* | |
112 | * Set the I/O transfer over the ISA bus to 8-bit mode | |
113 | */ | |
114 | static inline void wv_16_off(unsigned long ioaddr, u16 hacr) | |
115 | { | |
116 | hacr &= ~HACR_16BITS; | |
117 | hacr_write(ioaddr, hacr); | |
118 | } /* wv_16_off */ | |
119 | ||
120 | /*------------------------------------------------------------------*/ | |
121 | /* | |
122 | * Set the I/O transfer over the ISA bus to 8-bit mode | |
123 | */ | |
124 | static inline void wv_16_on(unsigned long ioaddr, u16 hacr) | |
125 | { | |
126 | hacr |= HACR_16BITS; | |
127 | hacr_write(ioaddr, hacr); | |
128 | } /* wv_16_on */ | |
129 | ||
130 | /*------------------------------------------------------------------*/ | |
131 | /* | |
132 | * Disable interrupts on the WaveLAN hardware. | |
133 | * (called by wv_82586_stop()) | |
134 | */ | |
135 | static inline void wv_ints_off(struct net_device * dev) | |
136 | { | |
524ad0a7 | 137 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
138 | unsigned long ioaddr = dev->base_addr; |
139 | ||
140 | lp->hacr &= ~HACR_INTRON; | |
141 | hacr_write(ioaddr, lp->hacr); | |
142 | } /* wv_ints_off */ | |
143 | ||
144 | /*------------------------------------------------------------------*/ | |
145 | /* | |
146 | * Enable interrupts on the WaveLAN hardware. | |
147 | * (called by wv_hw_reset()) | |
148 | */ | |
149 | static inline void wv_ints_on(struct net_device * dev) | |
150 | { | |
524ad0a7 | 151 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
152 | unsigned long ioaddr = dev->base_addr; |
153 | ||
154 | lp->hacr |= HACR_INTRON; | |
155 | hacr_write(ioaddr, lp->hacr); | |
156 | } /* wv_ints_on */ | |
157 | ||
158 | /******************* MODEM MANAGEMENT SUBROUTINES *******************/ | |
159 | /* | |
160 | * Useful subroutines to manage the modem of the WaveLAN | |
161 | */ | |
162 | ||
163 | /*------------------------------------------------------------------*/ | |
164 | /* | |
165 | * Read the Parameter Storage Area from the WaveLAN card's memory | |
166 | */ | |
167 | /* | |
168 | * Read bytes from the PSA. | |
169 | */ | |
170 | static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */ | |
171 | u8 * b, /* buffer to fill */ | |
172 | int n) | |
173 | { /* size to read */ | |
174 | wv_16_off(ioaddr, hacr); | |
175 | ||
176 | while (n-- > 0) { | |
177 | outw(o, PIOR2(ioaddr)); | |
178 | o++; | |
179 | *b++ = inb(PIOP2(ioaddr)); | |
180 | } | |
181 | ||
182 | wv_16_on(ioaddr, hacr); | |
183 | } /* psa_read */ | |
184 | ||
185 | /*------------------------------------------------------------------*/ | |
186 | /* | |
187 | * Write the Parameter Storage Area to the WaveLAN card's memory. | |
188 | */ | |
189 | static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */ | |
190 | u8 * b, /* Buffer in memory */ | |
191 | int n) | |
192 | { /* Length of buffer */ | |
193 | int count = 0; | |
194 | ||
195 | wv_16_off(ioaddr, hacr); | |
196 | ||
197 | while (n-- > 0) { | |
198 | outw(o, PIOR2(ioaddr)); | |
199 | o++; | |
200 | ||
201 | outb(*b, PIOP2(ioaddr)); | |
202 | b++; | |
203 | ||
204 | /* Wait for the memory to finish its write cycle */ | |
205 | count = 0; | |
206 | while ((count++ < 100) && | |
207 | (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1); | |
208 | } | |
209 | ||
210 | wv_16_on(ioaddr, hacr); | |
211 | } /* psa_write */ | |
212 | ||
213 | #ifdef SET_PSA_CRC | |
214 | /*------------------------------------------------------------------*/ | |
215 | /* | |
216 | * Calculate the PSA CRC | |
217 | * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code | |
218 | * NOTE: By specifying a length including the CRC position the | |
219 | * returned value should be zero. (i.e. a correct checksum in the PSA) | |
220 | * | |
221 | * The Windows drivers don't use the CRC, but the AP and the PtP tool | |
222 | * depend on it. | |
223 | */ | |
858119e1 | 224 | static u16 psa_crc(u8 * psa, /* The PSA */ |
1da177e4 LT |
225 | int size) |
226 | { /* Number of short for CRC */ | |
227 | int byte_cnt; /* Loop on the PSA */ | |
228 | u16 crc_bytes = 0; /* Data in the PSA */ | |
229 | int bit_cnt; /* Loop on the bits of the short */ | |
230 | ||
231 | for (byte_cnt = 0; byte_cnt < size; byte_cnt++) { | |
232 | crc_bytes ^= psa[byte_cnt]; /* Its an xor */ | |
233 | ||
234 | for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) { | |
235 | if (crc_bytes & 0x0001) | |
236 | crc_bytes = (crc_bytes >> 1) ^ 0xA001; | |
237 | else | |
238 | crc_bytes >>= 1; | |
239 | } | |
240 | } | |
241 | ||
242 | return crc_bytes; | |
243 | } /* psa_crc */ | |
244 | #endif /* SET_PSA_CRC */ | |
245 | ||
246 | /*------------------------------------------------------------------*/ | |
247 | /* | |
248 | * update the checksum field in the Wavelan's PSA | |
249 | */ | |
250 | static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr) | |
251 | { | |
252 | #ifdef SET_PSA_CRC | |
253 | psa_t psa; | |
254 | u16 crc; | |
255 | ||
256 | /* read the parameter storage area */ | |
257 | psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
258 | ||
259 | /* update the checksum */ | |
260 | crc = psa_crc((unsigned char *) &psa, | |
261 | sizeof(psa) - sizeof(psa.psa_crc[0]) - | |
262 | sizeof(psa.psa_crc[1]) | |
263 | - sizeof(psa.psa_crc_status)); | |
264 | ||
265 | psa.psa_crc[0] = crc & 0xFF; | |
266 | psa.psa_crc[1] = (crc & 0xFF00) >> 8; | |
267 | ||
268 | /* Write it ! */ | |
269 | psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa, | |
270 | (unsigned char *) &psa.psa_crc, 2); | |
271 | ||
272 | #ifdef DEBUG_IOCTL_INFO | |
273 | printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n", | |
274 | dev->name, psa.psa_crc[0], psa.psa_crc[1]); | |
275 | ||
276 | /* Check again (luxury !) */ | |
277 | crc = psa_crc((unsigned char *) &psa, | |
278 | sizeof(psa) - sizeof(psa.psa_crc_status)); | |
279 | ||
280 | if (crc != 0) | |
281 | printk(KERN_WARNING | |
282 | "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", | |
283 | dev->name); | |
284 | #endif /* DEBUG_IOCTL_INFO */ | |
285 | #endif /* SET_PSA_CRC */ | |
286 | } /* update_psa_checksum */ | |
287 | ||
288 | /*------------------------------------------------------------------*/ | |
289 | /* | |
290 | * Write 1 byte to the MMC. | |
291 | */ | |
858119e1 | 292 | static void mmc_out(unsigned long ioaddr, u16 o, u8 d) |
1da177e4 LT |
293 | { |
294 | int count = 0; | |
295 | ||
296 | /* Wait for MMC to go idle */ | |
297 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
298 | udelay(10); | |
299 | ||
300 | outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr)); | |
301 | } | |
302 | ||
303 | /*------------------------------------------------------------------*/ | |
304 | /* | |
305 | * Routine to write bytes to the Modem Management Controller. | |
306 | * We start at the end because it is the way it should be! | |
307 | */ | |
858119e1 | 308 | static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n) |
1da177e4 LT |
309 | { |
310 | o += n; | |
311 | b += n; | |
312 | ||
313 | while (n-- > 0) | |
314 | mmc_out(ioaddr, --o, *(--b)); | |
315 | } /* mmc_write */ | |
316 | ||
317 | /*------------------------------------------------------------------*/ | |
318 | /* | |
319 | * Read a byte from the MMC. | |
320 | * Optimised version for 1 byte, avoid using memory. | |
321 | */ | |
858119e1 | 322 | static u8 mmc_in(unsigned long ioaddr, u16 o) |
1da177e4 LT |
323 | { |
324 | int count = 0; | |
325 | ||
326 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
327 | udelay(10); | |
328 | outw(o << 1, MMCR(ioaddr)); | |
329 | ||
330 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
331 | udelay(10); | |
332 | return (u8) (inw(MMCR(ioaddr)) >> 8); | |
333 | } | |
334 | ||
335 | /*------------------------------------------------------------------*/ | |
336 | /* | |
337 | * Routine to read bytes from the Modem Management Controller. | |
338 | * The implementation is complicated by a lack of address lines, | |
339 | * which prevents decoding of the low-order bit. | |
340 | * (code has just been moved in the above function) | |
341 | * We start at the end because it is the way it should be! | |
342 | */ | |
343 | static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n) | |
344 | { | |
345 | o += n; | |
346 | b += n; | |
347 | ||
348 | while (n-- > 0) | |
349 | *(--b) = mmc_in(ioaddr, --o); | |
350 | } /* mmc_read */ | |
351 | ||
352 | /*------------------------------------------------------------------*/ | |
353 | /* | |
354 | * Get the type of encryption available. | |
355 | */ | |
356 | static inline int mmc_encr(unsigned long ioaddr) | |
357 | { /* I/O port of the card */ | |
358 | int temp; | |
359 | ||
360 | temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail)); | |
361 | if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES)) | |
362 | return 0; | |
363 | else | |
364 | return temp; | |
365 | } | |
366 | ||
367 | /*------------------------------------------------------------------*/ | |
368 | /* | |
369 | * Wait for the frequency EEPROM to complete a command. | |
370 | * I hope this one will be optimally inlined. | |
371 | */ | |
372 | static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */ | |
373 | int delay, /* Base delay to wait for */ | |
374 | int number) | |
375 | { /* Number of time to wait */ | |
376 | int count = 0; /* Wait only a limited time */ | |
377 | ||
378 | while ((count++ < number) && | |
379 | (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
380 | MMR_FEE_STATUS_BUSY)) udelay(delay); | |
381 | } | |
382 | ||
383 | /*------------------------------------------------------------------*/ | |
384 | /* | |
385 | * Read bytes from the Frequency EEPROM (frequency select cards). | |
386 | */ | |
387 | static void fee_read(unsigned long ioaddr, /* I/O port of the card */ | |
388 | u16 o, /* destination offset */ | |
389 | u16 * b, /* data buffer */ | |
390 | int n) | |
391 | { /* number of registers */ | |
392 | b += n; /* Position at the end of the area */ | |
393 | ||
394 | /* Write the address */ | |
395 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1); | |
396 | ||
397 | /* Loop on all buffer */ | |
398 | while (n-- > 0) { | |
399 | /* Write the read command */ | |
400 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
401 | MMW_FEE_CTRL_READ); | |
402 | ||
403 | /* Wait until EEPROM is ready (should be quick). */ | |
404 | fee_wait(ioaddr, 10, 100); | |
405 | ||
406 | /* Read the value. */ | |
407 | *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) | | |
408 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_l))); | |
409 | } | |
410 | } | |
411 | ||
1da177e4 LT |
412 | |
413 | /*------------------------------------------------------------------*/ | |
414 | /* | |
415 | * Write bytes from the Frequency EEPROM (frequency select cards). | |
416 | * This is a bit complicated, because the frequency EEPROM has to | |
417 | * be unprotected and the write enabled. | |
418 | * Jean II | |
419 | */ | |
420 | static void fee_write(unsigned long ioaddr, /* I/O port of the card */ | |
421 | u16 o, /* destination offset */ | |
422 | u16 * b, /* data buffer */ | |
423 | int n) | |
424 | { /* number of registers */ | |
425 | b += n; /* Position at the end of the area. */ | |
426 | ||
427 | #ifdef EEPROM_IS_PROTECTED /* disabled */ | |
428 | #ifdef DOESNT_SEEM_TO_WORK /* disabled */ | |
429 | /* Ask to read the protected register */ | |
430 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD); | |
431 | ||
432 | fee_wait(ioaddr, 10, 100); | |
433 | ||
434 | /* Read the protected register. */ | |
435 | printk("Protected 2: %02X-%02X\n", | |
436 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)), | |
437 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_l))); | |
438 | #endif /* DOESNT_SEEM_TO_WORK */ | |
439 | ||
440 | /* Enable protected register. */ | |
441 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN); | |
442 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN); | |
443 | ||
444 | fee_wait(ioaddr, 10, 100); | |
445 | ||
446 | /* Unprotect area. */ | |
447 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n); | |
448 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE); | |
449 | #ifdef DOESNT_SEEM_TO_WORK /* disabled */ | |
450 | /* or use: */ | |
451 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR); | |
452 | #endif /* DOESNT_SEEM_TO_WORK */ | |
453 | ||
454 | fee_wait(ioaddr, 10, 100); | |
455 | #endif /* EEPROM_IS_PROTECTED */ | |
456 | ||
457 | /* Write enable. */ | |
458 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN); | |
459 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN); | |
460 | ||
461 | fee_wait(ioaddr, 10, 100); | |
462 | ||
463 | /* Write the EEPROM address. */ | |
464 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1); | |
465 | ||
466 | /* Loop on all buffer */ | |
467 | while (n-- > 0) { | |
468 | /* Write the value. */ | |
469 | mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8); | |
470 | mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF); | |
471 | ||
472 | /* Write the write command. */ | |
473 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
474 | MMW_FEE_CTRL_WRITE); | |
475 | ||
476 | /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */ | |
477 | mdelay(10); | |
478 | fee_wait(ioaddr, 10, 100); | |
479 | } | |
480 | ||
481 | /* Write disable. */ | |
482 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS); | |
483 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS); | |
484 | ||
485 | fee_wait(ioaddr, 10, 100); | |
486 | ||
487 | #ifdef EEPROM_IS_PROTECTED /* disabled */ | |
488 | /* Reprotect EEPROM. */ | |
489 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00); | |
490 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE); | |
491 | ||
492 | fee_wait(ioaddr, 10, 100); | |
493 | #endif /* EEPROM_IS_PROTECTED */ | |
494 | } | |
1da177e4 LT |
495 | |
496 | /************************ I82586 SUBROUTINES *************************/ | |
497 | /* | |
498 | * Useful subroutines to manage the Ethernet controller | |
499 | */ | |
500 | ||
501 | /*------------------------------------------------------------------*/ | |
502 | /* | |
503 | * Read bytes from the on-board RAM. | |
504 | * Why does inlining this function make it fail? | |
505 | */ | |
506 | static /*inline */ void obram_read(unsigned long ioaddr, | |
507 | u16 o, u8 * b, int n) | |
508 | { | |
509 | outw(o, PIOR1(ioaddr)); | |
510 | insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); | |
511 | } | |
512 | ||
513 | /*------------------------------------------------------------------*/ | |
514 | /* | |
515 | * Write bytes to the on-board RAM. | |
516 | */ | |
517 | static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n) | |
518 | { | |
519 | outw(o, PIOR1(ioaddr)); | |
520 | outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); | |
521 | } | |
522 | ||
523 | /*------------------------------------------------------------------*/ | |
524 | /* | |
525 | * Acknowledge the reading of the status issued by the i82586. | |
526 | */ | |
527 | static void wv_ack(struct net_device * dev) | |
528 | { | |
524ad0a7 | 529 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
530 | unsigned long ioaddr = dev->base_addr; |
531 | u16 scb_cs; | |
532 | int i; | |
533 | ||
534 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
535 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
536 | scb_cs &= SCB_ST_INT; | |
537 | ||
538 | if (scb_cs == 0) | |
539 | return; | |
540 | ||
541 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
542 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
543 | ||
544 | set_chan_attn(ioaddr, lp->hacr); | |
545 | ||
546 | for (i = 1000; i > 0; i--) { | |
547 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
548 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
549 | if (scb_cs == 0) | |
550 | break; | |
551 | ||
552 | udelay(10); | |
553 | } | |
554 | udelay(100); | |
555 | ||
556 | #ifdef DEBUG_CONFIG_ERROR | |
557 | if (i <= 0) | |
558 | printk(KERN_INFO | |
559 | "%s: wv_ack(): board not accepting command.\n", | |
560 | dev->name); | |
561 | #endif | |
562 | } | |
563 | ||
564 | /*------------------------------------------------------------------*/ | |
565 | /* | |
566 | * Set channel attention bit and busy wait until command has | |
567 | * completed, then acknowledge completion of the command. | |
568 | */ | |
858119e1 | 569 | static int wv_synchronous_cmd(struct net_device * dev, const char *str) |
1da177e4 | 570 | { |
524ad0a7 | 571 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
572 | unsigned long ioaddr = dev->base_addr; |
573 | u16 scb_cmd; | |
574 | ach_t cb; | |
575 | int i; | |
576 | ||
577 | scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO; | |
578 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
579 | (unsigned char *) &scb_cmd, sizeof(scb_cmd)); | |
580 | ||
581 | set_chan_attn(ioaddr, lp->hacr); | |
582 | ||
583 | for (i = 1000; i > 0; i--) { | |
584 | obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, | |
585 | sizeof(cb)); | |
586 | if (cb.ac_status & AC_SFLD_C) | |
587 | break; | |
588 | ||
589 | udelay(10); | |
590 | } | |
591 | udelay(100); | |
592 | ||
593 | if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) { | |
594 | #ifdef DEBUG_CONFIG_ERROR | |
595 | printk(KERN_INFO "%s: %s failed; status = 0x%x\n", | |
596 | dev->name, str, cb.ac_status); | |
597 | #endif | |
598 | #ifdef DEBUG_I82586_SHOW | |
599 | wv_scb_show(ioaddr); | |
600 | #endif | |
601 | return -1; | |
602 | } | |
603 | ||
604 | /* Ack the status */ | |
605 | wv_ack(dev); | |
606 | ||
607 | return 0; | |
608 | } | |
609 | ||
610 | /*------------------------------------------------------------------*/ | |
611 | /* | |
612 | * Configuration commands completion interrupt. | |
613 | * Check if done, and if OK. | |
614 | */ | |
858119e1 | 615 | static int |
1da177e4 LT |
616 | wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) |
617 | { | |
618 | unsigned short mcs_addr; | |
619 | unsigned short status; | |
620 | int ret; | |
621 | ||
622 | #ifdef DEBUG_INTERRUPT_TRACE | |
623 | printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name); | |
624 | #endif | |
625 | ||
626 | mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t) | |
627 | + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t); | |
628 | ||
629 | /* Read the status of the last command (set mc list). */ | |
630 | obram_read(ioaddr, acoff(mcs_addr, ac_status), | |
631 | (unsigned char *) &status, sizeof(status)); | |
632 | ||
633 | /* If not completed -> exit */ | |
634 | if ((status & AC_SFLD_C) == 0) | |
635 | ret = 0; /* Not ready to be scrapped */ | |
636 | else { | |
637 | #ifdef DEBUG_CONFIG_ERROR | |
638 | unsigned short cfg_addr; | |
639 | unsigned short ias_addr; | |
640 | ||
641 | /* Check mc_config command */ | |
642 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
643 | printk(KERN_INFO | |
644 | "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n", | |
645 | dev->name, status); | |
646 | ||
647 | /* check ia-config command */ | |
648 | ias_addr = mcs_addr - sizeof(ac_ias_t); | |
649 | obram_read(ioaddr, acoff(ias_addr, ac_status), | |
650 | (unsigned char *) &status, sizeof(status)); | |
651 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
652 | printk(KERN_INFO | |
653 | "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n", | |
654 | dev->name, status); | |
655 | ||
656 | /* Check config command. */ | |
657 | cfg_addr = ias_addr - sizeof(ac_cfg_t); | |
658 | obram_read(ioaddr, acoff(cfg_addr, ac_status), | |
659 | (unsigned char *) &status, sizeof(status)); | |
660 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
661 | printk(KERN_INFO | |
662 | "%s: wv_config_complete(): configure failed; status = 0x%x\n", | |
663 | dev->name, status); | |
664 | #endif /* DEBUG_CONFIG_ERROR */ | |
665 | ||
666 | ret = 1; /* Ready to be scrapped */ | |
667 | } | |
668 | ||
669 | #ifdef DEBUG_INTERRUPT_TRACE | |
670 | printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name, | |
671 | ret); | |
672 | #endif | |
673 | return ret; | |
674 | } | |
675 | ||
676 | /*------------------------------------------------------------------*/ | |
677 | /* | |
678 | * Command completion interrupt. | |
679 | * Reclaim as many freed tx buffers as we can. | |
680 | * (called in wavelan_interrupt()). | |
681 | * Note : the spinlock is already grabbed for us. | |
682 | */ | |
683 | static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) | |
684 | { | |
685 | int nreaped = 0; | |
686 | ||
687 | #ifdef DEBUG_INTERRUPT_TRACE | |
688 | printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name); | |
689 | #endif | |
690 | ||
691 | /* Loop on all the transmit buffers */ | |
692 | while (lp->tx_first_in_use != I82586NULL) { | |
693 | unsigned short tx_status; | |
694 | ||
695 | /* Read the first transmit buffer */ | |
696 | obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), | |
697 | (unsigned char *) &tx_status, | |
698 | sizeof(tx_status)); | |
699 | ||
700 | /* If not completed -> exit */ | |
701 | if ((tx_status & AC_SFLD_C) == 0) | |
702 | break; | |
703 | ||
704 | /* Hack for reconfiguration */ | |
705 | if (tx_status == 0xFFFF) | |
706 | if (!wv_config_complete(dev, ioaddr, lp)) | |
707 | break; /* Not completed */ | |
708 | ||
709 | /* We now remove this buffer */ | |
710 | nreaped++; | |
711 | --lp->tx_n_in_use; | |
712 | ||
713 | /* | |
714 | if (lp->tx_n_in_use > 0) | |
715 | printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]); | |
716 | */ | |
717 | ||
718 | /* Was it the last one? */ | |
719 | if (lp->tx_n_in_use <= 0) | |
720 | lp->tx_first_in_use = I82586NULL; | |
721 | else { | |
722 | /* Next one in the chain */ | |
723 | lp->tx_first_in_use += TXBLOCKZ; | |
724 | if (lp->tx_first_in_use >= | |
725 | OFFSET_CU + | |
726 | NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -= | |
727 | NTXBLOCKS * TXBLOCKZ; | |
728 | } | |
729 | ||
730 | /* Hack for reconfiguration */ | |
731 | if (tx_status == 0xFFFF) | |
732 | continue; | |
733 | ||
734 | /* Now, check status of the finished command */ | |
735 | if (tx_status & AC_SFLD_OK) { | |
736 | int ncollisions; | |
737 | ||
0687478a | 738 | dev->stats.tx_packets++; |
1da177e4 | 739 | ncollisions = tx_status & AC_SFLD_MAXCOL; |
0687478a | 740 | dev->stats.collisions += ncollisions; |
1da177e4 LT |
741 | #ifdef DEBUG_TX_INFO |
742 | if (ncollisions > 0) | |
743 | printk(KERN_DEBUG | |
744 | "%s: wv_complete(): tx completed after %d collisions.\n", | |
745 | dev->name, ncollisions); | |
746 | #endif | |
747 | } else { | |
0687478a | 748 | dev->stats.tx_errors++; |
1da177e4 | 749 | if (tx_status & AC_SFLD_S10) { |
0687478a | 750 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
751 | #ifdef DEBUG_TX_FAIL |
752 | printk(KERN_DEBUG | |
753 | "%s: wv_complete(): tx error: no CS.\n", | |
754 | dev->name); | |
755 | #endif | |
756 | } | |
757 | if (tx_status & AC_SFLD_S9) { | |
0687478a | 758 | dev->stats.tx_carrier_errors++; |
1da177e4 LT |
759 | #ifdef DEBUG_TX_FAIL |
760 | printk(KERN_DEBUG | |
761 | "%s: wv_complete(): tx error: lost CTS.\n", | |
762 | dev->name); | |
763 | #endif | |
764 | } | |
765 | if (tx_status & AC_SFLD_S8) { | |
0687478a | 766 | dev->stats.tx_fifo_errors++; |
1da177e4 LT |
767 | #ifdef DEBUG_TX_FAIL |
768 | printk(KERN_DEBUG | |
769 | "%s: wv_complete(): tx error: slow DMA.\n", | |
770 | dev->name); | |
771 | #endif | |
772 | } | |
773 | if (tx_status & AC_SFLD_S6) { | |
0687478a | 774 | dev->stats.tx_heartbeat_errors++; |
1da177e4 LT |
775 | #ifdef DEBUG_TX_FAIL |
776 | printk(KERN_DEBUG | |
777 | "%s: wv_complete(): tx error: heart beat.\n", | |
778 | dev->name); | |
779 | #endif | |
780 | } | |
781 | if (tx_status & AC_SFLD_S5) { | |
0687478a | 782 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
783 | #ifdef DEBUG_TX_FAIL |
784 | printk(KERN_DEBUG | |
785 | "%s: wv_complete(): tx error: too many collisions.\n", | |
786 | dev->name); | |
787 | #endif | |
788 | } | |
789 | } | |
790 | ||
791 | #ifdef DEBUG_TX_INFO | |
792 | printk(KERN_DEBUG | |
793 | "%s: wv_complete(): tx completed, tx_status 0x%04x\n", | |
794 | dev->name, tx_status); | |
795 | #endif | |
796 | } | |
797 | ||
798 | #ifdef DEBUG_INTERRUPT_INFO | |
799 | if (nreaped > 1) | |
800 | printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n", | |
801 | dev->name, nreaped); | |
802 | #endif | |
803 | ||
804 | /* | |
805 | * Inform upper layers. | |
806 | */ | |
807 | if (lp->tx_n_in_use < NTXBLOCKS - 1) { | |
808 | netif_wake_queue(dev); | |
809 | } | |
810 | #ifdef DEBUG_INTERRUPT_TRACE | |
811 | printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name); | |
812 | #endif | |
813 | return nreaped; | |
814 | } | |
815 | ||
816 | /*------------------------------------------------------------------*/ | |
817 | /* | |
818 | * Reconfigure the i82586, or at least ask for it. | |
819 | * Because wv_82586_config uses a transmission buffer, we must do it | |
820 | * when we are sure that there is one left, so we do it now | |
821 | * or in wavelan_packet_xmit() (I can't find any better place, | |
822 | * wavelan_interrupt is not an option), so you may experience | |
823 | * delays sometimes. | |
824 | */ | |
858119e1 | 825 | static void wv_82586_reconfig(struct net_device * dev) |
1da177e4 | 826 | { |
524ad0a7 | 827 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
828 | unsigned long flags; |
829 | ||
830 | /* Arm the flag, will be cleard in wv_82586_config() */ | |
831 | lp->reconfig_82586 = 1; | |
832 | ||
833 | /* Check if we can do it now ! */ | |
834 | if((netif_running(dev)) && !(netif_queue_stopped(dev))) { | |
835 | spin_lock_irqsave(&lp->spinlock, flags); | |
836 | /* May fail */ | |
837 | wv_82586_config(dev); | |
838 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
839 | } | |
840 | else { | |
841 | #ifdef DEBUG_CONFIG_INFO | |
842 | printk(KERN_DEBUG | |
843 | "%s: wv_82586_reconfig(): delayed (state = %lX)\n", | |
844 | dev->name, dev->state); | |
845 | #endif | |
846 | } | |
847 | } | |
848 | ||
849 | /********************* DEBUG & INFO SUBROUTINES *********************/ | |
850 | /* | |
851 | * This routine is used in the code to show information for debugging. | |
852 | * Most of the time, it dumps the contents of hardware structures. | |
853 | */ | |
854 | ||
855 | #ifdef DEBUG_PSA_SHOW | |
856 | /*------------------------------------------------------------------*/ | |
857 | /* | |
858 | * Print the formatted contents of the Parameter Storage Area. | |
859 | */ | |
860 | static void wv_psa_show(psa_t * p) | |
861 | { | |
862 | printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n"); | |
863 | printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n", | |
864 | p->psa_io_base_addr_1, | |
865 | p->psa_io_base_addr_2, | |
866 | p->psa_io_base_addr_3, p->psa_io_base_addr_4); | |
867 | printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n", | |
868 | p->psa_rem_boot_addr_1, | |
869 | p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3); | |
870 | printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params); | |
871 | printk("psa_int_req_no: %d\n", p->psa_int_req_no); | |
872 | #ifdef DEBUG_SHOW_UNUSED | |
e174961c | 873 | printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0); |
1da177e4 | 874 | #endif /* DEBUG_SHOW_UNUSED */ |
e174961c JB |
875 | printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr); |
876 | printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr); | |
1da177e4 LT |
877 | printk(KERN_DEBUG "psa_univ_local_sel: %d, ", |
878 | p->psa_univ_local_sel); | |
879 | printk("psa_comp_number: %d, ", p->psa_comp_number); | |
880 | printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set); | |
881 | printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ", | |
882 | p->psa_feature_select); | |
883 | printk("psa_subband/decay_update_prm: %d\n", p->psa_subband); | |
884 | printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr); | |
885 | printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay); | |
886 | printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0], | |
887 | p->psa_nwid[1]); | |
888 | printk("psa_nwid_select: %d\n", p->psa_nwid_select); | |
889 | printk(KERN_DEBUG "psa_encryption_select: %d, ", | |
890 | p->psa_encryption_select); | |
891 | printk | |
892 | ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n", | |
893 | p->psa_encryption_key[0], p->psa_encryption_key[1], | |
894 | p->psa_encryption_key[2], p->psa_encryption_key[3], | |
895 | p->psa_encryption_key[4], p->psa_encryption_key[5], | |
896 | p->psa_encryption_key[6], p->psa_encryption_key[7]); | |
897 | printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width); | |
898 | printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ", | |
899 | p->psa_call_code[0]); | |
900 | printk | |
901 | ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", | |
902 | p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2], | |
903 | p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5], | |
904 | p->psa_call_code[6], p->psa_call_code[7]); | |
905 | #ifdef DEBUG_SHOW_UNUSED | |
d5251aea | 906 | printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n", |
1da177e4 | 907 | p->psa_reserved[0], |
d5251aea | 908 | p->psa_reserved[1]); |
1da177e4 LT |
909 | #endif /* DEBUG_SHOW_UNUSED */ |
910 | printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status); | |
911 | printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]); | |
912 | printk("psa_crc_status: 0x%02x\n", p->psa_crc_status); | |
913 | } /* wv_psa_show */ | |
914 | #endif /* DEBUG_PSA_SHOW */ | |
915 | ||
916 | #ifdef DEBUG_MMC_SHOW | |
917 | /*------------------------------------------------------------------*/ | |
918 | /* | |
919 | * Print the formatted status of the Modem Management Controller. | |
920 | * This function needs to be completed. | |
921 | */ | |
922 | static void wv_mmc_show(struct net_device * dev) | |
923 | { | |
924 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 925 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
926 | mmr_t m; |
927 | ||
928 | /* Basic check */ | |
929 | if (hasr_read(ioaddr) & HASR_NO_CLK) { | |
930 | printk(KERN_WARNING | |
931 | "%s: wv_mmc_show: modem not connected\n", | |
932 | dev->name); | |
933 | return; | |
934 | } | |
935 | ||
936 | /* Read the mmc */ | |
937 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
938 | mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m)); | |
939 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
940 | ||
1da177e4 LT |
941 | /* Don't forget to update statistics */ |
942 | lp->wstats.discard.nwid += | |
943 | (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l; | |
1da177e4 LT |
944 | |
945 | printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n"); | |
946 | #ifdef DEBUG_SHOW_UNUSED | |
947 | printk(KERN_DEBUG | |
948 | "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", | |
949 | m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2], | |
950 | m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5], | |
951 | m.mmr_unused0[6], m.mmr_unused0[7]); | |
952 | #endif /* DEBUG_SHOW_UNUSED */ | |
953 | printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n", | |
954 | m.mmr_des_avail, m.mmr_des_status); | |
955 | #ifdef DEBUG_SHOW_UNUSED | |
956 | printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n", | |
957 | m.mmr_unused1[0], | |
958 | m.mmr_unused1[1], | |
959 | m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]); | |
960 | #endif /* DEBUG_SHOW_UNUSED */ | |
961 | printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n", | |
962 | m.mmr_dce_status, | |
963 | (m. | |
964 | mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ? | |
965 | "energy detected," : "", | |
966 | (m. | |
967 | mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? | |
968 | "loop test indicated," : "", | |
969 | (m. | |
970 | mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ? | |
971 | "transmitter on," : "", | |
972 | (m. | |
973 | mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? | |
974 | "jabber timer expired," : ""); | |
975 | printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id); | |
976 | #ifdef DEBUG_SHOW_UNUSED | |
977 | printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n", | |
978 | m.mmr_unused2[0], m.mmr_unused2[1]); | |
979 | #endif /* DEBUG_SHOW_UNUSED */ | |
980 | printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n", | |
981 | (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l, | |
982 | (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l); | |
983 | printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n", | |
984 | m.mmr_thr_pre_set & MMR_THR_PRE_SET, | |
985 | (m. | |
986 | mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" : | |
987 | "below"); | |
988 | printk(KERN_DEBUG "signal_lvl: %d [%s], ", | |
989 | m.mmr_signal_lvl & MMR_SIGNAL_LVL, | |
990 | (m. | |
991 | mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" : | |
992 | "no new msg"); | |
993 | printk("silence_lvl: %d [%s], ", | |
994 | m.mmr_silence_lvl & MMR_SILENCE_LVL, | |
995 | (m. | |
996 | mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" : | |
997 | "no new update"); | |
998 | printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL, | |
999 | (m. | |
1000 | mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" : | |
1001 | "Antenna 0"); | |
1002 | #ifdef DEBUG_SHOW_UNUSED | |
1003 | printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l); | |
1004 | #endif /* DEBUG_SHOW_UNUSED */ | |
1005 | } /* wv_mmc_show */ | |
1006 | #endif /* DEBUG_MMC_SHOW */ | |
1007 | ||
1008 | #ifdef DEBUG_I82586_SHOW | |
1009 | /*------------------------------------------------------------------*/ | |
1010 | /* | |
1011 | * Print the last block of the i82586 memory. | |
1012 | */ | |
1013 | static void wv_scb_show(unsigned long ioaddr) | |
1014 | { | |
1015 | scb_t scb; | |
1016 | ||
1017 | obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
1018 | sizeof(scb)); | |
1019 | ||
1020 | printk(KERN_DEBUG "##### WaveLAN system control block: #####\n"); | |
1021 | ||
1022 | printk(KERN_DEBUG "status: "); | |
1023 | printk("stat 0x%x[%s%s%s%s] ", | |
1024 | (scb. | |
1025 | scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | | |
1026 | SCB_ST_RNR)) >> 12, | |
1027 | (scb. | |
1028 | scb_status & SCB_ST_CX) ? "command completion interrupt," : | |
1029 | "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "", | |
1030 | (scb. | |
1031 | scb_status & SCB_ST_CNA) ? "command unit not active," : "", | |
1032 | (scb. | |
1033 | scb_status & SCB_ST_RNR) ? "receiving unit not ready," : | |
1034 | ""); | |
1035 | printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8, | |
1036 | ((scb.scb_status & SCB_ST_CUS) == | |
1037 | SCB_ST_CUS_IDLE) ? "idle" : "", | |
1038 | ((scb.scb_status & SCB_ST_CUS) == | |
1039 | SCB_ST_CUS_SUSP) ? "suspended" : "", | |
1040 | ((scb.scb_status & SCB_ST_CUS) == | |
1041 | SCB_ST_CUS_ACTV) ? "active" : ""); | |
1042 | printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4, | |
1043 | ((scb.scb_status & SCB_ST_RUS) == | |
1044 | SCB_ST_RUS_IDLE) ? "idle" : "", | |
1045 | ((scb.scb_status & SCB_ST_RUS) == | |
1046 | SCB_ST_RUS_SUSP) ? "suspended" : "", | |
1047 | ((scb.scb_status & SCB_ST_RUS) == | |
1048 | SCB_ST_RUS_NRES) ? "no resources" : "", | |
1049 | ((scb.scb_status & SCB_ST_RUS) == | |
1050 | SCB_ST_RUS_RDY) ? "ready" : ""); | |
1051 | ||
1052 | printk(KERN_DEBUG "command: "); | |
1053 | printk("ack 0x%x[%s%s%s%s] ", | |
1054 | (scb. | |
1055 | scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | | |
1056 | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12, | |
1057 | (scb. | |
1058 | scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "", | |
1059 | (scb. | |
1060 | scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "", | |
1061 | (scb. | |
1062 | scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "", | |
1063 | (scb. | |
1064 | scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""); | |
1065 | printk("cuc 0x%x[%s%s%s%s%s] ", | |
1066 | (scb.scb_command & SCB_CMD_CUC) >> 8, | |
1067 | ((scb.scb_command & SCB_CMD_CUC) == | |
1068 | SCB_CMD_CUC_NOP) ? "nop" : "", | |
1069 | ((scb.scb_command & SCB_CMD_CUC) == | |
1070 | SCB_CMD_CUC_GO) ? "start cbl_offset" : "", | |
1071 | ((scb.scb_command & SCB_CMD_CUC) == | |
1072 | SCB_CMD_CUC_RES) ? "resume execution" : "", | |
1073 | ((scb.scb_command & SCB_CMD_CUC) == | |
1074 | SCB_CMD_CUC_SUS) ? "suspend execution" : "", | |
1075 | ((scb.scb_command & SCB_CMD_CUC) == | |
1076 | SCB_CMD_CUC_ABT) ? "abort execution" : ""); | |
1077 | printk("ruc 0x%x[%s%s%s%s%s]\n", | |
1078 | (scb.scb_command & SCB_CMD_RUC) >> 4, | |
1079 | ((scb.scb_command & SCB_CMD_RUC) == | |
1080 | SCB_CMD_RUC_NOP) ? "nop" : "", | |
1081 | ((scb.scb_command & SCB_CMD_RUC) == | |
1082 | SCB_CMD_RUC_GO) ? "start rfa_offset" : "", | |
1083 | ((scb.scb_command & SCB_CMD_RUC) == | |
1084 | SCB_CMD_RUC_RES) ? "resume reception" : "", | |
1085 | ((scb.scb_command & SCB_CMD_RUC) == | |
1086 | SCB_CMD_RUC_SUS) ? "suspend reception" : "", | |
1087 | ((scb.scb_command & SCB_CMD_RUC) == | |
1088 | SCB_CMD_RUC_ABT) ? "abort reception" : ""); | |
1089 | ||
1090 | printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset); | |
1091 | printk("rfa_offset 0x%x\n", scb.scb_rfa_offset); | |
1092 | ||
1093 | printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs); | |
1094 | printk("alnerrs %d ", scb.scb_alnerrs); | |
1095 | printk("rscerrs %d ", scb.scb_rscerrs); | |
1096 | printk("ovrnerrs %d\n", scb.scb_ovrnerrs); | |
1097 | } | |
1098 | ||
1099 | /*------------------------------------------------------------------*/ | |
1100 | /* | |
1101 | * Print the formatted status of the i82586's receive unit. | |
1102 | */ | |
1103 | static void wv_ru_show(struct net_device * dev) | |
1104 | { | |
1da177e4 LT |
1105 | printk(KERN_DEBUG |
1106 | "##### WaveLAN i82586 receiver unit status: #####\n"); | |
1107 | printk(KERN_DEBUG "ru:"); | |
1108 | /* | |
1109 | * Not implemented yet | |
1110 | */ | |
1111 | printk("\n"); | |
1112 | } /* wv_ru_show */ | |
1113 | ||
1114 | /*------------------------------------------------------------------*/ | |
1115 | /* | |
1116 | * Display info about one control block of the i82586 memory. | |
1117 | */ | |
1118 | static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p) | |
1119 | { | |
1120 | unsigned long ioaddr; | |
1121 | ac_tx_t actx; | |
1122 | ||
1123 | ioaddr = dev->base_addr; | |
1124 | ||
1125 | printk("%d: 0x%x:", i, p); | |
1126 | ||
1127 | obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx)); | |
1128 | printk(" status=0x%x,", actx.tx_h.ac_status); | |
1129 | printk(" command=0x%x,", actx.tx_h.ac_command); | |
1130 | ||
1131 | /* | |
1132 | { | |
1133 | tbd_t tbd; | |
1134 | ||
1135 | obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd)); | |
1136 | printk(" tbd_status=0x%x,", tbd.tbd_status); | |
1137 | } | |
1138 | */ | |
1139 | ||
1140 | printk("|"); | |
1141 | } | |
1142 | ||
1143 | /*------------------------------------------------------------------*/ | |
1144 | /* | |
1145 | * Print status of the command unit of the i82586. | |
1146 | */ | |
1147 | static void wv_cu_show(struct net_device * dev) | |
1148 | { | |
524ad0a7 | 1149 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1150 | unsigned int i; |
1151 | u16 p; | |
1152 | ||
1153 | printk(KERN_DEBUG | |
1154 | "##### WaveLAN i82586 command unit status: #####\n"); | |
1155 | ||
1156 | printk(KERN_DEBUG); | |
1157 | for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) { | |
1158 | wv_cu_show_one(dev, lp, i, p); | |
1159 | ||
1160 | p += TXBLOCKZ; | |
1161 | if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
1162 | p -= NTXBLOCKS * TXBLOCKZ; | |
1163 | } | |
1164 | printk("\n"); | |
1165 | } | |
1166 | #endif /* DEBUG_I82586_SHOW */ | |
1167 | ||
1168 | #ifdef DEBUG_DEVICE_SHOW | |
1169 | /*------------------------------------------------------------------*/ | |
1170 | /* | |
1171 | * Print the formatted status of the WaveLAN PCMCIA device driver. | |
1172 | */ | |
1173 | static void wv_dev_show(struct net_device * dev) | |
1174 | { | |
1175 | printk(KERN_DEBUG "dev:"); | |
1176 | printk(" state=%lX,", dev->state); | |
1177 | printk(" trans_start=%ld,", dev->trans_start); | |
1178 | printk(" flags=0x%x,", dev->flags); | |
1179 | printk("\n"); | |
1180 | } /* wv_dev_show */ | |
1181 | ||
1182 | /*------------------------------------------------------------------*/ | |
1183 | /* | |
1184 | * Print the formatted status of the WaveLAN PCMCIA device driver's | |
1185 | * private information. | |
1186 | */ | |
1187 | static void wv_local_show(struct net_device * dev) | |
1188 | { | |
1189 | net_local *lp; | |
1190 | ||
524ad0a7 | 1191 | lp = netdev_priv(dev); |
1da177e4 LT |
1192 | |
1193 | printk(KERN_DEBUG "local:"); | |
1194 | printk(" tx_n_in_use=%d,", lp->tx_n_in_use); | |
1195 | printk(" hacr=0x%x,", lp->hacr); | |
1196 | printk(" rx_head=0x%x,", lp->rx_head); | |
1197 | printk(" rx_last=0x%x,", lp->rx_last); | |
1198 | printk(" tx_first_free=0x%x,", lp->tx_first_free); | |
1199 | printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use); | |
1200 | printk("\n"); | |
1201 | } /* wv_local_show */ | |
1202 | #endif /* DEBUG_DEVICE_SHOW */ | |
1203 | ||
1204 | #if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) | |
1205 | /*------------------------------------------------------------------*/ | |
1206 | /* | |
1207 | * Dump packet header (and content if necessary) on the screen | |
1208 | */ | |
1209 | static inline void wv_packet_info(u8 * p, /* Packet to dump */ | |
1210 | int length, /* Length of the packet */ | |
1211 | char *msg1, /* Name of the device */ | |
1212 | char *msg2) | |
1213 | { /* Name of the function */ | |
1214 | int i; | |
1215 | int maxi; | |
1216 | ||
1217 | printk(KERN_DEBUG | |
e174961c JB |
1218 | "%s: %s(): dest %pM, length %d\n", |
1219 | msg1, msg2, p, length); | |
1da177e4 | 1220 | printk(KERN_DEBUG |
e174961c JB |
1221 | "%s: %s(): src %pM, type 0x%02X%02X\n", |
1222 | msg1, msg2, &p[6], p[12], p[13]); | |
1da177e4 LT |
1223 | |
1224 | #ifdef DEBUG_PACKET_DUMP | |
1225 | ||
1226 | printk(KERN_DEBUG "data=\""); | |
1227 | ||
1228 | if ((maxi = length) > DEBUG_PACKET_DUMP) | |
1229 | maxi = DEBUG_PACKET_DUMP; | |
1230 | for (i = 14; i < maxi; i++) | |
1231 | if (p[i] >= ' ' && p[i] <= '~') | |
1232 | printk(" %c", p[i]); | |
1233 | else | |
1234 | printk("%02X", p[i]); | |
1235 | if (maxi < length) | |
1236 | printk(".."); | |
1237 | printk("\"\n"); | |
1238 | printk(KERN_DEBUG "\n"); | |
1239 | #endif /* DEBUG_PACKET_DUMP */ | |
1240 | } | |
1241 | #endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */ | |
1242 | ||
1243 | /*------------------------------------------------------------------*/ | |
1244 | /* | |
1245 | * This is the information which is displayed by the driver at startup. | |
1246 | * There are lots of flags for configuring it to your liking. | |
1247 | */ | |
858119e1 | 1248 | static void wv_init_info(struct net_device * dev) |
1da177e4 LT |
1249 | { |
1250 | short ioaddr = dev->base_addr; | |
524ad0a7 | 1251 | net_local *lp = netdev_priv(dev); |
1da177e4 | 1252 | psa_t psa; |
1da177e4 LT |
1253 | |
1254 | /* Read the parameter storage area */ | |
1255 | psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
1256 | ||
1257 | #ifdef DEBUG_PSA_SHOW | |
1258 | wv_psa_show(&psa); | |
1259 | #endif | |
1260 | #ifdef DEBUG_MMC_SHOW | |
1261 | wv_mmc_show(dev); | |
1262 | #endif | |
1263 | #ifdef DEBUG_I82586_SHOW | |
1264 | wv_cu_show(dev); | |
1265 | #endif | |
1266 | ||
1267 | #ifdef DEBUG_BASIC_SHOW | |
1268 | /* Now, let's go for the basic stuff. */ | |
e174961c JB |
1269 | printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d", |
1270 | dev->name, ioaddr, dev->dev_addr, dev->irq); | |
1da177e4 LT |
1271 | |
1272 | /* Print current network ID. */ | |
1273 | if (psa.psa_nwid_select) | |
1274 | printk(", nwid 0x%02X-%02X", psa.psa_nwid[0], | |
1275 | psa.psa_nwid[1]); | |
1276 | else | |
1277 | printk(", nwid off"); | |
1278 | ||
1279 | /* If 2.00 card */ | |
1280 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1281 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
1282 | unsigned short freq; | |
1283 | ||
1284 | /* Ask the EEPROM to read the frequency from the first area. */ | |
1285 | fee_read(ioaddr, 0x00, &freq, 1); | |
1286 | ||
1287 | /* Print frequency */ | |
1288 | printk(", 2.00, %ld", (freq >> 6) + 2400L); | |
1289 | ||
1290 | /* Hack! */ | |
1291 | if (freq & 0x20) | |
1292 | printk(".5"); | |
1293 | } else { | |
1294 | printk(", PC"); | |
1295 | switch (psa.psa_comp_number) { | |
1296 | case PSA_COMP_PC_AT_915: | |
1297 | case PSA_COMP_PC_AT_2400: | |
1298 | printk("-AT"); | |
1299 | break; | |
1300 | case PSA_COMP_PC_MC_915: | |
1301 | case PSA_COMP_PC_MC_2400: | |
1302 | printk("-MC"); | |
1303 | break; | |
1304 | case PSA_COMP_PCMCIA_915: | |
1305 | printk("MCIA"); | |
1306 | break; | |
1307 | default: | |
1308 | printk("?"); | |
1309 | } | |
1310 | printk(", "); | |
1311 | switch (psa.psa_subband) { | |
1312 | case PSA_SUBBAND_915: | |
1313 | printk("915"); | |
1314 | break; | |
1315 | case PSA_SUBBAND_2425: | |
1316 | printk("2425"); | |
1317 | break; | |
1318 | case PSA_SUBBAND_2460: | |
1319 | printk("2460"); | |
1320 | break; | |
1321 | case PSA_SUBBAND_2484: | |
1322 | printk("2484"); | |
1323 | break; | |
1324 | case PSA_SUBBAND_2430_5: | |
1325 | printk("2430.5"); | |
1326 | break; | |
1327 | default: | |
1328 | printk("?"); | |
1329 | } | |
1330 | } | |
1331 | ||
1332 | printk(" MHz\n"); | |
1333 | #endif /* DEBUG_BASIC_SHOW */ | |
1334 | ||
1335 | #ifdef DEBUG_VERSION_SHOW | |
1336 | /* Print version information */ | |
1337 | printk(KERN_NOTICE "%s", version); | |
1338 | #endif | |
1339 | } /* wv_init_info */ | |
1340 | ||
1341 | /********************* IOCTL, STATS & RECONFIG *********************/ | |
1342 | /* | |
1343 | * We found here routines that are called by Linux on different | |
1344 | * occasions after the configuration and not for transmitting data | |
1345 | * These may be called when the user use ifconfig, /proc/net/dev | |
1346 | * or wireless extensions | |
1347 | */ | |
1348 | ||
1da177e4 LT |
1349 | |
1350 | /*------------------------------------------------------------------*/ | |
1351 | /* | |
1352 | * Set or clear the multicast filter for this adaptor. | |
1353 | * num_addrs == -1 Promiscuous mode, receive all packets | |
1354 | * num_addrs == 0 Normal mode, clear multicast list | |
1355 | * num_addrs > 0 Multicast mode, receive normal and MC packets, | |
1356 | * and do best-effort filtering. | |
1357 | */ | |
1358 | static void wavelan_set_multicast_list(struct net_device * dev) | |
1359 | { | |
524ad0a7 | 1360 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1361 | |
1362 | #ifdef DEBUG_IOCTL_TRACE | |
1363 | printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n", | |
1364 | dev->name); | |
1365 | #endif | |
1366 | ||
1367 | #ifdef DEBUG_IOCTL_INFO | |
1368 | printk(KERN_DEBUG | |
1369 | "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n", | |
1370 | dev->name, dev->flags, dev->mc_count); | |
1371 | #endif | |
1372 | ||
1373 | /* Are we asking for promiscuous mode, | |
1374 | * or all multicast addresses (we don't have that!) | |
1375 | * or too many multicast addresses for the hardware filter? */ | |
1376 | if ((dev->flags & IFF_PROMISC) || | |
1377 | (dev->flags & IFF_ALLMULTI) || | |
1378 | (dev->mc_count > I82586_MAX_MULTICAST_ADDRESSES)) { | |
1379 | /* | |
1380 | * Enable promiscuous mode: receive all packets. | |
1381 | */ | |
1382 | if (!lp->promiscuous) { | |
1383 | lp->promiscuous = 1; | |
1384 | lp->mc_count = 0; | |
1385 | ||
1386 | wv_82586_reconfig(dev); | |
1da177e4 LT |
1387 | } |
1388 | } else | |
1389 | /* Are there multicast addresses to send? */ | |
1390 | if (dev->mc_list != (struct dev_mc_list *) NULL) { | |
1391 | /* | |
1392 | * Disable promiscuous mode, but receive all packets | |
1393 | * in multicast list | |
1394 | */ | |
1395 | #ifdef MULTICAST_AVOID | |
1396 | if (lp->promiscuous || (dev->mc_count != lp->mc_count)) | |
1397 | #endif | |
1398 | { | |
1399 | lp->promiscuous = 0; | |
1400 | lp->mc_count = dev->mc_count; | |
1401 | ||
1402 | wv_82586_reconfig(dev); | |
1403 | } | |
1404 | } else { | |
1405 | /* | |
1406 | * Switch to normal mode: disable promiscuous mode and | |
1407 | * clear the multicast list. | |
1408 | */ | |
1409 | if (lp->promiscuous || lp->mc_count == 0) { | |
1410 | lp->promiscuous = 0; | |
1411 | lp->mc_count = 0; | |
1412 | ||
1413 | wv_82586_reconfig(dev); | |
1414 | } | |
1415 | } | |
1416 | #ifdef DEBUG_IOCTL_TRACE | |
1417 | printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n", | |
1418 | dev->name); | |
1419 | #endif | |
1420 | } | |
1421 | ||
1422 | /*------------------------------------------------------------------*/ | |
1423 | /* | |
1424 | * This function doesn't exist. | |
1425 | * (Note : it was a nice way to test the reconfigure stuff...) | |
1426 | */ | |
1427 | #ifdef SET_MAC_ADDRESS | |
1428 | static int wavelan_set_mac_address(struct net_device * dev, void *addr) | |
1429 | { | |
1430 | struct sockaddr *mac = addr; | |
1431 | ||
1432 | /* Copy the address. */ | |
1433 | memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE); | |
1434 | ||
1435 | /* Reconfigure the beast. */ | |
1436 | wv_82586_reconfig(dev); | |
1437 | ||
1438 | return 0; | |
1439 | } | |
1440 | #endif /* SET_MAC_ADDRESS */ | |
1441 | ||
1da177e4 LT |
1442 | |
1443 | /*------------------------------------------------------------------*/ | |
1444 | /* | |
1445 | * Frequency setting (for hardware capable of it) | |
1446 | * It's a bit complicated and you don't really want to look into it. | |
1447 | * (called in wavelan_ioctl) | |
1448 | */ | |
858119e1 | 1449 | static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */ |
1da177e4 LT |
1450 | iw_freq * frequency) |
1451 | { | |
1452 | const int BAND_NUM = 10; /* Number of bands */ | |
1453 | long freq = 0L; /* offset to 2.4 GHz in .5 MHz */ | |
1454 | #ifdef DEBUG_IOCTL_INFO | |
1455 | int i; | |
1456 | #endif | |
1457 | ||
1458 | /* Setting by frequency */ | |
1459 | /* Theoretically, you may set any frequency between | |
1460 | * the two limits with a 0.5 MHz precision. In practice, | |
1461 | * I don't want you to have trouble with local regulations. | |
1462 | */ | |
1463 | if ((frequency->e == 1) && | |
1464 | (frequency->m >= (int) 2.412e8) | |
1465 | && (frequency->m <= (int) 2.487e8)) { | |
1466 | freq = ((frequency->m / 10000) - 24000L) / 5; | |
1467 | } | |
1468 | ||
1469 | /* Setting by channel (same as wfreqsel) */ | |
1470 | /* Warning: each channel is 22 MHz wide, so some of the channels | |
1471 | * will interfere. */ | |
1472 | if ((frequency->e == 0) && (frequency->m < BAND_NUM)) { | |
1473 | /* Get frequency offset. */ | |
1474 | freq = channel_bands[frequency->m] >> 1; | |
1475 | } | |
1476 | ||
1477 | /* Verify that the frequency is allowed. */ | |
1478 | if (freq != 0L) { | |
1479 | u16 table[10]; /* Authorized frequency table */ | |
1480 | ||
1481 | /* Read the frequency table. */ | |
1482 | fee_read(ioaddr, 0x71, table, 10); | |
1483 | ||
1484 | #ifdef DEBUG_IOCTL_INFO | |
1485 | printk(KERN_DEBUG "Frequency table: "); | |
1486 | for (i = 0; i < 10; i++) { | |
1487 | printk(" %04X", table[i]); | |
1488 | } | |
1489 | printk("\n"); | |
1490 | #endif | |
1491 | ||
1492 | /* Look in the table to see whether the frequency is allowed. */ | |
1493 | if (!(table[9 - ((freq - 24) / 16)] & | |
1494 | (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */ | |
1495 | } else | |
1496 | return -EINVAL; | |
1497 | ||
1498 | /* if we get a usable frequency */ | |
1499 | if (freq != 0L) { | |
1500 | unsigned short area[16]; | |
1501 | unsigned short dac[2]; | |
1502 | unsigned short area_verify[16]; | |
1503 | unsigned short dac_verify[2]; | |
1504 | /* Corresponding gain (in the power adjust value table) | |
1505 | * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8 | |
1506 | * and WCIN062D.DOC, page 6.2.9. */ | |
1507 | unsigned short power_limit[] = { 40, 80, 120, 160, 0 }; | |
1508 | int power_band = 0; /* Selected band */ | |
1509 | unsigned short power_adjust; /* Correct value */ | |
1510 | ||
1511 | /* Search for the gain. */ | |
1512 | power_band = 0; | |
1513 | while ((freq > power_limit[power_band]) && | |
1514 | (power_limit[++power_band] != 0)); | |
1515 | ||
1516 | /* Read the first area. */ | |
1517 | fee_read(ioaddr, 0x00, area, 16); | |
1518 | ||
1519 | /* Read the DAC. */ | |
1520 | fee_read(ioaddr, 0x60, dac, 2); | |
1521 | ||
1522 | /* Read the new power adjust value. */ | |
1523 | fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust, | |
1524 | 1); | |
1525 | if (power_band & 0x1) | |
1526 | power_adjust >>= 8; | |
1527 | else | |
1528 | power_adjust &= 0xFF; | |
1529 | ||
1530 | #ifdef DEBUG_IOCTL_INFO | |
1531 | printk(KERN_DEBUG "WaveLAN EEPROM Area 1: "); | |
1532 | for (i = 0; i < 16; i++) { | |
1533 | printk(" %04X", area[i]); | |
1534 | } | |
1535 | printk("\n"); | |
1536 | ||
1537 | printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n", | |
1538 | dac[0], dac[1]); | |
1539 | #endif | |
1540 | ||
1541 | /* Frequency offset (for info only) */ | |
1542 | area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F); | |
1543 | ||
1544 | /* Receiver Principle main divider coefficient */ | |
1545 | area[3] = (freq >> 1) + 2400L - 352L; | |
1546 | area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF); | |
1547 | ||
1548 | /* Transmitter Main divider coefficient */ | |
1549 | area[13] = (freq >> 1) + 2400L; | |
1550 | area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF); | |
1551 | ||
1552 | /* Other parts of the area are flags, bit streams or unused. */ | |
1553 | ||
1554 | /* Set the value in the DAC. */ | |
1555 | dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80); | |
1556 | dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF); | |
1557 | ||
1558 | /* Write the first area. */ | |
1559 | fee_write(ioaddr, 0x00, area, 16); | |
1560 | ||
1561 | /* Write the DAC. */ | |
1562 | fee_write(ioaddr, 0x60, dac, 2); | |
1563 | ||
1564 | /* We now should verify here that the writing of the EEPROM went OK. */ | |
1565 | ||
1566 | /* Reread the first area. */ | |
1567 | fee_read(ioaddr, 0x00, area_verify, 16); | |
1568 | ||
1569 | /* Reread the DAC. */ | |
1570 | fee_read(ioaddr, 0x60, dac_verify, 2); | |
1571 | ||
1572 | /* Compare. */ | |
1573 | if (memcmp(area, area_verify, 16 * 2) || | |
1574 | memcmp(dac, dac_verify, 2 * 2)) { | |
1575 | #ifdef DEBUG_IOCTL_ERROR | |
1576 | printk(KERN_INFO | |
1577 | "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n"); | |
1578 | #endif | |
1579 | return -EOPNOTSUPP; | |
1580 | } | |
1581 | ||
1582 | /* We must download the frequency parameters to the | |
1583 | * synthesizers (from the EEPROM - area 1) | |
1584 | * Note: as the EEPROM is automatically decremented, we set the end | |
1585 | * if the area... */ | |
1586 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F); | |
1587 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
1588 | MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD); | |
1589 | ||
1590 | /* Wait until the download is finished. */ | |
1591 | fee_wait(ioaddr, 100, 100); | |
1592 | ||
1593 | /* We must now download the power adjust value (gain) to | |
1594 | * the synthesizers (from the EEPROM - area 7 - DAC). */ | |
1595 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61); | |
1596 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
1597 | MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD); | |
1598 | ||
1599 | /* Wait for the download to finish. */ | |
1600 | fee_wait(ioaddr, 100, 100); | |
1601 | ||
1602 | #ifdef DEBUG_IOCTL_INFO | |
1603 | /* Verification of what we have done */ | |
1604 | ||
1605 | printk(KERN_DEBUG "WaveLAN EEPROM Area 1: "); | |
1606 | for (i = 0; i < 16; i++) { | |
1607 | printk(" %04X", area_verify[i]); | |
1608 | } | |
1609 | printk("\n"); | |
1610 | ||
1611 | printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n", | |
1612 | dac_verify[0], dac_verify[1]); | |
1613 | #endif | |
1614 | ||
1615 | return 0; | |
1616 | } else | |
1617 | return -EINVAL; /* Bah, never get there... */ | |
1618 | } | |
1619 | ||
1620 | /*------------------------------------------------------------------*/ | |
1621 | /* | |
1622 | * Give the list of available frequencies. | |
1623 | */ | |
858119e1 | 1624 | static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */ |
1da177e4 LT |
1625 | iw_freq * list, /* List of frequencies to fill */ |
1626 | int max) | |
1627 | { /* Maximum number of frequencies */ | |
1628 | u16 table[10]; /* Authorized frequency table */ | |
1629 | long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */ | |
1630 | int i; /* index in the table */ | |
1631 | int c = 0; /* Channel number */ | |
1632 | ||
1633 | /* Read the frequency table. */ | |
1634 | fee_read(ioaddr, 0x71 /* frequency table */ , table, 10); | |
1635 | ||
1636 | /* Check all frequencies. */ | |
1637 | i = 0; | |
1638 | for (freq = 0; freq < 150; freq++) | |
1639 | /* Look in the table if the frequency is allowed */ | |
1640 | if (table[9 - (freq / 16)] & (1 << (freq % 16))) { | |
1641 | /* Compute approximate channel number */ | |
0a92dd0a | 1642 | while ((c < ARRAY_SIZE(channel_bands)) && |
a192491a | 1643 | (((channel_bands[c] >> 1) - 24) < freq)) |
1da177e4 LT |
1644 | c++; |
1645 | list[i].i = c; /* Set the list index */ | |
1646 | ||
1647 | /* put in the list */ | |
1648 | list[i].m = (((freq + 24) * 5) + 24000L) * 10000; | |
1649 | list[i++].e = 1; | |
1650 | ||
1651 | /* Check number. */ | |
1652 | if (i >= max) | |
1653 | return (i); | |
1654 | } | |
1655 | ||
1656 | return (i); | |
1657 | } | |
1658 | ||
1659 | #ifdef IW_WIRELESS_SPY | |
1660 | /*------------------------------------------------------------------*/ | |
1661 | /* | |
1662 | * Gather wireless spy statistics: for each packet, compare the source | |
1663 | * address with our list, and if they match, get the statistics. | |
1664 | * Sorry, but this function really needs the wireless extensions. | |
1665 | */ | |
1666 | static inline void wl_spy_gather(struct net_device * dev, | |
1667 | u8 * mac, /* MAC address */ | |
1668 | u8 * stats) /* Statistics to gather */ | |
1669 | { | |
1670 | struct iw_quality wstats; | |
1671 | ||
1672 | wstats.qual = stats[2] & MMR_SGNL_QUAL; | |
1673 | wstats.level = stats[0] & MMR_SIGNAL_LVL; | |
1674 | wstats.noise = stats[1] & MMR_SILENCE_LVL; | |
1675 | wstats.updated = 0x7; | |
1676 | ||
1677 | /* Update spy records */ | |
1678 | wireless_spy_update(dev, mac, &wstats); | |
1679 | } | |
1680 | #endif /* IW_WIRELESS_SPY */ | |
1681 | ||
1682 | #ifdef HISTOGRAM | |
1683 | /*------------------------------------------------------------------*/ | |
1684 | /* | |
1685 | * This function calculates a histogram of the signal level. | |
1686 | * As the noise is quite constant, it's like doing it on the SNR. | |
1687 | * We have defined a set of interval (lp->his_range), and each time | |
1688 | * the level goes in that interval, we increment the count (lp->his_sum). | |
1689 | * With this histogram you may detect if one WaveLAN is really weak, | |
1690 | * or you may also calculate the mean and standard deviation of the level. | |
1691 | */ | |
1692 | static inline void wl_his_gather(struct net_device * dev, u8 * stats) | |
1693 | { /* Statistics to gather */ | |
524ad0a7 | 1694 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1695 | u8 level = stats[0] & MMR_SIGNAL_LVL; |
1696 | int i; | |
1697 | ||
1698 | /* Find the correct interval. */ | |
1699 | i = 0; | |
1700 | while ((i < (lp->his_number - 1)) | |
1701 | && (level >= lp->his_range[i++])); | |
1702 | ||
1703 | /* Increment interval counter. */ | |
1704 | (lp->his_sum[i])++; | |
1705 | } | |
1706 | #endif /* HISTOGRAM */ | |
1707 | ||
1708 | /*------------------------------------------------------------------*/ | |
1709 | /* | |
1710 | * Wireless Handler : get protocol name | |
1711 | */ | |
1712 | static int wavelan_get_name(struct net_device *dev, | |
1713 | struct iw_request_info *info, | |
1714 | union iwreq_data *wrqu, | |
1715 | char *extra) | |
1716 | { | |
1717 | strcpy(wrqu->name, "WaveLAN"); | |
1718 | return 0; | |
1719 | } | |
1720 | ||
1721 | /*------------------------------------------------------------------*/ | |
1722 | /* | |
1723 | * Wireless Handler : set NWID | |
1724 | */ | |
1725 | static int wavelan_set_nwid(struct net_device *dev, | |
1726 | struct iw_request_info *info, | |
1727 | union iwreq_data *wrqu, | |
1728 | char *extra) | |
1729 | { | |
1730 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1731 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1732 | psa_t psa; |
1733 | mm_t m; | |
1734 | unsigned long flags; | |
1735 | int ret = 0; | |
1736 | ||
1737 | /* Disable interrupts and save flags. */ | |
1738 | spin_lock_irqsave(&lp->spinlock, flags); | |
1739 | ||
1740 | /* Set NWID in WaveLAN. */ | |
1741 | if (!wrqu->nwid.disabled) { | |
1742 | /* Set NWID in psa */ | |
1743 | psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8; | |
1744 | psa.psa_nwid[1] = wrqu->nwid.value & 0xFF; | |
1745 | psa.psa_nwid_select = 0x01; | |
1746 | psa_write(ioaddr, lp->hacr, | |
1747 | (char *) psa.psa_nwid - (char *) &psa, | |
1748 | (unsigned char *) psa.psa_nwid, 3); | |
1749 | ||
1750 | /* Set NWID in mmc. */ | |
1751 | m.w.mmw_netw_id_l = psa.psa_nwid[1]; | |
1752 | m.w.mmw_netw_id_h = psa.psa_nwid[0]; | |
1753 | mmc_write(ioaddr, | |
1754 | (char *) &m.w.mmw_netw_id_l - | |
1755 | (char *) &m, | |
1756 | (unsigned char *) &m.w.mmw_netw_id_l, 2); | |
1757 | mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00); | |
1758 | } else { | |
1759 | /* Disable NWID in the psa. */ | |
1760 | psa.psa_nwid_select = 0x00; | |
1761 | psa_write(ioaddr, lp->hacr, | |
1762 | (char *) &psa.psa_nwid_select - | |
1763 | (char *) &psa, | |
1764 | (unsigned char *) &psa.psa_nwid_select, | |
1765 | 1); | |
1766 | ||
1767 | /* Disable NWID in the mmc (no filtering). */ | |
1768 | mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), | |
1769 | MMW_LOOPT_SEL_DIS_NWID); | |
1770 | } | |
1771 | /* update the Wavelan checksum */ | |
1772 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
1773 | ||
1774 | /* Enable interrupts and restore flags. */ | |
1775 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1776 | ||
1777 | return ret; | |
1778 | } | |
1779 | ||
1780 | /*------------------------------------------------------------------*/ | |
1781 | /* | |
1782 | * Wireless Handler : get NWID | |
1783 | */ | |
1784 | static int wavelan_get_nwid(struct net_device *dev, | |
1785 | struct iw_request_info *info, | |
1786 | union iwreq_data *wrqu, | |
1787 | char *extra) | |
1788 | { | |
1789 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1790 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1791 | psa_t psa; |
1792 | unsigned long flags; | |
1793 | int ret = 0; | |
1794 | ||
1795 | /* Disable interrupts and save flags. */ | |
1796 | spin_lock_irqsave(&lp->spinlock, flags); | |
1797 | ||
1798 | /* Read the NWID. */ | |
1799 | psa_read(ioaddr, lp->hacr, | |
1800 | (char *) psa.psa_nwid - (char *) &psa, | |
1801 | (unsigned char *) psa.psa_nwid, 3); | |
1802 | wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1]; | |
1803 | wrqu->nwid.disabled = !(psa.psa_nwid_select); | |
1804 | wrqu->nwid.fixed = 1; /* Superfluous */ | |
1805 | ||
1806 | /* Enable interrupts and restore flags. */ | |
1807 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1808 | ||
1809 | return ret; | |
1810 | } | |
1811 | ||
1812 | /*------------------------------------------------------------------*/ | |
1813 | /* | |
1814 | * Wireless Handler : set frequency | |
1815 | */ | |
1816 | static int wavelan_set_freq(struct net_device *dev, | |
1817 | struct iw_request_info *info, | |
1818 | union iwreq_data *wrqu, | |
1819 | char *extra) | |
1820 | { | |
1821 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1822 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1823 | unsigned long flags; |
1824 | int ret; | |
1825 | ||
1826 | /* Disable interrupts and save flags. */ | |
1827 | spin_lock_irqsave(&lp->spinlock, flags); | |
1828 | ||
1829 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */ | |
1830 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1831 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) | |
1832 | ret = wv_set_frequency(ioaddr, &(wrqu->freq)); | |
1833 | else | |
1834 | ret = -EOPNOTSUPP; | |
1835 | ||
1836 | /* Enable interrupts and restore flags. */ | |
1837 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1838 | ||
1839 | return ret; | |
1840 | } | |
1841 | ||
1842 | /*------------------------------------------------------------------*/ | |
1843 | /* | |
1844 | * Wireless Handler : get frequency | |
1845 | */ | |
1846 | static int wavelan_get_freq(struct net_device *dev, | |
1847 | struct iw_request_info *info, | |
1848 | union iwreq_data *wrqu, | |
1849 | char *extra) | |
1850 | { | |
1851 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1852 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1853 | psa_t psa; |
1854 | unsigned long flags; | |
1855 | int ret = 0; | |
1856 | ||
1857 | /* Disable interrupts and save flags. */ | |
1858 | spin_lock_irqsave(&lp->spinlock, flags); | |
1859 | ||
1860 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). | |
1861 | * Does it work for everybody, especially old cards? */ | |
1862 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1863 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
1864 | unsigned short freq; | |
1865 | ||
1866 | /* Ask the EEPROM to read the frequency from the first area. */ | |
1867 | fee_read(ioaddr, 0x00, &freq, 1); | |
1868 | wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000; | |
1869 | wrqu->freq.e = 1; | |
1870 | } else { | |
1871 | psa_read(ioaddr, lp->hacr, | |
1872 | (char *) &psa.psa_subband - (char *) &psa, | |
1873 | (unsigned char *) &psa.psa_subband, 1); | |
1874 | ||
1875 | if (psa.psa_subband <= 4) { | |
1876 | wrqu->freq.m = fixed_bands[psa.psa_subband]; | |
1877 | wrqu->freq.e = (psa.psa_subband != 0); | |
1878 | } else | |
1879 | ret = -EOPNOTSUPP; | |
1880 | } | |
1881 | ||
1882 | /* Enable interrupts and restore flags. */ | |
1883 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1884 | ||
1885 | return ret; | |
1886 | } | |
1887 | ||
1888 | /*------------------------------------------------------------------*/ | |
1889 | /* | |
1890 | * Wireless Handler : set level threshold | |
1891 | */ | |
1892 | static int wavelan_set_sens(struct net_device *dev, | |
1893 | struct iw_request_info *info, | |
1894 | union iwreq_data *wrqu, | |
1895 | char *extra) | |
1896 | { | |
1897 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1898 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1899 | psa_t psa; |
1900 | unsigned long flags; | |
1901 | int ret = 0; | |
1902 | ||
1903 | /* Disable interrupts and save flags. */ | |
1904 | spin_lock_irqsave(&lp->spinlock, flags); | |
1905 | ||
1906 | /* Set the level threshold. */ | |
1907 | /* We should complain loudly if wrqu->sens.fixed = 0, because we | |
1908 | * can't set auto mode... */ | |
1909 | psa.psa_thr_pre_set = wrqu->sens.value & 0x3F; | |
1910 | psa_write(ioaddr, lp->hacr, | |
1911 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
1912 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
1913 | /* update the Wavelan checksum */ | |
1914 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
1915 | mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set), | |
1916 | psa.psa_thr_pre_set); | |
1917 | ||
1918 | /* Enable interrupts and restore flags. */ | |
1919 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1920 | ||
1921 | return ret; | |
1922 | } | |
1923 | ||
1924 | /*------------------------------------------------------------------*/ | |
1925 | /* | |
1926 | * Wireless Handler : get level threshold | |
1927 | */ | |
1928 | static int wavelan_get_sens(struct net_device *dev, | |
1929 | struct iw_request_info *info, | |
1930 | union iwreq_data *wrqu, | |
1931 | char *extra) | |
1932 | { | |
1933 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1934 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1935 | psa_t psa; |
1936 | unsigned long flags; | |
1937 | int ret = 0; | |
1938 | ||
1939 | /* Disable interrupts and save flags. */ | |
1940 | spin_lock_irqsave(&lp->spinlock, flags); | |
1941 | ||
1942 | /* Read the level threshold. */ | |
1943 | psa_read(ioaddr, lp->hacr, | |
1944 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
1945 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
1946 | wrqu->sens.value = psa.psa_thr_pre_set & 0x3F; | |
1947 | wrqu->sens.fixed = 1; | |
1948 | ||
1949 | /* Enable interrupts and restore flags. */ | |
1950 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1951 | ||
1952 | return ret; | |
1953 | } | |
1954 | ||
1955 | /*------------------------------------------------------------------*/ | |
1956 | /* | |
1957 | * Wireless Handler : set encryption key | |
1958 | */ | |
1959 | static int wavelan_set_encode(struct net_device *dev, | |
1960 | struct iw_request_info *info, | |
1961 | union iwreq_data *wrqu, | |
1962 | char *extra) | |
1963 | { | |
1964 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1965 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1966 | unsigned long flags; |
1967 | psa_t psa; | |
1968 | int ret = 0; | |
1969 | ||
1970 | /* Disable interrupts and save flags. */ | |
1971 | spin_lock_irqsave(&lp->spinlock, flags); | |
1972 | ||
1973 | /* Check if capable of encryption */ | |
1974 | if (!mmc_encr(ioaddr)) { | |
1975 | ret = -EOPNOTSUPP; | |
1976 | } | |
1977 | ||
1978 | /* Check the size of the key */ | |
1979 | if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) { | |
1980 | ret = -EINVAL; | |
1981 | } | |
1982 | ||
1983 | if(!ret) { | |
1984 | /* Basic checking... */ | |
1985 | if (wrqu->encoding.length == 8) { | |
1986 | /* Copy the key in the driver */ | |
1987 | memcpy(psa.psa_encryption_key, extra, | |
1988 | wrqu->encoding.length); | |
1989 | psa.psa_encryption_select = 1; | |
1990 | ||
1991 | psa_write(ioaddr, lp->hacr, | |
1992 | (char *) &psa.psa_encryption_select - | |
1993 | (char *) &psa, | |
1994 | (unsigned char *) &psa. | |
1995 | psa_encryption_select, 8 + 1); | |
1996 | ||
1997 | mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), | |
1998 | MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE); | |
1999 | mmc_write(ioaddr, mmwoff(0, mmw_encr_key), | |
2000 | (unsigned char *) &psa. | |
2001 | psa_encryption_key, 8); | |
2002 | } | |
2003 | ||
2004 | /* disable encryption */ | |
2005 | if (wrqu->encoding.flags & IW_ENCODE_DISABLED) { | |
2006 | psa.psa_encryption_select = 0; | |
2007 | psa_write(ioaddr, lp->hacr, | |
2008 | (char *) &psa.psa_encryption_select - | |
2009 | (char *) &psa, | |
2010 | (unsigned char *) &psa. | |
2011 | psa_encryption_select, 1); | |
2012 | ||
2013 | mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0); | |
2014 | } | |
2015 | /* update the Wavelan checksum */ | |
2016 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2017 | } | |
2018 | ||
2019 | /* Enable interrupts and restore flags. */ | |
2020 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2021 | ||
2022 | return ret; | |
2023 | } | |
2024 | ||
2025 | /*------------------------------------------------------------------*/ | |
2026 | /* | |
2027 | * Wireless Handler : get encryption key | |
2028 | */ | |
2029 | static int wavelan_get_encode(struct net_device *dev, | |
2030 | struct iw_request_info *info, | |
2031 | union iwreq_data *wrqu, | |
2032 | char *extra) | |
2033 | { | |
2034 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2035 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2036 | psa_t psa; |
2037 | unsigned long flags; | |
2038 | int ret = 0; | |
2039 | ||
2040 | /* Disable interrupts and save flags. */ | |
2041 | spin_lock_irqsave(&lp->spinlock, flags); | |
2042 | ||
2043 | /* Check if encryption is available */ | |
2044 | if (!mmc_encr(ioaddr)) { | |
2045 | ret = -EOPNOTSUPP; | |
2046 | } else { | |
2047 | /* Read the encryption key */ | |
2048 | psa_read(ioaddr, lp->hacr, | |
2049 | (char *) &psa.psa_encryption_select - | |
2050 | (char *) &psa, | |
2051 | (unsigned char *) &psa. | |
2052 | psa_encryption_select, 1 + 8); | |
2053 | ||
2054 | /* encryption is enabled ? */ | |
2055 | if (psa.psa_encryption_select) | |
2056 | wrqu->encoding.flags = IW_ENCODE_ENABLED; | |
2057 | else | |
2058 | wrqu->encoding.flags = IW_ENCODE_DISABLED; | |
2059 | wrqu->encoding.flags |= mmc_encr(ioaddr); | |
2060 | ||
2061 | /* Copy the key to the user buffer */ | |
2062 | wrqu->encoding.length = 8; | |
2063 | memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length); | |
2064 | } | |
2065 | ||
2066 | /* Enable interrupts and restore flags. */ | |
2067 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2068 | ||
2069 | return ret; | |
2070 | } | |
2071 | ||
2072 | /*------------------------------------------------------------------*/ | |
2073 | /* | |
2074 | * Wireless Handler : get range info | |
2075 | */ | |
2076 | static int wavelan_get_range(struct net_device *dev, | |
2077 | struct iw_request_info *info, | |
2078 | union iwreq_data *wrqu, | |
2079 | char *extra) | |
2080 | { | |
2081 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2082 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2083 | struct iw_range *range = (struct iw_range *) extra; |
2084 | unsigned long flags; | |
2085 | int ret = 0; | |
2086 | ||
2087 | /* Set the length (very important for backward compatibility) */ | |
2088 | wrqu->data.length = sizeof(struct iw_range); | |
2089 | ||
2090 | /* Set all the info we don't care or don't know about to zero */ | |
2091 | memset(range, 0, sizeof(struct iw_range)); | |
2092 | ||
2093 | /* Set the Wireless Extension versions */ | |
2094 | range->we_version_compiled = WIRELESS_EXT; | |
2095 | range->we_version_source = 9; | |
2096 | ||
2097 | /* Set information in the range struct. */ | |
2098 | range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */ | |
2099 | range->min_nwid = 0x0000; | |
2100 | range->max_nwid = 0xFFFF; | |
2101 | ||
2102 | range->sensitivity = 0x3F; | |
2103 | range->max_qual.qual = MMR_SGNL_QUAL; | |
2104 | range->max_qual.level = MMR_SIGNAL_LVL; | |
2105 | range->max_qual.noise = MMR_SILENCE_LVL; | |
2106 | range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */ | |
2107 | /* Need to get better values for those two */ | |
2108 | range->avg_qual.level = 30; | |
2109 | range->avg_qual.noise = 8; | |
2110 | ||
2111 | range->num_bitrates = 1; | |
2112 | range->bitrate[0] = 2000000; /* 2 Mb/s */ | |
2113 | ||
2114 | /* Event capability (kernel + driver) */ | |
2115 | range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) | | |
2116 | IW_EVENT_CAPA_MASK(0x8B04)); | |
2117 | range->event_capa[1] = IW_EVENT_CAPA_K_1; | |
2118 | ||
2119 | /* Disable interrupts and save flags. */ | |
2120 | spin_lock_irqsave(&lp->spinlock, flags); | |
2121 | ||
2122 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */ | |
2123 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
2124 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
2125 | range->num_channels = 10; | |
2126 | range->num_frequency = wv_frequency_list(ioaddr, range->freq, | |
2127 | IW_MAX_FREQUENCIES); | |
2128 | } else | |
2129 | range->num_channels = range->num_frequency = 0; | |
2130 | ||
2131 | /* Encryption supported ? */ | |
2132 | if (mmc_encr(ioaddr)) { | |
2133 | range->encoding_size[0] = 8; /* DES = 64 bits key */ | |
2134 | range->num_encoding_sizes = 1; | |
2135 | range->max_encoding_tokens = 1; /* Only one key possible */ | |
2136 | } else { | |
2137 | range->num_encoding_sizes = 0; | |
2138 | range->max_encoding_tokens = 0; | |
2139 | } | |
2140 | ||
2141 | /* Enable interrupts and restore flags. */ | |
2142 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2143 | ||
2144 | return ret; | |
2145 | } | |
2146 | ||
2147 | /*------------------------------------------------------------------*/ | |
2148 | /* | |
2149 | * Wireless Private Handler : set quality threshold | |
2150 | */ | |
2151 | static int wavelan_set_qthr(struct net_device *dev, | |
2152 | struct iw_request_info *info, | |
2153 | union iwreq_data *wrqu, | |
2154 | char *extra) | |
2155 | { | |
2156 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2157 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2158 | psa_t psa; |
2159 | unsigned long flags; | |
2160 | ||
2161 | /* Disable interrupts and save flags. */ | |
2162 | spin_lock_irqsave(&lp->spinlock, flags); | |
2163 | ||
2164 | psa.psa_quality_thr = *(extra) & 0x0F; | |
2165 | psa_write(ioaddr, lp->hacr, | |
2166 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2167 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2168 | /* update the Wavelan checksum */ | |
2169 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2170 | mmc_out(ioaddr, mmwoff(0, mmw_quality_thr), | |
2171 | psa.psa_quality_thr); | |
2172 | ||
2173 | /* Enable interrupts and restore flags. */ | |
2174 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2175 | ||
2176 | return 0; | |
2177 | } | |
2178 | ||
2179 | /*------------------------------------------------------------------*/ | |
2180 | /* | |
2181 | * Wireless Private Handler : get quality threshold | |
2182 | */ | |
2183 | static int wavelan_get_qthr(struct net_device *dev, | |
2184 | struct iw_request_info *info, | |
2185 | union iwreq_data *wrqu, | |
2186 | char *extra) | |
2187 | { | |
2188 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2189 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2190 | psa_t psa; |
2191 | unsigned long flags; | |
2192 | ||
2193 | /* Disable interrupts and save flags. */ | |
2194 | spin_lock_irqsave(&lp->spinlock, flags); | |
2195 | ||
2196 | psa_read(ioaddr, lp->hacr, | |
2197 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2198 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2199 | *(extra) = psa.psa_quality_thr & 0x0F; | |
2200 | ||
2201 | /* Enable interrupts and restore flags. */ | |
2202 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2203 | ||
2204 | return 0; | |
2205 | } | |
2206 | ||
2207 | #ifdef HISTOGRAM | |
2208 | /*------------------------------------------------------------------*/ | |
2209 | /* | |
2210 | * Wireless Private Handler : set histogram | |
2211 | */ | |
2212 | static int wavelan_set_histo(struct net_device *dev, | |
2213 | struct iw_request_info *info, | |
2214 | union iwreq_data *wrqu, | |
2215 | char *extra) | |
2216 | { | |
524ad0a7 | 2217 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2218 | |
2219 | /* Check the number of intervals. */ | |
2220 | if (wrqu->data.length > 16) { | |
2221 | return(-E2BIG); | |
2222 | } | |
2223 | ||
2224 | /* Disable histo while we copy the addresses. | |
2225 | * As we don't disable interrupts, we need to do this */ | |
2226 | lp->his_number = 0; | |
2227 | ||
2228 | /* Are there ranges to copy? */ | |
2229 | if (wrqu->data.length > 0) { | |
2230 | /* Copy interval ranges to the driver */ | |
2231 | memcpy(lp->his_range, extra, wrqu->data.length); | |
2232 | ||
2233 | { | |
2234 | int i; | |
2235 | printk(KERN_DEBUG "Histo :"); | |
2236 | for(i = 0; i < wrqu->data.length; i++) | |
2237 | printk(" %d", lp->his_range[i]); | |
2238 | printk("\n"); | |
2239 | } | |
2240 | ||
2241 | /* Reset result structure. */ | |
2242 | memset(lp->his_sum, 0x00, sizeof(long) * 16); | |
2243 | } | |
2244 | ||
2245 | /* Now we can set the number of ranges */ | |
2246 | lp->his_number = wrqu->data.length; | |
2247 | ||
2248 | return(0); | |
2249 | } | |
2250 | ||
2251 | /*------------------------------------------------------------------*/ | |
2252 | /* | |
2253 | * Wireless Private Handler : get histogram | |
2254 | */ | |
2255 | static int wavelan_get_histo(struct net_device *dev, | |
2256 | struct iw_request_info *info, | |
2257 | union iwreq_data *wrqu, | |
2258 | char *extra) | |
2259 | { | |
524ad0a7 | 2260 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2261 | |
2262 | /* Set the number of intervals. */ | |
2263 | wrqu->data.length = lp->his_number; | |
2264 | ||
2265 | /* Give back the distribution statistics */ | |
2266 | if(lp->his_number > 0) | |
2267 | memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number); | |
2268 | ||
2269 | return(0); | |
2270 | } | |
2271 | #endif /* HISTOGRAM */ | |
2272 | ||
2273 | /*------------------------------------------------------------------*/ | |
2274 | /* | |
2275 | * Structures to export the Wireless Handlers | |
2276 | */ | |
2277 | ||
2278 | static const iw_handler wavelan_handler[] = | |
2279 | { | |
2280 | NULL, /* SIOCSIWNAME */ | |
2281 | wavelan_get_name, /* SIOCGIWNAME */ | |
2282 | wavelan_set_nwid, /* SIOCSIWNWID */ | |
2283 | wavelan_get_nwid, /* SIOCGIWNWID */ | |
2284 | wavelan_set_freq, /* SIOCSIWFREQ */ | |
2285 | wavelan_get_freq, /* SIOCGIWFREQ */ | |
2286 | NULL, /* SIOCSIWMODE */ | |
2287 | NULL, /* SIOCGIWMODE */ | |
2288 | wavelan_set_sens, /* SIOCSIWSENS */ | |
2289 | wavelan_get_sens, /* SIOCGIWSENS */ | |
2290 | NULL, /* SIOCSIWRANGE */ | |
2291 | wavelan_get_range, /* SIOCGIWRANGE */ | |
2292 | NULL, /* SIOCSIWPRIV */ | |
2293 | NULL, /* SIOCGIWPRIV */ | |
2294 | NULL, /* SIOCSIWSTATS */ | |
2295 | NULL, /* SIOCGIWSTATS */ | |
2296 | iw_handler_set_spy, /* SIOCSIWSPY */ | |
2297 | iw_handler_get_spy, /* SIOCGIWSPY */ | |
2298 | iw_handler_set_thrspy, /* SIOCSIWTHRSPY */ | |
2299 | iw_handler_get_thrspy, /* SIOCGIWTHRSPY */ | |
2300 | NULL, /* SIOCSIWAP */ | |
2301 | NULL, /* SIOCGIWAP */ | |
2302 | NULL, /* -- hole -- */ | |
2303 | NULL, /* SIOCGIWAPLIST */ | |
2304 | NULL, /* -- hole -- */ | |
2305 | NULL, /* -- hole -- */ | |
2306 | NULL, /* SIOCSIWESSID */ | |
2307 | NULL, /* SIOCGIWESSID */ | |
2308 | NULL, /* SIOCSIWNICKN */ | |
2309 | NULL, /* SIOCGIWNICKN */ | |
2310 | NULL, /* -- hole -- */ | |
2311 | NULL, /* -- hole -- */ | |
2312 | NULL, /* SIOCSIWRATE */ | |
2313 | NULL, /* SIOCGIWRATE */ | |
2314 | NULL, /* SIOCSIWRTS */ | |
2315 | NULL, /* SIOCGIWRTS */ | |
2316 | NULL, /* SIOCSIWFRAG */ | |
2317 | NULL, /* SIOCGIWFRAG */ | |
2318 | NULL, /* SIOCSIWTXPOW */ | |
2319 | NULL, /* SIOCGIWTXPOW */ | |
2320 | NULL, /* SIOCSIWRETRY */ | |
2321 | NULL, /* SIOCGIWRETRY */ | |
2322 | /* Bummer ! Why those are only at the end ??? */ | |
2323 | wavelan_set_encode, /* SIOCSIWENCODE */ | |
2324 | wavelan_get_encode, /* SIOCGIWENCODE */ | |
2325 | }; | |
2326 | ||
2327 | static const iw_handler wavelan_private_handler[] = | |
2328 | { | |
2329 | wavelan_set_qthr, /* SIOCIWFIRSTPRIV */ | |
2330 | wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */ | |
2331 | #ifdef HISTOGRAM | |
2332 | wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */ | |
2333 | wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */ | |
2334 | #endif /* HISTOGRAM */ | |
2335 | }; | |
2336 | ||
2337 | static const struct iw_priv_args wavelan_private_args[] = { | |
2338 | /*{ cmd, set_args, get_args, name } */ | |
2339 | { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" }, | |
2340 | { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" }, | |
2341 | { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" }, | |
2342 | { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" }, | |
2343 | }; | |
2344 | ||
2345 | static const struct iw_handler_def wavelan_handler_def = | |
2346 | { | |
ff8ac609 DC |
2347 | .num_standard = ARRAY_SIZE(wavelan_handler), |
2348 | .num_private = ARRAY_SIZE(wavelan_private_handler), | |
2349 | .num_private_args = ARRAY_SIZE(wavelan_private_args), | |
1da177e4 LT |
2350 | .standard = wavelan_handler, |
2351 | .private = wavelan_private_handler, | |
2352 | .private_args = wavelan_private_args, | |
2353 | .get_wireless_stats = wavelan_get_wireless_stats, | |
2354 | }; | |
2355 | ||
2356 | /*------------------------------------------------------------------*/ | |
2357 | /* | |
2358 | * Get wireless statistics. | |
2359 | * Called by /proc/net/wireless | |
2360 | */ | |
2361 | static iw_stats *wavelan_get_wireless_stats(struct net_device * dev) | |
2362 | { | |
2363 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2364 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2365 | mmr_t m; |
2366 | iw_stats *wstats; | |
2367 | unsigned long flags; | |
2368 | ||
2369 | #ifdef DEBUG_IOCTL_TRACE | |
2370 | printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n", | |
2371 | dev->name); | |
2372 | #endif | |
2373 | ||
2374 | /* Check */ | |
2375 | if (lp == (net_local *) NULL) | |
2376 | return (iw_stats *) NULL; | |
2377 | ||
2378 | /* Disable interrupts and save flags. */ | |
2379 | spin_lock_irqsave(&lp->spinlock, flags); | |
2380 | ||
2381 | wstats = &lp->wstats; | |
2382 | ||
2383 | /* Get data from the mmc. */ | |
2384 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
2385 | ||
2386 | mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1); | |
2387 | mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, | |
2388 | 2); | |
2389 | mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set, | |
2390 | 4); | |
2391 | ||
2392 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
2393 | ||
2394 | /* Copy data to wireless stuff. */ | |
2395 | wstats->status = m.mmr_dce_status & MMR_DCE_STATUS; | |
2396 | wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL; | |
2397 | wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL; | |
2398 | wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL; | |
2399 | wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7) | |
2400 | | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6) | |
2401 | | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5)); | |
2402 | wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l; | |
2403 | wstats->discard.code = 0L; | |
2404 | wstats->discard.misc = 0L; | |
2405 | ||
2406 | /* Enable interrupts and restore flags. */ | |
2407 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2408 | ||
2409 | #ifdef DEBUG_IOCTL_TRACE | |
2410 | printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n", | |
2411 | dev->name); | |
2412 | #endif | |
2413 | return &lp->wstats; | |
2414 | } | |
1da177e4 LT |
2415 | |
2416 | /************************* PACKET RECEPTION *************************/ | |
2417 | /* | |
2418 | * This part deals with receiving the packets. | |
2419 | * The interrupt handler gets an interrupt when a packet has been | |
2420 | * successfully received and calls this part. | |
2421 | */ | |
2422 | ||
2423 | /*------------------------------------------------------------------*/ | |
2424 | /* | |
2425 | * This routine does the actual copying of data (including the Ethernet | |
2426 | * header structure) from the WaveLAN card to an sk_buff chain that | |
2427 | * will be passed up to the network interface layer. NOTE: we | |
2428 | * currently don't handle trailer protocols (neither does the rest of | |
2429 | * the network interface), so if that is needed, it will (at least in | |
2430 | * part) be added here. The contents of the receive ring buffer are | |
2431 | * copied to a message chain that is then passed to the kernel. | |
2432 | * | |
2433 | * Note: if any errors occur, the packet is "dropped on the floor". | |
2434 | * (called by wv_packet_rcv()) | |
2435 | */ | |
858119e1 | 2436 | static void |
1da177e4 LT |
2437 | wv_packet_read(struct net_device * dev, u16 buf_off, int sksize) |
2438 | { | |
524ad0a7 | 2439 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2440 | unsigned long ioaddr = dev->base_addr; |
2441 | struct sk_buff *skb; | |
2442 | ||
2443 | #ifdef DEBUG_RX_TRACE | |
2444 | printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n", | |
2445 | dev->name, buf_off, sksize); | |
2446 | #endif | |
2447 | ||
2448 | /* Allocate buffer for the data */ | |
2449 | if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) { | |
2450 | #ifdef DEBUG_RX_ERROR | |
2451 | printk(KERN_INFO | |
2452 | "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n", | |
2453 | dev->name, sksize); | |
2454 | #endif | |
0687478a | 2455 | dev->stats.rx_dropped++; |
1da177e4 LT |
2456 | return; |
2457 | } | |
2458 | ||
1da177e4 LT |
2459 | /* Copy the packet to the buffer. */ |
2460 | obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize); | |
2461 | skb->protocol = eth_type_trans(skb, dev); | |
2462 | ||
2463 | #ifdef DEBUG_RX_INFO | |
98e399f8 ACM |
2464 | wv_packet_info(skb_mac_header(skb), sksize, dev->name, |
2465 | "wv_packet_read"); | |
1da177e4 LT |
2466 | #endif /* DEBUG_RX_INFO */ |
2467 | ||
2468 | /* Statistics-gathering and associated stuff. | |
2469 | * It seem a bit messy with all the define, but it's really | |
2470 | * simple... */ | |
2471 | if ( | |
2472 | #ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */ | |
2473 | (lp->spy_data.spy_number > 0) || | |
2474 | #endif /* IW_WIRELESS_SPY */ | |
2475 | #ifdef HISTOGRAM | |
2476 | (lp->his_number > 0) || | |
2477 | #endif /* HISTOGRAM */ | |
2478 | 0) { | |
2479 | u8 stats[3]; /* signal level, noise level, signal quality */ | |
2480 | ||
2481 | /* Read signal level, silence level and signal quality bytes */ | |
2482 | /* Note: in the PCMCIA hardware, these are part of the frame. | |
2483 | * It seems that for the ISA hardware, it's nowhere to be | |
2484 | * found in the frame, so I'm obliged to do this (it has a | |
2485 | * side effect on /proc/net/wireless). | |
2486 | * Any ideas? | |
2487 | */ | |
2488 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
2489 | mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3); | |
2490 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
2491 | ||
2492 | #ifdef DEBUG_RX_INFO | |
2493 | printk(KERN_DEBUG | |
2494 | "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n", | |
2495 | dev->name, stats[0] & 0x3F, stats[1] & 0x3F, | |
2496 | stats[2] & 0x0F); | |
2497 | #endif | |
2498 | ||
2499 | /* Spying stuff */ | |
2500 | #ifdef IW_WIRELESS_SPY | |
98e399f8 | 2501 | wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE, |
1da177e4 LT |
2502 | stats); |
2503 | #endif /* IW_WIRELESS_SPY */ | |
2504 | #ifdef HISTOGRAM | |
2505 | wl_his_gather(dev, stats); | |
2506 | #endif /* HISTOGRAM */ | |
2507 | } | |
2508 | ||
2509 | /* | |
2510 | * Hand the packet to the network module. | |
2511 | */ | |
2512 | netif_rx(skb); | |
2513 | ||
2514 | /* Keep statistics up to date */ | |
0687478a SH |
2515 | dev->stats.rx_packets++; |
2516 | dev->stats.rx_bytes += sksize; | |
1da177e4 LT |
2517 | |
2518 | #ifdef DEBUG_RX_TRACE | |
2519 | printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name); | |
2520 | #endif | |
2521 | } | |
2522 | ||
2523 | /*------------------------------------------------------------------*/ | |
2524 | /* | |
2525 | * Transfer as many packets as we can | |
2526 | * from the device RAM. | |
2527 | * (called in wavelan_interrupt()). | |
2528 | * Note : the spinlock is already grabbed for us. | |
2529 | */ | |
858119e1 | 2530 | static void wv_receive(struct net_device * dev) |
1da177e4 LT |
2531 | { |
2532 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2533 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2534 | fd_t fd; |
2535 | rbd_t rbd; | |
2536 | int nreaped = 0; | |
2537 | ||
2538 | #ifdef DEBUG_RX_TRACE | |
2539 | printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name); | |
2540 | #endif | |
2541 | ||
2542 | /* Loop on each received packet. */ | |
2543 | for (;;) { | |
2544 | obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd, | |
2545 | sizeof(fd)); | |
2546 | ||
2547 | /* Note about the status : | |
2548 | * It start up to be 0 (the value we set). Then, when the RU | |
2549 | * grab the buffer to prepare for reception, it sets the | |
2550 | * FD_STATUS_B flag. When the RU has finished receiving the | |
2551 | * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate | |
2552 | * completion and set the other flags to indicate the eventual | |
2553 | * errors. FD_STATUS_OK indicates that the reception was OK. | |
2554 | */ | |
2555 | ||
2556 | /* If the current frame is not complete, we have reached the end. */ | |
2557 | if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C) | |
2558 | break; /* This is how we exit the loop. */ | |
2559 | ||
2560 | nreaped++; | |
2561 | ||
2562 | /* Check whether frame was correctly received. */ | |
2563 | if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) { | |
2564 | /* Does the frame contain a pointer to the data? Let's check. */ | |
2565 | if (fd.fd_rbd_offset != I82586NULL) { | |
2566 | /* Read the receive buffer descriptor */ | |
2567 | obram_read(ioaddr, fd.fd_rbd_offset, | |
2568 | (unsigned char *) &rbd, | |
2569 | sizeof(rbd)); | |
2570 | ||
2571 | #ifdef DEBUG_RX_ERROR | |
2572 | if ((rbd.rbd_status & RBD_STATUS_EOF) != | |
2573 | RBD_STATUS_EOF) printk(KERN_INFO | |
2574 | "%s: wv_receive(): missing EOF flag.\n", | |
2575 | dev->name); | |
2576 | ||
2577 | if ((rbd.rbd_status & RBD_STATUS_F) != | |
2578 | RBD_STATUS_F) printk(KERN_INFO | |
2579 | "%s: wv_receive(): missing F flag.\n", | |
2580 | dev->name); | |
2581 | #endif /* DEBUG_RX_ERROR */ | |
2582 | ||
2583 | /* Read the packet and transmit to Linux */ | |
2584 | wv_packet_read(dev, rbd.rbd_bufl, | |
2585 | rbd. | |
2586 | rbd_status & | |
2587 | RBD_STATUS_ACNT); | |
2588 | } | |
2589 | #ifdef DEBUG_RX_ERROR | |
2590 | else /* if frame has no data */ | |
2591 | printk(KERN_INFO | |
2592 | "%s: wv_receive(): frame has no data.\n", | |
2593 | dev->name); | |
2594 | #endif | |
2595 | } else { /* If reception was no successful */ | |
2596 | ||
0687478a | 2597 | dev->stats.rx_errors++; |
1da177e4 LT |
2598 | |
2599 | #ifdef DEBUG_RX_INFO | |
2600 | printk(KERN_DEBUG | |
2601 | "%s: wv_receive(): frame not received successfully (%X).\n", | |
2602 | dev->name, fd.fd_status); | |
2603 | #endif | |
2604 | ||
2605 | #ifdef DEBUG_RX_ERROR | |
2606 | if ((fd.fd_status & FD_STATUS_S6) != 0) | |
2607 | printk(KERN_INFO | |
2608 | "%s: wv_receive(): no EOF flag.\n", | |
2609 | dev->name); | |
2610 | #endif | |
2611 | ||
2612 | if ((fd.fd_status & FD_STATUS_S7) != 0) { | |
0687478a | 2613 | dev->stats.rx_length_errors++; |
1da177e4 LT |
2614 | #ifdef DEBUG_RX_FAIL |
2615 | printk(KERN_DEBUG | |
2616 | "%s: wv_receive(): frame too short.\n", | |
2617 | dev->name); | |
2618 | #endif | |
2619 | } | |
2620 | ||
2621 | if ((fd.fd_status & FD_STATUS_S8) != 0) { | |
0687478a | 2622 | dev->stats.rx_over_errors++; |
1da177e4 LT |
2623 | #ifdef DEBUG_RX_FAIL |
2624 | printk(KERN_DEBUG | |
2625 | "%s: wv_receive(): rx DMA overrun.\n", | |
2626 | dev->name); | |
2627 | #endif | |
2628 | } | |
2629 | ||
2630 | if ((fd.fd_status & FD_STATUS_S9) != 0) { | |
0687478a | 2631 | dev->stats.rx_fifo_errors++; |
1da177e4 LT |
2632 | #ifdef DEBUG_RX_FAIL |
2633 | printk(KERN_DEBUG | |
2634 | "%s: wv_receive(): ran out of resources.\n", | |
2635 | dev->name); | |
2636 | #endif | |
2637 | } | |
2638 | ||
2639 | if ((fd.fd_status & FD_STATUS_S10) != 0) { | |
0687478a | 2640 | dev->stats.rx_frame_errors++; |
1da177e4 LT |
2641 | #ifdef DEBUG_RX_FAIL |
2642 | printk(KERN_DEBUG | |
2643 | "%s: wv_receive(): alignment error.\n", | |
2644 | dev->name); | |
2645 | #endif | |
2646 | } | |
2647 | ||
2648 | if ((fd.fd_status & FD_STATUS_S11) != 0) { | |
0687478a | 2649 | dev->stats.rx_crc_errors++; |
1da177e4 LT |
2650 | #ifdef DEBUG_RX_FAIL |
2651 | printk(KERN_DEBUG | |
2652 | "%s: wv_receive(): CRC error.\n", | |
2653 | dev->name); | |
2654 | #endif | |
2655 | } | |
2656 | } | |
2657 | ||
2658 | fd.fd_status = 0; | |
2659 | obram_write(ioaddr, fdoff(lp->rx_head, fd_status), | |
2660 | (unsigned char *) &fd.fd_status, | |
2661 | sizeof(fd.fd_status)); | |
2662 | ||
2663 | fd.fd_command = FD_COMMAND_EL; | |
2664 | obram_write(ioaddr, fdoff(lp->rx_head, fd_command), | |
2665 | (unsigned char *) &fd.fd_command, | |
2666 | sizeof(fd.fd_command)); | |
2667 | ||
2668 | fd.fd_command = 0; | |
2669 | obram_write(ioaddr, fdoff(lp->rx_last, fd_command), | |
2670 | (unsigned char *) &fd.fd_command, | |
2671 | sizeof(fd.fd_command)); | |
2672 | ||
2673 | lp->rx_last = lp->rx_head; | |
2674 | lp->rx_head = fd.fd_link_offset; | |
2675 | } /* for(;;) -> loop on all frames */ | |
2676 | ||
2677 | #ifdef DEBUG_RX_INFO | |
2678 | if (nreaped > 1) | |
2679 | printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n", | |
2680 | dev->name, nreaped); | |
2681 | #endif | |
2682 | #ifdef DEBUG_RX_TRACE | |
2683 | printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name); | |
2684 | #endif | |
2685 | } | |
2686 | ||
2687 | /*********************** PACKET TRANSMISSION ***********************/ | |
2688 | /* | |
2689 | * This part deals with sending packets through the WaveLAN. | |
2690 | * | |
2691 | */ | |
2692 | ||
2693 | /*------------------------------------------------------------------*/ | |
2694 | /* | |
2695 | * This routine fills in the appropriate registers and memory | |
2696 | * locations on the WaveLAN card and starts the card off on | |
2697 | * the transmit. | |
2698 | * | |
2699 | * The principle: | |
2700 | * Each block contains a transmit command, a NOP command, | |
2701 | * a transmit block descriptor and a buffer. | |
2702 | * The CU read the transmit block which point to the tbd, | |
2703 | * read the tbd and the content of the buffer. | |
2704 | * When it has finish with it, it goes to the next command | |
2705 | * which in our case is the NOP. The NOP points on itself, | |
2706 | * so the CU stop here. | |
2707 | * When we add the next block, we modify the previous nop | |
2708 | * to make it point on the new tx command. | |
2709 | * Simple, isn't it ? | |
2710 | * | |
2711 | * (called in wavelan_packet_xmit()) | |
2712 | */ | |
858119e1 | 2713 | static int wv_packet_write(struct net_device * dev, void *buf, short length) |
1da177e4 | 2714 | { |
524ad0a7 | 2715 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2716 | unsigned long ioaddr = dev->base_addr; |
2717 | unsigned short txblock; | |
2718 | unsigned short txpred; | |
2719 | unsigned short tx_addr; | |
2720 | unsigned short nop_addr; | |
2721 | unsigned short tbd_addr; | |
2722 | unsigned short buf_addr; | |
2723 | ac_tx_t tx; | |
2724 | ac_nop_t nop; | |
2725 | tbd_t tbd; | |
2726 | int clen = length; | |
2727 | unsigned long flags; | |
2728 | ||
2729 | #ifdef DEBUG_TX_TRACE | |
2730 | printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name, | |
2731 | length); | |
2732 | #endif | |
2733 | ||
2734 | spin_lock_irqsave(&lp->spinlock, flags); | |
2735 | ||
2736 | /* Check nothing bad has happened */ | |
2737 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) { | |
2738 | #ifdef DEBUG_TX_ERROR | |
2739 | printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n", | |
2740 | dev->name); | |
2741 | #endif | |
2742 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2743 | return 1; | |
2744 | } | |
2745 | ||
2746 | /* Calculate addresses of next block and previous block. */ | |
2747 | txblock = lp->tx_first_free; | |
2748 | txpred = txblock - TXBLOCKZ; | |
2749 | if (txpred < OFFSET_CU) | |
2750 | txpred += NTXBLOCKS * TXBLOCKZ; | |
2751 | lp->tx_first_free += TXBLOCKZ; | |
2752 | if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
2753 | lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ; | |
2754 | ||
2755 | lp->tx_n_in_use++; | |
2756 | ||
2757 | /* Calculate addresses of the different parts of the block. */ | |
2758 | tx_addr = txblock; | |
2759 | nop_addr = tx_addr + sizeof(tx); | |
2760 | tbd_addr = nop_addr + sizeof(nop); | |
2761 | buf_addr = tbd_addr + sizeof(tbd); | |
2762 | ||
2763 | /* | |
2764 | * Transmit command | |
2765 | */ | |
2766 | tx.tx_h.ac_status = 0; | |
2767 | obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), | |
2768 | (unsigned char *) &tx.tx_h.ac_status, | |
2769 | sizeof(tx.tx_h.ac_status)); | |
2770 | ||
2771 | /* | |
2772 | * NOP command | |
2773 | */ | |
2774 | nop.nop_h.ac_status = 0; | |
2775 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
2776 | (unsigned char *) &nop.nop_h.ac_status, | |
2777 | sizeof(nop.nop_h.ac_status)); | |
2778 | nop.nop_h.ac_link = nop_addr; | |
2779 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
2780 | (unsigned char *) &nop.nop_h.ac_link, | |
2781 | sizeof(nop.nop_h.ac_link)); | |
2782 | ||
2783 | /* | |
2784 | * Transmit buffer descriptor | |
2785 | */ | |
2786 | tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen); | |
2787 | tbd.tbd_next_bd_offset = I82586NULL; | |
2788 | tbd.tbd_bufl = buf_addr; | |
2789 | tbd.tbd_bufh = 0; | |
2790 | obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd)); | |
2791 | ||
2792 | /* | |
2793 | * Data | |
2794 | */ | |
2795 | obram_write(ioaddr, buf_addr, buf, length); | |
2796 | ||
2797 | /* | |
2798 | * Overwrite the predecessor NOP link | |
2799 | * so that it points to this txblock. | |
2800 | */ | |
2801 | nop_addr = txpred + sizeof(tx); | |
2802 | nop.nop_h.ac_status = 0; | |
2803 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
2804 | (unsigned char *) &nop.nop_h.ac_status, | |
2805 | sizeof(nop.nop_h.ac_status)); | |
2806 | nop.nop_h.ac_link = txblock; | |
2807 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
2808 | (unsigned char *) &nop.nop_h.ac_link, | |
2809 | sizeof(nop.nop_h.ac_link)); | |
2810 | ||
2811 | /* Make sure the watchdog will keep quiet for a while */ | |
2812 | dev->trans_start = jiffies; | |
2813 | ||
2814 | /* Keep stats up to date. */ | |
0687478a | 2815 | dev->stats.tx_bytes += length; |
1da177e4 LT |
2816 | |
2817 | if (lp->tx_first_in_use == I82586NULL) | |
2818 | lp->tx_first_in_use = txblock; | |
2819 | ||
2820 | if (lp->tx_n_in_use < NTXBLOCKS - 1) | |
2821 | netif_wake_queue(dev); | |
2822 | ||
2823 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2824 | ||
2825 | #ifdef DEBUG_TX_INFO | |
2826 | wv_packet_info((u8 *) buf, length, dev->name, | |
2827 | "wv_packet_write"); | |
2828 | #endif /* DEBUG_TX_INFO */ | |
2829 | ||
2830 | #ifdef DEBUG_TX_TRACE | |
2831 | printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name); | |
2832 | #endif | |
2833 | ||
2834 | return 0; | |
2835 | } | |
2836 | ||
2837 | /*------------------------------------------------------------------*/ | |
2838 | /* | |
2839 | * This routine is called when we want to send a packet (NET3 callback) | |
2840 | * In this routine, we check if the harware is ready to accept | |
2841 | * the packet. We also prevent reentrance. Then we call the function | |
2842 | * to send the packet. | |
2843 | */ | |
d0cf9c0d SH |
2844 | static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb, |
2845 | struct net_device * dev) | |
1da177e4 | 2846 | { |
524ad0a7 | 2847 | net_local *lp = netdev_priv(dev); |
1da177e4 | 2848 | unsigned long flags; |
aa95abef | 2849 | char data[ETH_ZLEN]; |
1da177e4 LT |
2850 | |
2851 | #ifdef DEBUG_TX_TRACE | |
2852 | printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name, | |
2853 | (unsigned) skb); | |
2854 | #endif | |
2855 | ||
2856 | /* | |
2857 | * Block a timer-based transmit from overlapping. | |
2858 | * In other words, prevent reentering this routine. | |
2859 | */ | |
2860 | netif_stop_queue(dev); | |
2861 | ||
2862 | /* If somebody has asked to reconfigure the controller, | |
2863 | * we can do it now. | |
2864 | */ | |
2865 | if (lp->reconfig_82586) { | |
2866 | spin_lock_irqsave(&lp->spinlock, flags); | |
2867 | wv_82586_config(dev); | |
2868 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2869 | /* Check that we can continue */ | |
2870 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) | |
5b548140 | 2871 | return NETDEV_TX_BUSY; |
1da177e4 | 2872 | } |
1da177e4 LT |
2873 | |
2874 | /* Do we need some padding? */ | |
2875 | /* Note : on wireless the propagation time is in the order of 1us, | |
2876 | * and we don't have the Ethernet specific requirement of beeing | |
2877 | * able to detect collisions, therefore in theory we don't really | |
2878 | * need to pad. Jean II */ | |
2879 | if (skb->len < ETH_ZLEN) { | |
aa95abef | 2880 | memset(data, 0, ETH_ZLEN); |
d626f62b | 2881 | skb_copy_from_linear_data(skb, data, skb->len); |
aa95abef AC |
2882 | /* Write packet on the card */ |
2883 | if(wv_packet_write(dev, data, ETH_ZLEN)) | |
5b548140 | 2884 | return NETDEV_TX_BUSY; /* We failed */ |
1da177e4 | 2885 | } |
aa95abef | 2886 | else if(wv_packet_write(dev, skb->data, skb->len)) |
5b548140 | 2887 | return NETDEV_TX_BUSY; /* We failed */ |
1da177e4 | 2888 | |
aa95abef | 2889 | |
1da177e4 LT |
2890 | dev_kfree_skb(skb); |
2891 | ||
2892 | #ifdef DEBUG_TX_TRACE | |
2893 | printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name); | |
2894 | #endif | |
ec634fe3 | 2895 | return NETDEV_TX_OK; |
1da177e4 LT |
2896 | } |
2897 | ||
2898 | /*********************** HARDWARE CONFIGURATION ***********************/ | |
2899 | /* | |
2900 | * This part does the real job of starting and configuring the hardware. | |
2901 | */ | |
2902 | ||
2903 | /*--------------------------------------------------------------------*/ | |
2904 | /* | |
2905 | * Routine to initialize the Modem Management Controller. | |
2906 | * (called by wv_hw_reset()) | |
2907 | */ | |
858119e1 | 2908 | static int wv_mmc_init(struct net_device * dev) |
1da177e4 LT |
2909 | { |
2910 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2911 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2912 | psa_t psa; |
2913 | mmw_t m; | |
2914 | int configured; | |
2915 | ||
2916 | #ifdef DEBUG_CONFIG_TRACE | |
2917 | printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name); | |
2918 | #endif | |
2919 | ||
2920 | /* Read the parameter storage area. */ | |
2921 | psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
2922 | ||
2923 | #ifdef USE_PSA_CONFIG | |
2924 | configured = psa.psa_conf_status & 1; | |
2925 | #else | |
2926 | configured = 0; | |
2927 | #endif | |
2928 | ||
2929 | /* Is the PSA is not configured */ | |
2930 | if (!configured) { | |
2931 | /* User will be able to configure NWID later (with iwconfig). */ | |
2932 | psa.psa_nwid[0] = 0; | |
2933 | psa.psa_nwid[1] = 0; | |
2934 | ||
2935 | /* no NWID checking since NWID is not set */ | |
2936 | psa.psa_nwid_select = 0; | |
2937 | ||
2938 | /* Disable encryption */ | |
2939 | psa.psa_encryption_select = 0; | |
2940 | ||
2941 | /* Set to standard values: | |
2942 | * 0x04 for AT, | |
2943 | * 0x01 for MCA, | |
2944 | * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document) | |
2945 | */ | |
2946 | if (psa.psa_comp_number & 1) | |
2947 | psa.psa_thr_pre_set = 0x01; | |
2948 | else | |
2949 | psa.psa_thr_pre_set = 0x04; | |
2950 | psa.psa_quality_thr = 0x03; | |
2951 | ||
2952 | /* It is configured */ | |
2953 | psa.psa_conf_status |= 1; | |
2954 | ||
2955 | #ifdef USE_PSA_CONFIG | |
2956 | /* Write the psa. */ | |
2957 | psa_write(ioaddr, lp->hacr, | |
2958 | (char *) psa.psa_nwid - (char *) &psa, | |
2959 | (unsigned char *) psa.psa_nwid, 4); | |
2960 | psa_write(ioaddr, lp->hacr, | |
2961 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
2962 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
2963 | psa_write(ioaddr, lp->hacr, | |
2964 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2965 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2966 | psa_write(ioaddr, lp->hacr, | |
2967 | (char *) &psa.psa_conf_status - (char *) &psa, | |
2968 | (unsigned char *) &psa.psa_conf_status, 1); | |
2969 | /* update the Wavelan checksum */ | |
2970 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2971 | #endif | |
2972 | } | |
2973 | ||
2974 | /* Zero the mmc structure. */ | |
2975 | memset(&m, 0x00, sizeof(m)); | |
2976 | ||
2977 | /* Copy PSA info to the mmc. */ | |
2978 | m.mmw_netw_id_l = psa.psa_nwid[1]; | |
2979 | m.mmw_netw_id_h = psa.psa_nwid[0]; | |
2980 | ||
2981 | if (psa.psa_nwid_select & 1) | |
2982 | m.mmw_loopt_sel = 0x00; | |
2983 | else | |
2984 | m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID; | |
2985 | ||
2986 | memcpy(&m.mmw_encr_key, &psa.psa_encryption_key, | |
2987 | sizeof(m.mmw_encr_key)); | |
2988 | ||
2989 | if (psa.psa_encryption_select) | |
2990 | m.mmw_encr_enable = | |
2991 | MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE; | |
2992 | else | |
2993 | m.mmw_encr_enable = 0; | |
2994 | ||
2995 | m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F; | |
2996 | m.mmw_quality_thr = psa.psa_quality_thr & 0x0F; | |
2997 | ||
2998 | /* | |
2999 | * Set default modem control parameters. | |
3000 | * See NCR document 407-0024326 Rev. A. | |
3001 | */ | |
3002 | m.mmw_jabber_enable = 0x01; | |
3003 | m.mmw_freeze = 0; | |
3004 | m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN; | |
3005 | m.mmw_ifs = 0x20; | |
3006 | m.mmw_mod_delay = 0x04; | |
3007 | m.mmw_jam_time = 0x38; | |
3008 | ||
3009 | m.mmw_des_io_invert = 0; | |
3010 | m.mmw_decay_prm = 0; | |
3011 | m.mmw_decay_updat_prm = 0; | |
3012 | ||
3013 | /* Write all info to MMC. */ | |
3014 | mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m)); | |
3015 | ||
3016 | /* The following code starts the modem of the 2.00 frequency | |
3017 | * selectable cards at power on. It's not strictly needed for the | |
3018 | * following boots. | |
3019 | * The original patch was by Joe Finney for the PCMCIA driver, but | |
3020 | * I've cleaned it up a bit and added documentation. | |
3021 | * Thanks to Loeke Brederveld from Lucent for the info. | |
3022 | */ | |
3023 | ||
3024 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable) | |
3025 | * Does it work for everybody, especially old cards? */ | |
3026 | /* Note: WFREQSEL verifies that it is able to read a sensible | |
3027 | * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID | |
3028 | * is 0xA (Xilinx version) or 0xB (Ariadne version). | |
3029 | * My test is more crude but does work. */ | |
3030 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
3031 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
3032 | /* We must download the frequency parameters to the | |
3033 | * synthesizers (from the EEPROM - area 1) | |
3034 | * Note: as the EEPROM is automatically decremented, we set the end | |
3035 | * if the area... */ | |
3036 | m.mmw_fee_addr = 0x0F; | |
3037 | m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD; | |
3038 | mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m, | |
3039 | (unsigned char *) &m.mmw_fee_ctrl, 2); | |
3040 | ||
3041 | /* Wait until the download is finished. */ | |
3042 | fee_wait(ioaddr, 100, 100); | |
3043 | ||
3044 | #ifdef DEBUG_CONFIG_INFO | |
3045 | /* The frequency was in the last word downloaded. */ | |
3046 | mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m, | |
3047 | (unsigned char *) &m.mmw_fee_data_l, 2); | |
3048 | ||
3049 | /* Print some info for the user. */ | |
3050 | printk(KERN_DEBUG | |
3051 | "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n", | |
3052 | dev->name, | |
3053 | ((m. | |
3054 | mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) * | |
3055 | 5 / 2 + 24000L); | |
3056 | #endif | |
3057 | ||
3058 | /* We must now download the power adjust value (gain) to | |
3059 | * the synthesizers (from the EEPROM - area 7 - DAC). */ | |
3060 | m.mmw_fee_addr = 0x61; | |
3061 | m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD; | |
3062 | mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m, | |
3063 | (unsigned char *) &m.mmw_fee_ctrl, 2); | |
3064 | ||
3065 | /* Wait until the download is finished. */ | |
3066 | } | |
3067 | /* if 2.00 card */ | |
3068 | #ifdef DEBUG_CONFIG_TRACE | |
3069 | printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name); | |
3070 | #endif | |
3071 | return 0; | |
3072 | } | |
3073 | ||
3074 | /*------------------------------------------------------------------*/ | |
3075 | /* | |
3076 | * Construct the fd and rbd structures. | |
3077 | * Start the receive unit. | |
3078 | * (called by wv_hw_reset()) | |
3079 | */ | |
858119e1 | 3080 | static int wv_ru_start(struct net_device * dev) |
1da177e4 | 3081 | { |
524ad0a7 | 3082 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3083 | unsigned long ioaddr = dev->base_addr; |
3084 | u16 scb_cs; | |
3085 | fd_t fd; | |
3086 | rbd_t rbd; | |
3087 | u16 rx; | |
3088 | u16 rx_next; | |
3089 | int i; | |
3090 | ||
3091 | #ifdef DEBUG_CONFIG_TRACE | |
3092 | printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name); | |
3093 | #endif | |
3094 | ||
3095 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
3096 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3097 | if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY) | |
3098 | return 0; | |
3099 | ||
3100 | lp->rx_head = OFFSET_RU; | |
3101 | ||
3102 | for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) { | |
3103 | rx_next = | |
3104 | (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ; | |
3105 | ||
3106 | fd.fd_status = 0; | |
3107 | fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0; | |
3108 | fd.fd_link_offset = rx_next; | |
3109 | fd.fd_rbd_offset = rx + sizeof(fd); | |
3110 | obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd)); | |
3111 | ||
3112 | rbd.rbd_status = 0; | |
3113 | rbd.rbd_next_rbd_offset = I82586NULL; | |
3114 | rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd); | |
3115 | rbd.rbd_bufh = 0; | |
3116 | rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ); | |
3117 | obram_write(ioaddr, rx + sizeof(fd), | |
3118 | (unsigned char *) &rbd, sizeof(rbd)); | |
3119 | ||
3120 | lp->rx_last = rx; | |
3121 | } | |
3122 | ||
3123 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), | |
3124 | (unsigned char *) &lp->rx_head, sizeof(lp->rx_head)); | |
3125 | ||
3126 | scb_cs = SCB_CMD_RUC_GO; | |
3127 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3128 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3129 | ||
3130 | set_chan_attn(ioaddr, lp->hacr); | |
3131 | ||
3132 | for (i = 1000; i > 0; i--) { | |
3133 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3134 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3135 | if (scb_cs == 0) | |
3136 | break; | |
3137 | ||
3138 | udelay(10); | |
3139 | } | |
3140 | ||
3141 | if (i <= 0) { | |
3142 | #ifdef DEBUG_CONFIG_ERROR | |
3143 | printk(KERN_INFO | |
3144 | "%s: wavelan_ru_start(): board not accepting command.\n", | |
3145 | dev->name); | |
3146 | #endif | |
3147 | return -1; | |
3148 | } | |
3149 | #ifdef DEBUG_CONFIG_TRACE | |
3150 | printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name); | |
3151 | #endif | |
3152 | return 0; | |
3153 | } | |
3154 | ||
3155 | /*------------------------------------------------------------------*/ | |
3156 | /* | |
3157 | * Initialise the transmit blocks. | |
3158 | * Start the command unit executing the NOP | |
3159 | * self-loop of the first transmit block. | |
3160 | * | |
3161 | * Here we create the list of send buffers used to transmit packets | |
3162 | * between the PC and the command unit. For each buffer, we create a | |
3163 | * buffer descriptor (pointing on the buffer), a transmit command | |
3164 | * (pointing to the buffer descriptor) and a NOP command. | |
3165 | * The transmit command is linked to the NOP, and the NOP to itself. | |
3166 | * When we will have finished executing the transmit command, we will | |
3167 | * then loop on the NOP. By releasing the NOP link to a new command, | |
3168 | * we may send another buffer. | |
3169 | * | |
3170 | * (called by wv_hw_reset()) | |
3171 | */ | |
858119e1 | 3172 | static int wv_cu_start(struct net_device * dev) |
1da177e4 | 3173 | { |
524ad0a7 | 3174 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3175 | unsigned long ioaddr = dev->base_addr; |
3176 | int i; | |
3177 | u16 txblock; | |
3178 | u16 first_nop; | |
3179 | u16 scb_cs; | |
3180 | ||
3181 | #ifdef DEBUG_CONFIG_TRACE | |
3182 | printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name); | |
3183 | #endif | |
3184 | ||
3185 | lp->tx_first_free = OFFSET_CU; | |
3186 | lp->tx_first_in_use = I82586NULL; | |
3187 | ||
3188 | for (i = 0, txblock = OFFSET_CU; | |
3189 | i < NTXBLOCKS; i++, txblock += TXBLOCKZ) { | |
3190 | ac_tx_t tx; | |
3191 | ac_nop_t nop; | |
3192 | tbd_t tbd; | |
3193 | unsigned short tx_addr; | |
3194 | unsigned short nop_addr; | |
3195 | unsigned short tbd_addr; | |
3196 | unsigned short buf_addr; | |
3197 | ||
3198 | tx_addr = txblock; | |
3199 | nop_addr = tx_addr + sizeof(tx); | |
3200 | tbd_addr = nop_addr + sizeof(nop); | |
3201 | buf_addr = tbd_addr + sizeof(tbd); | |
3202 | ||
3203 | tx.tx_h.ac_status = 0; | |
3204 | tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I; | |
3205 | tx.tx_h.ac_link = nop_addr; | |
3206 | tx.tx_tbd_offset = tbd_addr; | |
3207 | obram_write(ioaddr, tx_addr, (unsigned char *) &tx, | |
3208 | sizeof(tx)); | |
3209 | ||
3210 | nop.nop_h.ac_status = 0; | |
3211 | nop.nop_h.ac_command = acmd_nop; | |
3212 | nop.nop_h.ac_link = nop_addr; | |
3213 | obram_write(ioaddr, nop_addr, (unsigned char *) &nop, | |
3214 | sizeof(nop)); | |
3215 | ||
3216 | tbd.tbd_status = TBD_STATUS_EOF; | |
3217 | tbd.tbd_next_bd_offset = I82586NULL; | |
3218 | tbd.tbd_bufl = buf_addr; | |
3219 | tbd.tbd_bufh = 0; | |
3220 | obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, | |
3221 | sizeof(tbd)); | |
3222 | } | |
3223 | ||
3224 | first_nop = | |
3225 | OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t); | |
3226 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), | |
3227 | (unsigned char *) &first_nop, sizeof(first_nop)); | |
3228 | ||
3229 | scb_cs = SCB_CMD_CUC_GO; | |
3230 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3231 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3232 | ||
3233 | set_chan_attn(ioaddr, lp->hacr); | |
3234 | ||
3235 | for (i = 1000; i > 0; i--) { | |
3236 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3237 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3238 | if (scb_cs == 0) | |
3239 | break; | |
3240 | ||
3241 | udelay(10); | |
3242 | } | |
3243 | ||
3244 | if (i <= 0) { | |
3245 | #ifdef DEBUG_CONFIG_ERROR | |
3246 | printk(KERN_INFO | |
3247 | "%s: wavelan_cu_start(): board not accepting command.\n", | |
3248 | dev->name); | |
3249 | #endif | |
3250 | return -1; | |
3251 | } | |
3252 | ||
3253 | lp->tx_n_in_use = 0; | |
3254 | netif_start_queue(dev); | |
3255 | #ifdef DEBUG_CONFIG_TRACE | |
3256 | printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name); | |
3257 | #endif | |
3258 | return 0; | |
3259 | } | |
3260 | ||
3261 | /*------------------------------------------------------------------*/ | |
3262 | /* | |
3263 | * This routine does a standard configuration of the WaveLAN | |
3264 | * controller (i82586). | |
3265 | * | |
3266 | * It initialises the scp, iscp and scb structure | |
3267 | * The first two are just pointers to the next. | |
3268 | * The last one is used for basic configuration and for basic | |
3269 | * communication (interrupt status). | |
3270 | * | |
3271 | * (called by wv_hw_reset()) | |
3272 | */ | |
858119e1 | 3273 | static int wv_82586_start(struct net_device * dev) |
1da177e4 | 3274 | { |
524ad0a7 | 3275 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3276 | unsigned long ioaddr = dev->base_addr; |
3277 | scp_t scp; /* system configuration pointer */ | |
3278 | iscp_t iscp; /* intermediate scp */ | |
3279 | scb_t scb; /* system control block */ | |
3280 | ach_t cb; /* Action command header */ | |
3281 | u8 zeroes[512]; | |
3282 | int i; | |
3283 | ||
3284 | #ifdef DEBUG_CONFIG_TRACE | |
3285 | printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name); | |
3286 | #endif | |
3287 | ||
3288 | /* | |
3289 | * Clear the onboard RAM. | |
3290 | */ | |
3291 | memset(&zeroes[0], 0x00, sizeof(zeroes)); | |
3292 | for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes)) | |
3293 | obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes)); | |
3294 | ||
3295 | /* | |
3296 | * Construct the command unit structures: | |
3297 | * scp, iscp, scb, cb. | |
3298 | */ | |
3299 | memset(&scp, 0x00, sizeof(scp)); | |
3300 | scp.scp_sysbus = SCP_SY_16BBUS; | |
3301 | scp.scp_iscpl = OFFSET_ISCP; | |
3302 | obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp, | |
3303 | sizeof(scp)); | |
3304 | ||
3305 | memset(&iscp, 0x00, sizeof(iscp)); | |
3306 | iscp.iscp_busy = 1; | |
3307 | iscp.iscp_offset = OFFSET_SCB; | |
3308 | obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp, | |
3309 | sizeof(iscp)); | |
3310 | ||
3311 | /* Our first command is to reset the i82586. */ | |
3312 | memset(&scb, 0x00, sizeof(scb)); | |
3313 | scb.scb_command = SCB_CMD_RESET; | |
3314 | scb.scb_cbl_offset = OFFSET_CU; | |
3315 | scb.scb_rfa_offset = OFFSET_RU; | |
3316 | obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
3317 | sizeof(scb)); | |
3318 | ||
3319 | set_chan_attn(ioaddr, lp->hacr); | |
3320 | ||
3321 | /* Wait for command to finish. */ | |
3322 | for (i = 1000; i > 0; i--) { | |
3323 | obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp, | |
3324 | sizeof(iscp)); | |
3325 | ||
3326 | if (iscp.iscp_busy == (unsigned short) 0) | |
3327 | break; | |
3328 | ||
3329 | udelay(10); | |
3330 | } | |
3331 | ||
3332 | if (i <= 0) { | |
3333 | #ifdef DEBUG_CONFIG_ERROR | |
3334 | printk(KERN_INFO | |
3335 | "%s: wv_82586_start(): iscp_busy timeout.\n", | |
3336 | dev->name); | |
3337 | #endif | |
3338 | return -1; | |
3339 | } | |
3340 | ||
3341 | /* Check command completion. */ | |
3342 | for (i = 15; i > 0; i--) { | |
3343 | obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
3344 | sizeof(scb)); | |
3345 | ||
3346 | if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA)) | |
3347 | break; | |
3348 | ||
3349 | udelay(10); | |
3350 | } | |
3351 | ||
3352 | if (i <= 0) { | |
3353 | #ifdef DEBUG_CONFIG_ERROR | |
3354 | printk(KERN_INFO | |
3355 | "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n", | |
3356 | dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status); | |
3357 | #endif | |
3358 | return -1; | |
3359 | } | |
3360 | ||
3361 | wv_ack(dev); | |
3362 | ||
3363 | /* Set the action command header. */ | |
3364 | memset(&cb, 0x00, sizeof(cb)); | |
3365 | cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose); | |
3366 | cb.ac_link = OFFSET_CU; | |
3367 | obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb)); | |
3368 | ||
3369 | if (wv_synchronous_cmd(dev, "diag()") == -1) | |
3370 | return -1; | |
3371 | ||
3372 | obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb)); | |
3373 | if (cb.ac_status & AC_SFLD_FAIL) { | |
3374 | #ifdef DEBUG_CONFIG_ERROR | |
3375 | printk(KERN_INFO | |
3376 | "%s: wv_82586_start(): i82586 Self Test failed.\n", | |
3377 | dev->name); | |
3378 | #endif | |
3379 | return -1; | |
3380 | } | |
3381 | #ifdef DEBUG_I82586_SHOW | |
3382 | wv_scb_show(ioaddr); | |
3383 | #endif | |
3384 | ||
3385 | #ifdef DEBUG_CONFIG_TRACE | |
3386 | printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name); | |
3387 | #endif | |
3388 | return 0; | |
3389 | } | |
3390 | ||
3391 | /*------------------------------------------------------------------*/ | |
3392 | /* | |
3393 | * This routine does a standard configuration of the WaveLAN | |
3394 | * controller (i82586). | |
3395 | * | |
3396 | * This routine is a violent hack. We use the first free transmit block | |
3397 | * to make our configuration. In the buffer area, we create the three | |
3398 | * configuration commands (linked). We make the previous NOP point to | |
3399 | * the beginning of the buffer instead of the tx command. After, we go | |
3400 | * as usual to the NOP command. | |
3401 | * Note that only the last command (mc_set) will generate an interrupt. | |
3402 | * | |
3403 | * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit()) | |
3404 | */ | |
3405 | static void wv_82586_config(struct net_device * dev) | |
3406 | { | |
524ad0a7 | 3407 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3408 | unsigned long ioaddr = dev->base_addr; |
3409 | unsigned short txblock; | |
3410 | unsigned short txpred; | |
3411 | unsigned short tx_addr; | |
3412 | unsigned short nop_addr; | |
3413 | unsigned short tbd_addr; | |
3414 | unsigned short cfg_addr; | |
3415 | unsigned short ias_addr; | |
3416 | unsigned short mcs_addr; | |
3417 | ac_tx_t tx; | |
3418 | ac_nop_t nop; | |
3419 | ac_cfg_t cfg; /* Configure action */ | |
3420 | ac_ias_t ias; /* IA-setup action */ | |
3421 | ac_mcs_t mcs; /* Multicast setup */ | |
3422 | struct dev_mc_list *dmi; | |
3423 | ||
3424 | #ifdef DEBUG_CONFIG_TRACE | |
3425 | printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name); | |
3426 | #endif | |
3427 | ||
3428 | /* Check nothing bad has happened */ | |
3429 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) { | |
3430 | #ifdef DEBUG_CONFIG_ERROR | |
3431 | printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n", | |
3432 | dev->name); | |
3433 | #endif | |
3434 | return; | |
3435 | } | |
3436 | ||
3437 | /* Calculate addresses of next block and previous block. */ | |
3438 | txblock = lp->tx_first_free; | |
3439 | txpred = txblock - TXBLOCKZ; | |
3440 | if (txpred < OFFSET_CU) | |
3441 | txpred += NTXBLOCKS * TXBLOCKZ; | |
3442 | lp->tx_first_free += TXBLOCKZ; | |
3443 | if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
3444 | lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ; | |
3445 | ||
3446 | lp->tx_n_in_use++; | |
3447 | ||
3448 | /* Calculate addresses of the different parts of the block. */ | |
3449 | tx_addr = txblock; | |
3450 | nop_addr = tx_addr + sizeof(tx); | |
3451 | tbd_addr = nop_addr + sizeof(nop); | |
3452 | cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */ | |
3453 | ias_addr = cfg_addr + sizeof(cfg); | |
3454 | mcs_addr = ias_addr + sizeof(ias); | |
3455 | ||
3456 | /* | |
3457 | * Transmit command | |
3458 | */ | |
3459 | tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */ | |
3460 | obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), | |
3461 | (unsigned char *) &tx.tx_h.ac_status, | |
3462 | sizeof(tx.tx_h.ac_status)); | |
3463 | ||
3464 | /* | |
3465 | * NOP command | |
3466 | */ | |
3467 | nop.nop_h.ac_status = 0; | |
3468 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
3469 | (unsigned char *) &nop.nop_h.ac_status, | |
3470 | sizeof(nop.nop_h.ac_status)); | |
3471 | nop.nop_h.ac_link = nop_addr; | |
3472 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
3473 | (unsigned char *) &nop.nop_h.ac_link, | |
3474 | sizeof(nop.nop_h.ac_link)); | |
3475 | ||
3476 | /* Create a configure action. */ | |
3477 | memset(&cfg, 0x00, sizeof(cfg)); | |
3478 | ||
3479 | /* | |
3480 | * For Linux we invert AC_CFG_ALOC() so as to conform | |
3481 | * to the way that net packets reach us from above. | |
3482 | * (See also ac_tx_t.) | |
3483 | * | |
3484 | * Updated from Wavelan Manual WCIN085B | |
3485 | */ | |
3486 | cfg.cfg_byte_cnt = | |
3487 | AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t)); | |
3488 | cfg.cfg_fifolim = AC_CFG_FIFOLIM(4); | |
3489 | cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0); | |
3490 | cfg.cfg_byte9 = AC_CFG_ELPBCK(0) | | |
3491 | AC_CFG_ILPBCK(0) | | |
3492 | AC_CFG_PRELEN(AC_CFG_PLEN_2) | | |
3493 | AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE); | |
3494 | cfg.cfg_byte10 = AC_CFG_BOFMET(1) | | |
3495 | AC_CFG_ACR(6) | AC_CFG_LINPRIO(0); | |
3496 | cfg.cfg_ifs = 0x20; | |
3497 | cfg.cfg_slotl = 0x0C; | |
3498 | cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0); | |
3499 | cfg.cfg_byte14 = AC_CFG_FLGPAD(0) | | |
3500 | AC_CFG_BTSTF(0) | | |
3501 | AC_CFG_CRC16(0) | | |
3502 | AC_CFG_NCRC(0) | | |
3503 | AC_CFG_TNCRS(1) | | |
3504 | AC_CFG_MANCH(0) | | |
3505 | AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous); | |
3506 | cfg.cfg_byte15 = AC_CFG_ICDS(0) | | |
3507 | AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0); | |
3508 | /* | |
3509 | cfg.cfg_min_frm_len = AC_CFG_MNFRM(64); | |
3510 | */ | |
3511 | cfg.cfg_min_frm_len = AC_CFG_MNFRM(8); | |
3512 | ||
3513 | cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure); | |
3514 | cfg.cfg_h.ac_link = ias_addr; | |
3515 | obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg)); | |
3516 | ||
3517 | /* Set up the MAC address */ | |
3518 | memset(&ias, 0x00, sizeof(ias)); | |
3519 | ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup); | |
3520 | ias.ias_h.ac_link = mcs_addr; | |
3521 | memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0], | |
3522 | sizeof(ias.ias_addr)); | |
3523 | obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias)); | |
3524 | ||
3525 | /* Initialize adapter's Ethernet multicast addresses */ | |
3526 | memset(&mcs, 0x00, sizeof(mcs)); | |
3527 | mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup); | |
3528 | mcs.mcs_h.ac_link = nop_addr; | |
3529 | mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count; | |
3530 | obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs)); | |
3531 | ||
3532 | /* Any address to set? */ | |
3533 | if (lp->mc_count) { | |
3534 | for (dmi = dev->mc_list; dmi; dmi = dmi->next) | |
3535 | outsw(PIOP1(ioaddr), (u16 *) dmi->dmi_addr, | |
3536 | WAVELAN_ADDR_SIZE >> 1); | |
3537 | ||
3538 | #ifdef DEBUG_CONFIG_INFO | |
3539 | printk(KERN_DEBUG | |
3540 | "%s: wv_82586_config(): set %d multicast addresses:\n", | |
3541 | dev->name, lp->mc_count); | |
3542 | for (dmi = dev->mc_list; dmi; dmi = dmi->next) | |
e174961c | 3543 | printk(KERN_DEBUG " %pM\n", dmi->dmi_addr); |
1da177e4 LT |
3544 | #endif |
3545 | } | |
3546 | ||
3547 | /* | |
3548 | * Overwrite the predecessor NOP link | |
3549 | * so that it points to the configure action. | |
3550 | */ | |
3551 | nop_addr = txpred + sizeof(tx); | |
3552 | nop.nop_h.ac_status = 0; | |
3553 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
3554 | (unsigned char *) &nop.nop_h.ac_status, | |
3555 | sizeof(nop.nop_h.ac_status)); | |
3556 | nop.nop_h.ac_link = cfg_addr; | |
3557 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
3558 | (unsigned char *) &nop.nop_h.ac_link, | |
3559 | sizeof(nop.nop_h.ac_link)); | |
3560 | ||
3561 | /* Job done, clear the flag */ | |
3562 | lp->reconfig_82586 = 0; | |
3563 | ||
3564 | if (lp->tx_first_in_use == I82586NULL) | |
3565 | lp->tx_first_in_use = txblock; | |
3566 | ||
3567 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) | |
3568 | netif_stop_queue(dev); | |
3569 | ||
3570 | #ifdef DEBUG_CONFIG_TRACE | |
3571 | printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name); | |
3572 | #endif | |
3573 | } | |
3574 | ||
3575 | /*------------------------------------------------------------------*/ | |
3576 | /* | |
3577 | * This routine, called by wavelan_close(), gracefully stops the | |
3578 | * WaveLAN controller (i82586). | |
3579 | * (called by wavelan_close()) | |
3580 | */ | |
858119e1 | 3581 | static void wv_82586_stop(struct net_device * dev) |
1da177e4 | 3582 | { |
524ad0a7 | 3583 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3584 | unsigned long ioaddr = dev->base_addr; |
3585 | u16 scb_cmd; | |
3586 | ||
3587 | #ifdef DEBUG_CONFIG_TRACE | |
3588 | printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name); | |
3589 | #endif | |
3590 | ||
3591 | /* Suspend both command unit and receive unit. */ | |
3592 | scb_cmd = | |
3593 | (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & | |
3594 | SCB_CMD_RUC_SUS); | |
3595 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3596 | (unsigned char *) &scb_cmd, sizeof(scb_cmd)); | |
3597 | set_chan_attn(ioaddr, lp->hacr); | |
3598 | ||
3599 | /* No more interrupts */ | |
3600 | wv_ints_off(dev); | |
3601 | ||
3602 | #ifdef DEBUG_CONFIG_TRACE | |
3603 | printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name); | |
3604 | #endif | |
3605 | } | |
3606 | ||
3607 | /*------------------------------------------------------------------*/ | |
3608 | /* | |
3609 | * Totally reset the WaveLAN and restart it. | |
3610 | * Performs the following actions: | |
3611 | * 1. A power reset (reset DMA) | |
3612 | * 2. Initialize the radio modem (using wv_mmc_init) | |
3613 | * 3. Reset & Configure LAN controller (using wv_82586_start) | |
3614 | * 4. Start the LAN controller's command unit | |
3615 | * 5. Start the LAN controller's receive unit | |
3616 | * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open()) | |
3617 | */ | |
3618 | static int wv_hw_reset(struct net_device * dev) | |
3619 | { | |
524ad0a7 | 3620 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3621 | unsigned long ioaddr = dev->base_addr; |
3622 | ||
3623 | #ifdef DEBUG_CONFIG_TRACE | |
3624 | printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name, | |
3625 | (unsigned int) dev); | |
3626 | #endif | |
3627 | ||
3628 | /* Increase the number of resets done. */ | |
3629 | lp->nresets++; | |
3630 | ||
3631 | wv_hacr_reset(ioaddr); | |
3632 | lp->hacr = HACR_DEFAULT; | |
3633 | ||
3634 | if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0)) | |
3635 | return -1; | |
3636 | ||
3637 | /* Enable the card to send interrupts. */ | |
3638 | wv_ints_on(dev); | |
3639 | ||
3640 | /* Start card functions */ | |
3641 | if (wv_cu_start(dev) < 0) | |
3642 | return -1; | |
3643 | ||
3644 | /* Setup the controller and parameters */ | |
3645 | wv_82586_config(dev); | |
3646 | ||
3647 | /* Finish configuration with the receive unit */ | |
3648 | if (wv_ru_start(dev) < 0) | |
3649 | return -1; | |
3650 | ||
3651 | #ifdef DEBUG_CONFIG_TRACE | |
3652 | printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name); | |
3653 | #endif | |
3654 | return 0; | |
3655 | } | |
3656 | ||
3657 | /*------------------------------------------------------------------*/ | |
3658 | /* | |
3659 | * Check if there is a WaveLAN at the specific base address. | |
3660 | * As a side effect, this reads the MAC address. | |
3661 | * (called in wavelan_probe() and init_module()) | |
3662 | */ | |
3663 | static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac) | |
3664 | { | |
3665 | int i; /* Loop counter */ | |
3666 | ||
3667 | /* Check if the base address if available. */ | |
3668 | if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe")) | |
3669 | return -EBUSY; /* ioaddr already used */ | |
3670 | ||
3671 | /* Reset host interface */ | |
3672 | wv_hacr_reset(ioaddr); | |
3673 | ||
3674 | /* Read the MAC address from the parameter storage area. */ | |
3675 | psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr), | |
3676 | mac, 6); | |
3677 | ||
3678 | release_region(ioaddr, sizeof(ha_t)); | |
3679 | ||
3680 | /* | |
3681 | * Check the first three octets of the address for the manufacturer's code. | |
3682 | * Note: if this can't find your WaveLAN card, you've got a | |
3683 | * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on | |
3684 | * how to configure your card. | |
3685 | */ | |
c00acf46 | 3686 | for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++) |
1da177e4 LT |
3687 | if ((mac[0] == MAC_ADDRESSES[i][0]) && |
3688 | (mac[1] == MAC_ADDRESSES[i][1]) && | |
3689 | (mac[2] == MAC_ADDRESSES[i][2])) | |
3690 | return 0; | |
3691 | ||
3692 | #ifdef DEBUG_CONFIG_INFO | |
3693 | printk(KERN_WARNING | |
3694 | "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n", | |
3695 | ioaddr, mac[0], mac[1], mac[2]); | |
3696 | #endif | |
3697 | return -ENODEV; | |
3698 | } | |
3699 | ||
3700 | /************************ INTERRUPT HANDLING ************************/ | |
3701 | ||
3702 | /* | |
3703 | * This function is the interrupt handler for the WaveLAN card. This | |
3704 | * routine will be called whenever: | |
3705 | */ | |
7d12e780 | 3706 | static irqreturn_t wavelan_interrupt(int irq, void *dev_id) |
1da177e4 LT |
3707 | { |
3708 | struct net_device *dev; | |
3709 | unsigned long ioaddr; | |
3710 | net_local *lp; | |
3711 | u16 hasr; | |
3712 | u16 status; | |
3713 | u16 ack_cmd; | |
3714 | ||
3715 | dev = dev_id; | |
3716 | ||
3717 | #ifdef DEBUG_INTERRUPT_TRACE | |
3718 | printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name); | |
3719 | #endif | |
3720 | ||
524ad0a7 | 3721 | lp = netdev_priv(dev); |
1da177e4 LT |
3722 | ioaddr = dev->base_addr; |
3723 | ||
3724 | #ifdef DEBUG_INTERRUPT_INFO | |
3725 | /* Check state of our spinlock */ | |
3726 | if(spin_is_locked(&lp->spinlock)) | |
3727 | printk(KERN_DEBUG | |
3728 | "%s: wavelan_interrupt(): spinlock is already locked !!!\n", | |
3729 | dev->name); | |
3730 | #endif | |
3731 | ||
3732 | /* Prevent reentrancy. We need to do that because we may have | |
3733 | * multiple interrupt handler running concurrently. | |
3734 | * It is safe because interrupts are disabled before acquiring | |
3735 | * the spinlock. */ | |
3736 | spin_lock(&lp->spinlock); | |
3737 | ||
3738 | /* We always had spurious interrupts at startup, but lately I | |
3739 | * saw them comming *between* the request_irq() and the | |
3740 | * spin_lock_irqsave() in wavelan_open(), so the spinlock | |
3741 | * protection is no enough. | |
3742 | * So, we also check lp->hacr that will tell us is we enabled | |
3743 | * irqs or not (see wv_ints_on()). | |
3744 | * We can't use netif_running(dev) because we depend on the | |
3745 | * proper processing of the irq generated during the config. */ | |
3746 | ||
3747 | /* Which interrupt it is ? */ | |
3748 | hasr = hasr_read(ioaddr); | |
3749 | ||
3750 | #ifdef DEBUG_INTERRUPT_INFO | |
3751 | printk(KERN_INFO | |
3752 | "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n", | |
3753 | dev->name, hasr, lp->hacr); | |
3754 | #endif | |
3755 | ||
3756 | /* Check modem interrupt */ | |
3757 | if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) { | |
3758 | u8 dce_status; | |
3759 | ||
3760 | /* | |
3761 | * Interrupt from the modem management controller. | |
3762 | * This will clear it -- ignored for now. | |
3763 | */ | |
3764 | mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, | |
3765 | sizeof(dce_status)); | |
3766 | ||
3767 | #ifdef DEBUG_INTERRUPT_ERROR | |
3768 | printk(KERN_INFO | |
3769 | "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", | |
3770 | dev->name, dce_status); | |
3771 | #endif | |
3772 | } | |
3773 | ||
3774 | /* Check if not controller interrupt */ | |
3775 | if (((hasr & HASR_82586_INTR) == 0) || | |
3776 | ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) { | |
3777 | #ifdef DEBUG_INTERRUPT_ERROR | |
3778 | printk(KERN_INFO | |
3779 | "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n", | |
3780 | dev->name, hasr); | |
3781 | #endif | |
3782 | spin_unlock (&lp->spinlock); | |
3783 | return IRQ_NONE; | |
3784 | } | |
3785 | ||
3786 | /* Read interrupt data. */ | |
3787 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
3788 | (unsigned char *) &status, sizeof(status)); | |
3789 | ||
3790 | /* | |
3791 | * Acknowledge the interrupt(s). | |
3792 | */ | |
3793 | ack_cmd = status & SCB_ST_INT; | |
3794 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3795 | (unsigned char *) &ack_cmd, sizeof(ack_cmd)); | |
3796 | set_chan_attn(ioaddr, lp->hacr); | |
3797 | ||
3798 | #ifdef DEBUG_INTERRUPT_INFO | |
3799 | printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n", | |
3800 | dev->name, status); | |
3801 | #endif | |
3802 | ||
3803 | /* Command completed. */ | |
3804 | if ((status & SCB_ST_CX) == SCB_ST_CX) { | |
3805 | #ifdef DEBUG_INTERRUPT_INFO | |
3806 | printk(KERN_DEBUG | |
3807 | "%s: wavelan_interrupt(): command completed.\n", | |
3808 | dev->name); | |
3809 | #endif | |
3810 | wv_complete(dev, ioaddr, lp); | |
3811 | } | |
3812 | ||
3813 | /* Frame received. */ | |
3814 | if ((status & SCB_ST_FR) == SCB_ST_FR) { | |
3815 | #ifdef DEBUG_INTERRUPT_INFO | |
3816 | printk(KERN_DEBUG | |
3817 | "%s: wavelan_interrupt(): received packet.\n", | |
3818 | dev->name); | |
3819 | #endif | |
3820 | wv_receive(dev); | |
3821 | } | |
3822 | ||
3823 | /* Check the state of the command unit. */ | |
3824 | if (((status & SCB_ST_CNA) == SCB_ST_CNA) || | |
3825 | (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && | |
3826 | (netif_running(dev)))) { | |
3827 | #ifdef DEBUG_INTERRUPT_ERROR | |
3828 | printk(KERN_INFO | |
3829 | "%s: wavelan_interrupt(): CU inactive -- restarting\n", | |
3830 | dev->name); | |
3831 | #endif | |
3832 | wv_hw_reset(dev); | |
3833 | } | |
3834 | ||
3835 | /* Check the state of the command unit. */ | |
3836 | if (((status & SCB_ST_RNR) == SCB_ST_RNR) || | |
3837 | (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && | |
3838 | (netif_running(dev)))) { | |
3839 | #ifdef DEBUG_INTERRUPT_ERROR | |
3840 | printk(KERN_INFO | |
3841 | "%s: wavelan_interrupt(): RU not ready -- restarting\n", | |
3842 | dev->name); | |
3843 | #endif | |
3844 | wv_hw_reset(dev); | |
3845 | } | |
3846 | ||
3847 | /* Release spinlock */ | |
3848 | spin_unlock (&lp->spinlock); | |
3849 | ||
3850 | #ifdef DEBUG_INTERRUPT_TRACE | |
3851 | printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name); | |
3852 | #endif | |
3853 | return IRQ_HANDLED; | |
3854 | } | |
3855 | ||
3856 | /*------------------------------------------------------------------*/ | |
3857 | /* | |
3858 | * Watchdog: when we start a transmission, a timer is set for us in the | |
3859 | * kernel. If the transmission completes, this timer is disabled. If | |
3860 | * the timer expires, we are called and we try to unlock the hardware. | |
3861 | */ | |
3862 | static void wavelan_watchdog(struct net_device * dev) | |
3863 | { | |
524ad0a7 | 3864 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3865 | u_long ioaddr = dev->base_addr; |
3866 | unsigned long flags; | |
3867 | unsigned int nreaped; | |
3868 | ||
3869 | #ifdef DEBUG_INTERRUPT_TRACE | |
3870 | printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name); | |
3871 | #endif | |
3872 | ||
3873 | #ifdef DEBUG_INTERRUPT_ERROR | |
3874 | printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n", | |
3875 | dev->name); | |
3876 | #endif | |
3877 | ||
3878 | /* Check that we came here for something */ | |
3879 | if (lp->tx_n_in_use <= 0) { | |
3880 | return; | |
3881 | } | |
3882 | ||
3883 | spin_lock_irqsave(&lp->spinlock, flags); | |
3884 | ||
3885 | /* Try to see if some buffers are not free (in case we missed | |
3886 | * an interrupt */ | |
3887 | nreaped = wv_complete(dev, ioaddr, lp); | |
3888 | ||
3889 | #ifdef DEBUG_INTERRUPT_INFO | |
3890 | printk(KERN_DEBUG | |
3891 | "%s: wavelan_watchdog(): %d reaped, %d remain.\n", | |
3892 | dev->name, nreaped, lp->tx_n_in_use); | |
3893 | #endif | |
3894 | ||
3895 | #ifdef DEBUG_PSA_SHOW | |
3896 | { | |
3897 | psa_t psa; | |
3898 | psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa)); | |
3899 | wv_psa_show(&psa); | |
3900 | } | |
3901 | #endif | |
3902 | #ifdef DEBUG_MMC_SHOW | |
3903 | wv_mmc_show(dev); | |
3904 | #endif | |
3905 | #ifdef DEBUG_I82586_SHOW | |
3906 | wv_cu_show(dev); | |
3907 | #endif | |
3908 | ||
3909 | /* If no buffer has been freed */ | |
3910 | if (nreaped == 0) { | |
3911 | #ifdef DEBUG_INTERRUPT_ERROR | |
3912 | printk(KERN_INFO | |
3913 | "%s: wavelan_watchdog(): cleanup failed, trying reset\n", | |
3914 | dev->name); | |
3915 | #endif | |
3916 | wv_hw_reset(dev); | |
3917 | } | |
3918 | ||
3919 | /* At this point, we should have some free Tx buffer ;-) */ | |
3920 | if (lp->tx_n_in_use < NTXBLOCKS - 1) | |
3921 | netif_wake_queue(dev); | |
3922 | ||
3923 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
3924 | ||
3925 | #ifdef DEBUG_INTERRUPT_TRACE | |
3926 | printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name); | |
3927 | #endif | |
3928 | } | |
3929 | ||
3930 | /********************* CONFIGURATION CALLBACKS *********************/ | |
3931 | /* | |
3932 | * Here are the functions called by the Linux networking code (NET3) | |
3933 | * for initialization, configuration and deinstallations of the | |
3934 | * WaveLAN ISA hardware. | |
3935 | */ | |
3936 | ||
3937 | /*------------------------------------------------------------------*/ | |
3938 | /* | |
3939 | * Configure and start up the WaveLAN PCMCIA adaptor. | |
3940 | * Called by NET3 when it "opens" the device. | |
3941 | */ | |
3942 | static int wavelan_open(struct net_device * dev) | |
3943 | { | |
524ad0a7 | 3944 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3945 | unsigned long flags; |
3946 | ||
3947 | #ifdef DEBUG_CALLBACK_TRACE | |
3948 | printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name, | |
3949 | (unsigned int) dev); | |
3950 | #endif | |
3951 | ||
3952 | /* Check irq */ | |
3953 | if (dev->irq == 0) { | |
3954 | #ifdef DEBUG_CONFIG_ERROR | |
3955 | printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n", | |
3956 | dev->name); | |
3957 | #endif | |
3958 | return -ENXIO; | |
3959 | } | |
3960 | ||
3961 | if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0) | |
3962 | { | |
3963 | #ifdef DEBUG_CONFIG_ERROR | |
3964 | printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n", | |
3965 | dev->name); | |
3966 | #endif | |
3967 | return -EAGAIN; | |
3968 | } | |
3969 | ||
3970 | spin_lock_irqsave(&lp->spinlock, flags); | |
3971 | ||
3972 | if (wv_hw_reset(dev) != -1) { | |
3973 | netif_start_queue(dev); | |
3974 | } else { | |
3975 | free_irq(dev->irq, dev); | |
3976 | #ifdef DEBUG_CONFIG_ERROR | |
3977 | printk(KERN_INFO | |
3978 | "%s: wavelan_open(): impossible to start the card\n", | |
3979 | dev->name); | |
3980 | #endif | |
3981 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
3982 | return -EAGAIN; | |
3983 | } | |
3984 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
3985 | ||
3986 | #ifdef DEBUG_CALLBACK_TRACE | |
3987 | printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name); | |
3988 | #endif | |
3989 | return 0; | |
3990 | } | |
3991 | ||
3992 | /*------------------------------------------------------------------*/ | |
3993 | /* | |
3994 | * Shut down the WaveLAN ISA card. | |
3995 | * Called by NET3 when it "closes" the device. | |
3996 | */ | |
3997 | static int wavelan_close(struct net_device * dev) | |
3998 | { | |
524ad0a7 | 3999 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
4000 | unsigned long flags; |
4001 | ||
4002 | #ifdef DEBUG_CALLBACK_TRACE | |
4003 | printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name, | |
4004 | (unsigned int) dev); | |
4005 | #endif | |
4006 | ||
4007 | netif_stop_queue(dev); | |
4008 | ||
4009 | /* | |
4010 | * Flush the Tx and disable Rx. | |
4011 | */ | |
4012 | spin_lock_irqsave(&lp->spinlock, flags); | |
4013 | wv_82586_stop(dev); | |
4014 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
4015 | ||
4016 | free_irq(dev->irq, dev); | |
4017 | ||
4018 | #ifdef DEBUG_CALLBACK_TRACE | |
4019 | printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name); | |
4020 | #endif | |
4021 | return 0; | |
4022 | } | |
4023 | ||
0687478a SH |
4024 | static const struct net_device_ops wavelan_netdev_ops = { |
4025 | .ndo_open = wavelan_open, | |
4026 | .ndo_stop = wavelan_close, | |
4027 | .ndo_start_xmit = wavelan_packet_xmit, | |
4028 | .ndo_set_multicast_list = wavelan_set_multicast_list, | |
4029 | .ndo_tx_timeout = wavelan_watchdog, | |
4030 | .ndo_change_mtu = eth_change_mtu, | |
4031 | .ndo_validate_addr = eth_validate_addr, | |
4032 | #ifdef SET_MAC_ADDRESS | |
4033 | .ndo_set_mac_address = wavelan_set_mac_address | |
4034 | #else | |
4035 | .ndo_set_mac_address = eth_mac_addr, | |
4036 | #endif | |
4037 | }; | |
4038 | ||
4039 | ||
1da177e4 LT |
4040 | /*------------------------------------------------------------------*/ |
4041 | /* | |
4042 | * Probe an I/O address, and if the WaveLAN is there configure the | |
4043 | * device structure | |
4044 | * (called by wavelan_probe() and via init_module()). | |
4045 | */ | |
4046 | static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr) | |
4047 | { | |
4048 | u8 irq_mask; | |
4049 | int irq; | |
4050 | net_local *lp; | |
4051 | mac_addr mac; | |
4052 | int err; | |
4053 | ||
4054 | if (!request_region(ioaddr, sizeof(ha_t), "wavelan")) | |
4055 | return -EADDRINUSE; | |
4056 | ||
4057 | err = wv_check_ioaddr(ioaddr, mac); | |
4058 | if (err) | |
4059 | goto out; | |
4060 | ||
4061 | memcpy(dev->dev_addr, mac, 6); | |
4062 | ||
4063 | dev->base_addr = ioaddr; | |
4064 | ||
4065 | #ifdef DEBUG_CALLBACK_TRACE | |
4066 | printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n", | |
4067 | dev->name, (unsigned int) dev, ioaddr); | |
4068 | #endif | |
4069 | ||
4070 | /* Check IRQ argument on command line. */ | |
4071 | if (dev->irq != 0) { | |
4072 | irq_mask = wv_irq_to_psa(dev->irq); | |
4073 | ||
4074 | if (irq_mask == 0) { | |
4075 | #ifdef DEBUG_CONFIG_ERROR | |
4076 | printk(KERN_WARNING | |
4077 | "%s: wavelan_config(): invalid IRQ %d ignored.\n", | |
4078 | dev->name, dev->irq); | |
4079 | #endif | |
4080 | dev->irq = 0; | |
4081 | } else { | |
4082 | #ifdef DEBUG_CONFIG_INFO | |
4083 | printk(KERN_DEBUG | |
4084 | "%s: wavelan_config(): changing IRQ to %d\n", | |
4085 | dev->name, dev->irq); | |
4086 | #endif | |
4087 | psa_write(ioaddr, HACR_DEFAULT, | |
4088 | psaoff(0, psa_int_req_no), &irq_mask, 1); | |
4089 | /* update the Wavelan checksum */ | |
4090 | update_psa_checksum(dev, ioaddr, HACR_DEFAULT); | |
4091 | wv_hacr_reset(ioaddr); | |
4092 | } | |
4093 | } | |
4094 | ||
4095 | psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no), | |
4096 | &irq_mask, 1); | |
4097 | if ((irq = wv_psa_to_irq(irq_mask)) == -1) { | |
4098 | #ifdef DEBUG_CONFIG_ERROR | |
4099 | printk(KERN_INFO | |
4100 | "%s: wavelan_config(): could not wavelan_map_irq(%d).\n", | |
4101 | dev->name, irq_mask); | |
4102 | #endif | |
4103 | err = -EAGAIN; | |
4104 | goto out; | |
4105 | } | |
4106 | ||
4107 | dev->irq = irq; | |
4108 | ||
4109 | dev->mem_start = 0x0000; | |
4110 | dev->mem_end = 0x0000; | |
4111 | dev->if_port = 0; | |
4112 | ||
4113 | /* Initialize device structures */ | |
524ad0a7 WC |
4114 | memset(netdev_priv(dev), 0, sizeof(net_local)); |
4115 | lp = netdev_priv(dev); | |
1da177e4 LT |
4116 | |
4117 | /* Back link to the device structure. */ | |
4118 | lp->dev = dev; | |
4119 | /* Add the device at the beginning of the linked list. */ | |
4120 | lp->next = wavelan_list; | |
4121 | wavelan_list = lp; | |
4122 | ||
4123 | lp->hacr = HACR_DEFAULT; | |
4124 | ||
4125 | /* Multicast stuff */ | |
4126 | lp->promiscuous = 0; | |
4127 | lp->mc_count = 0; | |
4128 | ||
4129 | /* Init spinlock */ | |
4130 | spin_lock_init(&lp->spinlock); | |
4131 | ||
0687478a SH |
4132 | dev->netdev_ops = &wavelan_netdev_ops; |
4133 | dev->watchdog_timeo = WATCHDOG_JIFFIES; | |
1da177e4 LT |
4134 | dev->wireless_handlers = &wavelan_handler_def; |
4135 | lp->wireless_data.spy_data = &lp->spy_data; | |
4136 | dev->wireless_data = &lp->wireless_data; | |
1da177e4 LT |
4137 | |
4138 | dev->mtu = WAVELAN_MTU; | |
4139 | ||
4140 | /* Display nice information. */ | |
4141 | wv_init_info(dev); | |
4142 | ||
4143 | #ifdef DEBUG_CALLBACK_TRACE | |
4144 | printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name); | |
4145 | #endif | |
4146 | return 0; | |
4147 | out: | |
4148 | release_region(ioaddr, sizeof(ha_t)); | |
4149 | return err; | |
4150 | } | |
4151 | ||
4152 | /*------------------------------------------------------------------*/ | |
4153 | /* | |
4154 | * Check for a network adaptor of this type. Return '0' iff one | |
4155 | * exists. There seem to be different interpretations of | |
4156 | * the initial value of dev->base_addr. | |
4157 | * We follow the example in drivers/net/ne.c. | |
4158 | * (called in "Space.c") | |
4159 | */ | |
4160 | struct net_device * __init wavelan_probe(int unit) | |
4161 | { | |
4162 | struct net_device *dev; | |
4163 | short base_addr; | |
4164 | int def_irq; | |
4165 | int i; | |
4166 | int r = 0; | |
4167 | ||
60da481b HD |
4168 | /* compile-time check the sizes of structures */ |
4169 | BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE); | |
4170 | BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE); | |
4171 | BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE); | |
4172 | BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE); | |
1da177e4 LT |
4173 | |
4174 | dev = alloc_etherdev(sizeof(net_local)); | |
4175 | if (!dev) | |
4176 | return ERR_PTR(-ENOMEM); | |
4177 | ||
4178 | sprintf(dev->name, "eth%d", unit); | |
4179 | netdev_boot_setup_check(dev); | |
4180 | base_addr = dev->base_addr; | |
4181 | def_irq = dev->irq; | |
4182 | ||
4183 | #ifdef DEBUG_CALLBACK_TRACE | |
4184 | printk(KERN_DEBUG | |
4185 | "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n", | |
4186 | dev->name, dev, (unsigned int) dev->base_addr); | |
4187 | #endif | |
4188 | ||
4189 | /* Don't probe at all. */ | |
4190 | if (base_addr < 0) { | |
4191 | #ifdef DEBUG_CONFIG_ERROR | |
4192 | printk(KERN_WARNING | |
4193 | "%s: wavelan_probe(): invalid base address\n", | |
4194 | dev->name); | |
4195 | #endif | |
4196 | r = -ENXIO; | |
4197 | } else if (base_addr > 0x100) { /* Check a single specified location. */ | |
4198 | r = wavelan_config(dev, base_addr); | |
4199 | #ifdef DEBUG_CONFIG_INFO | |
4200 | if (r != 0) | |
4201 | printk(KERN_DEBUG | |
4202 | "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n", | |
4203 | dev->name, base_addr); | |
4204 | #endif | |
4205 | ||
4206 | #ifdef DEBUG_CALLBACK_TRACE | |
4207 | printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name); | |
4208 | #endif | |
4209 | } else { /* Scan all possible addresses of the WaveLAN hardware. */ | |
0a92dd0a | 4210 | for (i = 0; i < ARRAY_SIZE(iobase); i++) { |
1da177e4 LT |
4211 | dev->irq = def_irq; |
4212 | if (wavelan_config(dev, iobase[i]) == 0) { | |
4213 | #ifdef DEBUG_CALLBACK_TRACE | |
4214 | printk(KERN_DEBUG | |
4215 | "%s: <-wavelan_probe()\n", | |
4216 | dev->name); | |
4217 | #endif | |
4218 | break; | |
4219 | } | |
4220 | } | |
0a92dd0a | 4221 | if (i == ARRAY_SIZE(iobase)) |
1da177e4 LT |
4222 | r = -ENODEV; |
4223 | } | |
4224 | if (r) | |
4225 | goto out; | |
4226 | r = register_netdev(dev); | |
4227 | if (r) | |
4228 | goto out1; | |
4229 | return dev; | |
4230 | out1: | |
4231 | release_region(dev->base_addr, sizeof(ha_t)); | |
4232 | wavelan_list = wavelan_list->next; | |
4233 | out: | |
4234 | free_netdev(dev); | |
4235 | return ERR_PTR(r); | |
4236 | } | |
4237 | ||
4238 | /****************************** MODULE ******************************/ | |
4239 | /* | |
4240 | * Module entry point: insertion and removal | |
4241 | */ | |
4242 | ||
4243 | #ifdef MODULE | |
4244 | /*------------------------------------------------------------------*/ | |
4245 | /* | |
4246 | * Insertion of the module | |
4247 | * I'm now quite proud of the multi-device support. | |
4248 | */ | |
53072d68 | 4249 | int __init init_module(void) |
1da177e4 LT |
4250 | { |
4251 | int ret = -EIO; /* Return error if no cards found */ | |
4252 | int i; | |
4253 | ||
4254 | #ifdef DEBUG_MODULE_TRACE | |
4255 | printk(KERN_DEBUG "-> init_module()\n"); | |
4256 | #endif | |
4257 | ||
4258 | /* If probing is asked */ | |
4259 | if (io[0] == 0) { | |
4260 | #ifdef DEBUG_CONFIG_ERROR | |
4261 | printk(KERN_WARNING | |
4262 | "WaveLAN init_module(): doing device probing (bad !)\n"); | |
4263 | printk(KERN_WARNING | |
4264 | "Specify base addresses while loading module to correct the problem\n"); | |
4265 | #endif | |
4266 | ||
4267 | /* Copy the basic set of address to be probed. */ | |
0a92dd0a | 4268 | for (i = 0; i < ARRAY_SIZE(iobase); i++) |
1da177e4 LT |
4269 | io[i] = iobase[i]; |
4270 | } | |
4271 | ||
4272 | ||
4273 | /* Loop on all possible base addresses. */ | |
4d8faf69 | 4274 | for (i = 0; i < ARRAY_SIZE(io) && io[i] != 0; i++) { |
1da177e4 LT |
4275 | struct net_device *dev = alloc_etherdev(sizeof(net_local)); |
4276 | if (!dev) | |
4277 | break; | |
4278 | if (name[i]) | |
4279 | strcpy(dev->name, name[i]); /* Copy name */ | |
4280 | dev->base_addr = io[i]; | |
4281 | dev->irq = irq[i]; | |
4282 | ||
4283 | /* Check if there is something at this base address. */ | |
4284 | if (wavelan_config(dev, io[i]) == 0) { | |
4285 | if (register_netdev(dev) != 0) { | |
4286 | release_region(dev->base_addr, sizeof(ha_t)); | |
4287 | wavelan_list = wavelan_list->next; | |
4288 | } else { | |
4289 | ret = 0; | |
4290 | continue; | |
4291 | } | |
4292 | } | |
4293 | free_netdev(dev); | |
4294 | } | |
4295 | ||
4296 | #ifdef DEBUG_CONFIG_ERROR | |
4297 | if (!wavelan_list) | |
4298 | printk(KERN_WARNING | |
4299 | "WaveLAN init_module(): no device found\n"); | |
4300 | #endif | |
4301 | ||
4302 | #ifdef DEBUG_MODULE_TRACE | |
4303 | printk(KERN_DEBUG "<- init_module()\n"); | |
4304 | #endif | |
4305 | return ret; | |
4306 | } | |
4307 | ||
4308 | /*------------------------------------------------------------------*/ | |
4309 | /* | |
4310 | * Removal of the module | |
4311 | */ | |
4312 | void cleanup_module(void) | |
4313 | { | |
4314 | #ifdef DEBUG_MODULE_TRACE | |
4315 | printk(KERN_DEBUG "-> cleanup_module()\n"); | |
4316 | #endif | |
4317 | ||
4318 | /* Loop on all devices and release them. */ | |
4319 | while (wavelan_list) { | |
4320 | struct net_device *dev = wavelan_list->dev; | |
4321 | ||
4322 | #ifdef DEBUG_CONFIG_INFO | |
4323 | printk(KERN_DEBUG | |
4324 | "%s: cleanup_module(): removing device at 0x%x\n", | |
4325 | dev->name, (unsigned int) dev); | |
4326 | #endif | |
4327 | unregister_netdev(dev); | |
4328 | ||
4329 | release_region(dev->base_addr, sizeof(ha_t)); | |
4330 | wavelan_list = wavelan_list->next; | |
4331 | ||
4332 | free_netdev(dev); | |
4333 | } | |
4334 | ||
4335 | #ifdef DEBUG_MODULE_TRACE | |
4336 | printk(KERN_DEBUG "<- cleanup_module()\n"); | |
4337 | #endif | |
4338 | } | |
4339 | #endif /* MODULE */ | |
4340 | MODULE_LICENSE("GPL"); | |
4341 | ||
4342 | /* | |
4343 | * This software may only be used and distributed | |
4344 | * according to the terms of the GNU General Public License. | |
4345 | * | |
4346 | * This software was developed as a component of the | |
4347 | * Linux operating system. | |
4348 | * It is based on other device drivers and information | |
4349 | * either written or supplied by: | |
4350 | * Ajay Bakre (bakre@paul.rutgers.edu), | |
4351 | * Donald Becker (becker@scyld.com), | |
4352 | * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com), | |
4353 | * Anders Klemets (klemets@it.kth.se), | |
4354 | * Vladimir V. Kolpakov (w@stier.koenig.ru), | |
4355 | * Marc Meertens (Marc.Meertens@Utrecht.NCR.com), | |
4356 | * Pauline Middelink (middelin@polyware.iaf.nl), | |
4357 | * Robert Morris (rtm@das.harvard.edu), | |
4358 | * Jean Tourrilhes (jt@hplb.hpl.hp.com), | |
4359 | * Girish Welling (welling@paul.rutgers.edu), | |
4360 | * | |
4361 | * Thanks go also to: | |
4362 | * James Ashton (jaa101@syseng.anu.edu.au), | |
113aa838 | 4363 | * Alan Cox (alan@lxorguk.ukuu.org.uk), |
1da177e4 LT |
4364 | * Allan Creighton (allanc@cs.usyd.edu.au), |
4365 | * Matthew Geier (matthew@cs.usyd.edu.au), | |
4366 | * Remo di Giovanni (remo@cs.usyd.edu.au), | |
4367 | * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de), | |
4368 | * Vipul Gupta (vgupta@cs.binghamton.edu), | |
4369 | * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM), | |
4370 | * Tim Nicholson (tim@cs.usyd.edu.au), | |
4371 | * Ian Parkin (ian@cs.usyd.edu.au), | |
4372 | * John Rosenberg (johnr@cs.usyd.edu.au), | |
4373 | * George Rossi (george@phm.gov.au), | |
4374 | * Arthur Scott (arthur@cs.usyd.edu.au), | |
4375 | * Peter Storey, | |
4376 | * for their assistance and advice. | |
4377 | * | |
4378 | * Please send bug reports, updates, comments to: | |
4379 | * | |
4380 | * Bruce Janson Email: bruce@cs.usyd.edu.au | |
4381 | * Basser Department of Computer Science Phone: +61-2-9351-3423 | |
4382 | * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838 | |
4383 | */ |