[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / ti / wlcore / tx.h

/*
 * This file is part of wl1271
 *
 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
 * Copyright (C) 2009 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef __TX_H__
#define __TX_H__

#define TX_HW_MGMT_PKT_LIFETIME_TU       2000
#define TX_HW_AP_MODE_PKT_LIFETIME_TU    8000

#define TX_HW_ATTR_SAVE_RETRIES          BIT(0)
#define TX_HW_ATTR_HEADER_PAD            BIT(1)
#define TX_HW_ATTR_SESSION_COUNTER       (BIT(2) | BIT(3) | BIT(4))
#define TX_HW_ATTR_RATE_POLICY           (BIT(5) | BIT(6) | BIT(7) | \
					  BIT(8) | BIT(9))
#define TX_HW_ATTR_LAST_WORD_PAD         (BIT(10) | BIT(11))
#define TX_HW_ATTR_TX_CMPLT_REQ          BIT(12)
#define TX_HW_ATTR_TX_DUMMY_REQ          BIT(13)
#define TX_HW_ATTR_HOST_ENCRYPT          BIT(14)

#define TX_HW_ATTR_OFST_SAVE_RETRIES     0
#define TX_HW_ATTR_OFST_HEADER_PAD       1
#define TX_HW_ATTR_OFST_SESSION_COUNTER  2
#define TX_HW_ATTR_OFST_RATE_POLICY      5
#define TX_HW_ATTR_OFST_LAST_WORD_PAD    10
#define TX_HW_ATTR_OFST_TX_CMPLT_REQ     12

#define TX_HW_RESULT_QUEUE_LEN           16
#define TX_HW_RESULT_QUEUE_LEN_MASK      0xf

#define WL1271_TX_ALIGN_TO 4
#define WL1271_EXTRA_SPACE_TKIP 4
#define WL1271_EXTRA_SPACE_AES  8
#define WL1271_EXTRA_SPACE_MAX  8

/* Used for management frames and dummy packets */
#define WL1271_TID_MGMT 7

struct wl127x_tx_mem {
	/*
	 * Number of extra memory blocks to allocate for this packet
	 * in addition to the number of blocks derived from the packet
	 * length.
	 */
	u8 extra_blocks;
	/*
	 * Total number of memory blocks allocated by the host for
	 * this packet. Must be equal or greater than the actual
	 * blocks number allocated by HW.
	 */
	u8 total_mem_blocks;
} __packed;

struct wl128x_tx_mem {
	/*
	 * Total number of memory blocks allocated by the host for
	 * this packet.
	 */
	u8 total_mem_blocks;
	/*
	 * Number of extra bytes, at the end of the frame. the host
	 * uses this padding to complete each frame to integer number
	 * of SDIO blocks.
	 */
	u8 extra_bytes;
} __packed;

struct wl18xx_tx_mem {
	/*
	 * Total number of memory blocks allocated by the host for
	 * this packet.
	 */
	u8 total_mem_blocks;

	/*
	 * control bits
	 */
	u8 ctrl;
} __packed;

/*
 * On wl128x based devices, when TX packets are aggregated, each packet
 * size must be aligned to the SDIO block size. The maximum block size
 * is bounded by the type of the padded bytes field that is sent to the
 * FW. Currently the type is u8, so the maximum block size is 256 bytes.
 */
#define WL12XX_BUS_BLOCK_SIZE min(512u,	\
	    (1u << (8 * sizeof(((struct wl128x_tx_mem *) 0)->extra_bytes))))

struct wl1271_tx_hw_descr {
	/* Length of packet in words, including descriptor+header+data */
	__le16 length;
	union {
		struct wl127x_tx_mem wl127x_mem;
		struct wl128x_tx_mem wl128x_mem;
		struct wl18xx_tx_mem wl18xx_mem;
	} __packed;
	/* Device time (in us) when the packet arrived to the driver */
	__le32 start_time;
	/*
	 * Max delay in TUs until transmission. The last device time the
	 * packet can be transmitted is: start_time + (1024 * life_time)
	 */
	__le16 life_time;
	/* Bitwise fields - see TX_ATTR... definitions above. */
	__le16 tx_attr;
	/* Packet identifier used also in the Tx-Result. */
	u8 id;
	/* The packet TID value (as User-Priority) */
	u8 tid;
	/* host link ID (HLID) */
	u8 hlid;

	union {
		u8 wl12xx_reserved;

		/*
		 * bit 0   -> 0 = udp, 1 = tcp
		 * bit 1:7 -> IP header offset
		 */
		u8 wl18xx_checksum_data;
	} __packed;
} __packed;

enum wl1271_tx_hw_res_status {
	TX_SUCCESS          = 0,
	TX_HW_ERROR         = 1,
	TX_DISABLED         = 2,
	TX_RETRY_EXCEEDED   = 3,
	TX_TIMEOUT          = 4,
	TX_KEY_NOT_FOUND    = 5,
	TX_PEER_NOT_FOUND   = 6,
	TX_SESSION_MISMATCH = 7,
	TX_LINK_NOT_VALID   = 8,
};

struct wl1271_tx_hw_res_descr {
	/* Packet Identifier - same value used in the Tx descriptor.*/
	u8 id;
	/* The status of the transmission, indicating success or one of
	   several possible reasons for failure. */
	u8 status;
	/* Total air access duration including all retrys and overheads.*/
	__le16 medium_usage;
	/* The time passed from host xfer to Tx-complete.*/
	__le32 fw_handling_time;
	/* Total media delay
	   (from 1st EDCA AIFS counter until TX Complete). */
	__le32 medium_delay;
	/* LS-byte of last TKIP seq-num (saved per AC for recovery). */
	u8 tx_security_sequence_number_lsb;
	/* Retry count - number of transmissions without successful ACK.*/
	u8 ack_failures;
	/* The rate that succeeded getting ACK
	   (Valid only if status=SUCCESS). */
	u8 rate_class_index;
	/* for 4-byte alignment. */
	u8 spare;
} __packed;

struct wl1271_tx_hw_res_if {
	__le32 tx_result_fw_counter;
	__le32 tx_result_host_counter;
	struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN];
} __packed;

enum wlcore_queue_stop_reason {
	WLCORE_QUEUE_STOP_REASON_WATERMARK,
	WLCORE_QUEUE_STOP_REASON_FW_RESTART,
	WLCORE_QUEUE_STOP_REASON_FLUSH,
	WLCORE_QUEUE_STOP_REASON_SPARE_BLK, /* 18xx specific */
};

static inline int wl1271_tx_get_queue(int queue)
{
	switch (queue) {
	case 0:
		return CONF_TX_AC_VO;
	case 1:
		return CONF_TX_AC_VI;
	case 2:
		return CONF_TX_AC_BE;
	case 3:
		return CONF_TX_AC_BK;
	default:
		return CONF_TX_AC_BE;
	}
}

static inline int wl1271_tx_get_mac80211_queue(int queue)
{
	switch (queue) {
	case CONF_TX_AC_VO:
		return 0;
	case CONF_TX_AC_VI:
		return 1;
	case CONF_TX_AC_BE:
		return 2;
	case CONF_TX_AC_BK:
		return 3;
	default:
		return 2;
	}
}

static inline int wl1271_tx_total_queue_count(struct wl1271 *wl)
{
	int i, count = 0;

	for (i = 0; i < NUM_TX_QUEUES; i++)
		count += wl->tx_queue_count[i];

	return count;
}

void wl1271_tx_work(struct work_struct *work);
void wl1271_tx_work_locked(struct wl1271 *wl);
int wlcore_tx_complete(struct wl1271 *wl);
void wl12xx_tx_reset_wlvif(struct wl1271 *wl, struct wl12xx_vif *wlvif);
void wl12xx_tx_reset(struct wl1271 *wl);
void wl1271_tx_flush(struct wl1271 *wl);
u8 wlcore_rate_to_idx(struct wl1271 *wl, u8 rate, enum ieee80211_band band);
u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set,
				enum ieee80211_band rate_band);
u32 wl1271_tx_min_rate_get(struct wl1271 *wl, u32 rate_set);
u8 wl12xx_tx_get_hlid_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif,
			 struct sk_buff *skb);
u8 wl12xx_tx_get_hlid(struct wl1271 *wl, struct wl12xx_vif *wlvif,
		      struct sk_buff *skb);
void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid);
void wl1271_handle_tx_low_watermark(struct wl1271 *wl);
bool wl12xx_is_dummy_packet(struct wl1271 *wl, struct sk_buff *skb);
void wl12xx_rearm_rx_streaming(struct wl1271 *wl, unsigned long *active_hlids);
unsigned int wlcore_calc_packet_alignment(struct wl1271 *wl,
					  unsigned int packet_length);
void wl1271_free_tx_id(struct wl1271 *wl, int id);
void wlcore_stop_queue_locked(struct wl1271 *wl, u8 queue,
			      enum wlcore_queue_stop_reason reason);
void wlcore_stop_queue(struct wl1271 *wl, u8 queue,
		       enum wlcore_queue_stop_reason reason);
void wlcore_wake_queue(struct wl1271 *wl, u8 queue,
		       enum wlcore_queue_stop_reason reason);
void wlcore_stop_queues(struct wl1271 *wl,
			enum wlcore_queue_stop_reason reason);
void wlcore_wake_queues(struct wl1271 *wl,
			enum wlcore_queue_stop_reason reason);
void wlcore_reset_stopped_queues(struct wl1271 *wl);
bool wlcore_is_queue_stopped_by_reason(struct wl1271 *wl, u8 queue,
				       enum wlcore_queue_stop_reason reason);
bool wlcore_is_queue_stopped(struct wl1271 *wl, u8 queue);

/* from main.c */
void wl1271_free_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 hlid);
void wl12xx_rearm_tx_watchdog_locked(struct wl1271 *wl);

#endif
Commit	Line	Data
f5fc0f86 LC	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
	5	* Copyright (C) 2009 Nokia Corporation
	6	*
	7	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
00d20100 SL	25	#ifndef __TX_H__
00d20100 SL	26	#define __TX_H__
f5fc0f86	27
f5fc0f86	28	#define TX_HW_MGMT_PKT_LIFETIME_TU 2000
beb6c880	29	#define TX_HW_AP_MODE_PKT_LIFETIME_TU 8000
f5fc0f86 LC	30
	31	#define TX_HW_ATTR_SAVE_RETRIES BIT(0)
	32	#define TX_HW_ATTR_HEADER_PAD BIT(1)
	33	#define TX_HW_ATTR_SESSION_COUNTER (BIT(2) \| BIT(3) \| BIT(4))
	34	#define TX_HW_ATTR_RATE_POLICY (BIT(5) \| BIT(6) \| BIT(7) \| \
	35	BIT(8) \| BIT(9))
	36	#define TX_HW_ATTR_LAST_WORD_PAD (BIT(10) \| BIT(11))
	37	#define TX_HW_ATTR_TX_CMPLT_REQ BIT(12)
ae47c45f	38	#define TX_HW_ATTR_TX_DUMMY_REQ BIT(13)
f4f57943	39	#define TX_HW_ATTR_HOST_ENCRYPT BIT(14)
ae47c45f	40
f5fc0f86 LC	41	#define TX_HW_ATTR_OFST_SAVE_RETRIES 0
	42	#define TX_HW_ATTR_OFST_HEADER_PAD 1
	43	#define TX_HW_ATTR_OFST_SESSION_COUNTER 2
	44	#define TX_HW_ATTR_OFST_RATE_POLICY 5
	45	#define TX_HW_ATTR_OFST_LAST_WORD_PAD 10
	46	#define TX_HW_ATTR_OFST_TX_CMPLT_REQ 12
	47
	48	#define TX_HW_RESULT_QUEUE_LEN 16
	49	#define TX_HW_RESULT_QUEUE_LEN_MASK 0xf
	50
	51	#define WL1271_TX_ALIGN_TO 4
5ec8a448 EP	52	#define WL1271_EXTRA_SPACE_TKIP 4
	53	#define WL1271_EXTRA_SPACE_AES 8
	54	#define WL1271_EXTRA_SPACE_MAX 8
f5fc0f86	55
ae47c45f SL	56	/* Used for management frames and dummy packets */
	57	#define WL1271_TID_MGMT 7
	58
48a61477 SL	59	struct wl127x_tx_mem {
	60	/*
	61	* Number of extra memory blocks to allocate for this packet
	62	* in addition to the number of blocks derived from the packet
	63	* length.
	64	*/
	65	u8 extra_blocks;
	66	/*
	67	* Total number of memory blocks allocated by the host for
	68	* this packet. Must be equal or greater than the actual
	69	* blocks number allocated by HW.
	70	*/
	71	u8 total_mem_blocks;
	72	} __packed;
	73
	74	struct wl128x_tx_mem {
	75	/*
	76	* Total number of memory blocks allocated by the host for
	77	* this packet.
	78	*/
	79	u8 total_mem_blocks;
	80	/*
	81	* Number of extra bytes, at the end of the frame. the host
	82	* uses this padding to complete each frame to integer number
	83	* of SDIO blocks.
	84	*/
	85	u8 extra_bytes;
	86	} __packed;
	87
fb0f2e4a AN	88	struct wl18xx_tx_mem {
	89	/*
	90	* Total number of memory blocks allocated by the host for
	91	* this packet.
	92	*/
	93	u8 total_mem_blocks;
	94
	95	/*
9fccc82e	96	* control bits
fb0f2e4a	97	*/
9fccc82e	98	u8 ctrl;
fb0f2e4a AN	99	} __packed;
fb0f2e4a AN	100
0da13da7 IY	101	/*
	102	* On wl128x based devices, when TX packets are aggregated, each packet
	103	* size must be aligned to the SDIO block size. The maximum block size
	104	* is bounded by the type of the padded bytes field that is sent to the
	105	* FW. Currently the type is u8, so the maximum block size is 256 bytes.
	106	*/
	107	#define WL12XX_BUS_BLOCK_SIZE min(512u, \
	108	(1u << (8 * sizeof(((struct wl128x_tx_mem *) 0)->extra_bytes))))
	109
f5fc0f86 LC	110	struct wl1271_tx_hw_descr {
f5fc0f86 LC	111	/* Length of packet in words, including descriptor+header+data */
d0f63b20	112	__le16 length;
48a61477 SL	113	union {
	114	struct wl127x_tx_mem wl127x_mem;
	115	struct wl128x_tx_mem wl128x_mem;
fb0f2e4a	116	struct wl18xx_tx_mem wl18xx_mem;
48a61477	117	} __packed;
f5fc0f86	118	/* Device time (in us) when the packet arrived to the driver */
d0f63b20	119	__le32 start_time;
48a61477 SL	120	/*
	121	* Max delay in TUs until transmission. The last device time the
	122	* packet can be transmitted is: start_time + (1024 * life_time)
	123	*/
d0f63b20	124	__le16 life_time;
f5fc0f86	125	/* Bitwise fields - see TX_ATTR... definitions above. */
d0f63b20	126	__le16 tx_attr;
f5fc0f86 LC	127	/* Packet identifier used also in the Tx-Result. */
	128	u8 id;
	129	/* The packet TID value (as User-Priority) */
	130	u8 tid;
79b122dc EP	131	/* host link ID (HLID) */
79b122dc EP	132	u8 hlid;
2fc28de5 AN	133
	134	union {
	135	u8 wl12xx_reserved;
	136
	137	/*
	138	* bit 0 -> 0 = udp, 1 = tcp
	139	* bit 1:7 -> IP header offset
	140	*/
	141	u8 wl18xx_checksum_data;
	142	} __packed;
ba2d3587	143	} __packed;
f5fc0f86 LC	144
	145	enum wl1271_tx_hw_res_status {
	146	TX_SUCCESS = 0,
	147	TX_HW_ERROR = 1,
	148	TX_DISABLED = 2,
	149	TX_RETRY_EXCEEDED = 3,
	150	TX_TIMEOUT = 4,
	151	TX_KEY_NOT_FOUND = 5,
	152	TX_PEER_NOT_FOUND = 6,
79b122dc EP	153	TX_SESSION_MISMATCH = 7,
79b122dc EP	154	TX_LINK_NOT_VALID = 8,
f5fc0f86 LC	155	};
	156
	157	struct wl1271_tx_hw_res_descr {
	158	/* Packet Identifier - same value used in the Tx descriptor.*/
	159	u8 id;
	160	/* The status of the transmission, indicating success or one of
	161	several possible reasons for failure. */
	162	u8 status;
	163	/* Total air access duration including all retrys and overheads.*/
d0f63b20	164	__le16 medium_usage;
f5fc0f86	165	/* The time passed from host xfer to Tx-complete.*/
d0f63b20	166	__le32 fw_handling_time;
f5fc0f86 LC	167	/* Total media delay
f5fc0f86 LC	168	(from 1st EDCA AIFS counter until TX Complete). */
d0f63b20	169	__le32 medium_delay;
f5fc0f86	170	/* LS-byte of last TKIP seq-num (saved per AC for recovery). */
b992c682	171	u8 tx_security_sequence_number_lsb;
f5fc0f86 LC	172	/* Retry count - number of transmissions without successful ACK.*/
	173	u8 ack_failures;
	174	/* The rate that succeeded getting ACK
	175	(Valid only if status=SUCCESS). */
	176	u8 rate_class_index;
	177	/* for 4-byte alignment. */
	178	u8 spare;
ba2d3587	179	} __packed;
f5fc0f86 LC	180
f5fc0f86 LC	181	struct wl1271_tx_hw_res_if {
d0f63b20 LC	182	__le32 tx_result_fw_counter;
d0f63b20 LC	183	__le32 tx_result_host_counter;
f5fc0f86	184	struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN];
ba2d3587	185	} __packed;
f5fc0f86	186
66396114 AN	187	enum wlcore_queue_stop_reason {
	188	WLCORE_QUEUE_STOP_REASON_WATERMARK,
	189	WLCORE_QUEUE_STOP_REASON_FW_RESTART,
2c38849f	190	WLCORE_QUEUE_STOP_REASON_FLUSH,
a1c597f2	191	WLCORE_QUEUE_STOP_REASON_SPARE_BLK, /* 18xx specific */
66396114 AN	192	};
66396114 AN	193
c6999d83 KV	194	static inline int wl1271_tx_get_queue(int queue)
c6999d83 KV	195	{
c6999d83 KV	196	switch (queue) {
	197	case 0:
	198	return CONF_TX_AC_VO;
	199	case 1:
	200	return CONF_TX_AC_VI;
	201	case 2:
	202	return CONF_TX_AC_BE;
	203	case 3:
	204	return CONF_TX_AC_BK;
	205	default:
	206	return CONF_TX_AC_BE;
	207	}
	208	}
	209
708bb3cf AN	210	static inline int wl1271_tx_get_mac80211_queue(int queue)
	211	{
	212	switch (queue) {
	213	case CONF_TX_AC_VO:
	214	return 0;
	215	case CONF_TX_AC_VI:
	216	return 1;
	217	case CONF_TX_AC_BE:
	218	return 2;
	219	case CONF_TX_AC_BK:
	220	return 3;
	221	default:
	222	return 2;
	223	}
	224	}
	225
f1a46384 AN	226	static inline int wl1271_tx_total_queue_count(struct wl1271 *wl)
	227	{
	228	int i, count = 0;
	229
	230	for (i = 0; i < NUM_TX_QUEUES; i++)
	231	count += wl->tx_queue_count[i];
	232
	233	return count;
	234	}
	235
f5fc0f86	236	void wl1271_tx_work(struct work_struct *work);
a32d0cdf	237	void wl1271_tx_work_locked(struct wl1271 *wl);
045b9b5f	238	int wlcore_tx_complete(struct wl1271 *wl);
d6a3cc2e	239	void wl12xx_tx_reset_wlvif(struct wl1271 wl, struct wl12xx_vif wlvif);
66396114	240	void wl12xx_tx_reset(struct wl1271 *wl);
f5fc0f86	241	void wl1271_tx_flush(struct wl1271 *wl);
43a8bc5a	242	u8 wlcore_rate_to_idx(struct wl1271 *wl, u8 rate, enum ieee80211_band band);
af7fbb28 EP	243	u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set,
	244	enum ieee80211_band rate_band);
	245	u32 wl1271_tx_min_rate_get(struct wl1271 *wl, u32 rate_set);
a8ab39a4 EP	246	u8 wl12xx_tx_get_hlid_ap(struct wl1271 wl, struct wl12xx_vif wlvif,
a8ab39a4 EP	247	struct sk_buff *skb);
d6a3cc2e EP	248	u8 wl12xx_tx_get_hlid(struct wl1271 wl, struct wl12xx_vif wlvif,
d6a3cc2e EP	249	struct sk_buff *skb);
a8c0ddb5 AN	250	void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid);
a8c0ddb5 AN	251	void wl1271_handle_tx_low_watermark(struct wl1271 *wl);
f8e0af6b	252	bool wl12xx_is_dummy_packet(struct wl1271 wl, struct sk_buff skb);
9eb599e9	253	void wl12xx_rearm_rx_streaming(struct wl1271 wl, unsigned long active_hlids);
b3b4b4b8 AN	254	unsigned int wlcore_calc_packet_alignment(struct wl1271 *wl,
b3b4b4b8 AN	255	unsigned int packet_length);
872b345f	256	void wl1271_free_tx_id(struct wl1271 *wl, int id);
66396114 AN	257	void wlcore_stop_queue_locked(struct wl1271 *wl, u8 queue,
	258	enum wlcore_queue_stop_reason reason);
	259	void wlcore_stop_queue(struct wl1271 *wl, u8 queue,
	260	enum wlcore_queue_stop_reason reason);
	261	void wlcore_wake_queue(struct wl1271 *wl, u8 queue,
	262	enum wlcore_queue_stop_reason reason);
	263	void wlcore_stop_queues(struct wl1271 *wl,
	264	enum wlcore_queue_stop_reason reason);
	265	void wlcore_wake_queues(struct wl1271 *wl,
	266	enum wlcore_queue_stop_reason reason);
	267	void wlcore_reset_stopped_queues(struct wl1271 *wl);
	268	bool wlcore_is_queue_stopped_by_reason(struct wl1271 *wl, u8 queue,
	269	enum wlcore_queue_stop_reason reason);
	270	bool wlcore_is_queue_stopped(struct wl1271 *wl, u8 queue);
f5fc0f86	271
f1acea9a	272	/* from main.c */
c7ffb902	273	void wl1271_free_sta(struct wl1271 wl, struct wl12xx_vif wlvif, u8 hlid);
55df5afb	274	void wl12xx_rearm_tx_watchdog_locked(struct wl1271 *wl);
f1acea9a	275
f5fc0f86	276	#endif