Commit | Line | Data |
---|---|---|
f5fc0f86 LC |
1 | /* |
2 | * This file is part of wl1271 | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation | |
5 | * | |
6 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA | |
21 | * | |
22 | */ | |
23 | ||
5a0e3ad6 | 24 | #include <linux/gfp.h> |
95dac04f | 25 | #include <linux/sched.h> |
5a0e3ad6 | 26 | |
c31be25a | 27 | #include "wlcore.h" |
0f4e3122 | 28 | #include "debug.h" |
00d20100 | 29 | #include "acx.h" |
00d20100 | 30 | #include "rx.h" |
9eb599e9 | 31 | #include "tx.h" |
00d20100 | 32 | #include "io.h" |
cd70f6a4 | 33 | #include "hw_ops.h" |
f5fc0f86 | 34 | |
00782136 LC |
35 | /* |
36 | * TODO: this is here just for now, it must be removed when the data | |
37 | * operations are in place. | |
38 | */ | |
39 | #include "../wl12xx/reg.h" | |
40 | ||
5766435e AN |
41 | static u32 wlcore_rx_get_buf_size(struct wl1271 *wl, |
42 | u32 rx_pkt_desc) | |
f5fc0f86 | 43 | { |
5766435e AN |
44 | if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN) |
45 | return (rx_pkt_desc & ALIGNED_RX_BUF_SIZE_MASK) >> | |
46 | ALIGNED_RX_BUF_SIZE_SHIFT; | |
47 | ||
48 | return (rx_pkt_desc & RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV; | |
49 | } | |
50 | ||
51 | static u32 wlcore_rx_get_align_buf_size(struct wl1271 *wl, u32 pkt_len) | |
52 | { | |
53 | if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN) | |
54 | return ALIGN(pkt_len, WL12XX_BUS_BLOCK_SIZE); | |
55 | ||
56 | return pkt_len; | |
f5fc0f86 LC |
57 | } |
58 | ||
f5fc0f86 LC |
59 | static void wl1271_rx_status(struct wl1271 *wl, |
60 | struct wl1271_rx_descriptor *desc, | |
61 | struct ieee80211_rx_status *status, | |
62 | u8 beacon) | |
63 | { | |
64 | memset(status, 0, sizeof(struct ieee80211_rx_status)); | |
65 | ||
6a2de93b | 66 | if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG) |
0af0467f | 67 | status->band = IEEE80211_BAND_2GHZ; |
6a2de93b | 68 | else |
0af0467f | 69 | status->band = IEEE80211_BAND_5GHZ; |
6a2de93b | 70 | |
43a8bc5a | 71 | status->rate_idx = wlcore_rate_to_idx(wl, desc->rate, status->band); |
a4102645 | 72 | |
18357850 | 73 | /* 11n support */ |
43a8bc5a | 74 | if (desc->rate <= wl->hw_min_ht_rate) |
18357850 | 75 | status->flag |= RX_FLAG_HT; |
18357850 | 76 | |
f5fc0f86 LC |
77 | status->signal = desc->rssi; |
78 | ||
ece550d0 JL |
79 | /* |
80 | * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we | |
81 | * need to divide by two for now, but TI has been discussing about | |
82 | * changing it. This needs to be rechecked. | |
83 | */ | |
84 | wl->noise = desc->rssi - (desc->snr >> 1); | |
85 | ||
0af0467f JO |
86 | status->freq = ieee80211_channel_to_frequency(desc->channel, |
87 | status->band); | |
f5fc0f86 LC |
88 | |
89 | if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) { | |
34c8e3d2 | 90 | u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK; |
f5fc0f86 | 91 | |
34c8e3d2 AN |
92 | status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED | |
93 | RX_FLAG_DECRYPTED; | |
94 | ||
95 | if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) { | |
5d07b668 | 96 | status->flag |= RX_FLAG_MMIC_ERROR; |
34c8e3d2 AN |
97 | wl1271_warning("Michael MIC error"); |
98 | } | |
f5fc0f86 | 99 | } |
f5fc0f86 LC |
100 | } |
101 | ||
0a1d3abc | 102 | static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length, |
cd70f6a4 | 103 | enum wl_rx_buf_align rx_align, u8 *hlid) |
f5fc0f86 | 104 | { |
f5fc0f86 LC |
105 | struct wl1271_rx_descriptor *desc; |
106 | struct sk_buff *skb; | |
92fe9b5f | 107 | struct ieee80211_hdr *hdr; |
f5fc0f86 LC |
108 | u8 *buf; |
109 | u8 beacon = 0; | |
77ddaa10 | 110 | u8 is_data = 0; |
cd70f6a4 | 111 | u8 reserved = 0; |
5c472148 | 112 | u16 seq_num; |
4158149c | 113 | u32 pkt_data_len; |
f5fc0f86 | 114 | |
93c5bb68 KV |
115 | /* |
116 | * In PLT mode we seem to get frames and mac80211 warns about them, | |
117 | * workaround this by not retrieving them at all. | |
118 | */ | |
3fcdab70 | 119 | if (unlikely(wl->plt)) |
1f37cbc9 | 120 | return -EINVAL; |
93c5bb68 | 121 | |
4158149c AN |
122 | pkt_data_len = wlcore_hw_get_rx_packet_len(wl, data, length); |
123 | if (!pkt_data_len) { | |
124 | wl1271_error("Invalid packet arrived from HW. length %d", | |
125 | length); | |
126 | return -EINVAL; | |
127 | } | |
128 | ||
cd70f6a4 | 129 | if (rx_align == WLCORE_RX_BUF_UNALIGNED) |
04414e2a | 130 | reserved = RX_BUF_ALIGN; |
cd70f6a4 | 131 | |
34c8e3d2 AN |
132 | /* the data read starts with the descriptor */ |
133 | desc = (struct wl1271_rx_descriptor *) data; | |
134 | ||
95dac04f IY |
135 | if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) { |
136 | size_t len = length - sizeof(*desc); | |
137 | wl12xx_copy_fwlog(wl, data + sizeof(*desc), len); | |
138 | wake_up_interruptible(&wl->fwlog_waitq); | |
139 | return 0; | |
140 | } | |
141 | ||
34c8e3d2 AN |
142 | switch (desc->status & WL1271_RX_DESC_STATUS_MASK) { |
143 | /* discard corrupted packets */ | |
144 | case WL1271_RX_DESC_DRIVER_RX_Q_FAIL: | |
145 | case WL1271_RX_DESC_DECRYPT_FAIL: | |
146 | wl1271_warning("corrupted packet in RX with status: 0x%x", | |
147 | desc->status & WL1271_RX_DESC_STATUS_MASK); | |
148 | return -EINVAL; | |
149 | case WL1271_RX_DESC_SUCCESS: | |
150 | case WL1271_RX_DESC_MIC_FAIL: | |
151 | break; | |
152 | default: | |
153 | wl1271_error("invalid RX descriptor status: 0x%x", | |
154 | desc->status & WL1271_RX_DESC_STATUS_MASK); | |
155 | return -EINVAL; | |
156 | } | |
157 | ||
4158149c AN |
158 | /* skb length not including rx descriptor */ |
159 | skb = __dev_alloc_skb(pkt_data_len + reserved, GFP_KERNEL); | |
f5fc0f86 LC |
160 | if (!skb) { |
161 | wl1271_error("Couldn't allocate RX frame"); | |
1f37cbc9 | 162 | return -ENOMEM; |
f5fc0f86 LC |
163 | } |
164 | ||
0a1d3abc SL |
165 | /* reserve the unaligned payload(if any) */ |
166 | skb_reserve(skb, reserved); | |
167 | ||
4158149c | 168 | buf = skb_put(skb, pkt_data_len); |
f5fc0f86 | 169 | |
0a1d3abc SL |
170 | /* |
171 | * Copy packets from aggregation buffer to the skbs without rx | |
172 | * descriptor and with packet payload aligned care. In case of unaligned | |
173 | * packets copy the packets in offset of 2 bytes guarantee IP header | |
174 | * payload aligned to 4 bytes. | |
175 | */ | |
4158149c | 176 | memcpy(buf, data + sizeof(*desc), pkt_data_len); |
cd70f6a4 | 177 | if (rx_align == WLCORE_RX_BUF_PADDED) |
04414e2a | 178 | skb_pull(skb, RX_BUF_ALIGN); |
cd70f6a4 | 179 | |
9eb599e9 | 180 | *hlid = desc->hlid; |
f5fc0f86 | 181 | |
92fe9b5f EP |
182 | hdr = (struct ieee80211_hdr *)skb->data; |
183 | if (ieee80211_is_beacon(hdr->frame_control)) | |
f5fc0f86 | 184 | beacon = 1; |
77ddaa10 EP |
185 | if (ieee80211_is_data_present(hdr->frame_control)) |
186 | is_data = 1; | |
f5fc0f86 | 187 | |
58be4607 | 188 | wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon); |
169da04f | 189 | wlcore_hw_set_rx_csum(wl, desc, skb); |
f5fc0f86 | 190 | |
5c472148 | 191 | seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; |
9eb599e9 | 192 | wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb, |
a20a5b7e | 193 | skb->len - desc->pad_len, |
5c472148 | 194 | beacon ? "beacon" : "", |
9eb599e9 | 195 | seq_num, *hlid); |
f5fc0f86 | 196 | |
a620865e | 197 | skb_queue_tail(&wl->deferred_rx_queue, skb); |
92ef8960 | 198 | queue_work(wl->freezable_wq, &wl->netstack_work); |
1f37cbc9 | 199 | |
77ddaa10 | 200 | return is_data; |
f5fc0f86 LC |
201 | } |
202 | ||
045b9b5f | 203 | int wlcore_rx(struct wl1271 *wl, struct wl_fw_status_1 *status) |
f5fc0f86 | 204 | { |
9eb599e9 | 205 | unsigned long active_hlids[BITS_TO_LONGS(WL12XX_MAX_LINKS)] = {0}; |
f5fc0f86 | 206 | u32 buf_size; |
0afd04e5 AN |
207 | u32 fw_rx_counter = status->fw_rx_counter % wl->num_rx_desc; |
208 | u32 drv_rx_counter = wl->rx_counter % wl->num_rx_desc; | |
1f37cbc9 | 209 | u32 rx_counter; |
5766435e AN |
210 | u32 pkt_len, align_pkt_len; |
211 | u32 pkt_offset, des; | |
9eb599e9 | 212 | u8 hlid; |
cd70f6a4 | 213 | enum wl_rx_buf_align rx_align; |
045b9b5f | 214 | int ret = 0; |
f5fc0f86 LC |
215 | |
216 | while (drv_rx_counter != fw_rx_counter) { | |
1f37cbc9 IY |
217 | buf_size = 0; |
218 | rx_counter = drv_rx_counter; | |
219 | while (rx_counter != fw_rx_counter) { | |
5766435e AN |
220 | des = le32_to_cpu(status->rx_pkt_descs[rx_counter]); |
221 | pkt_len = wlcore_rx_get_buf_size(wl, des); | |
222 | align_pkt_len = wlcore_rx_get_align_buf_size(wl, | |
223 | pkt_len); | |
224 | if (buf_size + align_pkt_len > WL1271_AGGR_BUFFER_SIZE) | |
1f37cbc9 | 225 | break; |
5766435e | 226 | buf_size += align_pkt_len; |
1f37cbc9 | 227 | rx_counter++; |
0afd04e5 | 228 | rx_counter %= wl->num_rx_desc; |
1f37cbc9 | 229 | } |
f5fc0f86 LC |
230 | |
231 | if (buf_size == 0) { | |
232 | wl1271_warning("received empty data"); | |
233 | break; | |
234 | } | |
235 | ||
1f37cbc9 | 236 | /* Read all available packets at once */ |
b14684a0 LC |
237 | des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]); |
238 | wlcore_hw_prepare_read(wl, des, buf_size); | |
045b9b5f IY |
239 | |
240 | ret = wlcore_read_data(wl, REG_SLV_MEM_DATA, wl->aggr_buf, | |
241 | buf_size, true); | |
242 | if (ret < 0) | |
243 | goto out; | |
1f37cbc9 IY |
244 | |
245 | /* Split data into separate packets */ | |
246 | pkt_offset = 0; | |
247 | while (pkt_offset < buf_size) { | |
5766435e AN |
248 | des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]); |
249 | pkt_len = wlcore_rx_get_buf_size(wl, des); | |
cd70f6a4 | 250 | rx_align = wlcore_hw_get_rx_buf_align(wl, des); |
0a1d3abc | 251 | |
fb2382c7 JO |
252 | /* |
253 | * the handle data call can only fail in memory-outage | |
254 | * conditions, in that case the received frame will just | |
255 | * be dropped. | |
256 | */ | |
77ddaa10 EP |
257 | if (wl1271_rx_handle_data(wl, |
258 | wl->aggr_buf + pkt_offset, | |
cd70f6a4 | 259 | pkt_len, rx_align, |
9eb599e9 | 260 | &hlid) == 1) { |
f414218e LC |
261 | if (hlid < WL12XX_MAX_LINKS) |
262 | __set_bit(hlid, active_hlids); | |
263 | else | |
264 | WARN(1, | |
265 | "hlid exceeded WL12XX_MAX_LINKS " | |
266 | "(%d)\n", hlid); | |
9eb599e9 | 267 | } |
77ddaa10 | 268 | |
1f37cbc9 IY |
269 | wl->rx_counter++; |
270 | drv_rx_counter++; | |
0afd04e5 | 271 | drv_rx_counter %= wl->num_rx_desc; |
5766435e | 272 | pkt_offset += wlcore_rx_get_align_buf_size(wl, pkt_len); |
1f37cbc9 | 273 | } |
f5fc0f86 | 274 | } |
606ea9fa IY |
275 | |
276 | /* | |
277 | * Write the driver's packet counter to the FW. This is only required | |
278 | * for older hardware revisions | |
279 | */ | |
6f7dd16c | 280 | if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) |
00782136 LC |
281 | wl1271_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER, |
282 | wl->rx_counter); | |
77ddaa10 | 283 | |
9eb599e9 | 284 | wl12xx_rearm_rx_streaming(wl, active_hlids); |
045b9b5f IY |
285 | |
286 | out: | |
287 | return ret; | |
f5fc0f86 | 288 | } |
dbe0a8cd | 289 | |
4161923a | 290 | #ifdef CONFIG_PM |
dbe0a8cd ES |
291 | int wl1271_rx_filter_enable(struct wl1271 *wl, |
292 | int index, bool enable, | |
293 | struct wl12xx_rx_filter *filter) | |
294 | { | |
295 | int ret; | |
296 | ||
297 | if (wl->rx_filter_enabled[index] == enable) { | |
298 | wl1271_warning("Request to enable an already " | |
299 | "enabled rx filter %d", index); | |
300 | return 0; | |
301 | } | |
302 | ||
303 | ret = wl1271_acx_set_rx_filter(wl, index, enable, filter); | |
304 | ||
305 | if (ret) { | |
306 | wl1271_error("Failed to %s rx data filter %d (err=%d)", | |
307 | enable ? "enable" : "disable", index, ret); | |
308 | return ret; | |
309 | } | |
310 | ||
311 | wl->rx_filter_enabled[index] = enable; | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
316 | void wl1271_rx_filter_clear_all(struct wl1271 *wl) | |
317 | { | |
318 | int i; | |
319 | ||
320 | for (i = 0; i < WL1271_MAX_RX_FILTERS; i++) { | |
321 | if (!wl->rx_filter_enabled[i]) | |
322 | continue; | |
323 | wl1271_rx_filter_enable(wl, i, 0, NULL); | |
324 | } | |
325 | } | |
4161923a | 326 | #endif /* CONFIG_PM */ |