Merge branch 'for-2.6.27' of git://git.infradead.org/users/dwmw2/firmware-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / rt2x00 / rt2x00pci.h
CommitLineData
95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00pci
23 Abstract: Data structures for the rt2x00pci module.
24 */
25
26#ifndef RT2X00PCI_H
27#define RT2X00PCI_H
28
29#include <linux/io.h>
30
31/*
32 * This variable should be used with the
33 * pci_driver structure initialization.
34 */
35#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
36
37/*
38 * Register defines.
39 * Some registers require multiple attempts before success,
40 * in those cases REGISTER_BUSY_COUNT attempts should be
41 * taken with a REGISTER_BUSY_DELAY interval.
42 */
43#define REGISTER_BUSY_COUNT 5
44#define REGISTER_BUSY_DELAY 100
45
46/*
47 * Descriptor availability flags.
48 * All PCI device descriptors have these 2 flags
49 * with the exact same definition.
50 * By storing them here we can use them inside rt2x00pci
51 * for some simple entry availability checking.
52 */
53#define TXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
54#define TXD_ENTRY_VALID FIELD32(0x00000002)
55#define RXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
56
57/*
58 * Register access.
59 */
0e14f6d3 60static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
61 const unsigned long offset,
62 u32 *value)
63{
21795094 64 *value = readl(rt2x00dev->csr.base + offset);
95ea3627
ID
65}
66
67static inline void
0e14f6d3 68rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
69 const unsigned long offset,
70 void *value, const u16 length)
71{
21795094 72 memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
95ea3627
ID
73}
74
0e14f6d3 75static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
76 const unsigned long offset,
77 u32 value)
78{
21795094 79 writel(value, rt2x00dev->csr.base + offset);
95ea3627
ID
80}
81
82static inline void
0e14f6d3 83rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627 84 const unsigned long offset,
f160ebcb 85 const void *value, const u16 length)
95ea3627 86{
21795094 87 memcpy_toio(rt2x00dev->csr.base + offset, value, length);
95ea3627
ID
88}
89
95ea3627
ID
90/*
91 * TX data handlers.
92 */
93int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
181d6902 94 struct data_queue *queue, struct sk_buff *skb,
95ea3627
ID
95 struct ieee80211_tx_control *control);
96
181d6902
ID
97/**
98 * struct queue_entry_priv_pci_rx: Per RX entry PCI specific information
99 *
100 * @desc: Pointer to device descriptor.
101 * @data: Pointer to device's entry memory.
102 * @dma: DMA pointer to &data.
103 */
104struct queue_entry_priv_pci_rx {
105 __le32 *desc;
30b3a23c 106 dma_addr_t desc_dma;
181d6902
ID
107
108 void *data;
30b3a23c 109 dma_addr_t data_dma;
181d6902
ID
110};
111
112/**
113 * struct queue_entry_priv_pci_tx: Per TX entry PCI specific information
114 *
115 * @desc: Pointer to device descriptor
116 * @data: Pointer to device's entry memory.
117 * @dma: DMA pointer to &data.
118 * @control: mac80211 control structure used to transmit data.
119 */
120struct queue_entry_priv_pci_tx {
121 __le32 *desc;
30b3a23c 122 dma_addr_t desc_dma;
181d6902
ID
123
124 void *data;
30b3a23c 125 dma_addr_t data_dma;
181d6902
ID
126
127 struct ieee80211_tx_control control;
128};
129
130/**
131 * rt2x00pci_rxdone - Handle RX done events
132 * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
95ea3627
ID
133 */
134void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
181d6902
ID
135
136/**
137 * rt2x00pci_txdone - Handle TX done events
138 * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
139 * @entry: Entry which has completed the transmission of a frame.
140 * @desc: TX done descriptor
141 */
142void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry,
143 struct txdone_entry_desc *desc);
95ea3627
ID
144
145/*
146 * Device initialization handlers.
147 */
148int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
149void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
150
151/*
152 * PCI driver handlers.
153 */
154int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id);
155void rt2x00pci_remove(struct pci_dev *pci_dev);
156#ifdef CONFIG_PM
157int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state);
158int rt2x00pci_resume(struct pci_dev *pci_dev);
159#else
160#define rt2x00pci_suspend NULL
161#define rt2x00pci_resume NULL
162#endif /* CONFIG_PM */
163
164#endif /* RT2X00PCI_H */