Commit | Line | Data |
---|---|---|
a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
a6b7a407 | 13 | #include <linux/interrupt.h> |
a66098da LB |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
3d76e82c | 16 | #include <linux/sched.h> |
a66098da LB |
17 | #include <linux/spinlock.h> |
18 | #include <linux/list.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/completion.h> | |
22 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
a66098da LB |
24 | #include <net/mac80211.h> |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/firmware.h> | |
27 | #include <linux/workqueue.h> | |
28 | ||
29 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
30 | #define MWL8K_NAME KBUILD_MODNAME | |
00e8e692 | 31 | #define MWL8K_VERSION "0.13" |
a66098da | 32 | |
0863ade8 | 33 | /* Module parameters */ |
eb939922 | 34 | static bool ap_mode_default; |
0863ade8 BC |
35 | module_param(ap_mode_default, bool, 0); |
36 | MODULE_PARM_DESC(ap_mode_default, | |
37 | "Set to 1 to make ap mode the default instead of sta mode"); | |
38 | ||
a66098da LB |
39 | /* Register definitions */ |
40 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
41 | #define MWL8K_MODE_STA 0x0000005a |
42 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 43 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
44 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
45 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
46 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
47 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
48 | ||
49 | /* Host->device communications */ | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
54 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
55 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
56 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
57 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
58 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
59 | |
60 | /* Device->host communications */ | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
65 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 66 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 67 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
68 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
69 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
70 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
71 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
72 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
73 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
74 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
75 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
76 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da | 77 | |
566875db PN |
78 | /* HW micro second timer register |
79 | * located at offset 0xA600. This | |
80 | * will be used to timestamp tx | |
81 | * packets. | |
82 | */ | |
83 | ||
84 | #define MWL8K_HW_TIMER_REGISTER 0x0000a600 | |
85 | ||
a66098da LB |
86 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ |
87 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
88 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
89 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
90 | MWL8K_A2H_INT_RADIO_ON | \ | |
91 | MWL8K_A2H_INT_RADIO_OFF | \ | |
92 | MWL8K_A2H_INT_MAC_EVENT | \ | |
93 | MWL8K_A2H_INT_OPC_DONE | \ | |
94 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
95 | MWL8K_A2H_INT_TX_DONE | \ |
96 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 97 | |
a66098da | 98 | #define MWL8K_RX_QUEUES 1 |
e600707b | 99 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 100 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
101 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
102 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 103 | |
54bc3a0d LB |
104 | struct rxd_ops { |
105 | int rxd_size; | |
106 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
107 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 108 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 109 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
110 | }; |
111 | ||
45a390dd | 112 | struct mwl8k_device_info { |
a74b295e LB |
113 | char *part_name; |
114 | char *helper_image; | |
0863ade8 BC |
115 | char *fw_image_sta; |
116 | char *fw_image_ap; | |
89a91f4f | 117 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 118 | u32 fw_api_ap; |
45a390dd LB |
119 | }; |
120 | ||
a66098da | 121 | struct mwl8k_rx_queue { |
45eb400d | 122 | int rxd_count; |
a66098da LB |
123 | |
124 | /* hw receives here */ | |
45eb400d | 125 | int head; |
a66098da LB |
126 | |
127 | /* refill descs here */ | |
45eb400d | 128 | int tail; |
a66098da | 129 | |
54bc3a0d | 130 | void *rxd; |
45eb400d | 131 | dma_addr_t rxd_dma; |
788838eb LB |
132 | struct { |
133 | struct sk_buff *skb; | |
53b1b3e1 | 134 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 135 | } *buf; |
a66098da LB |
136 | }; |
137 | ||
a66098da LB |
138 | struct mwl8k_tx_queue { |
139 | /* hw transmits here */ | |
45eb400d | 140 | int head; |
a66098da LB |
141 | |
142 | /* sw appends here */ | |
45eb400d | 143 | int tail; |
a66098da | 144 | |
8ccbc3b8 | 145 | unsigned int len; |
45eb400d LB |
146 | struct mwl8k_tx_desc *txd; |
147 | dma_addr_t txd_dma; | |
148 | struct sk_buff **skb; | |
a66098da LB |
149 | }; |
150 | ||
ac109fd0 BC |
151 | enum { |
152 | AMPDU_NO_STREAM, | |
153 | AMPDU_STREAM_NEW, | |
154 | AMPDU_STREAM_IN_PROGRESS, | |
155 | AMPDU_STREAM_ACTIVE, | |
156 | }; | |
157 | ||
5faa1aff NS |
158 | struct mwl8k_ampdu_stream { |
159 | struct ieee80211_sta *sta; | |
160 | u8 tid; | |
161 | u8 state; | |
162 | u8 idx; | |
163 | u8 txq_idx; /* index of this stream in priv->txq */ | |
164 | }; | |
165 | ||
a66098da | 166 | struct mwl8k_priv { |
a66098da | 167 | struct ieee80211_hw *hw; |
a66098da | 168 | struct pci_dev *pdev; |
bf3ca7f7 | 169 | int irq; |
a66098da | 170 | |
45a390dd LB |
171 | struct mwl8k_device_info *device_info; |
172 | ||
be695fc4 LB |
173 | void __iomem *sram; |
174 | void __iomem *regs; | |
175 | ||
176 | /* firmware */ | |
d1f9e41d BC |
177 | const struct firmware *fw_helper; |
178 | const struct firmware *fw_ucode; | |
a66098da | 179 | |
be695fc4 LB |
180 | /* hardware/firmware parameters */ |
181 | bool ap_fw; | |
182 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
183 | struct ieee80211_supported_band band_24; |
184 | struct ieee80211_channel channels_24[14]; | |
185 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
186 | struct ieee80211_supported_band band_50; |
187 | struct ieee80211_channel channels_50[4]; | |
188 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
189 | u32 ap_macids_supported; |
190 | u32 sta_macids_supported; | |
be695fc4 | 191 | |
8a7a578c BC |
192 | /* Ampdu stream information */ |
193 | u8 num_ampdu_queues; | |
ac109fd0 BC |
194 | spinlock_t stream_lock; |
195 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 196 | struct work_struct watchdog_ba_handle; |
8a7a578c | 197 | |
618952a7 LB |
198 | /* firmware access */ |
199 | struct mutex fw_mutex; | |
200 | struct task_struct *fw_mutex_owner; | |
6b6accc3 | 201 | struct task_struct *hw_restart_owner; |
618952a7 | 202 | int fw_mutex_depth; |
618952a7 LB |
203 | struct completion *hostcmd_wait; |
204 | ||
a66098da LB |
205 | /* lock held over TX and TX reap */ |
206 | spinlock_t tx_lock; | |
a66098da | 207 | |
88de754a LB |
208 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
209 | struct completion *tx_wait; | |
210 | ||
f5bb87cf | 211 | /* List of interfaces. */ |
ee0ddf18 | 212 | u32 macids_used; |
f5bb87cf | 213 | struct list_head vif_list; |
a66098da | 214 | |
a66098da LB |
215 | /* power management status cookie from firmware */ |
216 | u32 *cookie; | |
217 | dma_addr_t cookie_dma; | |
218 | ||
219 | u16 num_mcaddrs; | |
a66098da | 220 | u8 hw_rev; |
2aa7b01f | 221 | u32 fw_rev; |
a66098da LB |
222 | |
223 | /* | |
224 | * Running count of TX packets in flight, to avoid | |
225 | * iterating over the transmit rings each time. | |
226 | */ | |
227 | int pending_tx_pkts; | |
228 | ||
229 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
230 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
231 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 232 | |
c46563b7 | 233 | bool radio_on; |
68ce3884 | 234 | bool radio_short_preamble; |
a43c49a8 | 235 | bool sniffer_enabled; |
0439b1f5 | 236 | bool wmm_enabled; |
a66098da | 237 | |
a66098da LB |
238 | /* XXX need to convert this to handle multiple interfaces */ |
239 | bool capture_beacon; | |
d89173f2 | 240 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
241 | struct sk_buff *beacon_skb; |
242 | ||
243 | /* | |
244 | * This FJ worker has to be global as it is scheduled from the | |
245 | * RX handler. At this point we don't know which interface it | |
246 | * belongs to until the list of bssids waiting to complete join | |
247 | * is checked. | |
248 | */ | |
249 | struct work_struct finalize_join_worker; | |
250 | ||
1e9f9de3 LB |
251 | /* Tasklet to perform TX reclaim. */ |
252 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
253 | |
254 | /* Tasklet to perform RX. */ | |
255 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
256 | |
257 | /* Most recently reported noise in dBm */ | |
258 | s8 noise; | |
0863ade8 BC |
259 | |
260 | /* | |
261 | * preserve the queue configurations so they can be restored if/when | |
262 | * the firmware image is swapped. | |
263 | */ | |
e600707b | 264 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 | 265 | |
6b6accc3 YAP |
266 | /* To perform the task of reloading the firmware */ |
267 | struct work_struct fw_reload; | |
268 | bool hw_restart_in_progress; | |
269 | ||
99020471 BC |
270 | /* async firmware loading state */ |
271 | unsigned fw_state; | |
272 | char *fw_pref; | |
273 | char *fw_alt; | |
274 | struct completion firmware_loading_complete; | |
a66098da LB |
275 | }; |
276 | ||
e53d9b96 NS |
277 | #define MAX_WEP_KEY_LEN 13 |
278 | #define NUM_WEP_KEYS 4 | |
279 | ||
a66098da LB |
280 | /* Per interface specific private data */ |
281 | struct mwl8k_vif { | |
f5bb87cf LB |
282 | struct list_head list; |
283 | struct ieee80211_vif *vif; | |
284 | ||
f57ca9c1 LB |
285 | /* Firmware macid for this vif. */ |
286 | int macid; | |
287 | ||
c2c2b12a | 288 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 289 | u16 seqno; |
e53d9b96 NS |
290 | |
291 | /* Saved WEP keys */ | |
292 | struct { | |
293 | u8 enabled; | |
294 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
295 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
296 | |
297 | /* BSSID */ | |
298 | u8 bssid[ETH_ALEN]; | |
299 | ||
300 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
301 | bool is_hw_crypto_enabled; | |
a66098da | 302 | }; |
a94cc97e | 303 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 304 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 305 | |
d0805c1c BC |
306 | struct tx_traffic_info { |
307 | u32 start_time; | |
308 | u32 pkts; | |
309 | }; | |
310 | ||
311 | #define MWL8K_MAX_TID 8 | |
a680400e LB |
312 | struct mwl8k_sta { |
313 | /* Index into station database. Returned by UPDATE_STADB. */ | |
314 | u8 peer_id; | |
17033543 | 315 | u8 is_ampdu_allowed; |
d0805c1c | 316 | struct tx_traffic_info tx_stats[MWL8K_MAX_TID]; |
a680400e LB |
317 | }; |
318 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
319 | ||
777ad375 | 320 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
321 | { .center_freq = 2412, .hw_value = 1, }, |
322 | { .center_freq = 2417, .hw_value = 2, }, | |
323 | { .center_freq = 2422, .hw_value = 3, }, | |
324 | { .center_freq = 2427, .hw_value = 4, }, | |
325 | { .center_freq = 2432, .hw_value = 5, }, | |
326 | { .center_freq = 2437, .hw_value = 6, }, | |
327 | { .center_freq = 2442, .hw_value = 7, }, | |
328 | { .center_freq = 2447, .hw_value = 8, }, | |
329 | { .center_freq = 2452, .hw_value = 9, }, | |
330 | { .center_freq = 2457, .hw_value = 10, }, | |
331 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
332 | { .center_freq = 2467, .hw_value = 12, }, |
333 | { .center_freq = 2472, .hw_value = 13, }, | |
334 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
335 | }; |
336 | ||
777ad375 | 337 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
338 | { .bitrate = 10, .hw_value = 2, }, |
339 | { .bitrate = 20, .hw_value = 4, }, | |
340 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
341 | { .bitrate = 110, .hw_value = 22, }, |
342 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
343 | { .bitrate = 60, .hw_value = 12, }, |
344 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
345 | { .bitrate = 120, .hw_value = 24, }, |
346 | { .bitrate = 180, .hw_value = 36, }, | |
347 | { .bitrate = 240, .hw_value = 48, }, | |
348 | { .bitrate = 360, .hw_value = 72, }, | |
349 | { .bitrate = 480, .hw_value = 96, }, | |
350 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
351 | { .bitrate = 720, .hw_value = 144, }, |
352 | }; | |
353 | ||
4eae9edd LB |
354 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
355 | { .center_freq = 5180, .hw_value = 36, }, | |
356 | { .center_freq = 5200, .hw_value = 40, }, | |
357 | { .center_freq = 5220, .hw_value = 44, }, | |
358 | { .center_freq = 5240, .hw_value = 48, }, | |
359 | }; | |
360 | ||
361 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
362 | { .bitrate = 60, .hw_value = 12, }, | |
363 | { .bitrate = 90, .hw_value = 18, }, | |
364 | { .bitrate = 120, .hw_value = 24, }, | |
365 | { .bitrate = 180, .hw_value = 36, }, | |
366 | { .bitrate = 240, .hw_value = 48, }, | |
367 | { .bitrate = 360, .hw_value = 72, }, | |
368 | { .bitrate = 480, .hw_value = 96, }, | |
369 | { .bitrate = 540, .hw_value = 108, }, | |
370 | { .bitrate = 720, .hw_value = 144, }, | |
371 | }; | |
372 | ||
a66098da | 373 | /* Set or get info from Firmware */ |
a66098da | 374 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
375 | #define MWL8K_CMD_SET 0x0001 |
376 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
377 | |
378 | /* Firmware command codes */ | |
379 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
380 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 381 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
382 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
383 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
384 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
385 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 386 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 387 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 388 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
389 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
390 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
391 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
392 | #define MWL8K_CMD_SET_AID 0x010d | |
393 | #define MWL8K_CMD_SET_RATE 0x0110 | |
394 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
395 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 396 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
397 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
398 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 399 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 400 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 401 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 402 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 403 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 404 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
197a4e4e | 405 | #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */ |
aa21d0f6 LB |
406 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
407 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 408 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 409 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 410 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 411 | |
b603742f | 412 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 413 | { |
b603742f JL |
414 | u16 command = le16_to_cpu(cmd); |
415 | ||
a66098da LB |
416 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
417 | snprintf(buf, bufsize, "%s", #x);\ | |
418 | return buf;\ | |
419 | } while (0) | |
b603742f | 420 | switch (command & ~0x8000) { |
a66098da LB |
421 | MWL8K_CMDNAME(CODE_DNLD); |
422 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 423 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
424 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
425 | MWL8K_CMDNAME(GET_STAT); | |
426 | MWL8K_CMDNAME(RADIO_CONTROL); | |
427 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 428 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 429 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 430 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
431 | MWL8K_CMDNAME(SET_PRE_SCAN); |
432 | MWL8K_CMDNAME(SET_POST_SCAN); | |
433 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
434 | MWL8K_CMDNAME(SET_AID); |
435 | MWL8K_CMDNAME(SET_RATE); | |
436 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
437 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 438 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
439 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
440 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 441 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 442 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 443 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 444 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 445 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 446 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 447 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 448 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 449 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 450 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 451 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
452 | default: |
453 | snprintf(buf, bufsize, "0x%x", cmd); | |
454 | } | |
455 | #undef MWL8K_CMDNAME | |
456 | ||
457 | return buf; | |
458 | } | |
459 | ||
460 | /* Hardware and firmware reset */ | |
461 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
462 | { | |
463 | iowrite32(MWL8K_H2A_INT_RESET, | |
464 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
465 | iowrite32(MWL8K_H2A_INT_RESET, | |
466 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
467 | msleep(20); | |
468 | } | |
469 | ||
470 | /* Release fw image */ | |
d1f9e41d | 471 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
472 | { |
473 | if (*fw == NULL) | |
474 | return; | |
475 | release_firmware(*fw); | |
476 | *fw = NULL; | |
477 | } | |
478 | ||
479 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
480 | { | |
22be40d9 LB |
481 | mwl8k_release_fw(&priv->fw_ucode); |
482 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
483 | } |
484 | ||
99020471 BC |
485 | /* states for asynchronous f/w loading */ |
486 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
487 | enum { | |
488 | FW_STATE_INIT = 0, | |
489 | FW_STATE_LOADING_PREF, | |
490 | FW_STATE_LOADING_ALT, | |
491 | FW_STATE_ERROR, | |
492 | }; | |
493 | ||
a66098da LB |
494 | /* Request fw image */ |
495 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 496 | const char *fname, const struct firmware **fw, |
99020471 | 497 | bool nowait) |
a66098da LB |
498 | { |
499 | /* release current image */ | |
500 | if (*fw != NULL) | |
501 | mwl8k_release_fw(fw); | |
502 | ||
99020471 BC |
503 | if (nowait) |
504 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
505 | &priv->pdev->dev, GFP_KERNEL, | |
506 | priv, mwl8k_fw_state_machine); | |
507 | else | |
d1f9e41d | 508 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
509 | } |
510 | ||
99020471 BC |
511 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
512 | bool nowait) | |
a66098da | 513 | { |
a74b295e | 514 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
515 | int rc; |
516 | ||
a74b295e | 517 | if (di->helper_image != NULL) { |
99020471 BC |
518 | if (nowait) |
519 | rc = mwl8k_request_fw(priv, di->helper_image, | |
520 | &priv->fw_helper, true); | |
521 | else | |
522 | rc = mwl8k_request_fw(priv, di->helper_image, | |
523 | &priv->fw_helper, false); | |
524 | if (rc) | |
525 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
526 | pci_name(priv->pdev), di->helper_image); | |
527 | ||
528 | if (rc || nowait) | |
a74b295e | 529 | return rc; |
a66098da LB |
530 | } |
531 | ||
99020471 BC |
532 | if (nowait) { |
533 | /* | |
534 | * if we get here, no helper image is needed. Skip the | |
535 | * FW_STATE_INIT state. | |
536 | */ | |
537 | priv->fw_state = FW_STATE_LOADING_PREF; | |
538 | rc = mwl8k_request_fw(priv, fw_image, | |
539 | &priv->fw_ucode, | |
540 | true); | |
541 | } else | |
542 | rc = mwl8k_request_fw(priv, fw_image, | |
543 | &priv->fw_ucode, false); | |
a66098da | 544 | if (rc) { |
c2c357ce | 545 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 546 | pci_name(priv->pdev), fw_image); |
22be40d9 | 547 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
548 | return rc; |
549 | } | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
554 | struct mwl8k_cmd_pkt { | |
555 | __le16 code; | |
556 | __le16 length; | |
f57ca9c1 LB |
557 | __u8 seq_num; |
558 | __u8 macid; | |
a66098da LB |
559 | __le16 result; |
560 | char payload[0]; | |
ba2d3587 | 561 | } __packed; |
a66098da LB |
562 | |
563 | /* | |
564 | * Firmware loading. | |
565 | */ | |
566 | static int | |
567 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
568 | { | |
569 | void __iomem *regs = priv->regs; | |
570 | dma_addr_t dma_addr; | |
a66098da LB |
571 | int loops; |
572 | ||
573 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
574 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
575 | return -ENOMEM; | |
576 | ||
577 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
578 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
579 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
580 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
581 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
582 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
583 | ||
a66098da LB |
584 | loops = 1000; |
585 | do { | |
586 | u32 int_code; | |
587 | ||
588 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
589 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
590 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
591 | break; |
592 | } | |
593 | ||
3d76e82c | 594 | cond_resched(); |
a66098da LB |
595 | udelay(1); |
596 | } while (--loops); | |
597 | ||
598 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
599 | ||
d4b70570 | 600 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
601 | } |
602 | ||
603 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
604 | const u8 *data, size_t length) | |
605 | { | |
606 | struct mwl8k_cmd_pkt *cmd; | |
607 | int done; | |
608 | int rc = 0; | |
609 | ||
610 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
611 | if (cmd == NULL) | |
612 | return -ENOMEM; | |
613 | ||
614 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
615 | cmd->seq_num = 0; | |
f57ca9c1 | 616 | cmd->macid = 0; |
a66098da LB |
617 | cmd->result = 0; |
618 | ||
619 | done = 0; | |
620 | while (length) { | |
621 | int block_size = length > 256 ? 256 : length; | |
622 | ||
623 | memcpy(cmd->payload, data + done, block_size); | |
624 | cmd->length = cpu_to_le16(block_size); | |
625 | ||
626 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
627 | sizeof(*cmd) + block_size); | |
628 | if (rc) | |
629 | break; | |
630 | ||
631 | done += block_size; | |
632 | length -= block_size; | |
633 | } | |
634 | ||
635 | if (!rc) { | |
636 | cmd->length = 0; | |
637 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
638 | } | |
639 | ||
640 | kfree(cmd); | |
641 | ||
642 | return rc; | |
643 | } | |
644 | ||
645 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
646 | const u8 *data, size_t length) | |
647 | { | |
648 | unsigned char *buffer; | |
649 | int may_continue, rc = 0; | |
650 | u32 done, prev_block_size; | |
651 | ||
652 | buffer = kmalloc(1024, GFP_KERNEL); | |
653 | if (buffer == NULL) | |
654 | return -ENOMEM; | |
655 | ||
656 | done = 0; | |
657 | prev_block_size = 0; | |
658 | may_continue = 1000; | |
659 | while (may_continue > 0) { | |
660 | u32 block_size; | |
661 | ||
662 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
663 | if (block_size & 1) { | |
664 | block_size &= ~1; | |
665 | may_continue--; | |
666 | } else { | |
667 | done += prev_block_size; | |
668 | length -= prev_block_size; | |
669 | } | |
670 | ||
671 | if (block_size > 1024 || block_size > length) { | |
672 | rc = -EOVERFLOW; | |
673 | break; | |
674 | } | |
675 | ||
676 | if (length == 0) { | |
677 | rc = 0; | |
678 | break; | |
679 | } | |
680 | ||
681 | if (block_size == 0) { | |
682 | rc = -EPROTO; | |
683 | may_continue--; | |
684 | udelay(1); | |
685 | continue; | |
686 | } | |
687 | ||
688 | prev_block_size = block_size; | |
689 | memcpy(buffer, data + done, block_size); | |
690 | ||
691 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
692 | if (rc) | |
693 | break; | |
694 | } | |
695 | ||
696 | if (!rc && length != 0) | |
697 | rc = -EREMOTEIO; | |
698 | ||
699 | kfree(buffer); | |
700 | ||
701 | return rc; | |
702 | } | |
703 | ||
c2c357ce | 704 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 705 | { |
c2c357ce | 706 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 707 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
708 | int rc; |
709 | int loops; | |
710 | ||
711 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 712 | const struct firmware *helper = priv->fw_helper; |
a66098da | 713 | |
c2c357ce LB |
714 | if (helper == NULL) { |
715 | printk(KERN_ERR "%s: helper image needed but none " | |
716 | "given\n", pci_name(priv->pdev)); | |
717 | return -EINVAL; | |
718 | } | |
a66098da | 719 | |
c2c357ce | 720 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
721 | if (rc) { |
722 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 723 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
724 | return rc; |
725 | } | |
ba30c4a5 | 726 | msleep(20); |
a66098da | 727 | |
c2c357ce | 728 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 729 | } else { |
c2c357ce | 730 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
731 | } |
732 | ||
733 | if (rc) { | |
c2c357ce LB |
734 | printk(KERN_ERR "%s: unable to load firmware image\n", |
735 | pci_name(priv->pdev)); | |
a66098da LB |
736 | return rc; |
737 | } | |
738 | ||
89a91f4f | 739 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 740 | |
89b872e2 | 741 | loops = 500000; |
a66098da | 742 | do { |
eae74e65 LB |
743 | u32 ready_code; |
744 | ||
745 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
746 | if (ready_code == MWL8K_FWAP_READY) { | |
3db1cd5c | 747 | priv->ap_fw = true; |
eae74e65 LB |
748 | break; |
749 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
3db1cd5c | 750 | priv->ap_fw = false; |
a66098da | 751 | break; |
eae74e65 LB |
752 | } |
753 | ||
754 | cond_resched(); | |
a66098da LB |
755 | udelay(1); |
756 | } while (--loops); | |
757 | ||
758 | return loops ? 0 : -ETIMEDOUT; | |
759 | } | |
760 | ||
761 | ||
a66098da LB |
762 | /* DMA header used by firmware and hardware. */ |
763 | struct mwl8k_dma_data { | |
764 | __le16 fwlen; | |
765 | struct ieee80211_hdr wh; | |
20f09c3d | 766 | char data[0]; |
ba2d3587 | 767 | } __packed; |
a66098da LB |
768 | |
769 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 770 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 771 | { |
20f09c3d LB |
772 | struct mwl8k_dma_data *tr; |
773 | int hdrlen; | |
774 | ||
775 | tr = (struct mwl8k_dma_data *)skb->data; | |
776 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
777 | ||
778 | if (hdrlen != sizeof(tr->wh)) { | |
779 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
780 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
781 | *((__le16 *)(tr->data - 2)) = qos; | |
782 | } else { | |
783 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
784 | } | |
a66098da | 785 | } |
20f09c3d LB |
786 | |
787 | if (hdrlen != sizeof(*tr)) | |
788 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
789 | } |
790 | ||
ff776cec YAP |
791 | #define REDUCED_TX_HEADROOM 8 |
792 | ||
252486a1 | 793 | static void |
e4eefec7 YAP |
794 | mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, |
795 | int head_pad, int tail_pad) | |
a66098da LB |
796 | { |
797 | struct ieee80211_hdr *wh; | |
ca009301 | 798 | int hdrlen; |
252486a1 | 799 | int reqd_hdrlen; |
a66098da LB |
800 | struct mwl8k_dma_data *tr; |
801 | ||
ca009301 LB |
802 | /* |
803 | * Add a firmware DMA header; the firmware requires that we | |
804 | * present a 2-byte payload length followed by a 4-address | |
805 | * header (without QoS field), followed (optionally) by any | |
806 | * WEP/ExtIV header (but only filled in for CCMP). | |
807 | */ | |
a66098da | 808 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 809 | |
a66098da | 810 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ff776cec YAP |
811 | |
812 | /* | |
813 | * Check if skb_resize is required because of | |
814 | * tx_headroom adjustment. | |
815 | */ | |
816 | if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts) | |
817 | + REDUCED_TX_HEADROOM))) { | |
818 | if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) { | |
819 | ||
820 | wiphy_err(priv->hw->wiphy, | |
821 | "Failed to reallocate TX buffer\n"); | |
822 | return; | |
823 | } | |
824 | skb->truesize += REDUCED_TX_HEADROOM; | |
825 | } | |
826 | ||
e4eefec7 | 827 | reqd_hdrlen = sizeof(*tr) + head_pad; |
252486a1 NS |
828 | |
829 | if (hdrlen != reqd_hdrlen) | |
830 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 831 | |
ca009301 | 832 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 833 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
834 | |
835 | tr = (struct mwl8k_dma_data *)skb->data; | |
836 | if (wh != &tr->wh) | |
837 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
838 | if (hdrlen != sizeof(tr->wh)) |
839 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
840 | |
841 | /* | |
842 | * Firmware length is the length of the fully formed "802.11 | |
843 | * payload". That is, everything except for the 802.11 header. | |
844 | * This includes all crypto material including the MIC. | |
845 | */ | |
252486a1 | 846 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
847 | } |
848 | ||
ff776cec YAP |
849 | static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv, |
850 | struct sk_buff *skb) | |
e53d9b96 NS |
851 | { |
852 | struct ieee80211_hdr *wh; | |
853 | struct ieee80211_tx_info *tx_info; | |
854 | struct ieee80211_key_conf *key_conf; | |
855 | int data_pad; | |
e4eefec7 | 856 | int head_pad = 0; |
e53d9b96 NS |
857 | |
858 | wh = (struct ieee80211_hdr *)skb->data; | |
859 | ||
860 | tx_info = IEEE80211_SKB_CB(skb); | |
861 | ||
862 | key_conf = NULL; | |
863 | if (ieee80211_is_data(wh->frame_control)) | |
864 | key_conf = tx_info->control.hw_key; | |
865 | ||
866 | /* | |
867 | * Make sure the packet header is in the DMA header format (4-address | |
e4eefec7 | 868 | * without QoS), and add head & tail padding when HW crypto is enabled. |
e53d9b96 NS |
869 | * |
870 | * We have the following trailer padding requirements: | |
871 | * - WEP: 4 trailer bytes (ICV) | |
872 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
873 | * - CCMP: 8 trailer bytes (MIC) | |
874 | */ | |
875 | data_pad = 0; | |
876 | if (key_conf != NULL) { | |
e4eefec7 | 877 | head_pad = key_conf->iv_len; |
e53d9b96 NS |
878 | switch (key_conf->cipher) { |
879 | case WLAN_CIPHER_SUITE_WEP40: | |
880 | case WLAN_CIPHER_SUITE_WEP104: | |
881 | data_pad = 4; | |
882 | break; | |
883 | case WLAN_CIPHER_SUITE_TKIP: | |
884 | data_pad = 12; | |
885 | break; | |
886 | case WLAN_CIPHER_SUITE_CCMP: | |
887 | data_pad = 8; | |
888 | break; | |
889 | } | |
890 | } | |
e4eefec7 | 891 | mwl8k_add_dma_header(priv, skb, head_pad, data_pad); |
e53d9b96 | 892 | } |
a66098da LB |
893 | |
894 | /* | |
89a91f4f | 895 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 896 | */ |
89a91f4f | 897 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
898 | __le16 pkt_len; |
899 | __u8 sq2; | |
900 | __u8 rate; | |
901 | __le32 pkt_phys_addr; | |
902 | __le32 next_rxd_phys_addr; | |
903 | __le16 qos_control; | |
904 | __le16 htsig2; | |
905 | __le32 hw_rssi_info; | |
906 | __le32 hw_noise_floor_info; | |
907 | __u8 noise_floor; | |
908 | __u8 pad0[3]; | |
909 | __u8 rssi; | |
910 | __u8 rx_status; | |
911 | __u8 channel; | |
912 | __u8 rx_ctrl; | |
ba2d3587 | 913 | } __packed; |
6f6d1e9a | 914 | |
89a91f4f LB |
915 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
916 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
917 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 918 | |
89a91f4f | 919 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 920 | |
d9a07d49 NS |
921 | /* 8366 AP rx_status bits */ |
922 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
923 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
924 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
925 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
926 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
927 | ||
89a91f4f | 928 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 929 | { |
89a91f4f | 930 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
931 | |
932 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 933 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
934 | } |
935 | ||
89a91f4f | 936 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 937 | { |
89a91f4f | 938 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
939 | |
940 | rxd->pkt_len = cpu_to_le16(len); | |
941 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
942 | wmb(); | |
943 | rxd->rx_ctrl = 0; | |
944 | } | |
945 | ||
946 | static int | |
89a91f4f | 947 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 948 | __le16 *qos, s8 *noise) |
6f6d1e9a | 949 | { |
89a91f4f | 950 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 951 | |
89a91f4f | 952 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
953 | return -1; |
954 | rmb(); | |
955 | ||
956 | memset(status, 0, sizeof(*status)); | |
957 | ||
958 | status->signal = -rxd->rssi; | |
0d462bbb | 959 | *noise = -rxd->noise_floor; |
6f6d1e9a | 960 | |
89a91f4f | 961 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 962 | status->flag |= RX_FLAG_HT; |
89a91f4f | 963 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 964 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 965 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
966 | } else { |
967 | int i; | |
968 | ||
777ad375 LB |
969 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
970 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
971 | status->rate_idx = i; |
972 | break; | |
973 | } | |
974 | } | |
975 | } | |
976 | ||
85478344 LB |
977 | if (rxd->channel > 14) { |
978 | status->band = IEEE80211_BAND_5GHZ; | |
979 | if (!(status->flag & RX_FLAG_HT)) | |
980 | status->rate_idx -= 5; | |
981 | } else { | |
982 | status->band = IEEE80211_BAND_2GHZ; | |
983 | } | |
59eb21a6 BR |
984 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
985 | status->band); | |
6f6d1e9a | 986 | |
20f09c3d LB |
987 | *qos = rxd->qos_control; |
988 | ||
d9a07d49 NS |
989 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
990 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
991 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
992 | status->flag |= RX_FLAG_MMIC_ERROR; | |
993 | ||
6f6d1e9a LB |
994 | return le16_to_cpu(rxd->pkt_len); |
995 | } | |
996 | ||
89a91f4f LB |
997 | static struct rxd_ops rxd_8366_ap_ops = { |
998 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
999 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
1000 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
1001 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
1002 | }; |
1003 | ||
1004 | /* | |
89a91f4f | 1005 | * Packet reception for STA firmware. |
a66098da | 1006 | */ |
89a91f4f | 1007 | struct mwl8k_rxd_sta { |
a66098da LB |
1008 | __le16 pkt_len; |
1009 | __u8 link_quality; | |
1010 | __u8 noise_level; | |
1011 | __le32 pkt_phys_addr; | |
45eb400d | 1012 | __le32 next_rxd_phys_addr; |
a66098da LB |
1013 | __le16 qos_control; |
1014 | __le16 rate_info; | |
1015 | __le32 pad0[4]; | |
1016 | __u8 rssi; | |
1017 | __u8 channel; | |
1018 | __le16 pad1; | |
1019 | __u8 rx_ctrl; | |
1020 | __u8 rx_status; | |
1021 | __u8 pad2[2]; | |
ba2d3587 | 1022 | } __packed; |
a66098da | 1023 | |
89a91f4f LB |
1024 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
1025 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
1026 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
1027 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
1028 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
1029 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 1030 | |
89a91f4f | 1031 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
1032 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
1033 | /* ICV=0 or MIC=1 */ | |
1034 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
1035 | /* Key is uploaded only in failure case */ | |
1036 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 1037 | |
89a91f4f | 1038 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 1039 | { |
89a91f4f | 1040 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1041 | |
1042 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 1043 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1044 | } |
1045 | ||
89a91f4f | 1046 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1047 | { |
89a91f4f | 1048 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1049 | |
1050 | rxd->pkt_len = cpu_to_le16(len); | |
1051 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1052 | wmb(); | |
1053 | rxd->rx_ctrl = 0; | |
1054 | } | |
1055 | ||
1056 | static int | |
89a91f4f | 1057 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1058 | __le16 *qos, s8 *noise) |
54bc3a0d | 1059 | { |
89a91f4f | 1060 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1061 | u16 rate_info; |
1062 | ||
89a91f4f | 1063 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1064 | return -1; |
1065 | rmb(); | |
1066 | ||
1067 | rate_info = le16_to_cpu(rxd->rate_info); | |
1068 | ||
1069 | memset(status, 0, sizeof(*status)); | |
1070 | ||
1071 | status->signal = -rxd->rssi; | |
0d462bbb | 1072 | *noise = -rxd->noise_level; |
89a91f4f LB |
1073 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1074 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1075 | |
89a91f4f | 1076 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1077 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1078 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1079 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1080 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1081 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1082 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1083 | status->flag |= RX_FLAG_HT; |
1084 | ||
85478344 LB |
1085 | if (rxd->channel > 14) { |
1086 | status->band = IEEE80211_BAND_5GHZ; | |
1087 | if (!(status->flag & RX_FLAG_HT)) | |
1088 | status->rate_idx -= 5; | |
1089 | } else { | |
1090 | status->band = IEEE80211_BAND_2GHZ; | |
1091 | } | |
59eb21a6 BR |
1092 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1093 | status->band); | |
54bc3a0d | 1094 | |
20f09c3d | 1095 | *qos = rxd->qos_control; |
d9a07d49 NS |
1096 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1097 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1098 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1099 | |
54bc3a0d LB |
1100 | return le16_to_cpu(rxd->pkt_len); |
1101 | } | |
1102 | ||
89a91f4f LB |
1103 | static struct rxd_ops rxd_sta_ops = { |
1104 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1105 | .rxd_init = mwl8k_rxd_sta_init, | |
1106 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1107 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1108 | }; |
1109 | ||
1110 | ||
a66098da LB |
1111 | #define MWL8K_RX_DESCS 256 |
1112 | #define MWL8K_RX_MAXSZ 3800 | |
1113 | ||
1114 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1115 | { | |
1116 | struct mwl8k_priv *priv = hw->priv; | |
1117 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1118 | int size; | |
1119 | int i; | |
1120 | ||
45eb400d LB |
1121 | rxq->rxd_count = 0; |
1122 | rxq->head = 0; | |
1123 | rxq->tail = 0; | |
a66098da | 1124 | |
54bc3a0d | 1125 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1126 | |
45eb400d LB |
1127 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1128 | if (rxq->rxd == NULL) { | |
5db55844 | 1129 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1130 | return -ENOMEM; |
1131 | } | |
45eb400d | 1132 | memset(rxq->rxd, 0, size); |
a66098da | 1133 | |
b9ede5f1 | 1134 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1135 | if (rxq->buf == NULL) { |
5db55844 | 1136 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1137 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1138 | return -ENOMEM; |
1139 | } | |
a66098da LB |
1140 | |
1141 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1142 | int desc_size; |
1143 | void *rxd; | |
a66098da | 1144 | int nexti; |
54bc3a0d LB |
1145 | dma_addr_t next_dma_addr; |
1146 | ||
1147 | desc_size = priv->rxd_ops->rxd_size; | |
1148 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1149 | |
54bc3a0d LB |
1150 | nexti = i + 1; |
1151 | if (nexti == MWL8K_RX_DESCS) | |
1152 | nexti = 0; | |
1153 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1154 | |
54bc3a0d | 1155 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1156 | } |
1157 | ||
1158 | return 0; | |
1159 | } | |
1160 | ||
1161 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1162 | { | |
1163 | struct mwl8k_priv *priv = hw->priv; | |
1164 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1165 | int refilled; | |
1166 | ||
1167 | refilled = 0; | |
45eb400d | 1168 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1169 | struct sk_buff *skb; |
788838eb | 1170 | dma_addr_t addr; |
a66098da | 1171 | int rx; |
54bc3a0d | 1172 | void *rxd; |
a66098da LB |
1173 | |
1174 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1175 | if (skb == NULL) | |
1176 | break; | |
1177 | ||
788838eb LB |
1178 | addr = pci_map_single(priv->pdev, skb->data, |
1179 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1180 | |
54bc3a0d LB |
1181 | rxq->rxd_count++; |
1182 | rx = rxq->tail++; | |
1183 | if (rxq->tail == MWL8K_RX_DESCS) | |
1184 | rxq->tail = 0; | |
788838eb | 1185 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1186 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1187 | |
1188 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1189 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1190 | |
1191 | refilled++; | |
1192 | } | |
1193 | ||
1194 | return refilled; | |
1195 | } | |
1196 | ||
1197 | /* Must be called only when the card's reception is completely halted */ | |
1198 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1199 | { | |
1200 | struct mwl8k_priv *priv = hw->priv; | |
1201 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1202 | int i; | |
1203 | ||
73b46320 BC |
1204 | if (rxq->rxd == NULL) |
1205 | return; | |
1206 | ||
a66098da | 1207 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1208 | if (rxq->buf[i].skb != NULL) { |
1209 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1210 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1211 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1212 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1213 | |
1214 | kfree_skb(rxq->buf[i].skb); | |
1215 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1216 | } |
1217 | } | |
1218 | ||
788838eb LB |
1219 | kfree(rxq->buf); |
1220 | rxq->buf = NULL; | |
a66098da LB |
1221 | |
1222 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1223 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1224 | rxq->rxd, rxq->rxd_dma); |
1225 | rxq->rxd = NULL; | |
a66098da LB |
1226 | } |
1227 | ||
1228 | ||
1229 | /* | |
1230 | * Scan a list of BSSIDs to process for finalize join. | |
1231 | * Allows for extension to process multiple BSSIDs. | |
1232 | */ | |
1233 | static inline int | |
1234 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1235 | { | |
1236 | return priv->capture_beacon && | |
1237 | ieee80211_is_beacon(wh->frame_control) && | |
2e42e474 | 1238 | ether_addr_equal(wh->addr3, priv->capture_bssid); |
a66098da LB |
1239 | } |
1240 | ||
3779752d LB |
1241 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1242 | struct sk_buff *skb) | |
a66098da | 1243 | { |
3779752d LB |
1244 | struct mwl8k_priv *priv = hw->priv; |
1245 | ||
a66098da | 1246 | priv->capture_beacon = false; |
d89173f2 | 1247 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1248 | |
1249 | /* | |
1250 | * Use GFP_ATOMIC as rxq_process is called from | |
1251 | * the primary interrupt handler, memory allocation call | |
1252 | * must not sleep. | |
1253 | */ | |
1254 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1255 | if (priv->beacon_skb != NULL) | |
3779752d | 1256 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1257 | } |
1258 | ||
d9a07d49 NS |
1259 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1260 | u8 *bssid) | |
1261 | { | |
1262 | struct mwl8k_vif *mwl8k_vif; | |
1263 | ||
1264 | list_for_each_entry(mwl8k_vif, | |
1265 | vif_list, list) { | |
1266 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1267 | ETH_ALEN) == 0) | |
1268 | return mwl8k_vif; | |
1269 | } | |
1270 | ||
1271 | return NULL; | |
1272 | } | |
1273 | ||
a66098da LB |
1274 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1275 | { | |
1276 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1277 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1278 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1279 | int processed; | |
1280 | ||
1281 | processed = 0; | |
45eb400d | 1282 | while (rxq->rxd_count && limit--) { |
a66098da | 1283 | struct sk_buff *skb; |
54bc3a0d LB |
1284 | void *rxd; |
1285 | int pkt_len; | |
a66098da | 1286 | struct ieee80211_rx_status status; |
d9a07d49 | 1287 | struct ieee80211_hdr *wh; |
20f09c3d | 1288 | __le16 qos; |
a66098da | 1289 | |
788838eb | 1290 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1291 | if (skb == NULL) |
1292 | break; | |
54bc3a0d LB |
1293 | |
1294 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1295 | ||
0d462bbb JL |
1296 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1297 | &priv->noise); | |
54bc3a0d LB |
1298 | if (pkt_len < 0) |
1299 | break; | |
1300 | ||
788838eb LB |
1301 | rxq->buf[rxq->head].skb = NULL; |
1302 | ||
1303 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1304 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1305 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1306 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1307 | |
54bc3a0d LB |
1308 | rxq->head++; |
1309 | if (rxq->head == MWL8K_RX_DESCS) | |
1310 | rxq->head = 0; | |
1311 | ||
45eb400d | 1312 | rxq->rxd_count--; |
a66098da | 1313 | |
d9a07d49 | 1314 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1315 | |
a66098da | 1316 | /* |
c2c357ce LB |
1317 | * Check for a pending join operation. Save a |
1318 | * copy of the beacon and schedule a tasklet to | |
1319 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1320 | */ |
54bc3a0d | 1321 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1322 | mwl8k_save_beacon(hw, skb); |
a66098da | 1323 | |
d9a07d49 NS |
1324 | if (ieee80211_has_protected(wh->frame_control)) { |
1325 | ||
1326 | /* Check if hw crypto has been enabled for | |
1327 | * this bss. If yes, set the status flags | |
1328 | * accordingly | |
1329 | */ | |
1330 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1331 | wh->addr1); | |
1332 | ||
1333 | if (mwl8k_vif != NULL && | |
23677ce3 | 1334 | mwl8k_vif->is_hw_crypto_enabled) { |
d9a07d49 NS |
1335 | /* |
1336 | * When MMIC ERROR is encountered | |
1337 | * by the firmware, payload is | |
1338 | * dropped and only 32 bytes of | |
1339 | * mwl8k Firmware header is sent | |
1340 | * to the host. | |
1341 | * | |
1342 | * We need to add four bytes of | |
1343 | * key information. In it | |
1344 | * MAC80211 expects keyidx set to | |
1345 | * 0 for triggering Counter | |
1346 | * Measure of MMIC failure. | |
1347 | */ | |
1348 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1349 | struct mwl8k_dma_data *tr; | |
1350 | tr = (struct mwl8k_dma_data *)skb->data; | |
1351 | memset((void *)&(tr->data), 0, 4); | |
1352 | pkt_len += 4; | |
1353 | } | |
1354 | ||
1355 | if (!ieee80211_is_auth(wh->frame_control)) | |
1356 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1357 | RX_FLAG_DECRYPTED | | |
1358 | RX_FLAG_MMIC_STRIPPED; | |
1359 | } | |
1360 | } | |
1361 | ||
1362 | skb_put(skb, pkt_len); | |
1363 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1364 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1365 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1366 | |
1367 | processed++; | |
1368 | } | |
1369 | ||
1370 | return processed; | |
1371 | } | |
1372 | ||
1373 | ||
1374 | /* | |
1375 | * Packet transmission. | |
1376 | */ | |
1377 | ||
a66098da LB |
1378 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1379 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1380 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1381 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1382 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1383 | |
e0493a8d LB |
1384 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1385 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1386 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1387 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1388 | #define MWL8K_QOS_EOSP 0x0010 | |
1389 | ||
a66098da LB |
1390 | struct mwl8k_tx_desc { |
1391 | __le32 status; | |
1392 | __u8 data_rate; | |
1393 | __u8 tx_priority; | |
1394 | __le16 qos_control; | |
1395 | __le32 pkt_phys_addr; | |
1396 | __le16 pkt_len; | |
d89173f2 | 1397 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1398 | __le32 next_txd_phys_addr; |
8a7a578c | 1399 | __le32 timestamp; |
a66098da LB |
1400 | __le16 rate_info; |
1401 | __u8 peer_id; | |
a1fe24b0 | 1402 | __u8 tx_frag_cnt; |
ba2d3587 | 1403 | } __packed; |
a66098da LB |
1404 | |
1405 | #define MWL8K_TX_DESCS 128 | |
1406 | ||
1407 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1408 | { | |
1409 | struct mwl8k_priv *priv = hw->priv; | |
1410 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1411 | int size; | |
1412 | int i; | |
1413 | ||
8ccbc3b8 | 1414 | txq->len = 0; |
45eb400d LB |
1415 | txq->head = 0; |
1416 | txq->tail = 0; | |
a66098da LB |
1417 | |
1418 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1419 | ||
45eb400d LB |
1420 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1421 | if (txq->txd == NULL) { | |
5db55844 | 1422 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1423 | return -ENOMEM; |
1424 | } | |
45eb400d | 1425 | memset(txq->txd, 0, size); |
a66098da | 1426 | |
b9ede5f1 | 1427 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1428 | if (txq->skb == NULL) { |
5db55844 | 1429 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1430 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1431 | return -ENOMEM; |
1432 | } | |
a66098da LB |
1433 | |
1434 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1435 | struct mwl8k_tx_desc *tx_desc; | |
1436 | int nexti; | |
1437 | ||
45eb400d | 1438 | tx_desc = txq->txd + i; |
a66098da LB |
1439 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1440 | ||
1441 | tx_desc->status = 0; | |
45eb400d LB |
1442 | tx_desc->next_txd_phys_addr = |
1443 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1444 | } |
1445 | ||
1446 | return 0; | |
1447 | } | |
1448 | ||
1449 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1450 | { | |
1451 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1452 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1453 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1454 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1455 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1456 | } | |
1457 | ||
7e1112d3 | 1458 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1459 | { |
7e1112d3 LB |
1460 | struct mwl8k_priv *priv = hw->priv; |
1461 | int i; | |
1462 | ||
e600707b | 1463 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1464 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1465 | int fw_owned = 0; | |
1466 | int drv_owned = 0; | |
1467 | int unused = 0; | |
1468 | int desc; | |
1469 | ||
a66098da | 1470 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1471 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1472 | u32 status; | |
a66098da | 1473 | |
7e1112d3 | 1474 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1475 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1476 | fw_owned++; |
a66098da | 1477 | else |
7e1112d3 | 1478 | drv_owned++; |
a66098da LB |
1479 | |
1480 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1481 | unused++; |
a66098da | 1482 | } |
a66098da | 1483 | |
c96c31e4 JP |
1484 | wiphy_err(hw->wiphy, |
1485 | "txq[%d] len=%d head=%d tail=%d " | |
1486 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1487 | i, | |
1488 | txq->len, txq->head, txq->tail, | |
1489 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1490 | } |
a66098da LB |
1491 | } |
1492 | ||
618952a7 | 1493 | /* |
88de754a | 1494 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1495 | */ |
62abd3cf | 1496 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1497 | |
950d5b01 | 1498 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1499 | { |
a66098da | 1500 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1501 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1502 | int retry; |
1503 | int rc; | |
a66098da LB |
1504 | |
1505 | might_sleep(); | |
1506 | ||
6b6accc3 YAP |
1507 | /* Since fw restart is in progress, allow only the firmware |
1508 | * commands from the restart code and block the other | |
1509 | * commands since they are going to fail in any case since | |
1510 | * the firmware has crashed | |
1511 | */ | |
1512 | if (priv->hw_restart_in_progress) { | |
1513 | if (priv->hw_restart_owner == current) | |
1514 | return 0; | |
1515 | else | |
1516 | return -EBUSY; | |
1517 | } | |
1518 | ||
7e1112d3 LB |
1519 | /* |
1520 | * The TX queues are stopped at this point, so this test | |
1521 | * doesn't need to take ->tx_lock. | |
1522 | */ | |
1523 | if (!priv->pending_tx_pkts) | |
1524 | return 0; | |
1525 | ||
1526 | retry = 0; | |
1527 | rc = 0; | |
1528 | ||
a66098da | 1529 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1530 | priv->tx_wait = &tx_wait; |
1531 | while (!rc) { | |
1532 | int oldcount; | |
1533 | unsigned long timeout; | |
a66098da | 1534 | |
7e1112d3 | 1535 | oldcount = priv->pending_tx_pkts; |
a66098da | 1536 | |
7e1112d3 | 1537 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1538 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1539 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
a66098da | 1540 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1541 | |
1542 | if (timeout) { | |
1543 | WARN_ON(priv->pending_tx_pkts); | |
ba30c4a5 | 1544 | if (retry) |
c96c31e4 | 1545 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1546 | break; |
1547 | } | |
1548 | ||
1549 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1550 | wiphy_notice(hw->wiphy, |
1551 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1552 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1553 | retry = 1; |
1554 | continue; | |
1555 | } | |
1556 | ||
a66098da | 1557 | priv->tx_wait = NULL; |
a66098da | 1558 | |
c96c31e4 JP |
1559 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1560 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 | 1561 | mwl8k_dump_tx_rings(hw); |
6b6accc3 YAP |
1562 | priv->hw_restart_in_progress = true; |
1563 | ieee80211_queue_work(hw, &priv->fw_reload); | |
7e1112d3 LB |
1564 | |
1565 | rc = -ETIMEDOUT; | |
a66098da | 1566 | } |
7e1112d3 | 1567 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1568 | |
7e1112d3 | 1569 | return rc; |
a66098da LB |
1570 | } |
1571 | ||
c23b5a69 LB |
1572 | #define MWL8K_TXD_SUCCESS(status) \ |
1573 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1574 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1575 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1576 | |
a0e7c6cf NS |
1577 | static int mwl8k_tid_queue_mapping(u8 tid) |
1578 | { | |
1579 | BUG_ON(tid > 7); | |
1580 | ||
1581 | switch (tid) { | |
1582 | case 0: | |
1583 | case 3: | |
1584 | return IEEE80211_AC_BE; | |
1585 | break; | |
1586 | case 1: | |
1587 | case 2: | |
1588 | return IEEE80211_AC_BK; | |
1589 | break; | |
1590 | case 4: | |
1591 | case 5: | |
1592 | return IEEE80211_AC_VI; | |
1593 | break; | |
1594 | case 6: | |
1595 | case 7: | |
1596 | return IEEE80211_AC_VO; | |
1597 | break; | |
1598 | default: | |
1599 | return -1; | |
1600 | break; | |
1601 | } | |
1602 | } | |
1603 | ||
17033543 NS |
1604 | /* The firmware will fill in the rate information |
1605 | * for each packet that gets queued in the hardware | |
49adc5ce | 1606 | * and these macros will interpret that info. |
17033543 NS |
1607 | */ |
1608 | ||
49adc5ce JL |
1609 | #define RI_FORMAT(a) (a & 0x0001) |
1610 | #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) | |
17033543 | 1611 | |
efb7c49a LB |
1612 | static int |
1613 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1614 | { |
1615 | struct mwl8k_priv *priv = hw->priv; | |
1616 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1617 | int processed; |
a66098da | 1618 | |
efb7c49a | 1619 | processed = 0; |
8ccbc3b8 | 1620 | while (txq->len > 0 && limit--) { |
a66098da | 1621 | int tx; |
a66098da LB |
1622 | struct mwl8k_tx_desc *tx_desc; |
1623 | unsigned long addr; | |
ce9e2e1b | 1624 | int size; |
a66098da LB |
1625 | struct sk_buff *skb; |
1626 | struct ieee80211_tx_info *info; | |
1627 | u32 status; | |
17033543 NS |
1628 | struct ieee80211_sta *sta; |
1629 | struct mwl8k_sta *sta_info = NULL; | |
1630 | u16 rate_info; | |
17033543 | 1631 | struct ieee80211_hdr *wh; |
a66098da | 1632 | |
45eb400d LB |
1633 | tx = txq->head; |
1634 | tx_desc = txq->txd + tx; | |
a66098da LB |
1635 | |
1636 | status = le32_to_cpu(tx_desc->status); | |
1637 | ||
1638 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1639 | if (!force) | |
1640 | break; | |
1641 | tx_desc->status &= | |
1642 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1643 | } | |
1644 | ||
45eb400d | 1645 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1646 | BUG_ON(txq->len == 0); |
1647 | txq->len--; | |
a66098da LB |
1648 | priv->pending_tx_pkts--; |
1649 | ||
1650 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1651 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1652 | skb = txq->skb[tx]; |
1653 | txq->skb[tx] = NULL; | |
a66098da LB |
1654 | |
1655 | BUG_ON(skb == NULL); | |
1656 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1657 | ||
20f09c3d | 1658 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da | 1659 | |
17033543 NS |
1660 | wh = (struct ieee80211_hdr *) skb->data; |
1661 | ||
a66098da LB |
1662 | /* Mark descriptor as unused */ |
1663 | tx_desc->pkt_phys_addr = 0; | |
1664 | tx_desc->pkt_len = 0; | |
1665 | ||
a66098da | 1666 | info = IEEE80211_SKB_CB(skb); |
17033543 NS |
1667 | if (ieee80211_is_data(wh->frame_control)) { |
1668 | sta = info->control.sta; | |
1669 | if (sta) { | |
1670 | sta_info = MWL8K_STA(sta); | |
1671 | BUG_ON(sta_info == NULL); | |
1672 | rate_info = le16_to_cpu(tx_desc->rate_info); | |
17033543 NS |
1673 | /* If rate is < 6.5 Mpbs for an ht station |
1674 | * do not form an ampdu. If the station is a | |
1675 | * legacy station (format = 0), do not form an | |
1676 | * ampdu | |
1677 | */ | |
49adc5ce JL |
1678 | if (RI_RATE_ID_MCS(rate_info) < 1 || |
1679 | RI_FORMAT(rate_info) == 0) { | |
17033543 NS |
1680 | sta_info->is_ampdu_allowed = false; |
1681 | } else { | |
1682 | sta_info->is_ampdu_allowed = true; | |
1683 | } | |
1684 | } | |
1685 | } | |
1686 | ||
a66098da | 1687 | ieee80211_tx_info_clear_status(info); |
0bf22c37 NS |
1688 | |
1689 | /* Rate control is happening in the firmware. | |
1690 | * Ensure no tx rate is being reported. | |
1691 | */ | |
ba30c4a5 YAP |
1692 | info->status.rates[0].idx = -1; |
1693 | info->status.rates[0].count = 1; | |
0bf22c37 | 1694 | |
ce9e2e1b | 1695 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1696 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1697 | |
1698 | ieee80211_tx_status_irqsafe(hw, skb); | |
1699 | ||
efb7c49a | 1700 | processed++; |
a66098da LB |
1701 | } |
1702 | ||
efb7c49a | 1703 | return processed; |
a66098da LB |
1704 | } |
1705 | ||
1706 | /* must be called only when the card's transmit is completely halted */ | |
1707 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1708 | { | |
1709 | struct mwl8k_priv *priv = hw->priv; | |
1710 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1711 | ||
73b46320 BC |
1712 | if (txq->txd == NULL) |
1713 | return; | |
1714 | ||
efb7c49a | 1715 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1716 | |
45eb400d LB |
1717 | kfree(txq->skb); |
1718 | txq->skb = NULL; | |
a66098da LB |
1719 | |
1720 | pci_free_consistent(priv->pdev, | |
1721 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1722 | txq->txd, txq->txd_dma); |
1723 | txq->txd = NULL; | |
a66098da LB |
1724 | } |
1725 | ||
ac109fd0 | 1726 | /* caller must hold priv->stream_lock when calling the stream functions */ |
ba30c4a5 | 1727 | static struct mwl8k_ampdu_stream * |
ac109fd0 BC |
1728 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) |
1729 | { | |
1730 | struct mwl8k_ampdu_stream *stream; | |
1731 | struct mwl8k_priv *priv = hw->priv; | |
1732 | int i; | |
1733 | ||
1734 | for (i = 0; i < priv->num_ampdu_queues; i++) { | |
1735 | stream = &priv->ampdu[i]; | |
1736 | if (stream->state == AMPDU_NO_STREAM) { | |
1737 | stream->sta = sta; | |
1738 | stream->state = AMPDU_STREAM_NEW; | |
1739 | stream->tid = tid; | |
1740 | stream->idx = i; | |
1741 | stream->txq_idx = MWL8K_TX_WMM_QUEUES + i; | |
1742 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", | |
1743 | sta->addr, tid); | |
1744 | return stream; | |
1745 | } | |
1746 | } | |
1747 | return NULL; | |
1748 | } | |
1749 | ||
1750 | static int | |
1751 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1752 | { | |
1753 | int ret; | |
1754 | ||
1755 | /* if the stream has already been started, don't start it again */ | |
1756 | if (stream->state != AMPDU_STREAM_NEW) | |
1757 | return 0; | |
1758 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1759 | if (ret) | |
1760 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1761 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1762 | else | |
1763 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1764 | stream->sta->addr, stream->tid); | |
1765 | return ret; | |
1766 | } | |
1767 | ||
1768 | static void | |
1769 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1770 | { | |
1771 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1772 | stream->tid); | |
1773 | memset(stream, 0, sizeof(*stream)); | |
1774 | } | |
1775 | ||
1776 | static struct mwl8k_ampdu_stream * | |
1777 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1778 | { | |
1779 | struct mwl8k_priv *priv = hw->priv; | |
1780 | int i; | |
1781 | ||
1782 | for (i = 0 ; i < priv->num_ampdu_queues; i++) { | |
1783 | struct mwl8k_ampdu_stream *stream; | |
1784 | stream = &priv->ampdu[i]; | |
1785 | if (stream->state == AMPDU_NO_STREAM) | |
1786 | continue; | |
1787 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1788 | stream->tid == tid) | |
1789 | return stream; | |
1790 | } | |
1791 | return NULL; | |
1792 | } | |
1793 | ||
d0805c1c BC |
1794 | #define MWL8K_AMPDU_PACKET_THRESHOLD 64 |
1795 | static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid) | |
1796 | { | |
1797 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1798 | struct tx_traffic_info *tx_stats; | |
1799 | ||
1800 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1801 | tx_stats = &sta_info->tx_stats[tid]; | |
1802 | ||
1803 | return sta_info->is_ampdu_allowed && | |
1804 | tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD; | |
1805 | } | |
1806 | ||
1807 | static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid) | |
1808 | { | |
1809 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1810 | struct tx_traffic_info *tx_stats; | |
1811 | ||
1812 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1813 | tx_stats = &sta_info->tx_stats[tid]; | |
1814 | ||
1815 | if (tx_stats->start_time == 0) | |
1816 | tx_stats->start_time = jiffies; | |
1817 | ||
1818 | /* reset the packet count after each second elapses. If the number of | |
1819 | * packets ever exceeds the ampdu_min_traffic threshold, we will allow | |
1820 | * an ampdu stream to be started. | |
1821 | */ | |
1822 | if (jiffies - tx_stats->start_time > HZ) { | |
1823 | tx_stats->pkts = 0; | |
1824 | tx_stats->start_time = 0; | |
1825 | } else | |
1826 | tx_stats->pkts++; | |
1827 | } | |
1828 | ||
7bb45683 | 1829 | static void |
a66098da LB |
1830 | mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) |
1831 | { | |
1832 | struct mwl8k_priv *priv = hw->priv; | |
1833 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1834 | struct mwl8k_vif *mwl8k_vif; |
65f3ddcd | 1835 | struct ieee80211_sta *sta; |
a66098da LB |
1836 | struct ieee80211_hdr *wh; |
1837 | struct mwl8k_tx_queue *txq; | |
1838 | struct mwl8k_tx_desc *tx; | |
a66098da | 1839 | dma_addr_t dma; |
23b33906 LB |
1840 | u32 txstatus; |
1841 | u8 txdatarate; | |
1842 | u16 qos; | |
65f3ddcd NS |
1843 | int txpriority; |
1844 | u8 tid = 0; | |
1845 | struct mwl8k_ampdu_stream *stream = NULL; | |
1846 | bool start_ba_session = false; | |
3a769888 | 1847 | bool mgmtframe = false; |
a0e7c6cf | 1848 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
a66098da | 1849 | |
23b33906 LB |
1850 | wh = (struct ieee80211_hdr *)skb->data; |
1851 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1852 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1853 | else | |
1854 | qos = 0; | |
a66098da | 1855 | |
3a769888 NS |
1856 | if (ieee80211_is_mgmt(wh->frame_control)) |
1857 | mgmtframe = true; | |
1858 | ||
d9a07d49 | 1859 | if (priv->ap_fw) |
ff776cec | 1860 | mwl8k_encapsulate_tx_frame(priv, skb); |
d9a07d49 | 1861 | else |
e4eefec7 | 1862 | mwl8k_add_dma_header(priv, skb, 0, 0); |
d9a07d49 | 1863 | |
23b33906 | 1864 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1865 | |
1866 | tx_info = IEEE80211_SKB_CB(skb); | |
65f3ddcd | 1867 | sta = tx_info->control.sta; |
a66098da | 1868 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); |
a66098da LB |
1869 | |
1870 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1871 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1872 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1873 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1874 | } |
1875 | ||
23b33906 LB |
1876 | /* Setup firmware control bit fields for each frame type. */ |
1877 | txstatus = 0; | |
1878 | txdatarate = 0; | |
1879 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1880 | ieee80211_is_ctl(wh->frame_control)) { | |
1881 | txdatarate = 0; | |
e0493a8d | 1882 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1883 | } else if (ieee80211_is_data(wh->frame_control)) { |
1884 | txdatarate = 1; | |
1885 | if (is_multicast_ether_addr(wh->addr1)) | |
1886 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1887 | ||
e0493a8d | 1888 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1889 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1890 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1891 | else |
e0493a8d | 1892 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1893 | } |
a66098da | 1894 | |
a0e7c6cf NS |
1895 | /* Queue ADDBA request in the respective data queue. While setting up |
1896 | * the ampdu stream, mac80211 queues further packets for that | |
1897 | * particular ra/tid pair. However, packets piled up in the hardware | |
1898 | * for that ra/tid pair will still go out. ADDBA request and the | |
1899 | * related data packets going out from different queues asynchronously | |
1900 | * will cause a shift in the receiver window which might result in | |
1901 | * ampdu packets getting dropped at the receiver after the stream has | |
1902 | * been setup. | |
1903 | */ | |
1904 | if (unlikely(ieee80211_is_action(wh->frame_control) && | |
1905 | mgmt->u.action.category == WLAN_CATEGORY_BACK && | |
1906 | mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ && | |
1907 | priv->ap_fw)) { | |
1908 | u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); | |
1909 | tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2; | |
1910 | index = mwl8k_tid_queue_mapping(tid); | |
1911 | } | |
1912 | ||
65f3ddcd NS |
1913 | txpriority = index; |
1914 | ||
16c929df YAP |
1915 | if (priv->ap_fw && sta && sta->ht_cap.ht_supported |
1916 | && skb->protocol != cpu_to_be16(ETH_P_PAE) | |
1917 | && ieee80211_is_data_qos(wh->frame_control)) { | |
65f3ddcd | 1918 | tid = qos & 0xf; |
d0805c1c | 1919 | mwl8k_tx_count_packet(sta, tid); |
65f3ddcd NS |
1920 | spin_lock(&priv->stream_lock); |
1921 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1922 | if (stream != NULL) { | |
1923 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
1924 | txpriority = stream->txq_idx; | |
1925 | index = stream->txq_idx; | |
1926 | } else if (stream->state == AMPDU_STREAM_NEW) { | |
1927 | /* We get here if the driver sends us packets | |
1928 | * after we've initiated a stream, but before | |
1929 | * our ampdu_action routine has been called | |
1930 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1931 | * for the ADDBA request. So this packet can | |
1932 | * go out with no risk of sequence number | |
1933 | * mismatch. No special handling is required. | |
1934 | */ | |
1935 | } else { | |
1936 | /* Drop packets that would go out after the | |
1937 | * ADDBA request was sent but before the ADDBA | |
1938 | * response is received. If we don't do this, | |
1939 | * the recipient would probably receive it | |
1940 | * after the ADDBA request with SSN 0. This | |
1941 | * will cause the recipient's BA receive window | |
1942 | * to shift, which would cause the subsequent | |
1943 | * packets in the BA stream to be discarded. | |
1944 | * mac80211 queues our packets for us in this | |
1945 | * case, so this is really just a safety check. | |
1946 | */ | |
1947 | wiphy_warn(hw->wiphy, | |
1948 | "Cannot send packet while ADDBA " | |
1949 | "dialog is underway.\n"); | |
1950 | spin_unlock(&priv->stream_lock); | |
1951 | dev_kfree_skb(skb); | |
1952 | return; | |
1953 | } | |
1954 | } else { | |
1955 | /* Defer calling mwl8k_start_stream so that the current | |
1956 | * skb can go out before the ADDBA request. This | |
1957 | * prevents sequence number mismatch at the recepient | |
1958 | * as described above. | |
1959 | */ | |
d0805c1c | 1960 | if (mwl8k_ampdu_allowed(sta, tid)) { |
17033543 NS |
1961 | stream = mwl8k_add_stream(hw, sta, tid); |
1962 | if (stream != NULL) | |
1963 | start_ba_session = true; | |
1964 | } | |
65f3ddcd NS |
1965 | } |
1966 | spin_unlock(&priv->stream_lock); | |
1967 | } | |
1968 | ||
a66098da LB |
1969 | dma = pci_map_single(priv->pdev, skb->data, |
1970 | skb->len, PCI_DMA_TODEVICE); | |
1971 | ||
1972 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
1973 | wiphy_debug(hw->wiphy, |
1974 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
1975 | if (start_ba_session) { |
1976 | spin_lock(&priv->stream_lock); | |
1977 | mwl8k_remove_stream(hw, stream); | |
1978 | spin_unlock(&priv->stream_lock); | |
1979 | } | |
23b33906 | 1980 | dev_kfree_skb(skb); |
7bb45683 | 1981 | return; |
a66098da LB |
1982 | } |
1983 | ||
23b33906 | 1984 | spin_lock_bh(&priv->tx_lock); |
a66098da | 1985 | |
23b33906 | 1986 | txq = priv->txq + index; |
a66098da | 1987 | |
3a769888 NS |
1988 | /* Mgmt frames that go out frequently are probe |
1989 | * responses. Other mgmt frames got out relatively | |
1990 | * infrequently. Hence reserve 2 buffers so that | |
1991 | * other mgmt frames do not get dropped due to an | |
1992 | * already queued probe response in one of the | |
1993 | * reserved buffers. | |
1994 | */ | |
1995 | ||
1996 | if (txq->len >= MWL8K_TX_DESCS - 2) { | |
23677ce3 | 1997 | if (!mgmtframe || txq->len == MWL8K_TX_DESCS) { |
3a769888 NS |
1998 | if (start_ba_session) { |
1999 | spin_lock(&priv->stream_lock); | |
2000 | mwl8k_remove_stream(hw, stream); | |
2001 | spin_unlock(&priv->stream_lock); | |
2002 | } | |
2003 | spin_unlock_bh(&priv->tx_lock); | |
2004 | dev_kfree_skb(skb); | |
2005 | return; | |
3a7dbc3b | 2006 | } |
65f3ddcd NS |
2007 | } |
2008 | ||
45eb400d LB |
2009 | BUG_ON(txq->skb[txq->tail] != NULL); |
2010 | txq->skb[txq->tail] = skb; | |
a66098da | 2011 | |
45eb400d | 2012 | tx = txq->txd + txq->tail; |
23b33906 | 2013 | tx->data_rate = txdatarate; |
65f3ddcd | 2014 | tx->tx_priority = txpriority; |
a66098da | 2015 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
2016 | tx->pkt_phys_addr = cpu_to_le32(dma); |
2017 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 2018 | tx->rate_info = 0; |
a680400e LB |
2019 | if (!priv->ap_fw && tx_info->control.sta != NULL) |
2020 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | |
2021 | else | |
2022 | tx->peer_id = 0; | |
566875db PN |
2023 | |
2024 | if (priv->ap_fw) | |
2025 | tx->timestamp = cpu_to_le32(ioread32(priv->regs + | |
2026 | MWL8K_HW_TIMER_REGISTER)); | |
2027 | ||
a66098da | 2028 | wmb(); |
23b33906 LB |
2029 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
2030 | ||
8ccbc3b8 | 2031 | txq->len++; |
a66098da | 2032 | priv->pending_tx_pkts++; |
a66098da | 2033 | |
45eb400d LB |
2034 | txq->tail++; |
2035 | if (txq->tail == MWL8K_TX_DESCS) | |
2036 | txq->tail = 0; | |
23b33906 | 2037 | |
23b33906 | 2038 | mwl8k_tx_start(priv); |
a66098da LB |
2039 | |
2040 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
2041 | |
2042 | /* Initiate the ampdu session here */ | |
2043 | if (start_ba_session) { | |
2044 | spin_lock(&priv->stream_lock); | |
2045 | if (mwl8k_start_stream(hw, stream)) | |
2046 | mwl8k_remove_stream(hw, stream); | |
2047 | spin_unlock(&priv->stream_lock); | |
2048 | } | |
a66098da LB |
2049 | } |
2050 | ||
2051 | ||
618952a7 LB |
2052 | /* |
2053 | * Firmware access. | |
2054 | * | |
2055 | * We have the following requirements for issuing firmware commands: | |
2056 | * - Some commands require that the packet transmit path is idle when | |
2057 | * the command is issued. (For simplicity, we'll just quiesce the | |
2058 | * transmit path for every command.) | |
2059 | * - There are certain sequences of commands that need to be issued to | |
2060 | * the hardware sequentially, with no other intervening commands. | |
2061 | * | |
2062 | * This leads to an implementation of a "firmware lock" as a mutex that | |
2063 | * can be taken recursively, and which is taken by both the low-level | |
2064 | * command submission function (mwl8k_post_cmd) as well as any users of | |
2065 | * that function that require issuing of an atomic sequence of commands, | |
2066 | * and quiesces the transmit path whenever it's taken. | |
2067 | */ | |
2068 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
2069 | { | |
2070 | struct mwl8k_priv *priv = hw->priv; | |
2071 | ||
2072 | if (priv->fw_mutex_owner != current) { | |
2073 | int rc; | |
2074 | ||
2075 | mutex_lock(&priv->fw_mutex); | |
2076 | ieee80211_stop_queues(hw); | |
2077 | ||
2078 | rc = mwl8k_tx_wait_empty(hw); | |
2079 | if (rc) { | |
6b6accc3 YAP |
2080 | if (!priv->hw_restart_in_progress) |
2081 | ieee80211_wake_queues(hw); | |
2082 | ||
618952a7 LB |
2083 | mutex_unlock(&priv->fw_mutex); |
2084 | ||
2085 | return rc; | |
2086 | } | |
2087 | ||
2088 | priv->fw_mutex_owner = current; | |
2089 | } | |
2090 | ||
2091 | priv->fw_mutex_depth++; | |
2092 | ||
2093 | return 0; | |
2094 | } | |
2095 | ||
2096 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
2097 | { | |
2098 | struct mwl8k_priv *priv = hw->priv; | |
2099 | ||
2100 | if (!--priv->fw_mutex_depth) { | |
6b6accc3 YAP |
2101 | if (!priv->hw_restart_in_progress) |
2102 | ieee80211_wake_queues(hw); | |
2103 | ||
618952a7 LB |
2104 | priv->fw_mutex_owner = NULL; |
2105 | mutex_unlock(&priv->fw_mutex); | |
2106 | } | |
2107 | } | |
2108 | ||
2109 | ||
a66098da LB |
2110 | /* |
2111 | * Command processing. | |
2112 | */ | |
2113 | ||
0c9cc640 LB |
2114 | /* Timeout firmware commands after 10s */ |
2115 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
2116 | |
2117 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
2118 | { | |
2119 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
2120 | struct mwl8k_priv *priv = hw->priv; | |
2121 | void __iomem *regs = priv->regs; | |
2122 | dma_addr_t dma_addr; | |
2123 | unsigned int dma_size; | |
2124 | int rc; | |
a66098da LB |
2125 | unsigned long timeout = 0; |
2126 | u8 buf[32]; | |
2127 | ||
b603742f | 2128 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
2129 | dma_size = le16_to_cpu(cmd->length); |
2130 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
2131 | PCI_DMA_BIDIRECTIONAL); | |
2132 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
2133 | return -ENOMEM; | |
2134 | ||
618952a7 | 2135 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
2136 | if (rc) { |
2137 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
2138 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 2139 | return rc; |
39a1e42e | 2140 | } |
a66098da | 2141 | |
a66098da LB |
2142 | priv->hostcmd_wait = &cmd_wait; |
2143 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
2144 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
2145 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
2146 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
2147 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
2148 | |
2149 | timeout = wait_for_completion_timeout(&cmd_wait, | |
2150 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
2151 | ||
618952a7 LB |
2152 | priv->hostcmd_wait = NULL; |
2153 | ||
2154 | mwl8k_fw_unlock(hw); | |
2155 | ||
37055bd4 LB |
2156 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
2157 | PCI_DMA_BIDIRECTIONAL); | |
2158 | ||
a66098da | 2159 | if (!timeout) { |
5db55844 | 2160 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
2161 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2162 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
2163 | rc = -ETIMEDOUT; |
2164 | } else { | |
0c9cc640 LB |
2165 | int ms; |
2166 | ||
2167 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
2168 | ||
ce9e2e1b | 2169 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 2170 | if (rc) |
5db55844 | 2171 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
2172 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2173 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 2174 | else if (ms > 2000) |
5db55844 | 2175 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
2176 | mwl8k_cmd_name(cmd->code, |
2177 | buf, sizeof(buf)), | |
2178 | ms); | |
a66098da LB |
2179 | } |
2180 | ||
a66098da LB |
2181 | return rc; |
2182 | } | |
2183 | ||
f57ca9c1 LB |
2184 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
2185 | struct ieee80211_vif *vif, | |
2186 | struct mwl8k_cmd_pkt *cmd) | |
2187 | { | |
2188 | if (vif != NULL) | |
2189 | cmd->macid = MWL8K_VIF(vif)->macid; | |
2190 | return mwl8k_post_cmd(hw, cmd); | |
2191 | } | |
2192 | ||
1349ad2f LB |
2193 | /* |
2194 | * Setup code shared between STA and AP firmware images. | |
2195 | */ | |
2196 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2197 | { | |
2198 | struct mwl8k_priv *priv = hw->priv; | |
2199 | ||
2200 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2201 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2202 | ||
2203 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2204 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2205 | ||
2206 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
2207 | priv->band_24.channels = priv->channels_24; | |
2208 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2209 | priv->band_24.bitrates = priv->rates_24; | |
2210 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2211 | ||
2212 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
2213 | } | |
2214 | ||
4eae9edd LB |
2215 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2216 | { | |
2217 | struct mwl8k_priv *priv = hw->priv; | |
2218 | ||
2219 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2220 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2221 | ||
2222 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2223 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2224 | ||
2225 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
2226 | priv->band_50.channels = priv->channels_50; | |
2227 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2228 | priv->band_50.bitrates = priv->rates_50; | |
2229 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2230 | ||
2231 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
2232 | } | |
2233 | ||
a66098da | 2234 | /* |
04b147b1 | 2235 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2236 | */ |
04b147b1 | 2237 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2238 | struct mwl8k_cmd_pkt header; |
2239 | __u8 hw_rev; | |
2240 | __u8 host_interface; | |
2241 | __le16 num_mcaddrs; | |
d89173f2 | 2242 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2243 | __le16 region_code; |
2244 | __le32 fw_rev; | |
2245 | __le32 ps_cookie; | |
2246 | __le32 caps; | |
2247 | __u8 mcs_bitmap[16]; | |
2248 | __le32 rx_queue_ptr; | |
2249 | __le32 num_tx_queues; | |
e600707b | 2250 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2251 | __le32 caps2; |
2252 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2253 | __le32 total_rxd; |
ba2d3587 | 2254 | } __packed; |
a66098da | 2255 | |
341c9791 LB |
2256 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2257 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2258 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2259 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2260 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2261 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2262 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2263 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2264 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2265 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2266 | #define MWL8K_CAP_MIMO 0x00000200 | |
2267 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2268 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2269 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2270 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2271 | |
06953235 LB |
2272 | static void |
2273 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2274 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2275 | { |
341c9791 LB |
2276 | int rx_streams; |
2277 | int tx_streams; | |
2278 | ||
777ad375 | 2279 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2280 | |
2281 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2282 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2283 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2284 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
2285 | if (cap & MWL8K_CAP_AMPDU) { |
2286 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
2287 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2288 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2289 | } |
2290 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2291 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2292 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2293 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2294 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2295 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2296 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2297 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2298 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2299 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2300 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2301 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2302 | |
2303 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2304 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2305 | ||
777ad375 | 2306 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2307 | if (rx_streams >= 2) |
777ad375 | 2308 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2309 | if (rx_streams >= 3) |
777ad375 LB |
2310 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2311 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2312 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2313 | |
2314 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2315 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2316 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2317 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2318 | } | |
2319 | } | |
2320 | ||
06953235 LB |
2321 | static void |
2322 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2323 | { | |
2324 | struct mwl8k_priv *priv = hw->priv; | |
2325 | ||
2326 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
2327 | mwl8k_setup_2ghz_band(hw); | |
2328 | if (caps & MWL8K_CAP_MIMO) | |
2329 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2330 | } | |
2331 | ||
2332 | if (caps & MWL8K_CAP_5GHZ) { | |
2333 | mwl8k_setup_5ghz_band(hw); | |
2334 | if (caps & MWL8K_CAP_MIMO) | |
2335 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2336 | } | |
2337 | } | |
2338 | ||
04b147b1 | 2339 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2340 | { |
2341 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2342 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2343 | int rc; |
2344 | int i; | |
2345 | ||
2346 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2347 | if (cmd == NULL) | |
2348 | return -ENOMEM; | |
2349 | ||
2350 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2351 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2352 | ||
2353 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2354 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2355 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2356 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2357 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2358 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2359 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2360 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2361 | |
2362 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2363 | ||
2364 | if (!rc) { | |
2365 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2366 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2367 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2368 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2369 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2370 | priv->ap_macids_supported = 0x00000000; |
2371 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2372 | } |
2373 | ||
2374 | kfree(cmd); | |
2375 | return rc; | |
2376 | } | |
2377 | ||
42fba21d LB |
2378 | /* |
2379 | * CMD_GET_HW_SPEC (AP version). | |
2380 | */ | |
2381 | struct mwl8k_cmd_get_hw_spec_ap { | |
2382 | struct mwl8k_cmd_pkt header; | |
2383 | __u8 hw_rev; | |
2384 | __u8 host_interface; | |
2385 | __le16 num_wcb; | |
2386 | __le16 num_mcaddrs; | |
2387 | __u8 perm_addr[ETH_ALEN]; | |
2388 | __le16 region_code; | |
2389 | __le16 num_antenna; | |
2390 | __le32 fw_rev; | |
2391 | __le32 wcbbase0; | |
2392 | __le32 rxwrptr; | |
2393 | __le32 rxrdptr; | |
2394 | __le32 ps_cookie; | |
2395 | __le32 wcbbase1; | |
2396 | __le32 wcbbase2; | |
2397 | __le32 wcbbase3; | |
952a0e96 | 2398 | __le32 fw_api_version; |
8a7a578c BC |
2399 | __le32 caps; |
2400 | __le32 num_of_ampdu_queues; | |
2401 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2402 | } __packed; |
42fba21d LB |
2403 | |
2404 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2405 | { | |
2406 | struct mwl8k_priv *priv = hw->priv; | |
2407 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2408 | int rc, i; |
952a0e96 | 2409 | u32 api_version; |
42fba21d LB |
2410 | |
2411 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2412 | if (cmd == NULL) | |
2413 | return -ENOMEM; | |
2414 | ||
2415 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2416 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2417 | ||
2418 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2419 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2420 | ||
2421 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2422 | ||
2423 | if (!rc) { | |
2424 | int off; | |
2425 | ||
952a0e96 BC |
2426 | api_version = le32_to_cpu(cmd->fw_api_version); |
2427 | if (priv->device_info->fw_api_ap != api_version) { | |
2428 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2429 | " Expected %d got %d.\n", MWL8K_NAME, | |
2430 | priv->device_info->part_name, | |
2431 | priv->device_info->fw_api_ap, | |
2432 | api_version); | |
2433 | rc = -EINVAL; | |
2434 | goto done; | |
2435 | } | |
42fba21d LB |
2436 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2437 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2438 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2439 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2440 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2441 | priv->ap_macids_supported = 0x000000ff; |
2442 | priv->sta_macids_supported = 0x00000000; | |
8a7a578c BC |
2443 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2444 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2445 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2446 | " but we only support %d.\n", | |
2447 | priv->num_ampdu_queues, | |
2448 | MWL8K_MAX_AMPDU_QUEUES); | |
2449 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2450 | } | |
42fba21d | 2451 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2452 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2453 | |
2454 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2455 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2456 | |
73b46320 BC |
2457 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2458 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2459 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2460 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2461 | |
2462 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2463 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2464 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2465 | } |
2466 | ||
952a0e96 | 2467 | done: |
42fba21d LB |
2468 | kfree(cmd); |
2469 | return rc; | |
2470 | } | |
2471 | ||
2472 | /* | |
2473 | * CMD_SET_HW_SPEC. | |
2474 | */ | |
2475 | struct mwl8k_cmd_set_hw_spec { | |
2476 | struct mwl8k_cmd_pkt header; | |
2477 | __u8 hw_rev; | |
2478 | __u8 host_interface; | |
2479 | __le16 num_mcaddrs; | |
2480 | __u8 perm_addr[ETH_ALEN]; | |
2481 | __le16 region_code; | |
2482 | __le32 fw_rev; | |
2483 | __le32 ps_cookie; | |
2484 | __le32 caps; | |
2485 | __le32 rx_queue_ptr; | |
2486 | __le32 num_tx_queues; | |
e600707b | 2487 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2488 | __le32 flags; |
2489 | __le32 num_tx_desc_per_queue; | |
2490 | __le32 total_rxd; | |
ba2d3587 | 2491 | } __packed; |
42fba21d | 2492 | |
8a7a578c BC |
2493 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2494 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2495 | * the packets that are queued for more than 500ms, will be dropped in the | |
2496 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2497 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2498 | * faster client. | |
2499 | */ | |
2500 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
3373b28e | 2501 | #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200 |
b64fe619 LB |
2502 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2503 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2504 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2505 | |
2506 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2507 | { | |
2508 | struct mwl8k_priv *priv = hw->priv; | |
2509 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2510 | int rc; | |
2511 | int i; | |
2512 | ||
2513 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2514 | if (cmd == NULL) | |
2515 | return -ENOMEM; | |
2516 | ||
2517 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2518 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2519 | ||
2520 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2521 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2522 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2523 | |
2524 | /* | |
2525 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2526 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2527 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2528 | * priority is interpreted the right way in firmware. | |
2529 | */ | |
e600707b BC |
2530 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2531 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2532 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2533 | } | |
2534 | ||
b64fe619 LB |
2535 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2536 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
31d291a7 | 2537 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON | |
3373b28e NS |
2538 | MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY | |
2539 | MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR); | |
42fba21d LB |
2540 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2541 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2542 | ||
2543 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2544 | kfree(cmd); | |
2545 | ||
2546 | return rc; | |
2547 | } | |
2548 | ||
a66098da LB |
2549 | /* |
2550 | * CMD_MAC_MULTICAST_ADR. | |
2551 | */ | |
2552 | struct mwl8k_cmd_mac_multicast_adr { | |
2553 | struct mwl8k_cmd_pkt header; | |
2554 | __le16 action; | |
2555 | __le16 numaddr; | |
ce9e2e1b | 2556 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2557 | }; |
2558 | ||
d5e30845 LB |
2559 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2560 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2561 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2562 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2563 | |
e81cd2d6 | 2564 | static struct mwl8k_cmd_pkt * |
447ced07 | 2565 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2566 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2567 | { |
e81cd2d6 | 2568 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2569 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2570 | int size; |
22bedad3 JP |
2571 | int mc_count = 0; |
2572 | ||
2573 | if (mc_list) | |
2574 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2575 | |
447ced07 | 2576 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2577 | allmulti = 1; |
2578 | mc_count = 0; | |
2579 | } | |
e81cd2d6 LB |
2580 | |
2581 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2582 | |
e81cd2d6 | 2583 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2584 | if (cmd == NULL) |
e81cd2d6 | 2585 | return NULL; |
a66098da LB |
2586 | |
2587 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2588 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2589 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2590 | MWL8K_ENABLE_RX_BROADCAST); | |
2591 | ||
2592 | if (allmulti) { | |
2593 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2594 | } else if (mc_count) { | |
22bedad3 JP |
2595 | struct netdev_hw_addr *ha; |
2596 | int i = 0; | |
d5e30845 LB |
2597 | |
2598 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2599 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2600 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2601 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2602 | } |
a66098da LB |
2603 | } |
2604 | ||
e81cd2d6 | 2605 | return &cmd->header; |
a66098da LB |
2606 | } |
2607 | ||
2608 | /* | |
55489b6e | 2609 | * CMD_GET_STAT. |
a66098da | 2610 | */ |
55489b6e | 2611 | struct mwl8k_cmd_get_stat { |
a66098da | 2612 | struct mwl8k_cmd_pkt header; |
a66098da | 2613 | __le32 stats[64]; |
ba2d3587 | 2614 | } __packed; |
a66098da LB |
2615 | |
2616 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2617 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2618 | #define MWL8K_STAT_FCS_ERROR 24 | |
2619 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2620 | ||
55489b6e LB |
2621 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2622 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2623 | { |
55489b6e | 2624 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2625 | int rc; |
2626 | ||
2627 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2628 | if (cmd == NULL) | |
2629 | return -ENOMEM; | |
2630 | ||
2631 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2632 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2633 | |
2634 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2635 | if (!rc) { | |
2636 | stats->dot11ACKFailureCount = | |
2637 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2638 | stats->dot11RTSFailureCount = | |
2639 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2640 | stats->dot11FCSErrorCount = | |
2641 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2642 | stats->dot11RTSSuccessCount = | |
2643 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2644 | } | |
2645 | kfree(cmd); | |
2646 | ||
2647 | return rc; | |
2648 | } | |
2649 | ||
2650 | /* | |
55489b6e | 2651 | * CMD_RADIO_CONTROL. |
a66098da | 2652 | */ |
55489b6e | 2653 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2654 | struct mwl8k_cmd_pkt header; |
2655 | __le16 action; | |
2656 | __le16 control; | |
2657 | __le16 radio_on; | |
ba2d3587 | 2658 | } __packed; |
a66098da | 2659 | |
c46563b7 | 2660 | static int |
55489b6e | 2661 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2662 | { |
2663 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2664 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2665 | int rc; |
2666 | ||
c46563b7 | 2667 | if (enable == priv->radio_on && !force) |
a66098da LB |
2668 | return 0; |
2669 | ||
a66098da LB |
2670 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2671 | if (cmd == NULL) | |
2672 | return -ENOMEM; | |
2673 | ||
2674 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2675 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2676 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2677 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2678 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2679 | ||
2680 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2681 | kfree(cmd); | |
2682 | ||
2683 | if (!rc) | |
c46563b7 | 2684 | priv->radio_on = enable; |
a66098da LB |
2685 | |
2686 | return rc; | |
2687 | } | |
2688 | ||
55489b6e | 2689 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2690 | { |
55489b6e | 2691 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2692 | } |
2693 | ||
55489b6e | 2694 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2695 | { |
55489b6e | 2696 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2697 | } |
2698 | ||
a66098da LB |
2699 | static int |
2700 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2701 | { | |
99200a99 | 2702 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2703 | |
68ce3884 | 2704 | priv->radio_short_preamble = short_preamble; |
a66098da | 2705 | |
55489b6e | 2706 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2707 | } |
2708 | ||
2709 | /* | |
55489b6e | 2710 | * CMD_RF_TX_POWER. |
a66098da | 2711 | */ |
41fdf097 | 2712 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2713 | |
55489b6e | 2714 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2715 | struct mwl8k_cmd_pkt header; |
2716 | __le16 action; | |
2717 | __le16 support_level; | |
2718 | __le16 current_level; | |
2719 | __le16 reserved; | |
41fdf097 | 2720 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2721 | } __packed; |
a66098da | 2722 | |
55489b6e | 2723 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2724 | { |
55489b6e | 2725 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2726 | int rc; |
2727 | ||
2728 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2729 | if (cmd == NULL) | |
2730 | return -ENOMEM; | |
2731 | ||
2732 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2733 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2734 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2735 | cmd->support_level = cpu_to_le16(dBm); | |
2736 | ||
2737 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2738 | kfree(cmd); | |
2739 | ||
2740 | return rc; | |
2741 | } | |
2742 | ||
41fdf097 NS |
2743 | /* |
2744 | * CMD_TX_POWER. | |
2745 | */ | |
2746 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2747 | ||
2748 | struct mwl8k_cmd_tx_power { | |
2749 | struct mwl8k_cmd_pkt header; | |
2750 | __le16 action; | |
2751 | __le16 band; | |
2752 | __le16 channel; | |
2753 | __le16 bw; | |
2754 | __le16 sub_ch; | |
2755 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
ba30c4a5 | 2756 | } __packed; |
41fdf097 NS |
2757 | |
2758 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2759 | struct ieee80211_conf *conf, | |
2760 | unsigned short pwr) | |
2761 | { | |
2762 | struct ieee80211_channel *channel = conf->channel; | |
2763 | struct mwl8k_cmd_tx_power *cmd; | |
2764 | int rc; | |
2765 | int i; | |
2766 | ||
2767 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2768 | if (cmd == NULL) | |
2769 | return -ENOMEM; | |
2770 | ||
2771 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2772 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2773 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2774 | ||
2775 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2776 | cmd->band = cpu_to_le16(0x1); | |
2777 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2778 | cmd->band = cpu_to_le16(0x4); | |
2779 | ||
604c4ef1 | 2780 | cmd->channel = cpu_to_le16(channel->hw_value); |
41fdf097 NS |
2781 | |
2782 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2783 | conf->channel_type == NL80211_CHAN_HT20) { | |
2784 | cmd->bw = cpu_to_le16(0x2); | |
2785 | } else { | |
2786 | cmd->bw = cpu_to_le16(0x4); | |
2787 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2788 | cmd->sub_ch = cpu_to_le16(0x3); | |
2789 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2790 | cmd->sub_ch = cpu_to_le16(0x1); | |
2791 | } | |
2792 | ||
2793 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2794 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2795 | ||
2796 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2797 | kfree(cmd); | |
2798 | ||
2799 | return rc; | |
2800 | } | |
2801 | ||
08b06347 LB |
2802 | /* |
2803 | * CMD_RF_ANTENNA. | |
2804 | */ | |
2805 | struct mwl8k_cmd_rf_antenna { | |
2806 | struct mwl8k_cmd_pkt header; | |
2807 | __le16 antenna; | |
2808 | __le16 mode; | |
ba2d3587 | 2809 | } __packed; |
08b06347 LB |
2810 | |
2811 | #define MWL8K_RF_ANTENNA_RX 1 | |
2812 | #define MWL8K_RF_ANTENNA_TX 2 | |
2813 | ||
2814 | static int | |
2815 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2816 | { | |
2817 | struct mwl8k_cmd_rf_antenna *cmd; | |
2818 | int rc; | |
2819 | ||
2820 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2821 | if (cmd == NULL) | |
2822 | return -ENOMEM; | |
2823 | ||
2824 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2825 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2826 | cmd->antenna = cpu_to_le16(antenna); | |
2827 | cmd->mode = cpu_to_le16(mask); | |
2828 | ||
2829 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2830 | kfree(cmd); | |
2831 | ||
2832 | return rc; | |
2833 | } | |
2834 | ||
b64fe619 LB |
2835 | /* |
2836 | * CMD_SET_BEACON. | |
2837 | */ | |
2838 | struct mwl8k_cmd_set_beacon { | |
2839 | struct mwl8k_cmd_pkt header; | |
2840 | __le16 beacon_len; | |
2841 | __u8 beacon[0]; | |
2842 | }; | |
2843 | ||
aa21d0f6 LB |
2844 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2845 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2846 | { |
2847 | struct mwl8k_cmd_set_beacon *cmd; | |
2848 | int rc; | |
2849 | ||
2850 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2851 | if (cmd == NULL) | |
2852 | return -ENOMEM; | |
2853 | ||
2854 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2855 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2856 | cmd->beacon_len = cpu_to_le16(len); | |
2857 | memcpy(cmd->beacon, beacon, len); | |
2858 | ||
aa21d0f6 | 2859 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2860 | kfree(cmd); |
2861 | ||
2862 | return rc; | |
2863 | } | |
2864 | ||
a66098da LB |
2865 | /* |
2866 | * CMD_SET_PRE_SCAN. | |
2867 | */ | |
2868 | struct mwl8k_cmd_set_pre_scan { | |
2869 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2870 | } __packed; |
a66098da LB |
2871 | |
2872 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2873 | { | |
2874 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2875 | int rc; | |
2876 | ||
2877 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2878 | if (cmd == NULL) | |
2879 | return -ENOMEM; | |
2880 | ||
2881 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2882 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2883 | ||
2884 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2885 | kfree(cmd); | |
2886 | ||
2887 | return rc; | |
2888 | } | |
2889 | ||
2890 | /* | |
2891 | * CMD_SET_POST_SCAN. | |
2892 | */ | |
2893 | struct mwl8k_cmd_set_post_scan { | |
2894 | struct mwl8k_cmd_pkt header; | |
2895 | __le32 isibss; | |
d89173f2 | 2896 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2897 | } __packed; |
a66098da LB |
2898 | |
2899 | static int | |
0a11dfc3 | 2900 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2901 | { |
2902 | struct mwl8k_cmd_set_post_scan *cmd; | |
2903 | int rc; | |
2904 | ||
2905 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2906 | if (cmd == NULL) | |
2907 | return -ENOMEM; | |
2908 | ||
2909 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2910 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2911 | cmd->isibss = 0; | |
d89173f2 | 2912 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2913 | |
2914 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2915 | kfree(cmd); | |
2916 | ||
2917 | return rc; | |
2918 | } | |
2919 | ||
2920 | /* | |
2921 | * CMD_SET_RF_CHANNEL. | |
2922 | */ | |
2923 | struct mwl8k_cmd_set_rf_channel { | |
2924 | struct mwl8k_cmd_pkt header; | |
2925 | __le16 action; | |
2926 | __u8 current_channel; | |
2927 | __le32 channel_flags; | |
ba2d3587 | 2928 | } __packed; |
a66098da LB |
2929 | |
2930 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2931 | struct ieee80211_conf *conf) |
a66098da | 2932 | { |
610677d2 | 2933 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2934 | struct mwl8k_cmd_set_rf_channel *cmd; |
2935 | int rc; | |
2936 | ||
2937 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2938 | if (cmd == NULL) | |
2939 | return -ENOMEM; | |
2940 | ||
2941 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2942 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2943 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2944 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2945 | |
a66098da | 2946 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2947 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2948 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2949 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
2950 | |
2951 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2952 | conf->channel_type == NL80211_CHAN_HT20) | |
2953 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
2954 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2955 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
2956 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2957 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
2958 | |
2959 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2960 | kfree(cmd); | |
2961 | ||
2962 | return rc; | |
2963 | } | |
2964 | ||
2965 | /* | |
55489b6e | 2966 | * CMD_SET_AID. |
a66098da | 2967 | */ |
55489b6e LB |
2968 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2969 | #define MWL8K_FRAME_PROT_11G 0x07 | |
2970 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
2971 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 2972 | |
55489b6e LB |
2973 | struct mwl8k_cmd_update_set_aid { |
2974 | struct mwl8k_cmd_pkt header; | |
2975 | __le16 aid; | |
a66098da | 2976 | |
55489b6e LB |
2977 | /* AP's MAC address (BSSID) */ |
2978 | __u8 bssid[ETH_ALEN]; | |
2979 | __le16 protection_mode; | |
2980 | __u8 supp_rates[14]; | |
ba2d3587 | 2981 | } __packed; |
a66098da | 2982 | |
c6e96010 LB |
2983 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2984 | { | |
2985 | int i; | |
2986 | int j; | |
2987 | ||
2988 | /* | |
2989 | * Clear nonstandard rates 4 and 13. | |
2990 | */ | |
2991 | mask &= 0x1fef; | |
2992 | ||
2993 | for (i = 0, j = 0; i < 14; i++) { | |
2994 | if (mask & (1 << i)) | |
777ad375 | 2995 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
2996 | } |
2997 | } | |
2998 | ||
55489b6e | 2999 | static int |
c6e96010 LB |
3000 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
3001 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 3002 | { |
55489b6e LB |
3003 | struct mwl8k_cmd_update_set_aid *cmd; |
3004 | u16 prot_mode; | |
a66098da LB |
3005 | int rc; |
3006 | ||
3007 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3008 | if (cmd == NULL) | |
3009 | return -ENOMEM; | |
3010 | ||
55489b6e | 3011 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 3012 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 3013 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 3014 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3015 | |
7dc6a7a7 | 3016 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
3017 | prot_mode = MWL8K_FRAME_PROT_11G; |
3018 | } else { | |
7dc6a7a7 | 3019 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
3020 | IEEE80211_HT_OP_MODE_PROTECTION) { |
3021 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
3022 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
3023 | break; | |
3024 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
3025 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
3026 | break; | |
3027 | default: | |
3028 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
3029 | break; | |
3030 | } | |
3031 | } | |
3032 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 3033 | |
c6e96010 | 3034 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
3035 | |
3036 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3037 | kfree(cmd); | |
3038 | ||
3039 | return rc; | |
3040 | } | |
3041 | ||
32060e1b | 3042 | /* |
55489b6e | 3043 | * CMD_SET_RATE. |
32060e1b | 3044 | */ |
55489b6e LB |
3045 | struct mwl8k_cmd_set_rate { |
3046 | struct mwl8k_cmd_pkt header; | |
3047 | __u8 legacy_rates[14]; | |
3048 | ||
3049 | /* Bitmap for supported MCS codes. */ | |
3050 | __u8 mcs_set[16]; | |
3051 | __u8 reserved[16]; | |
ba2d3587 | 3052 | } __packed; |
32060e1b | 3053 | |
55489b6e | 3054 | static int |
c6e96010 | 3055 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 3056 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 3057 | { |
55489b6e | 3058 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
3059 | int rc; |
3060 | ||
3061 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3062 | if (cmd == NULL) | |
3063 | return -ENOMEM; | |
3064 | ||
55489b6e | 3065 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 3066 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 3067 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 3068 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
3069 | |
3070 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3071 | kfree(cmd); | |
3072 | ||
3073 | return rc; | |
3074 | } | |
3075 | ||
a66098da | 3076 | /* |
55489b6e | 3077 | * CMD_FINALIZE_JOIN. |
a66098da | 3078 | */ |
55489b6e LB |
3079 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
3080 | ||
3081 | struct mwl8k_cmd_finalize_join { | |
a66098da | 3082 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
3083 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
3084 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 3085 | } __packed; |
a66098da | 3086 | |
55489b6e LB |
3087 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
3088 | int framelen, int dtim) | |
a66098da | 3089 | { |
55489b6e LB |
3090 | struct mwl8k_cmd_finalize_join *cmd; |
3091 | struct ieee80211_mgmt *payload = frame; | |
3092 | int payload_len; | |
a66098da LB |
3093 | int rc; |
3094 | ||
3095 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3096 | if (cmd == NULL) | |
3097 | return -ENOMEM; | |
3098 | ||
55489b6e | 3099 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 3100 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3101 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
3102 | ||
3103 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
3104 | if (payload_len < 0) | |
3105 | payload_len = 0; | |
3106 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
3107 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
3108 | ||
3109 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
3110 | |
3111 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3112 | kfree(cmd); | |
3113 | ||
3114 | return rc; | |
3115 | } | |
3116 | ||
3117 | /* | |
55489b6e | 3118 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 3119 | */ |
55489b6e | 3120 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
3121 | struct mwl8k_cmd_pkt header; |
3122 | __le16 action; | |
55489b6e | 3123 | __le16 threshold; |
ba2d3587 | 3124 | } __packed; |
a66098da | 3125 | |
c2c2b12a LB |
3126 | static int |
3127 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 3128 | { |
55489b6e | 3129 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
3130 | int rc; |
3131 | ||
3132 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3133 | if (cmd == NULL) | |
3134 | return -ENOMEM; | |
3135 | ||
55489b6e | 3136 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 3137 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
3138 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3139 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
3140 | |
3141 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3142 | kfree(cmd); | |
3143 | ||
a66098da LB |
3144 | return rc; |
3145 | } | |
3146 | ||
3147 | /* | |
55489b6e | 3148 | * CMD_SET_SLOT. |
a66098da | 3149 | */ |
55489b6e | 3150 | struct mwl8k_cmd_set_slot { |
a66098da LB |
3151 | struct mwl8k_cmd_pkt header; |
3152 | __le16 action; | |
55489b6e | 3153 | __u8 short_slot; |
ba2d3587 | 3154 | } __packed; |
a66098da | 3155 | |
55489b6e | 3156 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 3157 | { |
55489b6e | 3158 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
3159 | int rc; |
3160 | ||
3161 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3162 | if (cmd == NULL) | |
3163 | return -ENOMEM; | |
3164 | ||
55489b6e | 3165 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 3166 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3167 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3168 | cmd->short_slot = short_slot_time; | |
a66098da LB |
3169 | |
3170 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3171 | kfree(cmd); | |
3172 | ||
3173 | return rc; | |
3174 | } | |
3175 | ||
3176 | /* | |
3177 | * CMD_SET_EDCA_PARAMS. | |
3178 | */ | |
3179 | struct mwl8k_cmd_set_edca_params { | |
3180 | struct mwl8k_cmd_pkt header; | |
3181 | ||
3182 | /* See MWL8K_SET_EDCA_XXX below */ | |
3183 | __le16 action; | |
3184 | ||
3185 | /* TX opportunity in units of 32 us */ | |
3186 | __le16 txop; | |
3187 | ||
2e484c89 LB |
3188 | union { |
3189 | struct { | |
3190 | /* Log exponent of max contention period: 0...15 */ | |
3191 | __le32 log_cw_max; | |
3192 | ||
3193 | /* Log exponent of min contention period: 0...15 */ | |
3194 | __le32 log_cw_min; | |
3195 | ||
3196 | /* Adaptive interframe spacing in units of 32us */ | |
3197 | __u8 aifs; | |
3198 | ||
3199 | /* TX queue to configure */ | |
3200 | __u8 txq; | |
3201 | } ap; | |
3202 | struct { | |
3203 | /* Log exponent of max contention period: 0...15 */ | |
3204 | __u8 log_cw_max; | |
a66098da | 3205 | |
2e484c89 LB |
3206 | /* Log exponent of min contention period: 0...15 */ |
3207 | __u8 log_cw_min; | |
a66098da | 3208 | |
2e484c89 LB |
3209 | /* Adaptive interframe spacing in units of 32us */ |
3210 | __u8 aifs; | |
a66098da | 3211 | |
2e484c89 LB |
3212 | /* TX queue to configure */ |
3213 | __u8 txq; | |
3214 | } sta; | |
3215 | }; | |
ba2d3587 | 3216 | } __packed; |
a66098da | 3217 | |
a66098da LB |
3218 | #define MWL8K_SET_EDCA_CW 0x01 |
3219 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3220 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3221 | ||
3222 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3223 | MWL8K_SET_EDCA_TXOP | \ | |
3224 | MWL8K_SET_EDCA_AIFS) | |
3225 | ||
3226 | static int | |
55489b6e LB |
3227 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3228 | __u16 cw_min, __u16 cw_max, | |
3229 | __u8 aifs, __u16 txop) | |
a66098da | 3230 | { |
2e484c89 | 3231 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3232 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3233 | int rc; |
3234 | ||
3235 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3236 | if (cmd == NULL) | |
3237 | return -ENOMEM; | |
3238 | ||
a66098da LB |
3239 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3240 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3241 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3242 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3243 | if (priv->ap_fw) { |
3244 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3245 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3246 | cmd->ap.aifs = aifs; | |
3247 | cmd->ap.txq = qnum; | |
3248 | } else { | |
3249 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3250 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3251 | cmd->sta.aifs = aifs; | |
3252 | cmd->sta.txq = qnum; | |
3253 | } | |
a66098da LB |
3254 | |
3255 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3256 | kfree(cmd); | |
3257 | ||
3258 | return rc; | |
3259 | } | |
3260 | ||
3261 | /* | |
55489b6e | 3262 | * CMD_SET_WMM_MODE. |
a66098da | 3263 | */ |
55489b6e | 3264 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3265 | struct mwl8k_cmd_pkt header; |
55489b6e | 3266 | __le16 action; |
ba2d3587 | 3267 | } __packed; |
a66098da | 3268 | |
55489b6e | 3269 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3270 | { |
55489b6e LB |
3271 | struct mwl8k_priv *priv = hw->priv; |
3272 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3273 | int rc; |
3274 | ||
a66098da LB |
3275 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3276 | if (cmd == NULL) | |
3277 | return -ENOMEM; | |
3278 | ||
55489b6e | 3279 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3280 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3281 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3282 | |
3283 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3284 | kfree(cmd); | |
16cec43d | 3285 | |
55489b6e LB |
3286 | if (!rc) |
3287 | priv->wmm_enabled = enable; | |
a66098da LB |
3288 | |
3289 | return rc; | |
3290 | } | |
3291 | ||
3292 | /* | |
55489b6e | 3293 | * CMD_MIMO_CONFIG. |
a66098da | 3294 | */ |
55489b6e LB |
3295 | struct mwl8k_cmd_mimo_config { |
3296 | struct mwl8k_cmd_pkt header; | |
3297 | __le32 action; | |
3298 | __u8 rx_antenna_map; | |
3299 | __u8 tx_antenna_map; | |
ba2d3587 | 3300 | } __packed; |
a66098da | 3301 | |
55489b6e | 3302 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3303 | { |
55489b6e | 3304 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3305 | int rc; |
3306 | ||
3307 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3308 | if (cmd == NULL) | |
3309 | return -ENOMEM; | |
3310 | ||
55489b6e | 3311 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3312 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3313 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3314 | cmd->rx_antenna_map = rx; | |
3315 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3316 | |
3317 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3318 | kfree(cmd); | |
3319 | ||
3320 | return rc; | |
3321 | } | |
3322 | ||
3323 | /* | |
b71ed2c6 | 3324 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3325 | */ |
b71ed2c6 LB |
3326 | struct mwl8k_cmd_use_fixed_rate_sta { |
3327 | struct mwl8k_cmd_pkt header; | |
3328 | __le32 action; | |
3329 | __le32 allow_rate_drop; | |
3330 | __le32 num_rates; | |
3331 | struct { | |
3332 | __le32 is_ht_rate; | |
3333 | __le32 enable_retry; | |
3334 | __le32 rate; | |
3335 | __le32 retry_count; | |
3336 | } rate_entry[8]; | |
3337 | __le32 rate_type; | |
3338 | __le32 reserved1; | |
3339 | __le32 reserved2; | |
ba2d3587 | 3340 | } __packed; |
a66098da | 3341 | |
b71ed2c6 LB |
3342 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3343 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3344 | |
b71ed2c6 | 3345 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3346 | { |
b71ed2c6 | 3347 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3348 | int rc; |
3349 | ||
3350 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3351 | if (cmd == NULL) | |
3352 | return -ENOMEM; | |
3353 | ||
3354 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3355 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3356 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3357 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3358 | |
3359 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3360 | kfree(cmd); | |
3361 | ||
3362 | return rc; | |
3363 | } | |
3364 | ||
088aab8b LB |
3365 | /* |
3366 | * CMD_USE_FIXED_RATE (AP version). | |
3367 | */ | |
3368 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3369 | struct mwl8k_cmd_pkt header; | |
3370 | __le32 action; | |
3371 | __le32 allow_rate_drop; | |
3372 | __le32 num_rates; | |
3373 | struct mwl8k_rate_entry_ap { | |
3374 | __le32 is_ht_rate; | |
3375 | __le32 enable_retry; | |
3376 | __le32 rate; | |
3377 | __le32 retry_count; | |
3378 | } rate_entry[4]; | |
3379 | u8 multicast_rate; | |
3380 | u8 multicast_rate_type; | |
3381 | u8 management_rate; | |
ba2d3587 | 3382 | } __packed; |
088aab8b LB |
3383 | |
3384 | static int | |
3385 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3386 | { | |
3387 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3388 | int rc; | |
3389 | ||
3390 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3391 | if (cmd == NULL) | |
3392 | return -ENOMEM; | |
3393 | ||
3394 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3395 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3396 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3397 | cmd->multicast_rate = mcast; | |
3398 | cmd->management_rate = mgmt; | |
3399 | ||
3400 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3401 | kfree(cmd); | |
3402 | ||
3403 | return rc; | |
3404 | } | |
3405 | ||
55489b6e LB |
3406 | /* |
3407 | * CMD_ENABLE_SNIFFER. | |
3408 | */ | |
3409 | struct mwl8k_cmd_enable_sniffer { | |
3410 | struct mwl8k_cmd_pkt header; | |
3411 | __le32 action; | |
ba2d3587 | 3412 | } __packed; |
55489b6e LB |
3413 | |
3414 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3415 | { | |
3416 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3417 | int rc; | |
3418 | ||
3419 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3420 | if (cmd == NULL) | |
3421 | return -ENOMEM; | |
3422 | ||
3423 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3424 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3425 | cmd->action = cpu_to_le32(!!enable); | |
3426 | ||
3427 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3428 | kfree(cmd); | |
3429 | ||
3430 | return rc; | |
3431 | } | |
3432 | ||
197a4e4e | 3433 | struct mwl8k_cmd_update_mac_addr { |
55489b6e LB |
3434 | struct mwl8k_cmd_pkt header; |
3435 | union { | |
3436 | struct { | |
3437 | __le16 mac_type; | |
3438 | __u8 mac_addr[ETH_ALEN]; | |
3439 | } mbss; | |
3440 | __u8 mac_addr[ETH_ALEN]; | |
3441 | }; | |
ba2d3587 | 3442 | } __packed; |
55489b6e | 3443 | |
ee0ddf18 LB |
3444 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3445 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3446 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3447 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3448 | |
197a4e4e YAP |
3449 | static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw, |
3450 | struct ieee80211_vif *vif, u8 *mac, bool set) | |
55489b6e LB |
3451 | { |
3452 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3453 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
197a4e4e | 3454 | struct mwl8k_cmd_update_mac_addr *cmd; |
ee0ddf18 | 3455 | int mac_type; |
55489b6e LB |
3456 | int rc; |
3457 | ||
ee0ddf18 LB |
3458 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3459 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3460 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
3461 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
3462 | else | |
3463 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3464 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3465 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3466 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3467 | else | |
3468 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3469 | } | |
3470 | ||
55489b6e LB |
3471 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3472 | if (cmd == NULL) | |
3473 | return -ENOMEM; | |
3474 | ||
197a4e4e YAP |
3475 | if (set) |
3476 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3477 | else | |
3478 | cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR); | |
3479 | ||
55489b6e LB |
3480 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
3481 | if (priv->ap_fw) { | |
ee0ddf18 | 3482 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3483 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3484 | } else { | |
3485 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3486 | } | |
3487 | ||
aa21d0f6 | 3488 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3489 | kfree(cmd); |
3490 | ||
3491 | return rc; | |
3492 | } | |
3493 | ||
197a4e4e YAP |
3494 | /* |
3495 | * MWL8K_CMD_SET_MAC_ADDR. | |
3496 | */ | |
3497 | static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, | |
3498 | struct ieee80211_vif *vif, u8 *mac) | |
3499 | { | |
3500 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, true); | |
3501 | } | |
3502 | ||
3503 | /* | |
3504 | * MWL8K_CMD_DEL_MAC_ADDR. | |
3505 | */ | |
3506 | static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw, | |
3507 | struct ieee80211_vif *vif, u8 *mac) | |
3508 | { | |
3509 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, false); | |
3510 | } | |
3511 | ||
55489b6e LB |
3512 | /* |
3513 | * CMD_SET_RATEADAPT_MODE. | |
3514 | */ | |
3515 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3516 | struct mwl8k_cmd_pkt header; | |
3517 | __le16 action; | |
3518 | __le16 mode; | |
ba2d3587 | 3519 | } __packed; |
55489b6e LB |
3520 | |
3521 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3522 | { | |
3523 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3524 | int rc; | |
3525 | ||
3526 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3527 | if (cmd == NULL) | |
3528 | return -ENOMEM; | |
3529 | ||
3530 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3531 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3532 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3533 | cmd->mode = cpu_to_le16(mode); | |
3534 | ||
3535 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3536 | kfree(cmd); | |
3537 | ||
3538 | return rc; | |
3539 | } | |
3540 | ||
3aefc37e NS |
3541 | /* |
3542 | * CMD_GET_WATCHDOG_BITMAP. | |
3543 | */ | |
3544 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3545 | struct mwl8k_cmd_pkt header; | |
3546 | u8 bitmap; | |
3547 | } __packed; | |
3548 | ||
3549 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3550 | { | |
3551 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3552 | int rc; | |
3553 | ||
3554 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3555 | if (cmd == NULL) | |
3556 | return -ENOMEM; | |
3557 | ||
3558 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3559 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3560 | ||
3561 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3562 | if (!rc) | |
3563 | *bitmap = cmd->bitmap; | |
3564 | ||
3565 | kfree(cmd); | |
3566 | ||
3567 | return rc; | |
3568 | } | |
3569 | ||
3570 | #define INVALID_BA 0xAA | |
3571 | static void mwl8k_watchdog_ba_events(struct work_struct *work) | |
3572 | { | |
3573 | int rc; | |
3574 | u8 bitmap = 0, stream_index; | |
3575 | struct mwl8k_ampdu_stream *streams; | |
3576 | struct mwl8k_priv *priv = | |
3577 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
3578 | ||
3579 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3580 | if (rc) | |
3581 | return; | |
3582 | ||
3583 | if (bitmap == INVALID_BA) | |
3584 | return; | |
3585 | ||
3586 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
3587 | stream_index = bitmap - MWL8K_TX_WMM_QUEUES; | |
3588 | ||
3589 | BUG_ON(stream_index >= priv->num_ampdu_queues); | |
3590 | ||
3591 | streams = &priv->ampdu[stream_index]; | |
3592 | ||
3593 | if (streams->state == AMPDU_STREAM_ACTIVE) | |
3594 | ieee80211_stop_tx_ba_session(streams->sta, streams->tid); | |
3595 | ||
3596 | return; | |
3597 | } | |
3598 | ||
3599 | ||
b64fe619 LB |
3600 | /* |
3601 | * CMD_BSS_START. | |
3602 | */ | |
3603 | struct mwl8k_cmd_bss_start { | |
3604 | struct mwl8k_cmd_pkt header; | |
3605 | __le32 enable; | |
ba2d3587 | 3606 | } __packed; |
b64fe619 | 3607 | |
aa21d0f6 LB |
3608 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3609 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3610 | { |
3611 | struct mwl8k_cmd_bss_start *cmd; | |
3612 | int rc; | |
3613 | ||
3614 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3615 | if (cmd == NULL) | |
3616 | return -ENOMEM; | |
3617 | ||
3618 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3619 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3620 | cmd->enable = cpu_to_le32(enable); | |
3621 | ||
aa21d0f6 | 3622 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3623 | kfree(cmd); |
3624 | ||
3625 | return rc; | |
3626 | } | |
3627 | ||
5faa1aff NS |
3628 | /* |
3629 | * CMD_BASTREAM. | |
3630 | */ | |
3631 | ||
3632 | /* | |
3633 | * UPSTREAM is tx direction | |
3634 | */ | |
3635 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3636 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3637 | ||
ba30c4a5 | 3638 | enum ba_stream_action_type { |
5faa1aff NS |
3639 | MWL8K_BA_CREATE, |
3640 | MWL8K_BA_UPDATE, | |
3641 | MWL8K_BA_DESTROY, | |
3642 | MWL8K_BA_FLUSH, | |
3643 | MWL8K_BA_CHECK, | |
ba30c4a5 | 3644 | }; |
5faa1aff NS |
3645 | |
3646 | ||
3647 | struct mwl8k_create_ba_stream { | |
3648 | __le32 flags; | |
3649 | __le32 idle_thrs; | |
3650 | __le32 bar_thrs; | |
3651 | __le32 window_size; | |
3652 | u8 peer_mac_addr[6]; | |
3653 | u8 dialog_token; | |
3654 | u8 tid; | |
3655 | u8 queue_id; | |
3656 | u8 param_info; | |
3657 | __le32 ba_context; | |
3658 | u8 reset_seq_no_flag; | |
3659 | __le16 curr_seq_no; | |
3660 | u8 sta_src_mac_addr[6]; | |
3661 | } __packed; | |
3662 | ||
3663 | struct mwl8k_destroy_ba_stream { | |
3664 | __le32 flags; | |
3665 | __le32 ba_context; | |
3666 | } __packed; | |
3667 | ||
3668 | struct mwl8k_cmd_bastream { | |
3669 | struct mwl8k_cmd_pkt header; | |
3670 | __le32 action; | |
3671 | union { | |
3672 | struct mwl8k_create_ba_stream create_params; | |
3673 | struct mwl8k_destroy_ba_stream destroy_params; | |
3674 | }; | |
3675 | } __packed; | |
3676 | ||
3677 | static int | |
3678 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
3679 | { | |
3680 | struct mwl8k_cmd_bastream *cmd; | |
3681 | int rc; | |
3682 | ||
3683 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3684 | if (cmd == NULL) | |
3685 | return -ENOMEM; | |
3686 | ||
3687 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3688 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3689 | ||
3690 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3691 | ||
3692 | cmd->create_params.queue_id = stream->idx; | |
3693 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3694 | ETH_ALEN); | |
3695 | cmd->create_params.tid = stream->tid; | |
3696 | ||
3697 | cmd->create_params.flags = | |
3698 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3699 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3700 | ||
3701 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3702 | ||
3703 | kfree(cmd); | |
3704 | ||
3705 | return rc; | |
3706 | } | |
3707 | ||
3708 | static int | |
3709 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
3710 | u8 buf_size) | |
3711 | { | |
3712 | struct mwl8k_cmd_bastream *cmd; | |
3713 | int rc; | |
3714 | ||
3715 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3716 | if (cmd == NULL) | |
3717 | return -ENOMEM; | |
3718 | ||
3719 | ||
3720 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3721 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3722 | ||
3723 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3724 | ||
3725 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3726 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3727 | cmd->create_params.queue_id = stream->idx; | |
3728 | ||
3729 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3730 | cmd->create_params.tid = stream->tid; | |
3731 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3732 | cmd->create_params.reset_seq_no_flag = 1; | |
3733 | ||
3734 | cmd->create_params.param_info = | |
3735 | (stream->sta->ht_cap.ampdu_factor & | |
3736 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3737 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3738 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3739 | ||
3740 | cmd->create_params.flags = | |
3741 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3742 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3743 | ||
3744 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3745 | ||
3746 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3747 | stream->sta->addr, stream->tid); | |
3748 | kfree(cmd); | |
3749 | ||
3750 | return rc; | |
3751 | } | |
3752 | ||
3753 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3754 | struct mwl8k_ampdu_stream *stream) | |
3755 | { | |
3756 | struct mwl8k_cmd_bastream *cmd; | |
3757 | ||
3758 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3759 | if (cmd == NULL) | |
3760 | return; | |
3761 | ||
3762 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3763 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3764 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3765 | ||
3766 | cmd->destroy_params.ba_context = cpu_to_le32(stream->idx); | |
3767 | mwl8k_post_cmd(hw, &cmd->header); | |
3768 | ||
3769 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx); | |
3770 | ||
3771 | kfree(cmd); | |
3772 | } | |
3773 | ||
3f5610ff LB |
3774 | /* |
3775 | * CMD_SET_NEW_STN. | |
3776 | */ | |
3777 | struct mwl8k_cmd_set_new_stn { | |
3778 | struct mwl8k_cmd_pkt header; | |
3779 | __le16 aid; | |
3780 | __u8 mac_addr[6]; | |
3781 | __le16 stn_id; | |
3782 | __le16 action; | |
3783 | __le16 rsvd; | |
3784 | __le32 legacy_rates; | |
3785 | __u8 ht_rates[4]; | |
3786 | __le16 cap_info; | |
3787 | __le16 ht_capabilities_info; | |
3788 | __u8 mac_ht_param_info; | |
3789 | __u8 rev; | |
3790 | __u8 control_channel; | |
3791 | __u8 add_channel; | |
3792 | __le16 op_mode; | |
3793 | __le16 stbc; | |
3794 | __u8 add_qos_info; | |
3795 | __u8 is_qos_sta; | |
3796 | __le32 fw_sta_ptr; | |
ba2d3587 | 3797 | } __packed; |
3f5610ff LB |
3798 | |
3799 | #define MWL8K_STA_ACTION_ADD 0 | |
3800 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3801 | ||
3802 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3803 | struct ieee80211_vif *vif, | |
3804 | struct ieee80211_sta *sta) | |
3805 | { | |
3806 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3807 | u32 rates; |
3f5610ff LB |
3808 | int rc; |
3809 | ||
3810 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3811 | if (cmd == NULL) | |
3812 | return -ENOMEM; | |
3813 | ||
3814 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3815 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3816 | cmd->aid = cpu_to_le16(sta->aid); | |
3817 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3818 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3819 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3820 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3821 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3822 | else | |
3823 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3824 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3825 | if (sta->ht_cap.ht_supported) { |
3826 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3827 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3828 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3829 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3830 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3831 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3832 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3833 | cmd->is_qos_sta = 1; | |
3834 | } | |
3835 | ||
aa21d0f6 | 3836 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3837 | kfree(cmd); |
3838 | ||
3839 | return rc; | |
3840 | } | |
3841 | ||
b64fe619 LB |
3842 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3843 | struct ieee80211_vif *vif) | |
3844 | { | |
3845 | struct mwl8k_cmd_set_new_stn *cmd; | |
3846 | int rc; | |
3847 | ||
3848 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3849 | if (cmd == NULL) | |
3850 | return -ENOMEM; | |
3851 | ||
3852 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3853 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3854 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3855 | ||
aa21d0f6 | 3856 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3857 | kfree(cmd); |
3858 | ||
3859 | return rc; | |
3860 | } | |
3861 | ||
3f5610ff LB |
3862 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3863 | struct ieee80211_vif *vif, u8 *addr) | |
3864 | { | |
3865 | struct mwl8k_cmd_set_new_stn *cmd; | |
3866 | int rc; | |
3867 | ||
3868 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3869 | if (cmd == NULL) | |
3870 | return -ENOMEM; | |
3871 | ||
3872 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3873 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3874 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3875 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
3876 | ||
aa21d0f6 | 3877 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3878 | kfree(cmd); |
3879 | ||
3880 | return rc; | |
3881 | } | |
3882 | ||
fcdc403c NS |
3883 | /* |
3884 | * CMD_UPDATE_ENCRYPTION. | |
3885 | */ | |
3886 | ||
3887 | #define MAX_ENCR_KEY_LENGTH 16 | |
3888 | #define MIC_KEY_LENGTH 8 | |
3889 | ||
3890 | struct mwl8k_cmd_update_encryption { | |
3891 | struct mwl8k_cmd_pkt header; | |
3892 | ||
3893 | __le32 action; | |
3894 | __le32 reserved; | |
3895 | __u8 mac_addr[6]; | |
3896 | __u8 encr_type; | |
3897 | ||
ba30c4a5 | 3898 | } __packed; |
fcdc403c NS |
3899 | |
3900 | struct mwl8k_cmd_set_key { | |
3901 | struct mwl8k_cmd_pkt header; | |
3902 | ||
3903 | __le32 action; | |
3904 | __le32 reserved; | |
3905 | __le16 length; | |
3906 | __le16 key_type_id; | |
3907 | __le32 key_info; | |
3908 | __le32 key_id; | |
3909 | __le16 key_len; | |
3910 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
3911 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
3912 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
3913 | __le16 tkip_rsc_low; | |
3914 | __le32 tkip_rsc_high; | |
3915 | __le16 tkip_tsc_low; | |
3916 | __le32 tkip_tsc_high; | |
3917 | __u8 mac_addr[6]; | |
ba30c4a5 | 3918 | } __packed; |
fcdc403c NS |
3919 | |
3920 | enum { | |
3921 | MWL8K_ENCR_ENABLE, | |
3922 | MWL8K_ENCR_SET_KEY, | |
3923 | MWL8K_ENCR_REMOVE_KEY, | |
3924 | MWL8K_ENCR_SET_GROUP_KEY, | |
3925 | }; | |
3926 | ||
3927 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
3928 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
3929 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
3930 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
3931 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
3932 | ||
3933 | enum { | |
3934 | MWL8K_ALG_WEP, | |
3935 | MWL8K_ALG_TKIP, | |
3936 | MWL8K_ALG_CCMP, | |
3937 | }; | |
3938 | ||
3939 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
3940 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
3941 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
3942 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
3943 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
3944 | ||
3945 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
3946 | struct ieee80211_vif *vif, | |
3947 | u8 *addr, | |
3948 | u8 encr_type) | |
3949 | { | |
3950 | struct mwl8k_cmd_update_encryption *cmd; | |
3951 | int rc; | |
3952 | ||
3953 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3954 | if (cmd == NULL) | |
3955 | return -ENOMEM; | |
3956 | ||
3957 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3958 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3959 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
3960 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3961 | cmd->encr_type = encr_type; | |
3962 | ||
3963 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3964 | kfree(cmd); | |
3965 | ||
3966 | return rc; | |
3967 | } | |
3968 | ||
3969 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
3970 | u8 *addr, | |
3971 | struct ieee80211_key_conf *key) | |
3972 | { | |
3973 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3974 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3975 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
3976 | offsetof(struct mwl8k_cmd_set_key, length)); | |
3977 | cmd->key_id = cpu_to_le32(key->keyidx); | |
3978 | cmd->key_len = cpu_to_le16(key->keylen); | |
3979 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3980 | ||
3981 | switch (key->cipher) { | |
3982 | case WLAN_CIPHER_SUITE_WEP40: | |
3983 | case WLAN_CIPHER_SUITE_WEP104: | |
3984 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
3985 | if (key->keyidx == 0) | |
3986 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
3987 | ||
3988 | break; | |
3989 | case WLAN_CIPHER_SUITE_TKIP: | |
3990 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
3991 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3992 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3993 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3994 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
3995 | | MWL8K_KEY_FLAG_TSC_VALID); | |
3996 | break; | |
3997 | case WLAN_CIPHER_SUITE_CCMP: | |
3998 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
3999 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4000 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4001 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4002 | break; | |
4003 | default: | |
4004 | return -ENOTSUPP; | |
4005 | } | |
4006 | ||
4007 | return 0; | |
4008 | } | |
4009 | ||
4010 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
4011 | struct ieee80211_vif *vif, | |
4012 | u8 *addr, | |
4013 | struct ieee80211_key_conf *key) | |
4014 | { | |
4015 | struct mwl8k_cmd_set_key *cmd; | |
4016 | int rc; | |
4017 | int keymlen; | |
4018 | u32 action; | |
4019 | u8 idx; | |
4020 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4021 | ||
4022 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4023 | if (cmd == NULL) | |
4024 | return -ENOMEM; | |
4025 | ||
4026 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4027 | if (rc < 0) | |
4028 | goto done; | |
4029 | ||
4030 | idx = key->keyidx; | |
4031 | ||
4032 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4033 | action = MWL8K_ENCR_SET_KEY; | |
4034 | else | |
4035 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
4036 | ||
4037 | switch (key->cipher) { | |
4038 | case WLAN_CIPHER_SUITE_WEP40: | |
4039 | case WLAN_CIPHER_SUITE_WEP104: | |
4040 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
4041 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
4042 | sizeof(*key) + key->keylen); | |
4043 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
4044 | } | |
4045 | ||
9b571e24 | 4046 | keymlen = key->keylen; |
fcdc403c NS |
4047 | action = MWL8K_ENCR_SET_KEY; |
4048 | break; | |
4049 | case WLAN_CIPHER_SUITE_TKIP: | |
4050 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
4051 | break; | |
4052 | case WLAN_CIPHER_SUITE_CCMP: | |
4053 | keymlen = key->keylen; | |
4054 | break; | |
4055 | default: | |
4056 | rc = -ENOTSUPP; | |
4057 | goto done; | |
4058 | } | |
4059 | ||
4060 | memcpy(cmd->key_material, key->key, keymlen); | |
4061 | cmd->action = cpu_to_le32(action); | |
4062 | ||
4063 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4064 | done: | |
4065 | kfree(cmd); | |
4066 | ||
4067 | return rc; | |
4068 | } | |
4069 | ||
4070 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
4071 | struct ieee80211_vif *vif, | |
4072 | u8 *addr, | |
4073 | struct ieee80211_key_conf *key) | |
4074 | { | |
4075 | struct mwl8k_cmd_set_key *cmd; | |
4076 | int rc; | |
4077 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4078 | ||
4079 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4080 | if (cmd == NULL) | |
4081 | return -ENOMEM; | |
4082 | ||
4083 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4084 | if (rc < 0) | |
4085 | goto done; | |
4086 | ||
4087 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
d981e059 | 4088 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
fcdc403c NS |
4089 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; |
4090 | ||
4091 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
4092 | ||
4093 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4094 | done: | |
4095 | kfree(cmd); | |
4096 | ||
4097 | return rc; | |
4098 | } | |
4099 | ||
4100 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
4101 | enum set_key_cmd cmd_param, | |
4102 | struct ieee80211_vif *vif, | |
4103 | struct ieee80211_sta *sta, | |
4104 | struct ieee80211_key_conf *key) | |
4105 | { | |
4106 | int rc = 0; | |
4107 | u8 encr_type; | |
4108 | u8 *addr; | |
4109 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4110 | ||
4111 | if (vif->type == NL80211_IFTYPE_STATION) | |
4112 | return -EOPNOTSUPP; | |
4113 | ||
4114 | if (sta == NULL) | |
ff7e9f99 | 4115 | addr = vif->addr; |
fcdc403c NS |
4116 | else |
4117 | addr = sta->addr; | |
4118 | ||
4119 | if (cmd_param == SET_KEY) { | |
fcdc403c NS |
4120 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); |
4121 | if (rc) | |
4122 | goto out; | |
4123 | ||
4124 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
4125 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
4126 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
4127 | else | |
4128 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
4129 | ||
4130 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
4131 | encr_type); | |
4132 | if (rc) | |
4133 | goto out; | |
4134 | ||
4135 | mwl8k_vif->is_hw_crypto_enabled = true; | |
4136 | ||
4137 | } else { | |
4138 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
4139 | ||
4140 | if (rc) | |
4141 | goto out; | |
fcdc403c NS |
4142 | } |
4143 | out: | |
4144 | return rc; | |
4145 | } | |
4146 | ||
55489b6e LB |
4147 | /* |
4148 | * CMD_UPDATE_STADB. | |
4149 | */ | |
25d81b1e LB |
4150 | struct ewc_ht_info { |
4151 | __le16 control1; | |
4152 | __le16 control2; | |
4153 | __le16 control3; | |
ba2d3587 | 4154 | } __packed; |
25d81b1e LB |
4155 | |
4156 | struct peer_capability_info { | |
4157 | /* Peer type - AP vs. STA. */ | |
4158 | __u8 peer_type; | |
4159 | ||
4160 | /* Basic 802.11 capabilities from assoc resp. */ | |
4161 | __le16 basic_caps; | |
4162 | ||
4163 | /* Set if peer supports 802.11n high throughput (HT). */ | |
4164 | __u8 ht_support; | |
4165 | ||
4166 | /* Valid if HT is supported. */ | |
4167 | __le16 ht_caps; | |
4168 | __u8 extended_ht_caps; | |
4169 | struct ewc_ht_info ewc_info; | |
4170 | ||
4171 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
4172 | __u8 legacy_rates[12]; | |
4173 | ||
4174 | /* HT rate table. Intersection of our rates and peer rates. */ | |
4175 | __u8 ht_rates[16]; | |
4176 | __u8 pad[16]; | |
4177 | ||
4178 | /* If set, interoperability mode, no proprietary extensions. */ | |
4179 | __u8 interop; | |
4180 | __u8 pad2; | |
4181 | __u8 station_id; | |
4182 | __le16 amsdu_enabled; | |
ba2d3587 | 4183 | } __packed; |
25d81b1e | 4184 | |
55489b6e LB |
4185 | struct mwl8k_cmd_update_stadb { |
4186 | struct mwl8k_cmd_pkt header; | |
4187 | ||
4188 | /* See STADB_ACTION_TYPE */ | |
4189 | __le32 action; | |
4190 | ||
4191 | /* Peer MAC address */ | |
4192 | __u8 peer_addr[ETH_ALEN]; | |
4193 | ||
4194 | __le32 reserved; | |
4195 | ||
4196 | /* Peer info - valid during add/update. */ | |
4197 | struct peer_capability_info peer_info; | |
ba2d3587 | 4198 | } __packed; |
55489b6e | 4199 | |
a680400e LB |
4200 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
4201 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
4202 | ||
4203 | /* Peer Entry flags - used to define the type of the peer node */ | |
4204 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
4205 | ||
4206 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 4207 | struct ieee80211_vif *vif, |
13935e2c | 4208 | struct ieee80211_sta *sta) |
55489b6e | 4209 | { |
55489b6e | 4210 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4211 | struct peer_capability_info *p; |
8707d026 | 4212 | u32 rates; |
55489b6e LB |
4213 | int rc; |
4214 | ||
4215 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4216 | if (cmd == NULL) | |
4217 | return -ENOMEM; | |
4218 | ||
4219 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4220 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4221 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4222 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4223 | |
a680400e LB |
4224 | p = &cmd->peer_info; |
4225 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4226 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4227 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4228 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4229 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4230 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
4231 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
4232 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
4233 | else | |
4234 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4235 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 4236 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4237 | p->interop = 1; |
4238 | p->amsdu_enabled = 0; | |
4239 | ||
4240 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
4241 | kfree(cmd); | |
4242 | ||
4243 | return rc ? rc : p->station_id; | |
4244 | } | |
4245 | ||
4246 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4247 | struct ieee80211_vif *vif, u8 *addr) | |
4248 | { | |
4249 | struct mwl8k_cmd_update_stadb *cmd; | |
4250 | int rc; | |
4251 | ||
4252 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4253 | if (cmd == NULL) | |
4254 | return -ENOMEM; | |
4255 | ||
4256 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4257 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4258 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4259 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4260 | |
a680400e | 4261 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4262 | kfree(cmd); |
4263 | ||
4264 | return rc; | |
4265 | } | |
4266 | ||
a66098da LB |
4267 | |
4268 | /* | |
4269 | * Interrupt handling. | |
4270 | */ | |
4271 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4272 | { | |
4273 | struct ieee80211_hw *hw = dev_id; | |
4274 | struct mwl8k_priv *priv = hw->priv; | |
4275 | u32 status; | |
4276 | ||
4277 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4278 | if (!status) |
4279 | return IRQ_NONE; | |
4280 | ||
1e9f9de3 LB |
4281 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4282 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4283 | tasklet_schedule(&priv->poll_tx_task); | |
4284 | } | |
4285 | ||
a66098da | 4286 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4287 | status &= ~MWL8K_A2H_INT_RX_READY; |
4288 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4289 | } |
4290 | ||
3aefc37e NS |
4291 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
4292 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; | |
4293 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4294 | } | |
4295 | ||
67e2eb27 LB |
4296 | if (status) |
4297 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4298 | ||
a66098da | 4299 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4300 | if (priv->hostcmd_wait != NULL) |
a66098da | 4301 | complete(priv->hostcmd_wait); |
a66098da LB |
4302 | } |
4303 | ||
4304 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4305 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4306 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4307 | mwl8k_tx_start(priv); |
a66098da LB |
4308 | } |
4309 | ||
4310 | return IRQ_HANDLED; | |
4311 | } | |
4312 | ||
1e9f9de3 LB |
4313 | static void mwl8k_tx_poll(unsigned long data) |
4314 | { | |
4315 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4316 | struct mwl8k_priv *priv = hw->priv; | |
4317 | int limit; | |
4318 | int i; | |
4319 | ||
4320 | limit = 32; | |
4321 | ||
4322 | spin_lock_bh(&priv->tx_lock); | |
4323 | ||
e600707b | 4324 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4325 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4326 | ||
4327 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4328 | complete(priv->tx_wait); | |
4329 | priv->tx_wait = NULL; | |
4330 | } | |
4331 | ||
4332 | spin_unlock_bh(&priv->tx_lock); | |
4333 | ||
4334 | if (limit) { | |
4335 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4336 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4337 | } else { | |
4338 | tasklet_schedule(&priv->poll_tx_task); | |
4339 | } | |
4340 | } | |
4341 | ||
67e2eb27 LB |
4342 | static void mwl8k_rx_poll(unsigned long data) |
4343 | { | |
4344 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4345 | struct mwl8k_priv *priv = hw->priv; | |
4346 | int limit; | |
4347 | ||
4348 | limit = 32; | |
4349 | limit -= rxq_process(hw, 0, limit); | |
4350 | limit -= rxq_refill(hw, 0, limit); | |
4351 | ||
4352 | if (limit) { | |
4353 | writel(~MWL8K_A2H_INT_RX_READY, | |
4354 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4355 | } else { | |
4356 | tasklet_schedule(&priv->poll_rx_task); | |
4357 | } | |
4358 | } | |
4359 | ||
a66098da LB |
4360 | |
4361 | /* | |
4362 | * Core driver operations. | |
4363 | */ | |
7bb45683 | 4364 | static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
a66098da LB |
4365 | { |
4366 | struct mwl8k_priv *priv = hw->priv; | |
4367 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4368 | |
9189c100 | 4369 | if (!priv->radio_on) { |
c96c31e4 JP |
4370 | wiphy_debug(hw->wiphy, |
4371 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4372 | dev_kfree_skb(skb); |
7bb45683 | 4373 | return; |
a66098da LB |
4374 | } |
4375 | ||
7bb45683 | 4376 | mwl8k_txq_xmit(hw, index, skb); |
a66098da LB |
4377 | } |
4378 | ||
a66098da LB |
4379 | static int mwl8k_start(struct ieee80211_hw *hw) |
4380 | { | |
a66098da LB |
4381 | struct mwl8k_priv *priv = hw->priv; |
4382 | int rc; | |
4383 | ||
a0607fd3 | 4384 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4385 | IRQF_SHARED, MWL8K_NAME, hw); |
4386 | if (rc) { | |
bf3ca7f7 | 4387 | priv->irq = -1; |
5db55844 | 4388 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4389 | return -EIO; |
a66098da | 4390 | } |
bf3ca7f7 | 4391 | priv->irq = priv->pdev->irq; |
a66098da | 4392 | |
67e2eb27 | 4393 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4394 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4395 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4396 | |
a66098da | 4397 | /* Enable interrupts */ |
c23b5a69 | 4398 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
12488e01 NS |
4399 | iowrite32(MWL8K_A2H_EVENTS, |
4400 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 4401 | |
2ec610cb LB |
4402 | rc = mwl8k_fw_lock(hw); |
4403 | if (!rc) { | |
55489b6e | 4404 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4405 | |
5e4cf166 LB |
4406 | if (!priv->ap_fw) { |
4407 | if (!rc) | |
55489b6e | 4408 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4409 | |
5e4cf166 LB |
4410 | if (!rc) |
4411 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4412 | ||
4413 | if (!rc) | |
4414 | rc = mwl8k_cmd_set_post_scan(hw, | |
4415 | "\x00\x00\x00\x00\x00\x00"); | |
4416 | } | |
2ec610cb LB |
4417 | |
4418 | if (!rc) | |
55489b6e | 4419 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4420 | |
2ec610cb | 4421 | if (!rc) |
55489b6e | 4422 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4423 | |
2ec610cb LB |
4424 | mwl8k_fw_unlock(hw); |
4425 | } | |
4426 | ||
4427 | if (rc) { | |
4428 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4429 | free_irq(priv->pdev->irq, hw); | |
bf3ca7f7 | 4430 | priv->irq = -1; |
1e9f9de3 | 4431 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4432 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 4433 | } |
a66098da LB |
4434 | |
4435 | return rc; | |
4436 | } | |
4437 | ||
a66098da LB |
4438 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4439 | { | |
a66098da LB |
4440 | struct mwl8k_priv *priv = hw->priv; |
4441 | int i; | |
4442 | ||
6b6accc3 YAP |
4443 | if (!priv->hw_restart_in_progress) |
4444 | mwl8k_cmd_radio_disable(hw); | |
a66098da LB |
4445 | |
4446 | ieee80211_stop_queues(hw); | |
4447 | ||
a66098da | 4448 | /* Disable interrupts */ |
a66098da | 4449 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
bf3ca7f7 BC |
4450 | if (priv->irq != -1) { |
4451 | free_irq(priv->pdev->irq, hw); | |
4452 | priv->irq = -1; | |
4453 | } | |
a66098da LB |
4454 | |
4455 | /* Stop finalize join worker */ | |
4456 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4457 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4458 | if (priv->beacon_skb != NULL) |
4459 | dev_kfree_skb(priv->beacon_skb); | |
4460 | ||
67e2eb27 | 4461 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4462 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4463 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4464 | |
a66098da | 4465 | /* Return all skbs to mac80211 */ |
e600707b | 4466 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4467 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4468 | } |
4469 | ||
0863ade8 BC |
4470 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4471 | ||
a66098da | 4472 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4473 | struct ieee80211_vif *vif) |
a66098da LB |
4474 | { |
4475 | struct mwl8k_priv *priv = hw->priv; | |
4476 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4477 | u32 macids_supported; |
0863ade8 BC |
4478 | int macid, rc; |
4479 | struct mwl8k_device_info *di; | |
a66098da | 4480 | |
a43c49a8 LB |
4481 | /* |
4482 | * Reject interface creation if sniffer mode is active, as | |
4483 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4484 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4485 | */ |
4486 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4487 | wiphy_info(hw->wiphy, |
4488 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4489 | return -EINVAL; |
4490 | } | |
4491 | ||
0863ade8 | 4492 | di = priv->device_info; |
ee0ddf18 LB |
4493 | switch (vif->type) { |
4494 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4495 | if (!priv->ap_fw && di->fw_image_ap) { |
4496 | /* we must load the ap fw to meet this request */ | |
4497 | if (!list_empty(&priv->vif_list)) | |
4498 | return -EBUSY; | |
4499 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4500 | if (rc) | |
4501 | return rc; | |
4502 | } | |
ee0ddf18 LB |
4503 | macids_supported = priv->ap_macids_supported; |
4504 | break; | |
4505 | case NL80211_IFTYPE_STATION: | |
0863ade8 BC |
4506 | if (priv->ap_fw && di->fw_image_sta) { |
4507 | /* we must load the sta fw to meet this request */ | |
4508 | if (!list_empty(&priv->vif_list)) | |
4509 | return -EBUSY; | |
4510 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4511 | if (rc) | |
4512 | return rc; | |
4513 | } | |
ee0ddf18 LB |
4514 | macids_supported = priv->sta_macids_supported; |
4515 | break; | |
4516 | default: | |
4517 | return -EINVAL; | |
4518 | } | |
4519 | ||
4520 | macid = ffs(macids_supported & ~priv->macids_used); | |
4521 | if (!macid--) | |
4522 | return -EBUSY; | |
4523 | ||
f5bb87cf | 4524 | /* Setup driver private area. */ |
1ed32e4f | 4525 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4526 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4527 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4528 | mwl8k_vif->macid = macid; |
a66098da | 4529 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4530 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4531 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4532 | |
aa21d0f6 LB |
4533 | /* Set the mac address. */ |
4534 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4535 | ||
4536 | if (priv->ap_fw) | |
4537 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
4538 | ||
ee0ddf18 | 4539 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4540 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4541 | |
4542 | return 0; | |
4543 | } | |
4544 | ||
6b6accc3 YAP |
4545 | static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif) |
4546 | { | |
4547 | /* Has ieee80211_restart_hw re-added the removed interfaces? */ | |
4548 | if (!priv->macids_used) | |
4549 | return; | |
4550 | ||
4551 | priv->macids_used &= ~(1 << vif->macid); | |
4552 | list_del(&vif->list); | |
4553 | } | |
4554 | ||
a66098da | 4555 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 4556 | struct ieee80211_vif *vif) |
a66098da LB |
4557 | { |
4558 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4559 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4560 | |
b64fe619 LB |
4561 | if (priv->ap_fw) |
4562 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
4563 | ||
197a4e4e | 4564 | mwl8k_cmd_del_mac_addr(hw, vif, vif->addr); |
32060e1b | 4565 | |
6b6accc3 YAP |
4566 | mwl8k_remove_vif(priv, mwl8k_vif); |
4567 | } | |
4568 | ||
4569 | static void mwl8k_hw_restart_work(struct work_struct *work) | |
4570 | { | |
4571 | struct mwl8k_priv *priv = | |
4572 | container_of(work, struct mwl8k_priv, fw_reload); | |
4573 | struct ieee80211_hw *hw = priv->hw; | |
4574 | struct mwl8k_device_info *di; | |
4575 | int rc; | |
4576 | ||
4577 | /* If some command is waiting for a response, clear it */ | |
4578 | if (priv->hostcmd_wait != NULL) { | |
4579 | complete(priv->hostcmd_wait); | |
4580 | priv->hostcmd_wait = NULL; | |
4581 | } | |
4582 | ||
4583 | priv->hw_restart_owner = current; | |
4584 | di = priv->device_info; | |
4585 | mwl8k_fw_lock(hw); | |
4586 | ||
4587 | if (priv->ap_fw) | |
4588 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4589 | else | |
4590 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4591 | ||
4592 | if (rc) | |
4593 | goto fail; | |
4594 | ||
4595 | priv->hw_restart_owner = NULL; | |
4596 | priv->hw_restart_in_progress = false; | |
4597 | ||
4598 | /* | |
4599 | * This unlock will wake up the queues and | |
4600 | * also opens the command path for other | |
4601 | * commands | |
4602 | */ | |
4603 | mwl8k_fw_unlock(hw); | |
4604 | ||
4605 | ieee80211_restart_hw(hw); | |
4606 | ||
4607 | wiphy_err(hw->wiphy, "Firmware restarted successfully\n"); | |
4608 | ||
4609 | return; | |
4610 | fail: | |
4611 | mwl8k_fw_unlock(hw); | |
4612 | ||
4613 | wiphy_err(hw->wiphy, "Firmware restart failed\n"); | |
a66098da LB |
4614 | } |
4615 | ||
ee03a932 | 4616 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4617 | { |
a66098da LB |
4618 | struct ieee80211_conf *conf = &hw->conf; |
4619 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4620 | int rc; |
a66098da | 4621 | |
7595d67a | 4622 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 4623 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 4624 | return 0; |
7595d67a LB |
4625 | } |
4626 | ||
ee03a932 LB |
4627 | rc = mwl8k_fw_lock(hw); |
4628 | if (rc) | |
4629 | return rc; | |
a66098da | 4630 | |
55489b6e | 4631 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
4632 | if (rc) |
4633 | goto out; | |
a66098da | 4634 | |
610677d2 | 4635 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
4636 | if (rc) |
4637 | goto out; | |
4638 | ||
a66098da LB |
4639 | if (conf->power_level > 18) |
4640 | conf->power_level = 18; | |
a66098da | 4641 | |
08b06347 | 4642 | if (priv->ap_fw) { |
03217087 NS |
4643 | |
4644 | if (conf->flags & IEEE80211_CONF_CHANGE_POWER) { | |
4645 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | |
4646 | if (rc) | |
4647 | goto out; | |
4648 | } | |
41fdf097 | 4649 | |
da62b761 NS |
4650 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); |
4651 | if (rc) | |
4652 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
4653 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
4654 | if (rc) | |
4655 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
4656 | ||
08b06347 | 4657 | } else { |
41fdf097 NS |
4658 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4659 | if (rc) | |
4660 | goto out; | |
08b06347 LB |
4661 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4662 | } | |
a66098da | 4663 | |
ee03a932 LB |
4664 | out: |
4665 | mwl8k_fw_unlock(hw); | |
a66098da | 4666 | |
ee03a932 | 4667 | return rc; |
a66098da LB |
4668 | } |
4669 | ||
b64fe619 LB |
4670 | static void |
4671 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4672 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4673 | { |
a66098da | 4674 | struct mwl8k_priv *priv = hw->priv; |
ba30c4a5 | 4675 | u32 ap_legacy_rates = 0; |
13935e2c | 4676 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4677 | int rc; |
4678 | ||
c3cbbe8a | 4679 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4680 | return; |
a66098da | 4681 | |
c3cbbe8a LB |
4682 | /* |
4683 | * No need to capture a beacon if we're no longer associated. | |
4684 | */ | |
4685 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4686 | priv->capture_beacon = false; | |
3a980d0a | 4687 | |
c3cbbe8a | 4688 | /* |
13935e2c | 4689 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4690 | */ |
7dc6a7a7 | 4691 | if (vif->bss_conf.assoc) { |
c6e96010 | 4692 | struct ieee80211_sta *ap; |
c97470dd | 4693 | |
c6e96010 | 4694 | rcu_read_lock(); |
c6e96010 | 4695 | |
c3cbbe8a LB |
4696 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4697 | if (ap == NULL) { | |
4698 | rcu_read_unlock(); | |
c6e96010 | 4699 | goto out; |
c3cbbe8a LB |
4700 | } |
4701 | ||
8707d026 LB |
4702 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4703 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4704 | } else { | |
4705 | ap_legacy_rates = | |
4706 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4707 | } | |
13935e2c | 4708 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4709 | |
4710 | rcu_read_unlock(); | |
4711 | } | |
c6e96010 | 4712 | |
c3cbbe8a | 4713 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4714 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4715 | if (rc) |
4716 | goto out; | |
a66098da | 4717 | |
b71ed2c6 | 4718 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4719 | if (rc) |
4720 | goto out; | |
c3cbbe8a | 4721 | } |
a66098da | 4722 | |
c3cbbe8a | 4723 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4724 | rc = mwl8k_set_radio_preamble(hw, |
4725 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4726 | if (rc) |
4727 | goto out; | |
c3cbbe8a | 4728 | } |
a66098da | 4729 | |
c3cbbe8a | 4730 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4731 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4732 | if (rc) |
4733 | goto out; | |
c3cbbe8a | 4734 | } |
a66098da | 4735 | |
c97470dd LB |
4736 | if (vif->bss_conf.assoc && |
4737 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4738 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4739 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4740 | if (rc) |
4741 | goto out; | |
c3cbbe8a | 4742 | } |
a66098da | 4743 | |
c3cbbe8a LB |
4744 | if (vif->bss_conf.assoc && |
4745 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4746 | /* |
4747 | * Finalize the join. Tell rx handler to process | |
4748 | * next beacon from our BSSID. | |
4749 | */ | |
0a11dfc3 | 4750 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4751 | priv->capture_beacon = true; |
a66098da LB |
4752 | } |
4753 | ||
3a980d0a LB |
4754 | out: |
4755 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4756 | } |
4757 | ||
b64fe619 LB |
4758 | static void |
4759 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4760 | struct ieee80211_bss_conf *info, u32 changed) | |
4761 | { | |
4762 | int rc; | |
4763 | ||
4764 | if (mwl8k_fw_lock(hw)) | |
4765 | return; | |
4766 | ||
4767 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4768 | rc = mwl8k_set_radio_preamble(hw, | |
4769 | vif->bss_conf.use_short_preamble); | |
4770 | if (rc) | |
4771 | goto out; | |
4772 | } | |
4773 | ||
4774 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4775 | int idx; | |
4776 | int rate; | |
4777 | ||
4778 | /* | |
4779 | * Use lowest supported basic rate for multicasts | |
4780 | * and management frames (such as probe responses -- | |
4781 | * beacons will always go out at 1 Mb/s). | |
4782 | */ | |
4783 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4784 | if (idx) |
4785 | idx--; | |
4786 | ||
4787 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4788 | rate = mwl8k_rates_24[idx].hw_value; | |
4789 | else | |
4790 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4791 | |
4792 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4793 | } | |
4794 | ||
4795 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4796 | struct sk_buff *skb; | |
4797 | ||
4798 | skb = ieee80211_beacon_get(hw, vif); | |
4799 | if (skb != NULL) { | |
aa21d0f6 | 4800 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4801 | kfree_skb(skb); |
4802 | } | |
4803 | } | |
4804 | ||
4805 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4806 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4807 | |
4808 | out: | |
4809 | mwl8k_fw_unlock(hw); | |
4810 | } | |
4811 | ||
4812 | static void | |
4813 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4814 | struct ieee80211_bss_conf *info, u32 changed) | |
4815 | { | |
4816 | struct mwl8k_priv *priv = hw->priv; | |
4817 | ||
4818 | if (!priv->ap_fw) | |
4819 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4820 | else | |
4821 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4822 | } | |
4823 | ||
e81cd2d6 | 4824 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4825 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4826 | { |
4827 | struct mwl8k_cmd_pkt *cmd; | |
4828 | ||
447ced07 LB |
4829 | /* |
4830 | * Synthesize and return a command packet that programs the | |
4831 | * hardware multicast address filter. At this point we don't | |
4832 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
4833 | * we'll end up throwing this packet away and creating a new | |
4834 | * one in mwl8k_configure_filter(). | |
4835 | */ | |
22bedad3 | 4836 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
4837 | |
4838 | return (unsigned long)cmd; | |
4839 | } | |
4840 | ||
a43c49a8 LB |
4841 | static int |
4842 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
4843 | unsigned int changed_flags, | |
4844 | unsigned int *total_flags) | |
4845 | { | |
4846 | struct mwl8k_priv *priv = hw->priv; | |
4847 | ||
4848 | /* | |
4849 | * Hardware sniffer mode is mutually exclusive with STA | |
4850 | * operation, so refuse to enable sniffer mode if a STA | |
4851 | * interface is active. | |
4852 | */ | |
f5bb87cf | 4853 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 4854 | if (net_ratelimit()) |
c96c31e4 JP |
4855 | wiphy_info(hw->wiphy, |
4856 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
4857 | return 0; |
4858 | } | |
4859 | ||
4860 | if (!priv->sniffer_enabled) { | |
55489b6e | 4861 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
4862 | return 0; |
4863 | priv->sniffer_enabled = true; | |
4864 | } | |
4865 | ||
4866 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
4867 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
4868 | FIF_OTHER_BSS; | |
4869 | ||
4870 | return 1; | |
4871 | } | |
4872 | ||
f5bb87cf LB |
4873 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
4874 | { | |
4875 | if (!list_empty(&priv->vif_list)) | |
4876 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
4877 | ||
4878 | return NULL; | |
4879 | } | |
4880 | ||
e6935ea1 LB |
4881 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
4882 | unsigned int changed_flags, | |
4883 | unsigned int *total_flags, | |
4884 | u64 multicast) | |
4885 | { | |
4886 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
4887 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
4888 | ||
c0adae2c LB |
4889 | /* |
4890 | * AP firmware doesn't allow fine-grained control over | |
4891 | * the receive filter. | |
4892 | */ | |
4893 | if (priv->ap_fw) { | |
4894 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
4895 | kfree(cmd); | |
4896 | return; | |
4897 | } | |
4898 | ||
a43c49a8 LB |
4899 | /* |
4900 | * Enable hardware sniffer mode if FIF_CONTROL or | |
4901 | * FIF_OTHER_BSS is requested. | |
4902 | */ | |
4903 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
4904 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
4905 | kfree(cmd); | |
4906 | return; | |
4907 | } | |
a66098da | 4908 | |
e6935ea1 | 4909 | /* Clear unsupported feature flags */ |
447ced07 | 4910 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 4911 | |
90852f7a LB |
4912 | if (mwl8k_fw_lock(hw)) { |
4913 | kfree(cmd); | |
e6935ea1 | 4914 | return; |
90852f7a | 4915 | } |
a66098da | 4916 | |
a43c49a8 | 4917 | if (priv->sniffer_enabled) { |
55489b6e | 4918 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
4919 | priv->sniffer_enabled = false; |
4920 | } | |
4921 | ||
e6935ea1 | 4922 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
4923 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
4924 | /* | |
4925 | * Disable the BSS filter. | |
4926 | */ | |
e6935ea1 | 4927 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 4928 | } else { |
f5bb87cf | 4929 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 4930 | const u8 *bssid; |
a94cc97e | 4931 | |
77165d88 LB |
4932 | /* |
4933 | * Enable the BSS filter. | |
4934 | * | |
4935 | * If there is an active STA interface, use that | |
4936 | * interface's BSSID, otherwise use a dummy one | |
4937 | * (where the OUI part needs to be nonzero for | |
4938 | * the BSSID to be accepted by POST_SCAN). | |
4939 | */ | |
f5bb87cf LB |
4940 | mwl8k_vif = mwl8k_first_vif(priv); |
4941 | if (mwl8k_vif != NULL) | |
4942 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
4943 | else | |
4944 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 4945 | |
e6935ea1 | 4946 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
4947 | } |
4948 | } | |
4949 | ||
447ced07 LB |
4950 | /* |
4951 | * If FIF_ALLMULTI is being requested, throw away the command | |
4952 | * packet that ->prepare_multicast() built and replace it with | |
4953 | * a command packet that enables reception of all multicast | |
4954 | * packets. | |
4955 | */ | |
4956 | if (*total_flags & FIF_ALLMULTI) { | |
4957 | kfree(cmd); | |
22bedad3 | 4958 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
4959 | } |
4960 | ||
4961 | if (cmd != NULL) { | |
4962 | mwl8k_post_cmd(hw, cmd); | |
4963 | kfree(cmd); | |
e6935ea1 | 4964 | } |
a66098da | 4965 | |
e6935ea1 | 4966 | mwl8k_fw_unlock(hw); |
a66098da LB |
4967 | } |
4968 | ||
a66098da LB |
4969 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
4970 | { | |
c2c2b12a | 4971 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
4972 | } |
4973 | ||
4a6967b8 JB |
4974 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
4975 | struct ieee80211_vif *vif, | |
4976 | struct ieee80211_sta *sta) | |
3f5610ff LB |
4977 | { |
4978 | struct mwl8k_priv *priv = hw->priv; | |
4979 | ||
4a6967b8 JB |
4980 | if (priv->ap_fw) |
4981 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
4982 | else | |
4983 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
4984 | } |
4985 | ||
4a6967b8 JB |
4986 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
4987 | struct ieee80211_vif *vif, | |
4988 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
4989 | { |
4990 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 4991 | int ret; |
fcdc403c NS |
4992 | int i; |
4993 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4994 | struct ieee80211_key_conf *key; | |
bbfd9128 | 4995 | |
4a6967b8 JB |
4996 | if (!priv->ap_fw) { |
4997 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
4998 | if (ret >= 0) { | |
4999 | MWL8K_STA(sta)->peer_id = ret; | |
17033543 NS |
5000 | if (sta->ht_cap.ht_supported) |
5001 | MWL8K_STA(sta)->is_ampdu_allowed = true; | |
fcdc403c | 5002 | ret = 0; |
4a6967b8 | 5003 | } |
bbfd9128 | 5004 | |
d9a07d49 NS |
5005 | } else { |
5006 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 5007 | } |
4a6967b8 | 5008 | |
d9a07d49 NS |
5009 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
5010 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
5011 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
5012 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
5013 | } | |
fcdc403c | 5014 | return ret; |
bbfd9128 LB |
5015 | } |
5016 | ||
8a3a3c85 EP |
5017 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, |
5018 | struct ieee80211_vif *vif, u16 queue, | |
a66098da LB |
5019 | const struct ieee80211_tx_queue_params *params) |
5020 | { | |
3e4f542c | 5021 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5022 | int rc; |
a66098da | 5023 | |
3e4f542c LB |
5024 | rc = mwl8k_fw_lock(hw); |
5025 | if (!rc) { | |
e600707b | 5026 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
5027 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
5028 | ||
3e4f542c | 5029 | if (!priv->wmm_enabled) |
55489b6e | 5030 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 5031 | |
85c9205c | 5032 | if (!rc) { |
e600707b | 5033 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 5034 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
5035 | params->cw_min, |
5036 | params->cw_max, | |
5037 | params->aifs, | |
5038 | params->txop); | |
85c9205c | 5039 | } |
3e4f542c LB |
5040 | |
5041 | mwl8k_fw_unlock(hw); | |
a66098da | 5042 | } |
3e4f542c | 5043 | |
a66098da LB |
5044 | return rc; |
5045 | } | |
5046 | ||
a66098da LB |
5047 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
5048 | struct ieee80211_low_level_stats *stats) | |
5049 | { | |
55489b6e | 5050 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
5051 | } |
5052 | ||
0d462bbb JL |
5053 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
5054 | struct survey_info *survey) | |
5055 | { | |
5056 | struct mwl8k_priv *priv = hw->priv; | |
5057 | struct ieee80211_conf *conf = &hw->conf; | |
5058 | ||
5059 | if (idx != 0) | |
5060 | return -ENOENT; | |
5061 | ||
5062 | survey->channel = conf->channel; | |
5063 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
5064 | survey->noise = priv->noise; | |
5065 | ||
5066 | return 0; | |
5067 | } | |
5068 | ||
65f3ddcd NS |
5069 | #define MAX_AMPDU_ATTEMPTS 5 |
5070 | ||
a2292d83 LB |
5071 | static int |
5072 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5073 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
5074 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
5075 | u8 buf_size) | |
a2292d83 | 5076 | { |
65f3ddcd NS |
5077 | |
5078 | int i, rc = 0; | |
5079 | struct mwl8k_priv *priv = hw->priv; | |
5080 | struct mwl8k_ampdu_stream *stream; | |
5081 | u8 *addr = sta->addr; | |
5082 | ||
5083 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
5084 | return -ENOTSUPP; | |
5085 | ||
5086 | spin_lock(&priv->stream_lock); | |
5087 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
5088 | ||
a2292d83 LB |
5089 | switch (action) { |
5090 | case IEEE80211_AMPDU_RX_START: | |
5091 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
5092 | break; |
5093 | case IEEE80211_AMPDU_TX_START: | |
5094 | /* By the time we get here the hw queues may contain outgoing | |
5095 | * packets for this RA/TID that are not part of this BA | |
5096 | * session. The hw will assign sequence numbers to these | |
5097 | * packets as they go out. So if we query the hw for its next | |
5098 | * sequence number and use that for the SSN here, it may end up | |
5099 | * being wrong, which will lead to sequence number mismatch at | |
5100 | * the recipient. To avoid this, we reset the sequence number | |
5101 | * to O for the first MPDU in this BA stream. | |
5102 | */ | |
5103 | *ssn = 0; | |
5104 | if (stream == NULL) { | |
5105 | /* This means that somebody outside this driver called | |
5106 | * ieee80211_start_tx_ba_session. This is unexpected | |
5107 | * because we do our own rate control. Just warn and | |
5108 | * move on. | |
5109 | */ | |
5110 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
5111 | "Proceeding anyway.\n", __func__); | |
5112 | stream = mwl8k_add_stream(hw, sta, tid); | |
5113 | } | |
5114 | if (stream == NULL) { | |
5115 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
5116 | rc = -EBUSY; | |
5117 | break; | |
5118 | } | |
5119 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
5120 | ||
5121 | /* Release the lock before we do the time consuming stuff */ | |
5122 | spin_unlock(&priv->stream_lock); | |
5123 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
5124 | rc = mwl8k_check_ba(hw, stream); | |
5125 | ||
6b6accc3 YAP |
5126 | /* If HW restart is in progress mwl8k_post_cmd will |
5127 | * return -EBUSY. Avoid retrying mwl8k_check_ba in | |
5128 | * such cases | |
5129 | */ | |
5130 | if (!rc || rc == -EBUSY) | |
65f3ddcd NS |
5131 | break; |
5132 | /* | |
5133 | * HW queues take time to be flushed, give them | |
5134 | * sufficient time | |
5135 | */ | |
5136 | ||
5137 | msleep(1000); | |
5138 | } | |
5139 | spin_lock(&priv->stream_lock); | |
5140 | if (rc) { | |
5141 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
5142 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
5143 | mwl8k_remove_stream(hw, stream); | |
5144 | rc = -EBUSY; | |
5145 | break; | |
5146 | } | |
5147 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
5148 | break; | |
5149 | case IEEE80211_AMPDU_TX_STOP: | |
eca107ff YAP |
5150 | if (stream) { |
5151 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
5152 | spin_unlock(&priv->stream_lock); | |
5153 | mwl8k_destroy_ba(hw, stream); | |
5154 | spin_lock(&priv->stream_lock); | |
5155 | } | |
5156 | mwl8k_remove_stream(hw, stream); | |
65f3ddcd | 5157 | } |
65f3ddcd NS |
5158 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); |
5159 | break; | |
5160 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
5161 | BUG_ON(stream == NULL); | |
5162 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
5163 | spin_unlock(&priv->stream_lock); | |
5164 | rc = mwl8k_create_ba(hw, stream, buf_size); | |
5165 | spin_lock(&priv->stream_lock); | |
5166 | if (!rc) | |
5167 | stream->state = AMPDU_STREAM_ACTIVE; | |
5168 | else { | |
5169 | spin_unlock(&priv->stream_lock); | |
5170 | mwl8k_destroy_ba(hw, stream); | |
5171 | spin_lock(&priv->stream_lock); | |
5172 | wiphy_debug(hw->wiphy, | |
5173 | "Failed adding stream for sta %pM tid %d\n", | |
5174 | addr, tid); | |
5175 | mwl8k_remove_stream(hw, stream); | |
5176 | } | |
5177 | break; | |
5178 | ||
a2292d83 | 5179 | default: |
65f3ddcd | 5180 | rc = -ENOTSUPP; |
a2292d83 | 5181 | } |
65f3ddcd NS |
5182 | |
5183 | spin_unlock(&priv->stream_lock); | |
5184 | return rc; | |
a2292d83 LB |
5185 | } |
5186 | ||
a66098da LB |
5187 | static const struct ieee80211_ops mwl8k_ops = { |
5188 | .tx = mwl8k_tx, | |
5189 | .start = mwl8k_start, | |
5190 | .stop = mwl8k_stop, | |
5191 | .add_interface = mwl8k_add_interface, | |
5192 | .remove_interface = mwl8k_remove_interface, | |
5193 | .config = mwl8k_config, | |
a66098da | 5194 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 5195 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 5196 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 5197 | .set_key = mwl8k_set_key, |
a66098da | 5198 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
5199 | .sta_add = mwl8k_sta_add, |
5200 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 5201 | .conf_tx = mwl8k_conf_tx, |
a66098da | 5202 | .get_stats = mwl8k_get_stats, |
0d462bbb | 5203 | .get_survey = mwl8k_get_survey, |
a2292d83 | 5204 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
5205 | }; |
5206 | ||
a66098da LB |
5207 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
5208 | { | |
5209 | struct mwl8k_priv *priv = | |
5210 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
5211 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
5212 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
5213 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
5214 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
5215 | mgmt->u.beacon.variable, len); | |
5216 | int dtim_period = 1; | |
5217 | ||
5218 | if (tim && tim[1] >= 2) | |
5219 | dtim_period = tim[3]; | |
a66098da | 5220 | |
56007a02 | 5221 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 5222 | |
f5bb87cf | 5223 | dev_kfree_skb(skb); |
a66098da LB |
5224 | priv->beacon_skb = NULL; |
5225 | } | |
5226 | ||
bcb628d5 | 5227 | enum { |
9e1b17ea LB |
5228 | MWL8363 = 0, |
5229 | MWL8687, | |
bcb628d5 | 5230 | MWL8366, |
6f6d1e9a LB |
5231 | }; |
5232 | ||
8a7a578c | 5233 | #define MWL8K_8366_AP_FW_API 2 |
952a0e96 BC |
5234 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
5235 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
5236 | ||
bcb628d5 | 5237 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
9e1b17ea LB |
5238 | [MWL8363] = { |
5239 | .part_name = "88w8363", | |
5240 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 5241 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 5242 | }, |
49eb691c | 5243 | [MWL8687] = { |
bcb628d5 JL |
5244 | .part_name = "88w8687", |
5245 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 5246 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 5247 | }, |
49eb691c | 5248 | [MWL8366] = { |
bcb628d5 JL |
5249 | .part_name = "88w8366", |
5250 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 5251 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
5252 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
5253 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 5254 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 5255 | }, |
45a390dd LB |
5256 | }; |
5257 | ||
c92d4ede LB |
5258 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
5259 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
5260 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
5261 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
5262 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
5263 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 5264 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 5265 | |
45a390dd | 5266 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 5267 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
5268 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
5269 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
5270 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
5271 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
5272 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 5273 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 5274 | { }, |
45a390dd LB |
5275 | }; |
5276 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
5277 | ||
99020471 BC |
5278 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
5279 | { | |
5280 | int rc; | |
5281 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
5282 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
5283 | priv->fw_pref, priv->fw_alt); | |
5284 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5285 | if (rc) { | |
5286 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5287 | pci_name(priv->pdev), priv->fw_alt); | |
5288 | return rc; | |
5289 | } | |
5290 | return 0; | |
5291 | } | |
5292 | ||
5293 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5294 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5295 | { | |
5296 | struct mwl8k_priv *priv = context; | |
5297 | struct mwl8k_device_info *di = priv->device_info; | |
5298 | int rc; | |
5299 | ||
5300 | switch (priv->fw_state) { | |
5301 | case FW_STATE_INIT: | |
5302 | if (!fw) { | |
5303 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5304 | pci_name(priv->pdev), di->helper_image); | |
5305 | goto fail; | |
5306 | } | |
5307 | priv->fw_helper = fw; | |
5308 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5309 | true); | |
5310 | if (rc && priv->fw_alt) { | |
5311 | rc = mwl8k_request_alt_fw(priv); | |
5312 | if (rc) | |
5313 | goto fail; | |
5314 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5315 | } else if (rc) | |
5316 | goto fail; | |
5317 | else | |
5318 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5319 | break; | |
5320 | ||
5321 | case FW_STATE_LOADING_PREF: | |
5322 | if (!fw) { | |
5323 | if (priv->fw_alt) { | |
5324 | rc = mwl8k_request_alt_fw(priv); | |
5325 | if (rc) | |
5326 | goto fail; | |
5327 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5328 | } else | |
5329 | goto fail; | |
5330 | } else { | |
5331 | priv->fw_ucode = fw; | |
5332 | rc = mwl8k_firmware_load_success(priv); | |
5333 | if (rc) | |
5334 | goto fail; | |
5335 | else | |
5336 | complete(&priv->firmware_loading_complete); | |
5337 | } | |
5338 | break; | |
5339 | ||
5340 | case FW_STATE_LOADING_ALT: | |
5341 | if (!fw) { | |
5342 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5343 | pci_name(priv->pdev), di->helper_image); | |
5344 | goto fail; | |
5345 | } | |
5346 | priv->fw_ucode = fw; | |
5347 | rc = mwl8k_firmware_load_success(priv); | |
5348 | if (rc) | |
5349 | goto fail; | |
5350 | else | |
5351 | complete(&priv->firmware_loading_complete); | |
5352 | break; | |
5353 | ||
5354 | default: | |
5355 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5356 | MWL8K_NAME, priv->fw_state); | |
5357 | BUG_ON(1); | |
5358 | } | |
5359 | ||
5360 | return; | |
5361 | ||
5362 | fail: | |
5363 | priv->fw_state = FW_STATE_ERROR; | |
5364 | complete(&priv->firmware_loading_complete); | |
5365 | device_release_driver(&priv->pdev->dev); | |
5366 | mwl8k_release_firmware(priv); | |
5367 | } | |
5368 | ||
6b6accc3 | 5369 | #define MAX_RESTART_ATTEMPTS 1 |
99020471 BC |
5370 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, |
5371 | bool nowait) | |
a66098da | 5372 | { |
3cc7772c | 5373 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5374 | int rc; |
6b6accc3 | 5375 | int count = MAX_RESTART_ATTEMPTS; |
be695fc4 | 5376 | |
6b6accc3 | 5377 | retry: |
be695fc4 LB |
5378 | /* Reset firmware and hardware */ |
5379 | mwl8k_hw_reset(priv); | |
5380 | ||
5381 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5382 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5383 | if (rc) { |
5db55844 | 5384 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5385 | return rc; |
be695fc4 LB |
5386 | } |
5387 | ||
99020471 BC |
5388 | if (nowait) |
5389 | return rc; | |
5390 | ||
be695fc4 LB |
5391 | /* Load firmware into hardware */ |
5392 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5393 | if (rc) |
5db55844 | 5394 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5395 | |
5396 | /* Reclaim memory once firmware is successfully loaded */ | |
5397 | mwl8k_release_firmware(priv); | |
5398 | ||
6b6accc3 YAP |
5399 | if (rc && count) { |
5400 | /* FW did not start successfully; | |
5401 | * lets try one more time | |
5402 | */ | |
5403 | count--; | |
5404 | wiphy_err(hw->wiphy, "Trying to reload the firmware again\n"); | |
5405 | msleep(20); | |
5406 | goto retry; | |
5407 | } | |
5408 | ||
3cc7772c BC |
5409 | return rc; |
5410 | } | |
5411 | ||
73b46320 BC |
5412 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5413 | { | |
5414 | struct mwl8k_priv *priv = hw->priv; | |
5415 | int rc = 0; | |
5416 | int i; | |
5417 | ||
e600707b | 5418 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5419 | rc = mwl8k_txq_init(hw, i); |
5420 | if (rc) | |
5421 | break; | |
5422 | if (priv->ap_fw) | |
5423 | iowrite32(priv->txq[i].txd_dma, | |
5424 | priv->sram + priv->txq_offset[i]); | |
5425 | } | |
5426 | return rc; | |
5427 | } | |
5428 | ||
3cc7772c BC |
5429 | /* initialize hw after successfully loading a firmware image */ |
5430 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5431 | { | |
5432 | struct mwl8k_priv *priv = hw->priv; | |
5433 | int rc = 0; | |
5434 | int i; | |
be695fc4 | 5435 | |
91942230 | 5436 | if (priv->ap_fw) { |
89a91f4f | 5437 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5438 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5439 | wiphy_err(hw->wiphy, |
5440 | "Driver does not have AP firmware image support for this hardware\n"); | |
91942230 LB |
5441 | goto err_stop_firmware; |
5442 | } | |
5443 | } else { | |
89a91f4f | 5444 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5445 | } |
be695fc4 LB |
5446 | |
5447 | priv->sniffer_enabled = false; | |
5448 | priv->wmm_enabled = false; | |
5449 | priv->pending_tx_pkts = 0; | |
5450 | ||
a66098da LB |
5451 | rc = mwl8k_rxq_init(hw, 0); |
5452 | if (rc) | |
3cc7772c | 5453 | goto err_stop_firmware; |
a66098da LB |
5454 | rxq_refill(hw, 0, INT_MAX); |
5455 | ||
73b46320 BC |
5456 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5457 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5458 | * prior to issuing this command. But for the AP case, we learn the | |
5459 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5460 | * case we must initialize the tx queues after. | |
5461 | */ | |
8a7a578c | 5462 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5463 | if (!priv->ap_fw) { |
5464 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5465 | if (rc) |
5466 | goto err_free_queues; | |
5467 | } | |
5468 | ||
5469 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5470 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5471 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5472 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5473 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
12488e01 NS |
5474 | iowrite32(MWL8K_A2H_INT_OPC_DONE, |
5475 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 5476 | |
a0607fd3 | 5477 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5478 | IRQF_SHARED, MWL8K_NAME, hw); |
5479 | if (rc) { | |
5db55844 | 5480 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5481 | goto err_free_queues; |
5482 | } | |
5483 | ||
6b6accc3 YAP |
5484 | /* |
5485 | * When hw restart is requested, | |
5486 | * mac80211 will take care of clearing | |
5487 | * the ampdu streams, so do not clear | |
5488 | * the ampdu state here | |
5489 | */ | |
5490 | if (!priv->hw_restart_in_progress) | |
5491 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); | |
ac109fd0 | 5492 | |
a66098da LB |
5493 | /* |
5494 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5495 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5496 | * interrupts when done. |
5497 | */ | |
c23b5a69 | 5498 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5499 | |
5500 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5501 | if (priv->ap_fw) { |
5502 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5503 | if (!rc) |
5504 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5505 | if (!rc) |
5506 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5507 | } else { | |
5508 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5509 | } | |
a66098da | 5510 | if (rc) { |
5db55844 | 5511 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5512 | goto err_free_irq; |
a66098da LB |
5513 | } |
5514 | ||
5515 | /* Turn radio off */ | |
55489b6e | 5516 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5517 | if (rc) { |
5db55844 | 5518 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5519 | goto err_free_irq; |
a66098da LB |
5520 | } |
5521 | ||
32060e1b | 5522 | /* Clear MAC address */ |
aa21d0f6 | 5523 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5524 | if (rc) { |
5db55844 | 5525 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5526 | goto err_free_irq; |
32060e1b LB |
5527 | } |
5528 | ||
a66098da | 5529 | /* Disable interrupts */ |
a66098da | 5530 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5531 | free_irq(priv->pdev->irq, hw); |
5532 | ||
c96c31e4 JP |
5533 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5534 | priv->device_info->part_name, | |
5535 | priv->hw_rev, hw->wiphy->perm_addr, | |
5536 | priv->ap_fw ? "AP" : "STA", | |
5537 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5538 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5539 | |
5540 | return 0; | |
5541 | ||
a66098da | 5542 | err_free_irq: |
a66098da | 5543 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5544 | free_irq(priv->pdev->irq, hw); |
5545 | ||
5546 | err_free_queues: | |
e600707b | 5547 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5548 | mwl8k_txq_deinit(hw, i); |
5549 | mwl8k_rxq_deinit(hw, 0); | |
5550 | ||
3cc7772c BC |
5551 | err_stop_firmware: |
5552 | mwl8k_hw_reset(priv); | |
5553 | ||
5554 | return rc; | |
5555 | } | |
5556 | ||
5557 | /* | |
5558 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5559 | * has already been registered | |
5560 | */ | |
5561 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5562 | { | |
5563 | int i, rc = 0; | |
5564 | struct mwl8k_priv *priv = hw->priv; | |
6b6accc3 | 5565 | struct mwl8k_vif *vif, *tmp_vif; |
3cc7772c BC |
5566 | |
5567 | mwl8k_stop(hw); | |
5568 | mwl8k_rxq_deinit(hw, 0); | |
5569 | ||
6b6accc3 YAP |
5570 | /* |
5571 | * All the existing interfaces are re-added by the ieee80211_reconfig; | |
5572 | * which means driver should remove existing interfaces before calling | |
5573 | * ieee80211_restart_hw | |
5574 | */ | |
5575 | if (priv->hw_restart_in_progress) | |
5576 | list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list) | |
5577 | mwl8k_remove_vif(priv, vif); | |
5578 | ||
e600707b | 5579 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5580 | mwl8k_txq_deinit(hw, i); |
5581 | ||
99020471 | 5582 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
5583 | if (rc) |
5584 | goto fail; | |
5585 | ||
5586 | rc = mwl8k_probe_hw(hw); | |
5587 | if (rc) | |
5588 | goto fail; | |
5589 | ||
6b6accc3 YAP |
5590 | if (priv->hw_restart_in_progress) |
5591 | return rc; | |
5592 | ||
3cc7772c BC |
5593 | rc = mwl8k_start(hw); |
5594 | if (rc) | |
5595 | goto fail; | |
5596 | ||
5597 | rc = mwl8k_config(hw, ~0); | |
5598 | if (rc) | |
5599 | goto fail; | |
5600 | ||
e600707b | 5601 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
8a3a3c85 | 5602 | rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]); |
3cc7772c BC |
5603 | if (rc) |
5604 | goto fail; | |
5605 | } | |
5606 | ||
5607 | return rc; | |
5608 | ||
5609 | fail: | |
5610 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
5611 | return rc; | |
5612 | } | |
5613 | ||
5614 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) | |
5615 | { | |
5616 | struct ieee80211_hw *hw = priv->hw; | |
5617 | int i, rc; | |
5618 | ||
99020471 BC |
5619 | rc = mwl8k_load_firmware(hw); |
5620 | mwl8k_release_firmware(priv); | |
5621 | if (rc) { | |
5622 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
5623 | return rc; | |
5624 | } | |
5625 | ||
3cc7772c BC |
5626 | /* |
5627 | * Extra headroom is the size of the required DMA header | |
5628 | * minus the size of the smallest 802.11 frame (CTS frame). | |
5629 | */ | |
5630 | hw->extra_tx_headroom = | |
5631 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
5632 | ||
ff776cec YAP |
5633 | hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0; |
5634 | ||
3cc7772c BC |
5635 | hw->channel_change_time = 10; |
5636 | ||
e600707b | 5637 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
5638 | |
5639 | /* Set rssi values to dBm */ | |
0bf22c37 | 5640 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
2a36a0ec YAP |
5641 | |
5642 | /* | |
5643 | * Ask mac80211 to not to trigger PS mode | |
5644 | * based on PM bit of incoming frames. | |
5645 | */ | |
5646 | if (priv->ap_fw) | |
5647 | hw->flags |= IEEE80211_HW_AP_LINK_PS; | |
5648 | ||
3cc7772c BC |
5649 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
5650 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
5651 | ||
5652 | priv->macids_used = 0; | |
5653 | INIT_LIST_HEAD(&priv->vif_list); | |
5654 | ||
5655 | /* Set default radio state and preamble */ | |
3db1cd5c RR |
5656 | priv->radio_on = false; |
5657 | priv->radio_short_preamble = false; | |
3cc7772c BC |
5658 | |
5659 | /* Finalize join worker */ | |
5660 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
5661 | /* Handle watchdog ba events */ |
5662 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
6b6accc3 YAP |
5663 | /* To reload the firmware if it crashes */ |
5664 | INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work); | |
3cc7772c BC |
5665 | |
5666 | /* TX reclaim and RX tasklets. */ | |
5667 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5668 | tasklet_disable(&priv->poll_tx_task); | |
5669 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5670 | tasklet_disable(&priv->poll_rx_task); | |
5671 | ||
5672 | /* Power management cookie */ | |
5673 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5674 | if (priv->cookie == NULL) | |
5675 | return -ENOMEM; | |
5676 | ||
5677 | mutex_init(&priv->fw_mutex); | |
5678 | priv->fw_mutex_owner = NULL; | |
5679 | priv->fw_mutex_depth = 0; | |
5680 | priv->hostcmd_wait = NULL; | |
5681 | ||
5682 | spin_lock_init(&priv->tx_lock); | |
5683 | ||
ac109fd0 BC |
5684 | spin_lock_init(&priv->stream_lock); |
5685 | ||
3cc7772c BC |
5686 | priv->tx_wait = NULL; |
5687 | ||
5688 | rc = mwl8k_probe_hw(hw); | |
5689 | if (rc) | |
5690 | goto err_free_cookie; | |
5691 | ||
5692 | hw->wiphy->interface_modes = 0; | |
5693 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) | |
5694 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | |
5695 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) | |
5696 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5697 | ||
5698 | rc = ieee80211_register_hw(hw); | |
5699 | if (rc) { | |
5700 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5701 | goto err_unprobe_hw; | |
5702 | } | |
5703 | ||
5704 | return 0; | |
5705 | ||
5706 | err_unprobe_hw: | |
e600707b | 5707 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5708 | mwl8k_txq_deinit(hw, i); |
5709 | mwl8k_rxq_deinit(hw, 0); | |
5710 | ||
be695fc4 | 5711 | err_free_cookie: |
a66098da LB |
5712 | if (priv->cookie != NULL) |
5713 | pci_free_consistent(priv->pdev, 4, | |
5714 | priv->cookie, priv->cookie_dma); | |
5715 | ||
3cc7772c BC |
5716 | return rc; |
5717 | } | |
5718 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | |
5719 | const struct pci_device_id *id) | |
5720 | { | |
5721 | static int printed_version; | |
5722 | struct ieee80211_hw *hw; | |
5723 | struct mwl8k_priv *priv; | |
0863ade8 | 5724 | struct mwl8k_device_info *di; |
3cc7772c BC |
5725 | int rc; |
5726 | ||
5727 | if (!printed_version) { | |
5728 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5729 | printed_version = 1; | |
5730 | } | |
5731 | ||
5732 | ||
5733 | rc = pci_enable_device(pdev); | |
5734 | if (rc) { | |
5735 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5736 | MWL8K_NAME); | |
5737 | return rc; | |
5738 | } | |
5739 | ||
5740 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
5741 | if (rc) { | |
5742 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
5743 | MWL8K_NAME); | |
5744 | goto err_disable_device; | |
5745 | } | |
5746 | ||
5747 | pci_set_master(pdev); | |
5748 | ||
5749 | ||
5750 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
5751 | if (hw == NULL) { | |
5752 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
5753 | rc = -ENOMEM; | |
5754 | goto err_free_reg; | |
5755 | } | |
5756 | ||
5757 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
5758 | pci_set_drvdata(pdev, hw); | |
5759 | ||
5760 | priv = hw->priv; | |
5761 | priv->hw = hw; | |
5762 | priv->pdev = pdev; | |
5763 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
5764 | ||
5765 | ||
5766 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
5767 | if (priv->sram == NULL) { | |
5768 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
5769 | goto err_iounmap; | |
5770 | } | |
5771 | ||
5772 | /* | |
5773 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
5774 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
5775 | */ | |
5776 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
5777 | if (priv->regs == NULL) { | |
5778 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
5779 | if (priv->regs == NULL) { | |
5780 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
5781 | goto err_iounmap; | |
5782 | } | |
5783 | } | |
5784 | ||
0863ade8 | 5785 | /* |
99020471 BC |
5786 | * Choose the initial fw image depending on user input. If a second |
5787 | * image is available, make it the alternative image that will be | |
5788 | * loaded if the first one fails. | |
0863ade8 | 5789 | */ |
99020471 | 5790 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 5791 | di = priv->device_info; |
99020471 BC |
5792 | if (ap_mode_default && di->fw_image_ap) { |
5793 | priv->fw_pref = di->fw_image_ap; | |
5794 | priv->fw_alt = di->fw_image_sta; | |
5795 | } else if (!ap_mode_default && di->fw_image_sta) { | |
5796 | priv->fw_pref = di->fw_image_sta; | |
5797 | priv->fw_alt = di->fw_image_ap; | |
5798 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 5799 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 5800 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
5801 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
5802 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
5803 | priv->fw_pref = di->fw_image_ap; |
5804 | } | |
5805 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
5806 | if (rc) |
5807 | goto err_stop_firmware; | |
6b6accc3 YAP |
5808 | |
5809 | priv->hw_restart_in_progress = false; | |
5810 | ||
99020471 | 5811 | return rc; |
3cc7772c | 5812 | |
be695fc4 LB |
5813 | err_stop_firmware: |
5814 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
5815 | |
5816 | err_iounmap: | |
a66098da LB |
5817 | if (priv->regs != NULL) |
5818 | pci_iounmap(pdev, priv->regs); | |
5819 | ||
5b9482dd LB |
5820 | if (priv->sram != NULL) |
5821 | pci_iounmap(pdev, priv->sram); | |
5822 | ||
a66098da LB |
5823 | pci_set_drvdata(pdev, NULL); |
5824 | ieee80211_free_hw(hw); | |
5825 | ||
5826 | err_free_reg: | |
5827 | pci_release_regions(pdev); | |
3db95e50 LB |
5828 | |
5829 | err_disable_device: | |
a66098da LB |
5830 | pci_disable_device(pdev); |
5831 | ||
5832 | return rc; | |
5833 | } | |
5834 | ||
230f7af0 | 5835 | static void __devexit mwl8k_shutdown(struct pci_dev *pdev) |
a66098da LB |
5836 | { |
5837 | printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__); | |
5838 | } | |
5839 | ||
230f7af0 | 5840 | static void __devexit mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
5841 | { |
5842 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
5843 | struct mwl8k_priv *priv; | |
5844 | int i; | |
5845 | ||
5846 | if (hw == NULL) | |
5847 | return; | |
5848 | priv = hw->priv; | |
5849 | ||
99020471 BC |
5850 | wait_for_completion(&priv->firmware_loading_complete); |
5851 | ||
5852 | if (priv->fw_state == FW_STATE_ERROR) { | |
5853 | mwl8k_hw_reset(priv); | |
5854 | goto unmap; | |
5855 | } | |
5856 | ||
a66098da LB |
5857 | ieee80211_stop_queues(hw); |
5858 | ||
60aa569f LB |
5859 | ieee80211_unregister_hw(hw); |
5860 | ||
67e2eb27 | 5861 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 5862 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 5863 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 5864 | |
a66098da LB |
5865 | /* Stop hardware */ |
5866 | mwl8k_hw_reset(priv); | |
5867 | ||
5868 | /* Return all skbs to mac80211 */ | |
e600707b | 5869 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 5870 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 5871 | |
e600707b | 5872 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5873 | mwl8k_txq_deinit(hw, i); |
5874 | ||
5875 | mwl8k_rxq_deinit(hw, 0); | |
5876 | ||
c2c357ce | 5877 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 5878 | |
99020471 | 5879 | unmap: |
a66098da | 5880 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 5881 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
5882 | pci_set_drvdata(pdev, NULL); |
5883 | ieee80211_free_hw(hw); | |
5884 | pci_release_regions(pdev); | |
5885 | pci_disable_device(pdev); | |
5886 | } | |
5887 | ||
5888 | static struct pci_driver mwl8k_driver = { | |
5889 | .name = MWL8K_NAME, | |
45a390dd | 5890 | .id_table = mwl8k_pci_id_table, |
a66098da LB |
5891 | .probe = mwl8k_probe, |
5892 | .remove = __devexit_p(mwl8k_remove), | |
5893 | .shutdown = __devexit_p(mwl8k_shutdown), | |
5894 | }; | |
5895 | ||
5b0a3b7e | 5896 | module_pci_driver(mwl8k_driver); |
c2c357ce LB |
5897 | |
5898 | MODULE_DESCRIPTION(MWL8K_DESC); | |
5899 | MODULE_VERSION(MWL8K_VERSION); | |
5900 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
5901 | MODULE_LICENSE("GPL"); |