iwlwifi: remove useless network and duplicate checking
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
3e0d4cb1 49#include "iwl-dev.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
416e1438 56
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57/******************************************************************************
58 *
59 * module boiler plate
60 *
61 ******************************************************************************/
62
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63/*
64 * module name, copyright, version, etc.
65 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
66 */
67
68#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
69
0a6857e7 70#ifdef CONFIG_IWLWIFI_DEBUG
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71#define VD "d"
72#else
73#define VD
74#endif
75
c8b0e6e1 76#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
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77#define VS "s"
78#else
79#define VS
80#endif
81
df48c323 82#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
87MODULE_AUTHOR(DRV_COPYRIGHT);
88MODULE_LICENSE("GPL");
89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
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112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
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118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
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178 return -1;
179 }
180 return 0;
181}
182
183/**
9fbab516 184 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
c79dd5b5 191static int iwl4965_full_rxon_required(struct iwl_priv *priv)
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192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
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196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
210 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
211 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
212 return 1;
213
214 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
215 * be updated with the RXON_ASSOC command -- however only some
216 * flag transitions are allowed using RXON_ASSOC */
217
218 /* Check if we are not switching bands */
219 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
220 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
221 return 1;
222
223 /* Check if we are switching association toggle */
224 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
225 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
226 return 1;
227
228 return 0;
229}
230
b481de9c 231/**
bb8c093b 232 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 233 *
01ebd063 234 * The RXON command in staging_rxon is committed to the hardware and
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235 * the active_rxon structure is updated with the new data. This
236 * function correctly transitions out of the RXON_ASSOC_MSK state if
237 * a HW tune is required based on the RXON structure changes.
238 */
c79dd5b5 239static int iwl4965_commit_rxon(struct iwl_priv *priv)
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240{
241 /* cast away the const for active_rxon in this function */
c1adf9fb 242 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 243 DECLARE_MAC_BUF(mac);
43d59b32
EG
244 int ret;
245 bool new_assoc =
246 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 247
fee1247a 248 if (!iwl_is_alive(priv))
43d59b32 249 return -EBUSY;
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250
251 /* always get timestamp with Rx frame */
252 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
253
43d59b32
EG
254 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
255 if (ret) {
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256 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
257 return -EINVAL;
258 }
259
260 /* If we don't need to send a full RXON, we can use
bb8c093b 261 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 262 * and other flags for the current radio configuration. */
bb8c093b 263 if (!iwl4965_full_rxon_required(priv)) {
43d59b32
EG
264 ret = iwl_send_rxon_assoc(priv);
265 if (ret) {
266 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
267 return ret;
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268 }
269
270 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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271 return 0;
272 }
273
274 /* station table will be cleared */
275 priv->assoc_station_added = 0;
276
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277 /* If we are currently associated and the new config requires
278 * an RXON_ASSOC and the new config wants the associated mask enabled,
279 * we must clear the associated from the active configuration
280 * before we apply the new config */
43d59b32 281 if (iwl_is_associated(priv) && new_assoc) {
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282 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
283 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
284
43d59b32 285 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 286 sizeof(struct iwl_rxon_cmd),
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287 &priv->active_rxon);
288
289 /* If the mask clearing failed then we set
290 * active_rxon back to what it was previously */
43d59b32 291 if (ret) {
b481de9c 292 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
293 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
294 return ret;
b481de9c 295 }
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296 }
297
298 IWL_DEBUG_INFO("Sending RXON\n"
299 "* with%s RXON_FILTER_ASSOC_MSK\n"
300 "* channel = %d\n"
0795af57 301 "* bssid = %s\n",
43d59b32 302 (new_assoc ? "" : "out"),
b481de9c 303 le16_to_cpu(priv->staging_rxon.channel),
0795af57 304 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 305
099b40b7 306 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
307
308 /* Apply the new configuration
309 * RXON unassoc clears the station table in uCode, send it before
310 * we add the bcast station. If assoc bit is set, we will send RXON
311 * after having added the bcast and bssid station.
312 */
313 if (!new_assoc) {
314 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 315 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
316 if (ret) {
317 IWL_ERROR("Error setting new RXON (%d)\n", ret);
318 return ret;
319 }
320 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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321 }
322
37deb2a0 323 iwl_clear_stations_table(priv);
556f8db7 324
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325 if (!priv->error_recovering)
326 priv->start_calib = 0;
327
f0832f13 328 iwl_init_sensitivity(priv);
b481de9c 329
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330 /* If we issue a new RXON command which required a tune then we must
331 * send a new TXPOWER command or we won't be able to Tx any frames */
43d59b32
EG
332 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
333 if (ret) {
334 IWL_ERROR("Error sending TX power (%d)\n", ret);
335 return ret;
b481de9c
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336 }
337
338 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 339 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 340 IWL_INVALID_STATION) {
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341 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
342 return -EIO;
343 }
344
345 /* If we have set the ASSOC_MSK and we are in BSS mode then
346 * add the IWL_AP_ID to the station rate table */
43d59b32 347 if (new_assoc && (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
4f40e4d9 348 if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
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349 == IWL_INVALID_STATION) {
350 IWL_ERROR("Error adding AP address for transmit.\n");
351 return -EIO;
352 }
353 priv->assoc_station_added = 1;
6974e363
EG
354 if (priv->default_wep_key &&
355 iwl_send_static_wepkey_cmd(priv, 0))
356 IWL_ERROR("Could not send WEP static key.\n");
43d59b32
EG
357
358 /* Apply the new configuration
359 * RXON assoc doesn't clear the station table in uCode,
360 */
361 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
362 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
363 if (ret) {
364 IWL_ERROR("Error setting new RXON (%d)\n", ret);
365 return ret;
366 }
367 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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368 }
369
370 return 0;
371}
372
5da4b55f
MA
373void iwl4965_update_chain_flags(struct iwl_priv *priv)
374{
375
c7de35cd 376 iwl_set_rxon_chain(priv);
5da4b55f
MA
377 iwl4965_commit_rxon(priv);
378}
379
c79dd5b5 380static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 381{
bb8c093b 382 struct iwl4965_bt_cmd bt_cmd = {
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383 .flags = 3,
384 .lead_time = 0xAA,
385 .max_kill = 1,
386 .kill_ack_mask = 0,
387 .kill_cts_mask = 0,
388 };
389
857485c0 390 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 391 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
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392}
393
fcab423d 394static void iwl_clear_free_frames(struct iwl_priv *priv)
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395{
396 struct list_head *element;
397
398 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
399 priv->frames_count);
400
401 while (!list_empty(&priv->free_frames)) {
402 element = priv->free_frames.next;
403 list_del(element);
fcab423d 404 kfree(list_entry(element, struct iwl_frame, list));
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405 priv->frames_count--;
406 }
407
408 if (priv->frames_count) {
409 IWL_WARNING("%d frames still in use. Did we lose one?\n",
410 priv->frames_count);
411 priv->frames_count = 0;
412 }
413}
414
fcab423d 415static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 416{
fcab423d 417 struct iwl_frame *frame;
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418 struct list_head *element;
419 if (list_empty(&priv->free_frames)) {
420 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
421 if (!frame) {
422 IWL_ERROR("Could not allocate frame!\n");
423 return NULL;
424 }
425
426 priv->frames_count++;
427 return frame;
428 }
429
430 element = priv->free_frames.next;
431 list_del(element);
fcab423d 432 return list_entry(element, struct iwl_frame, list);
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433}
434
fcab423d 435static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
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436{
437 memset(frame, 0, sizeof(*frame));
438 list_add(&frame->list, &priv->free_frames);
439}
440
c79dd5b5 441unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
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442 struct ieee80211_hdr *hdr,
443 const u8 *dest, int left)
444{
445
3109ece1 446 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
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447 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
448 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
449 return 0;
450
451 if (priv->ibss_beacon->len > left)
452 return 0;
453
454 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
455
456 return priv->ibss_beacon->len;
457}
458
39e88504 459static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 460{
39e88504
GC
461 int i;
462 int rate_mask;
463
464 /* Set rate mask*/
465 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
466 rate_mask = priv->active_rate_basic & 0xF;
467 else
468 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 469
39e88504 470 /* Find lowest valid rate */
b481de9c 471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 472 i = iwl_rates[i].next_ieee) {
b481de9c 473 if (rate_mask & (1 << i))
1826dcc0 474 return iwl_rates[i].plcp;
b481de9c
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475 }
476
39e88504
GC
477 /* No valid rate was found. Assign the lowest one */
478 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
479 return IWL_RATE_1M_PLCP;
480 else
481 return IWL_RATE_6M_PLCP;
b481de9c
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482}
483
c79dd5b5 484static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 485{
fcab423d 486 struct iwl_frame *frame;
b481de9c
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487 unsigned int frame_size;
488 int rc;
489 u8 rate;
490
fcab423d 491 frame = iwl_get_free_frame(priv);
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492
493 if (!frame) {
494 IWL_ERROR("Could not obtain free frame buffer for beacon "
495 "command.\n");
496 return -ENOMEM;
497 }
498
39e88504 499 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 500
bb8c093b 501 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 502
857485c0 503 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
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504 &frame->u.cmd[0]);
505
fcab423d 506 iwl_free_frame(priv, frame);
b481de9c
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507
508 return rc;
509}
510
b481de9c
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511/******************************************************************************
512 *
513 * Misc. internal state and helper functions
514 *
515 ******************************************************************************/
b481de9c 516
d1141dfb
EG
517static void iwl4965_ht_conf(struct iwl_priv *priv,
518 struct ieee80211_bss_conf *bss_conf)
519{
520 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
521 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
522 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
523
524 IWL_DEBUG_MAC80211("enter: \n");
525
526 iwl_conf->is_ht = bss_conf->assoc_ht;
527
528 if (!iwl_conf->is_ht)
529 return;
530
531 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
532
533 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 534 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 535 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 536 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
537
538 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
539 iwl_conf->max_amsdu_size =
540 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
541
542 iwl_conf->supported_chan_width =
543 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
544 iwl_conf->extension_chan_offset =
545 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
546 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
547 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
548 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
549 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 550 iwl_conf->supported_chan_width = 0;
963f5517 551 }
d1141dfb
EG
552
553 iwl_conf->tx_mimo_ps_mode =
554 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
555 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
556
557 iwl_conf->control_channel = ht_bss_conf->primary_channel;
558 iwl_conf->tx_chan_width =
559 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
560 iwl_conf->ht_protection =
561 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
562 iwl_conf->non_GF_STA_present =
563 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
564
565 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
566 IWL_DEBUG_MAC80211("leave\n");
567}
568
b481de9c
ZY
569/*
570 * QoS support
571*/
c79dd5b5 572static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 573 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
574{
575
857485c0 576 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 577 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
578}
579
c79dd5b5 580static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
581{
582 unsigned long flags;
583
b481de9c
ZY
584 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
585 return;
586
587 if (!priv->qos_data.qos_enable)
588 return;
589
590 spin_lock_irqsave(&priv->lock, flags);
591 priv->qos_data.def_qos_parm.qos_flags = 0;
592
593 if (priv->qos_data.qos_cap.q_AP.queue_request &&
594 !priv->qos_data.qos_cap.q_AP.txop_request)
595 priv->qos_data.def_qos_parm.qos_flags |=
596 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
597 if (priv->qos_data.qos_active)
598 priv->qos_data.def_qos_parm.qos_flags |=
599 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
600
fd105e79 601 if (priv->current_ht_config.is_ht)
f1f1f5c7 602 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 603
b481de9c
ZY
604 spin_unlock_irqrestore(&priv->lock, flags);
605
3109ece1 606 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
607 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
608 priv->qos_data.qos_active,
609 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 610
bb8c093b 611 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
612 &(priv->qos_data.def_qos_parm));
613 }
614}
615
b481de9c
ZY
616#define MAX_UCODE_BEACON_INTERVAL 4096
617#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
618
bb8c093b 619static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
620{
621 u16 new_val = 0;
622 u16 beacon_factor = 0;
623
624 beacon_factor =
625 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
626 / MAX_UCODE_BEACON_INTERVAL;
627 new_val = beacon_val / beacon_factor;
628
629 return cpu_to_le16(new_val);
630}
631
c79dd5b5 632static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
633{
634 u64 interval_tm_unit;
635 u64 tsf, result;
636 unsigned long flags;
637 struct ieee80211_conf *conf = NULL;
638 u16 beacon_int = 0;
639
640 conf = ieee80211_get_hw_conf(priv->hw);
641
642 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
643 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
644 priv->rxon_timing.timestamp.dw[0] =
645 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY
646
647 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
648
3109ece1 649 tsf = priv->timestamp;
b481de9c
ZY
650
651 beacon_int = priv->beacon_int;
652 spin_unlock_irqrestore(&priv->lock, flags);
653
654 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
655 if (beacon_int == 0) {
656 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
657 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
658 } else {
659 priv->rxon_timing.beacon_interval =
660 cpu_to_le16(beacon_int);
661 priv->rxon_timing.beacon_interval =
bb8c093b 662 iwl4965_adjust_beacon_interval(
b481de9c
ZY
663 le16_to_cpu(priv->rxon_timing.beacon_interval));
664 }
665
666 priv->rxon_timing.atim_window = 0;
667 } else {
668 priv->rxon_timing.beacon_interval =
bb8c093b 669 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
670 /* TODO: we need to get atim_window from upper stack
671 * for now we set to 0 */
672 priv->rxon_timing.atim_window = 0;
673 }
674
675 interval_tm_unit =
676 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
677 result = do_div(tsf, interval_tm_unit);
678 priv->rxon_timing.beacon_init_val =
679 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
680
681 IWL_DEBUG_ASSOC
682 ("beacon interval %d beacon timer %d beacon tim %d\n",
683 le16_to_cpu(priv->rxon_timing.beacon_interval),
684 le32_to_cpu(priv->rxon_timing.beacon_init_val),
685 le16_to_cpu(priv->rxon_timing.atim_window));
686}
687
82a66bbb
TW
688static void iwl_set_flags_for_band(struct iwl_priv *priv,
689 enum ieee80211_band band)
b481de9c 690{
8318d78a 691 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
692 priv->staging_rxon.flags &=
693 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
694 | RXON_FLG_CCK_MSK);
695 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
696 } else {
508e32e1 697 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
698 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
699 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
700 else
701 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
702
703 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
704 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
705
706 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
707 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
708 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
709 }
710}
711
712/*
01ebd063 713 * initialize rxon structure with default values from eeprom
b481de9c 714 */
c79dd5b5 715static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 716{
bf85ea4f 717 const struct iwl_channel_info *ch_info;
b481de9c
ZY
718
719 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
720
721 switch (priv->iw_mode) {
722 case IEEE80211_IF_TYPE_AP:
723 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
724 break;
725
726 case IEEE80211_IF_TYPE_STA:
727 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
728 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
729 break;
730
731 case IEEE80211_IF_TYPE_IBSS:
732 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
733 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
734 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
735 RXON_FILTER_ACCEPT_GRP_MSK;
736 break;
737
738 case IEEE80211_IF_TYPE_MNTR:
739 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
740 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
741 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
742 break;
69dc5d9d
TW
743 default:
744 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
745 break;
b481de9c
ZY
746 }
747
748#if 0
749 /* TODO: Figure out when short_preamble would be set and cache from
750 * that */
751 if (!hw_to_local(priv->hw)->short_preamble)
752 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
753 else
754 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
755#endif
756
8622e705 757 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY
758 le16_to_cpu(priv->staging_rxon.channel));
759
760 if (!ch_info)
761 ch_info = &priv->channel_info[0];
762
763 /*
764 * in some case A channels are all non IBSS
765 * in this case force B/G channel
766 */
767 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
768 !(is_channel_ibss(ch_info)))
769 ch_info = &priv->channel_info[0];
770
771 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 772 priv->band = ch_info->band;
b481de9c 773
82a66bbb 774 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
775
776 priv->staging_rxon.ofdm_basic_rates =
777 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
778 priv->staging_rxon.cck_basic_rates =
779 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
780
781 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
782 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
783 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
784 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
785 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
786 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 787 iwl_set_rxon_chain(priv);
b481de9c
ZY
788}
789
c79dd5b5 790static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 791{
b481de9c
ZY
792 priv->iw_mode = mode;
793
398f9e76
AK
794 /* init channel/phymode to values given at driver init */
795 iwl_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
796
bb8c093b 797 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
798 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
799
37deb2a0 800 iwl_clear_stations_table(priv);
b481de9c 801
fde3571f 802 /* dont commit rxon if rf-kill is on*/
fee1247a 803 if (!iwl_is_ready_rf(priv))
fde3571f
MA
804 return -EAGAIN;
805
806 cancel_delayed_work(&priv->scan_check);
2a421b91 807 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
808 IWL_WARNING("Aborted scan still in progress after 100ms\n");
809 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
810 return -EAGAIN;
811 }
812
bb8c093b 813 iwl4965_commit_rxon(priv);
b481de9c
ZY
814
815 return 0;
816}
817
c79dd5b5 818static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 819{
8318d78a 820 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
821 struct ieee80211_rate *rate;
822 int i;
823
d1141dfb 824 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
825 if (!hw) {
826 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
827 return;
828 }
b481de9c
ZY
829
830 priv->active_rate = 0;
831 priv->active_rate_basic = 0;
832
8318d78a
JB
833 for (i = 0; i < hw->n_bitrates; i++) {
834 rate = &(hw->bitrates[i]);
835 if (rate->hw_value < IWL_RATE_COUNT)
836 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
837 }
838
839 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
840 priv->active_rate, priv->active_rate_basic);
841
842 /*
843 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
844 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
845 * OFDM
846 */
847 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
848 priv->staging_rxon.cck_basic_rates =
849 ((priv->active_rate_basic &
850 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
851 else
852 priv->staging_rxon.cck_basic_rates =
853 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
854
855 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
856 priv->staging_rxon.ofdm_basic_rates =
857 ((priv->active_rate_basic &
858 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
859 IWL_FIRST_OFDM_RATE) & 0xFF;
860 else
861 priv->staging_rxon.ofdm_basic_rates =
862 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
863}
864
c8b0e6e1 865#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
866
867#include "iwl-spectrum.h"
868
869#define BEACON_TIME_MASK_LOW 0x00FFFFFF
870#define BEACON_TIME_MASK_HIGH 0xFF000000
871#define TIME_UNIT 1024
872
873/*
874 * extended beacon time format
875 * time in usec will be changed into a 32-bit value in 8:24 format
876 * the high 1 byte is the beacon counts
877 * the lower 3 bytes is the time in usec within one beacon interval
878 */
879
bb8c093b 880static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
881{
882 u32 quot;
883 u32 rem;
884 u32 interval = beacon_interval * 1024;
885
886 if (!interval || !usec)
887 return 0;
888
889 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
890 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
891
892 return (quot << 24) + rem;
893}
894
895/* base is usually what we get from ucode with each received frame,
896 * the same as HW timer counter counting down
897 */
898
bb8c093b 899static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
900{
901 u32 base_low = base & BEACON_TIME_MASK_LOW;
902 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
903 u32 interval = beacon_interval * TIME_UNIT;
904 u32 res = (base & BEACON_TIME_MASK_HIGH) +
905 (addon & BEACON_TIME_MASK_HIGH);
906
907 if (base_low > addon_low)
908 res += base_low - addon_low;
909 else if (base_low < addon_low) {
910 res += interval + base_low - addon_low;
911 res += (1 << 24);
912 } else
913 res += (1 << 24);
914
915 return cpu_to_le32(res);
916}
917
c79dd5b5 918static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
919 struct ieee80211_measurement_params *params,
920 u8 type)
921{
bb8c093b 922 struct iwl4965_spectrum_cmd spectrum;
db11d634 923 struct iwl_rx_packet *res;
857485c0 924 struct iwl_host_cmd cmd = {
b481de9c
ZY
925 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
926 .data = (void *)&spectrum,
927 .meta.flags = CMD_WANT_SKB,
928 };
929 u32 add_time = le64_to_cpu(params->start_time);
930 int rc;
931 int spectrum_resp_status;
932 int duration = le16_to_cpu(params->duration);
933
3109ece1 934 if (iwl_is_associated(priv))
b481de9c 935 add_time =
bb8c093b 936 iwl4965_usecs_to_beacons(
b481de9c
ZY
937 le64_to_cpu(params->start_time) - priv->last_tsf,
938 le16_to_cpu(priv->rxon_timing.beacon_interval));
939
940 memset(&spectrum, 0, sizeof(spectrum));
941
942 spectrum.channel_count = cpu_to_le16(1);
943 spectrum.flags =
944 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
945 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
946 cmd.len = sizeof(spectrum);
947 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
948
3109ece1 949 if (iwl_is_associated(priv))
b481de9c 950 spectrum.start_time =
bb8c093b 951 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
952 add_time,
953 le16_to_cpu(priv->rxon_timing.beacon_interval));
954 else
955 spectrum.start_time = 0;
956
957 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
958 spectrum.channels[0].channel = params->channel;
959 spectrum.channels[0].type = type;
960 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
961 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
962 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
963
857485c0 964 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
965 if (rc)
966 return rc;
967
db11d634 968 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
969 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
970 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
971 rc = -EIO;
972 }
973
974 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
975 switch (spectrum_resp_status) {
976 case 0: /* Command will be handled */
977 if (res->u.spectrum.id != 0xff) {
978 IWL_DEBUG_INFO
979 ("Replaced existing measurement: %d\n",
980 res->u.spectrum.id);
981 priv->measurement_status &= ~MEASUREMENT_READY;
982 }
983 priv->measurement_status |= MEASUREMENT_ACTIVE;
984 rc = 0;
985 break;
986
987 case 1: /* Command will not be handled */
988 rc = -EAGAIN;
989 break;
990 }
991
992 dev_kfree_skb_any(cmd.meta.u.skb);
993
994 return rc;
995}
996#endif
997
b481de9c
ZY
998/******************************************************************************
999 *
1000 * Generic RX handler implementations
1001 *
1002 ******************************************************************************/
885ba202
TW
1003static void iwl_rx_reply_alive(struct iwl_priv *priv,
1004 struct iwl_rx_mem_buffer *rxb)
b481de9c 1005{
db11d634 1006 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1007 struct iwl_alive_resp *palive;
b481de9c
ZY
1008 struct delayed_work *pwork;
1009
1010 palive = &pkt->u.alive_frame;
1011
1012 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1013 "0x%01X 0x%01X\n",
1014 palive->is_valid, palive->ver_type,
1015 palive->ver_subtype);
1016
1017 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1018 IWL_DEBUG_INFO("Initialization Alive received.\n");
1019 memcpy(&priv->card_alive_init,
1020 &pkt->u.alive_frame,
885ba202 1021 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1022 pwork = &priv->init_alive_start;
1023 } else {
1024 IWL_DEBUG_INFO("Runtime Alive received.\n");
1025 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1026 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1027 pwork = &priv->alive_start;
1028 }
1029
1030 /* We delay the ALIVE response by 5ms to
1031 * give the HW RF Kill time to activate... */
1032 if (palive->is_valid == UCODE_VALID_OK)
1033 queue_delayed_work(priv->workqueue, pwork,
1034 msecs_to_jiffies(5));
1035 else
1036 IWL_WARNING("uCode did not respond OK.\n");
1037}
1038
c79dd5b5 1039static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1040 struct iwl_rx_mem_buffer *rxb)
b481de9c 1041{
db11d634 1042 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1043
1044 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1045 "seq 0x%04X ser 0x%08X\n",
1046 le32_to_cpu(pkt->u.err_resp.error_type),
1047 get_cmd_string(pkt->u.err_resp.cmd_id),
1048 pkt->u.err_resp.cmd_id,
1049 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1050 le32_to_cpu(pkt->u.err_resp.error_info));
1051}
1052
1053#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1054
a55360e4 1055static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1056{
db11d634 1057 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1058 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1059 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1060 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1061 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1062 rxon->channel = csa->channel;
1063 priv->staging_rxon.channel = csa->channel;
1064}
1065
c79dd5b5 1066static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1067 struct iwl_rx_mem_buffer *rxb)
b481de9c 1068{
c8b0e6e1 1069#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
db11d634 1070 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1071 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1072
1073 if (!report->state) {
f3d67999
EK
1074 IWL_DEBUG(IWL_DL_11H,
1075 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1076 return;
1077 }
1078
1079 memcpy(&priv->measure_report, report, sizeof(*report));
1080 priv->measurement_status |= MEASUREMENT_READY;
1081#endif
1082}
1083
c79dd5b5 1084static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1085 struct iwl_rx_mem_buffer *rxb)
b481de9c 1086{
0a6857e7 1087#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1088 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1089 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1090 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1091 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1092#endif
1093}
1094
c79dd5b5 1095static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1096 struct iwl_rx_mem_buffer *rxb)
b481de9c 1097{
db11d634 1098 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1099 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1100 "notification for %s:\n",
1101 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1102 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1103}
1104
bb8c093b 1105static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1106{
c79dd5b5
TW
1107 struct iwl_priv *priv =
1108 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1109 struct sk_buff *beacon;
1110
1111 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1112 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1113
1114 if (!beacon) {
1115 IWL_ERROR("update beacon failed\n");
1116 return;
1117 }
1118
1119 mutex_lock(&priv->mutex);
1120 /* new beacon skb is allocated every time; dispose previous.*/
1121 if (priv->ibss_beacon)
1122 dev_kfree_skb(priv->ibss_beacon);
1123
1124 priv->ibss_beacon = beacon;
1125 mutex_unlock(&priv->mutex);
1126
bb8c093b 1127 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1128}
1129
4e39317d
EG
1130/**
1131 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1132 *
1133 * This callback is provided in order to send a statistics request.
1134 *
1135 * This timer function is continually reset to execute within
1136 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1137 * was received. We need to ensure we receive the statistics in order
1138 * to update the temperature used for calibrating the TXPOWER.
1139 */
1140static void iwl4965_bg_statistics_periodic(unsigned long data)
1141{
1142 struct iwl_priv *priv = (struct iwl_priv *)data;
1143
1144 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1145 return;
1146
1147 iwl_send_statistics_request(priv, CMD_ASYNC);
1148}
1149
c79dd5b5 1150static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1151 struct iwl_rx_mem_buffer *rxb)
b481de9c 1152{
0a6857e7 1153#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1154 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1155 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1156 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1157
1158 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1159 "tsf %d %d rate %d\n",
25a6572c 1160 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1161 beacon->beacon_notify_hdr.failure_frame,
1162 le32_to_cpu(beacon->ibss_mgr_status),
1163 le32_to_cpu(beacon->high_tsf),
1164 le32_to_cpu(beacon->low_tsf), rate);
1165#endif
1166
1167 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
1168 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1169 queue_work(priv->workqueue, &priv->beacon_update);
1170}
1171
b481de9c
ZY
1172/* Handle notification from uCode that card's power state is changing
1173 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1174static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1175 struct iwl_rx_mem_buffer *rxb)
b481de9c 1176{
db11d634 1177 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1178 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1179 unsigned long status = priv->status;
1180
1181 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1182 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1183 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1184
1185 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1186 RF_CARD_DISABLED)) {
1187
3395f6e9 1188 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1189 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1190
3395f6e9
TW
1191 if (!iwl_grab_nic_access(priv)) {
1192 iwl_write_direct32(
b481de9c
ZY
1193 priv, HBUS_TARG_MBX_C,
1194 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1195
3395f6e9 1196 iwl_release_nic_access(priv);
b481de9c
ZY
1197 }
1198
1199 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1200 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1201 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1202 if (!iwl_grab_nic_access(priv)) {
1203 iwl_write_direct32(
b481de9c
ZY
1204 priv, HBUS_TARG_MBX_C,
1205 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1206
3395f6e9 1207 iwl_release_nic_access(priv);
b481de9c
ZY
1208 }
1209 }
1210
1211 if (flags & RF_CARD_DISABLED) {
3395f6e9 1212 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1213 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1214 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1215 if (!iwl_grab_nic_access(priv))
1216 iwl_release_nic_access(priv);
b481de9c
ZY
1217 }
1218 }
1219
1220 if (flags & HW_CARD_DISABLED)
1221 set_bit(STATUS_RF_KILL_HW, &priv->status);
1222 else
1223 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1224
1225
1226 if (flags & SW_CARD_DISABLED)
1227 set_bit(STATUS_RF_KILL_SW, &priv->status);
1228 else
1229 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1230
1231 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1232 iwl_scan_cancel(priv);
b481de9c
ZY
1233
1234 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1235 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1236 (test_bit(STATUS_RF_KILL_SW, &status) !=
1237 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1238 queue_work(priv->workqueue, &priv->rf_kill);
1239 else
1240 wake_up_interruptible(&priv->wait_command_queue);
1241}
1242
1243/**
bb8c093b 1244 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1245 *
1246 * Setup the RX handlers for each of the reply types sent from the uCode
1247 * to the host.
1248 *
1249 * This function chains into the hardware specific files for them to setup
1250 * any hardware specific handlers as well.
1251 */
c79dd5b5 1252static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1253{
885ba202 1254 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1255 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1256 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1257 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1258 iwl4965_rx_spectrum_measure_notif;
1259 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1260 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1261 iwl4965_rx_pm_debug_statistics_notif;
1262 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1263
9fbab516
BC
1264 /*
1265 * The same handler is used for both the REPLY to a discrete
1266 * statistics request from the host as well as for the periodic
1267 * statistics notifications (after received beacons) from the uCode.
b481de9c 1268 */
8f91aecb
EG
1269 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1270 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1271
1272 iwl_setup_rx_scan_handlers(priv);
1273
37a44211 1274 /* status change handler */
bb8c093b 1275 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1276
c1354754
TW
1277 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1278 iwl_rx_missed_beacon_notif;
37a44211 1279 /* Rx handlers */
1781a07f
EG
1280 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1281 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
9fbab516 1282 /* Set up hardware specific Rx handlers */
d4789efe 1283 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1284}
1285
5c0eef96
MA
1286/*
1287 * this should be called while priv->lock is locked
1288*/
a55360e4 1289static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1290{
a55360e4
TW
1291 iwl_rx_allocate(priv);
1292 iwl_rx_queue_restock(priv);
b481de9c
ZY
1293}
1294
b481de9c
ZY
1295
1296/**
a55360e4 1297 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1298 *
1299 * Uses the priv->rx_handlers callback function array to invoke
1300 * the appropriate handlers, including command responses,
1301 * frame-received notifications, and other notifications.
1302 */
a55360e4 1303void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1304{
a55360e4 1305 struct iwl_rx_mem_buffer *rxb;
db11d634 1306 struct iwl_rx_packet *pkt;
a55360e4 1307 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1308 u32 r, i;
1309 int reclaim;
1310 unsigned long flags;
5c0eef96 1311 u8 fill_rx = 0;
d68ab680 1312 u32 count = 8;
b481de9c 1313
6440adb5
BC
1314 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1315 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1316 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1317 i = rxq->read;
1318
1319 /* Rx interrupt, but nothing sent from uCode */
1320 if (i == r)
f3d67999 1321 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1322
a55360e4 1323 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1324 fill_rx = 1;
1325
b481de9c
ZY
1326 while (i != r) {
1327 rxb = rxq->queue[i];
1328
9fbab516 1329 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1330 * then a bug has been introduced in the queue refilling
1331 * routines -- catch it here */
1332 BUG_ON(rxb == NULL);
1333
1334 rxq->queue[i] = NULL;
1335
1336 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1337 priv->hw_params.rx_buf_size,
b481de9c 1338 PCI_DMA_FROMDEVICE);
db11d634 1339 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1340
1341 /* Reclaim a command buffer only if this packet is a response
1342 * to a (driver-originated) command.
1343 * If the packet (e.g. Rx frame) originated from uCode,
1344 * there is no command buffer to reclaim.
1345 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1346 * but apparently a few don't get set; catch them here. */
1347 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1348 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1349 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1350 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1351 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1352 (pkt->hdr.cmd != REPLY_TX);
1353
1354 /* Based on type of command response or notification,
1355 * handle those that need handling via function in
bb8c093b 1356 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1357 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1358 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1359 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1360 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1361 } else {
1362 /* No handling needed */
f3d67999 1363 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1364 "r %d i %d No handler needed for %s, 0x%02x\n",
1365 r, i, get_cmd_string(pkt->hdr.cmd),
1366 pkt->hdr.cmd);
1367 }
1368
1369 if (reclaim) {
9fbab516 1370 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1371 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1372 * as we reclaim the driver command queue */
1373 if (rxb && rxb->skb)
17b88929 1374 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1375 else
1376 IWL_WARNING("Claim null rxb?\n");
1377 }
1378
1379 /* For now we just don't re-use anything. We can tweak this
1380 * later to try and re-use notification packets and SKBs that
1381 * fail to Rx correctly */
1382 if (rxb->skb != NULL) {
1383 priv->alloc_rxb_skb--;
1384 dev_kfree_skb_any(rxb->skb);
1385 rxb->skb = NULL;
1386 }
1387
1388 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1389 priv->hw_params.rx_buf_size,
9ee1ba47 1390 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1391 spin_lock_irqsave(&rxq->lock, flags);
1392 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1393 spin_unlock_irqrestore(&rxq->lock, flags);
1394 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1395 /* If there are a lot of unused frames,
1396 * restock the Rx queue so ucode wont assert. */
1397 if (fill_rx) {
1398 count++;
1399 if (count >= 8) {
1400 priv->rxq.read = i;
a55360e4 1401 __iwl_rx_replenish(priv);
5c0eef96
MA
1402 count = 0;
1403 }
1404 }
b481de9c
ZY
1405 }
1406
1407 /* Backtrack one entry */
1408 priv->rxq.read = i;
a55360e4
TW
1409 iwl_rx_queue_restock(priv);
1410}
a55360e4 1411
0a6857e7 1412#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1413static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1414{
c1adf9fb 1415 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1416 DECLARE_MAC_BUF(mac);
1417
b481de9c 1418 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1419 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1420 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1421 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1422 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1423 le32_to_cpu(rxon->filter_flags));
1424 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1425 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1426 rxon->ofdm_basic_rates);
1427 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1428 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1429 print_mac(mac, rxon->node_addr));
1430 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1431 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1432 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1433}
1434#endif
1435
c79dd5b5 1436static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1437{
1438 IWL_DEBUG_ISR("Enabling interrupts\n");
1439 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1440 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1441}
1442
0359facc
MA
1443/* call this function to flush any scheduled tasklet */
1444static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1445{
1446 /* wait to make sure we flush pedding tasklet*/
1447 synchronize_irq(priv->pci_dev->irq);
1448 tasklet_kill(&priv->irq_tasklet);
1449}
1450
c79dd5b5 1451static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1452{
1453 clear_bit(STATUS_INT_ENABLED, &priv->status);
1454
1455 /* disable interrupts from uCode/NIC to host */
3395f6e9 1456 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1457
1458 /* acknowledge/clear/reset any interrupts still pending
1459 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1460 iwl_write32(priv, CSR_INT, 0xffffffff);
1461 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1462 IWL_DEBUG_ISR("Disabled interrupts\n");
1463}
1464
b481de9c 1465
b481de9c 1466/**
bb8c093b 1467 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1468 */
c79dd5b5 1469static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1470{
bb8c093b 1471 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1472 set_bit(STATUS_FW_ERROR, &priv->status);
1473
1474 /* Cancel currently queued command. */
1475 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1476
0a6857e7 1477#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1478 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1479 iwl_dump_nic_error_log(priv);
189a2b59 1480 iwl_dump_nic_event_log(priv);
bf403db8 1481 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1482 }
1483#endif
1484
1485 wake_up_interruptible(&priv->wait_command_queue);
1486
1487 /* Keep the restart process from trying to send host
1488 * commands by clearing the INIT status bit */
1489 clear_bit(STATUS_READY, &priv->status);
1490
1491 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1492 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1493 "Restarting adapter due to uCode error.\n");
1494
3109ece1 1495 if (iwl_is_associated(priv)) {
b481de9c
ZY
1496 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1497 sizeof(priv->recovery_rxon));
1498 priv->error_recovering = 1;
1499 }
3a1081e8
EK
1500 if (priv->cfg->mod_params->restart_fw)
1501 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1502 }
1503}
1504
c79dd5b5 1505static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1506{
1507 unsigned long flags;
1508
1509 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1510 sizeof(priv->staging_rxon));
1511 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1512 iwl4965_commit_rxon(priv);
b481de9c 1513
4f40e4d9 1514 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1515
1516 spin_lock_irqsave(&priv->lock, flags);
1517 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1518 priv->error_recovering = 0;
1519 spin_unlock_irqrestore(&priv->lock, flags);
1520}
1521
c79dd5b5 1522static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1523{
1524 u32 inta, handled = 0;
1525 u32 inta_fh;
1526 unsigned long flags;
0a6857e7 1527#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1528 u32 inta_mask;
1529#endif
1530
1531 spin_lock_irqsave(&priv->lock, flags);
1532
1533 /* Ack/clear/reset pending uCode interrupts.
1534 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1535 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1536 inta = iwl_read32(priv, CSR_INT);
1537 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1538
1539 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1540 * Any new interrupts that happen after this, either while we're
1541 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1542 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1543 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1544
0a6857e7 1545#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1546 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1547 /* just for debug */
3395f6e9 1548 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1549 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1550 inta, inta_mask, inta_fh);
1551 }
1552#endif
1553
1554 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1555 * atomic, make sure that inta covers all the interrupts that
1556 * we've discovered, even if FH interrupt came in just after
1557 * reading CSR_INT. */
6f83eaa1 1558 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1559 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1560 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1561 inta |= CSR_INT_BIT_FH_TX;
1562
1563 /* Now service all interrupt bits discovered above. */
1564 if (inta & CSR_INT_BIT_HW_ERR) {
1565 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1566
1567 /* Tell the device to stop sending interrupts */
bb8c093b 1568 iwl4965_disable_interrupts(priv);
b481de9c 1569
bb8c093b 1570 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1571
1572 handled |= CSR_INT_BIT_HW_ERR;
1573
1574 spin_unlock_irqrestore(&priv->lock, flags);
1575
1576 return;
1577 }
1578
0a6857e7 1579#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1580 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1581 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1582 if (inta & CSR_INT_BIT_SCD)
1583 IWL_DEBUG_ISR("Scheduler finished to transmit "
1584 "the frame/frames.\n");
b481de9c
ZY
1585
1586 /* Alive notification via Rx interrupt will do the real work */
1587 if (inta & CSR_INT_BIT_ALIVE)
1588 IWL_DEBUG_ISR("Alive interrupt\n");
1589 }
1590#endif
1591 /* Safely ignore these bits for debug checks below */
25c03d8e 1592 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1593
9fbab516 1594 /* HW RF KILL switch toggled */
b481de9c
ZY
1595 if (inta & CSR_INT_BIT_RF_KILL) {
1596 int hw_rf_kill = 0;
3395f6e9 1597 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1598 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1599 hw_rf_kill = 1;
1600
f3d67999 1601 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1602 hw_rf_kill ? "disable radio":"enable radio");
1603
1604 /* Queue restart only if RF_KILL switch was set to "kill"
1605 * when we loaded driver, and is now set to "enable".
1606 * After we're Alive, RF_KILL gets handled by
3230455d 1607 * iwl4965_rx_card_state_notif() */
53e49093
ZY
1608 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
1609 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 1610 queue_work(priv->workqueue, &priv->restart);
53e49093 1611 }
b481de9c
ZY
1612
1613 handled |= CSR_INT_BIT_RF_KILL;
1614 }
1615
9fbab516 1616 /* Chip got too hot and stopped itself */
b481de9c
ZY
1617 if (inta & CSR_INT_BIT_CT_KILL) {
1618 IWL_ERROR("Microcode CT kill error detected.\n");
1619 handled |= CSR_INT_BIT_CT_KILL;
1620 }
1621
1622 /* Error detected by uCode */
1623 if (inta & CSR_INT_BIT_SW_ERR) {
1624 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1625 inta);
bb8c093b 1626 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1627 handled |= CSR_INT_BIT_SW_ERR;
1628 }
1629
1630 /* uCode wakes up after power-down sleep */
1631 if (inta & CSR_INT_BIT_WAKEUP) {
1632 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1633 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1634 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1635 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1636 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1637 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1638 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1639 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1640
1641 handled |= CSR_INT_BIT_WAKEUP;
1642 }
1643
1644 /* All uCode command responses, including Tx command responses,
1645 * Rx "responses" (frame-received notification), and other
1646 * notifications from uCode come through here*/
1647 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1648 iwl_rx_handle(priv);
b481de9c
ZY
1649 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1650 }
1651
1652 if (inta & CSR_INT_BIT_FH_TX) {
1653 IWL_DEBUG_ISR("Tx interrupt\n");
1654 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1655 /* FH finished to write, send event */
1656 priv->ucode_write_complete = 1;
1657 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1658 }
1659
1660 if (inta & ~handled)
1661 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1662
1663 if (inta & ~CSR_INI_SET_MASK) {
1664 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1665 inta & ~CSR_INI_SET_MASK);
1666 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1667 }
1668
1669 /* Re-enable all interrupts */
0359facc
MA
1670 /* only Re-enable if diabled by irq */
1671 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1672 iwl4965_enable_interrupts(priv);
b481de9c 1673
0a6857e7 1674#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1675 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1676 inta = iwl_read32(priv, CSR_INT);
1677 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1678 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1679 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1680 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1681 }
1682#endif
1683 spin_unlock_irqrestore(&priv->lock, flags);
1684}
1685
bb8c093b 1686static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1687{
c79dd5b5 1688 struct iwl_priv *priv = data;
b481de9c
ZY
1689 u32 inta, inta_mask;
1690 u32 inta_fh;
1691 if (!priv)
1692 return IRQ_NONE;
1693
1694 spin_lock(&priv->lock);
1695
1696 /* Disable (but don't clear!) interrupts here to avoid
1697 * back-to-back ISRs and sporadic interrupts from our NIC.
1698 * If we have something to service, the tasklet will re-enable ints.
1699 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1700 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1701 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1702
1703 /* Discover which interrupts are active/pending */
3395f6e9
TW
1704 inta = iwl_read32(priv, CSR_INT);
1705 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1706
1707 /* Ignore interrupt if there's nothing in NIC to service.
1708 * This may be due to IRQ shared with another device,
1709 * or due to sporadic interrupts thrown from our NIC. */
1710 if (!inta && !inta_fh) {
1711 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1712 goto none;
1713 }
1714
1715 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1716 /* Hardware disappeared. It might have already raised
1717 * an interrupt */
b481de9c 1718 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1719 goto unplugged;
b481de9c
ZY
1720 }
1721
1722 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1723 inta, inta_mask, inta_fh);
1724
25c03d8e
JP
1725 inta &= ~CSR_INT_BIT_SCD;
1726
bb8c093b 1727 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1728 if (likely(inta || inta_fh))
1729 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1730
66fbb541
ON
1731 unplugged:
1732 spin_unlock(&priv->lock);
b481de9c
ZY
1733 return IRQ_HANDLED;
1734
1735 none:
1736 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1737 /* only Re-enable if diabled by irq */
1738 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1739 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1740 spin_unlock(&priv->lock);
1741 return IRQ_NONE;
1742}
1743
b481de9c
ZY
1744/******************************************************************************
1745 *
1746 * uCode download functions
1747 *
1748 ******************************************************************************/
1749
c79dd5b5 1750static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1751{
98c92211
TW
1752 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1753 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1754 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1755 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1756 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1757 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1758}
1759
edcdf8b2
RR
1760static void iwl4965_nic_start(struct iwl_priv *priv)
1761{
1762 /* Remove all resets to allow NIC to operate */
1763 iwl_write32(priv, CSR_RESET, 0);
1764}
1765
1766
b481de9c 1767/**
bb8c093b 1768 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1769 *
1770 * Copy into buffers for card to fetch via bus-mastering
1771 */
c79dd5b5 1772static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1773{
14b3d338 1774 struct iwl_ucode *ucode;
90e759d1 1775 int ret;
b481de9c 1776 const struct firmware *ucode_raw;
4bf775cd 1777 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1778 u8 *src;
1779 size_t len;
1780 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1781
1782 /* Ask kernel firmware_class module to get the boot firmware off disk.
1783 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1784 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1785 if (ret < 0) {
1786 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1787 name, ret);
b481de9c
ZY
1788 goto error;
1789 }
1790
1791 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1792 name, ucode_raw->size);
1793
1794 /* Make sure that we got at least our header! */
1795 if (ucode_raw->size < sizeof(*ucode)) {
1796 IWL_ERROR("File size way too small!\n");
90e759d1 1797 ret = -EINVAL;
b481de9c
ZY
1798 goto err_release;
1799 }
1800
1801 /* Data from ucode file: header followed by uCode images */
1802 ucode = (void *)ucode_raw->data;
1803
1804 ver = le32_to_cpu(ucode->ver);
1805 inst_size = le32_to_cpu(ucode->inst_size);
1806 data_size = le32_to_cpu(ucode->data_size);
1807 init_size = le32_to_cpu(ucode->init_size);
1808 init_data_size = le32_to_cpu(ucode->init_data_size);
1809 boot_size = le32_to_cpu(ucode->boot_size);
1810
1811 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1812 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1813 inst_size);
1814 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1815 data_size);
1816 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1817 init_size);
1818 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1819 init_data_size);
1820 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1821 boot_size);
1822
1823 /* Verify size of file vs. image size info in file's header */
1824 if (ucode_raw->size < sizeof(*ucode) +
1825 inst_size + data_size + init_size +
1826 init_data_size + boot_size) {
1827
1828 IWL_DEBUG_INFO("uCode file size %d too small\n",
1829 (int)ucode_raw->size);
90e759d1 1830 ret = -EINVAL;
b481de9c
ZY
1831 goto err_release;
1832 }
1833
1834 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1835 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1836 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1837 inst_size);
1838 ret = -EINVAL;
b481de9c
ZY
1839 goto err_release;
1840 }
1841
099b40b7 1842 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1843 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1844 data_size);
1845 ret = -EINVAL;
b481de9c
ZY
1846 goto err_release;
1847 }
099b40b7 1848 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1849 IWL_DEBUG_INFO
90e759d1
TW
1850 ("uCode init instr len %d too large to fit in\n",
1851 init_size);
1852 ret = -EINVAL;
b481de9c
ZY
1853 goto err_release;
1854 }
099b40b7 1855 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1856 IWL_DEBUG_INFO
90e759d1
TW
1857 ("uCode init data len %d too large to fit in\n",
1858 init_data_size);
1859 ret = -EINVAL;
b481de9c
ZY
1860 goto err_release;
1861 }
099b40b7 1862 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1863 IWL_DEBUG_INFO
90e759d1
TW
1864 ("uCode boot instr len %d too large to fit in\n",
1865 boot_size);
1866 ret = -EINVAL;
b481de9c
ZY
1867 goto err_release;
1868 }
1869
1870 /* Allocate ucode buffers for card's bus-master loading ... */
1871
1872 /* Runtime instructions and 2 copies of data:
1873 * 1) unmodified from disk
1874 * 2) backup cache for save/restore during power-downs */
1875 priv->ucode_code.len = inst_size;
98c92211 1876 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1877
1878 priv->ucode_data.len = data_size;
98c92211 1879 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1880
1881 priv->ucode_data_backup.len = data_size;
98c92211 1882 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1883
1884 /* Initialization instructions and data */
90e759d1
TW
1885 if (init_size && init_data_size) {
1886 priv->ucode_init.len = init_size;
98c92211 1887 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1888
1889 priv->ucode_init_data.len = init_data_size;
98c92211 1890 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1891
1892 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1893 goto err_pci_alloc;
1894 }
b481de9c
ZY
1895
1896 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1897 if (boot_size) {
1898 priv->ucode_boot.len = boot_size;
98c92211 1899 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1900
90e759d1
TW
1901 if (!priv->ucode_boot.v_addr)
1902 goto err_pci_alloc;
1903 }
b481de9c
ZY
1904
1905 /* Copy images into buffers for card's bus-master reads ... */
1906
1907 /* Runtime instructions (first block of data in file) */
1908 src = &ucode->data[0];
1909 len = priv->ucode_code.len;
90e759d1 1910 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1911 memcpy(priv->ucode_code.v_addr, src, len);
1912 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1913 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1914
1915 /* Runtime data (2nd block)
bb8c093b 1916 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1917 src = &ucode->data[inst_size];
1918 len = priv->ucode_data.len;
90e759d1 1919 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1920 memcpy(priv->ucode_data.v_addr, src, len);
1921 memcpy(priv->ucode_data_backup.v_addr, src, len);
1922
1923 /* Initialization instructions (3rd block) */
1924 if (init_size) {
1925 src = &ucode->data[inst_size + data_size];
1926 len = priv->ucode_init.len;
90e759d1
TW
1927 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1928 len);
b481de9c
ZY
1929 memcpy(priv->ucode_init.v_addr, src, len);
1930 }
1931
1932 /* Initialization data (4th block) */
1933 if (init_data_size) {
1934 src = &ucode->data[inst_size + data_size + init_size];
1935 len = priv->ucode_init_data.len;
90e759d1
TW
1936 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1937 len);
b481de9c
ZY
1938 memcpy(priv->ucode_init_data.v_addr, src, len);
1939 }
1940
1941 /* Bootstrap instructions (5th block) */
1942 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1943 len = priv->ucode_boot.len;
90e759d1 1944 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1945 memcpy(priv->ucode_boot.v_addr, src, len);
1946
1947 /* We have our copies now, allow OS release its copies */
1948 release_firmware(ucode_raw);
1949 return 0;
1950
1951 err_pci_alloc:
1952 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1953 ret = -ENOMEM;
bb8c093b 1954 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
1955
1956 err_release:
1957 release_firmware(ucode_raw);
1958
1959 error:
90e759d1 1960 return ret;
b481de9c
ZY
1961}
1962
b481de9c 1963/**
4a4a9e81 1964 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1965 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1966 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1967 */
4a4a9e81 1968static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1969{
57aab75a 1970 int ret = 0;
b481de9c
ZY
1971
1972 IWL_DEBUG_INFO("Runtime Alive received.\n");
1973
1974 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1975 /* We had an error bringing up the hardware, so take it
1976 * all the way back down so we can try again */
1977 IWL_DEBUG_INFO("Alive failed.\n");
1978 goto restart;
1979 }
1980
1981 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1982 * This is a paranoid check, because we would not have gotten the
1983 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1984 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
1985 /* Runtime instruction load was bad;
1986 * take it all the way back down so we can try again */
1987 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1988 goto restart;
1989 }
1990
37deb2a0 1991 iwl_clear_stations_table(priv);
57aab75a
TW
1992 ret = priv->cfg->ops->lib->alive_notify(priv);
1993 if (ret) {
b481de9c 1994 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 1995 ret);
b481de9c
ZY
1996 goto restart;
1997 }
1998
9fbab516 1999 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2000 set_bit(STATUS_ALIVE, &priv->status);
2001
fee1247a 2002 if (iwl_is_rfkill(priv))
b481de9c
ZY
2003 return;
2004
36d6825b 2005 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2006
2007 priv->active_rate = priv->rates_mask;
2008 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2009
3109ece1 2010 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2011 struct iwl_rxon_cmd *active_rxon =
2012 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2013
2014 memcpy(&priv->staging_rxon, &priv->active_rxon,
2015 sizeof(priv->staging_rxon));
2016 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2017 } else {
2018 /* Initialize our rx_config data */
bb8c093b 2019 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2020 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2021 }
2022
9fbab516 2023 /* Configure Bluetooth device coexistence support */
bb8c093b 2024 iwl4965_send_bt_config(priv);
b481de9c 2025
4a4a9e81
TW
2026 iwl_reset_run_time_calib(priv);
2027
b481de9c 2028 /* Configure the adapter for unassociated operation */
bb8c093b 2029 iwl4965_commit_rxon(priv);
b481de9c
ZY
2030
2031 /* At this point, the NIC is initialized and operational */
47f4a587 2032 iwl_rf_kill_ct_config(priv);
5a66926a 2033
fe00b5a5
RC
2034 iwl_leds_register(priv);
2035
b481de9c 2036 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2037 set_bit(STATUS_READY, &priv->status);
5a66926a 2038 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2039
2040 if (priv->error_recovering)
bb8c093b 2041 iwl4965_error_recovery(priv);
b481de9c 2042
58d0f361 2043 iwl_power_update_mode(priv, 1);
84363e6e 2044 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
c46fbefa
AK
2045
2046 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2047 iwl4965_set_mode(priv, priv->iw_mode);
2048
b481de9c
ZY
2049 return;
2050
2051 restart:
2052 queue_work(priv->workqueue, &priv->restart);
2053}
2054
4e39317d 2055static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2056
c79dd5b5 2057static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2058{
2059 unsigned long flags;
2060 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2061
2062 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2063
b481de9c
ZY
2064 if (!exit_pending)
2065 set_bit(STATUS_EXIT_PENDING, &priv->status);
2066
ab53d8af
MA
2067 iwl_leds_unregister(priv);
2068
37deb2a0 2069 iwl_clear_stations_table(priv);
b481de9c
ZY
2070
2071 /* Unblock any waiting calls */
2072 wake_up_interruptible_all(&priv->wait_command_queue);
2073
b481de9c
ZY
2074 /* Wipe out the EXIT_PENDING status bit if we are not actually
2075 * exiting the module */
2076 if (!exit_pending)
2077 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2078
2079 /* stop and reset the on-board processor */
3395f6e9 2080 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2081
2082 /* tell the device to stop sending interrupts */
0359facc 2083 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2084 iwl4965_disable_interrupts(priv);
0359facc
MA
2085 spin_unlock_irqrestore(&priv->lock, flags);
2086 iwl_synchronize_irq(priv);
b481de9c
ZY
2087
2088 if (priv->mac80211_registered)
2089 ieee80211_stop_queues(priv->hw);
2090
bb8c093b 2091 /* If we have not previously called iwl4965_init() then
b481de9c 2092 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2093 if (!iwl_is_init(priv)) {
b481de9c
ZY
2094 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2095 STATUS_RF_KILL_HW |
2096 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2097 STATUS_RF_KILL_SW |
9788864e
RC
2098 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2099 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2100 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2101 STATUS_IN_SUSPEND;
2102 goto exit;
2103 }
2104
2105 /* ...otherwise clear out all the status bits but the RF Kill and
2106 * SUSPEND bits and continue taking the NIC down. */
2107 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2108 STATUS_RF_KILL_HW |
2109 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2110 STATUS_RF_KILL_SW |
9788864e
RC
2111 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2112 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2113 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2114 STATUS_IN_SUSPEND |
2115 test_bit(STATUS_FW_ERROR, &priv->status) <<
2116 STATUS_FW_ERROR;
2117
2118 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2119 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2120 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2121 spin_unlock_irqrestore(&priv->lock, flags);
2122
da1bc453 2123 iwl_txq_ctx_stop(priv);
b3bbacb7 2124 iwl_rxq_stop(priv);
b481de9c
ZY
2125
2126 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2127 if (!iwl_grab_nic_access(priv)) {
2128 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2129 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2130 iwl_release_nic_access(priv);
b481de9c
ZY
2131 }
2132 spin_unlock_irqrestore(&priv->lock, flags);
2133
2134 udelay(5);
2135
7f066108
TW
2136 /* FIXME: apm_ops.suspend(priv) */
2137 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2138 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2139
2140 exit:
885ba202 2141 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2142
2143 if (priv->ibss_beacon)
2144 dev_kfree_skb(priv->ibss_beacon);
2145 priv->ibss_beacon = NULL;
2146
2147 /* clear out any free frames */
fcab423d 2148 iwl_clear_free_frames(priv);
b481de9c
ZY
2149}
2150
c79dd5b5 2151static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2152{
2153 mutex_lock(&priv->mutex);
bb8c093b 2154 __iwl4965_down(priv);
b481de9c 2155 mutex_unlock(&priv->mutex);
b24d22b1 2156
4e39317d 2157 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2158}
2159
2160#define MAX_HW_RESTARTS 5
2161
c79dd5b5 2162static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2163{
57aab75a
TW
2164 int i;
2165 int ret;
b481de9c
ZY
2166
2167 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2168 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2169 return -EIO;
2170 }
2171
e903fbd4
RC
2172 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2173 IWL_ERROR("ucode not available for device bringup\n");
2174 return -EIO;
2175 }
2176
e655b9f0 2177 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 2178 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2179 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2180 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2181 else {
2182 set_bit(STATUS_RF_KILL_HW, &priv->status);
2183 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 2184 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
2185 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
2186 return -ENODEV;
2187 }
b481de9c
ZY
2188 }
2189
ad97edd2 2190 iwl_rfkill_set_hw_state(priv);
3395f6e9 2191 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2192
399f4900
RR
2193 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2194 if (ret) {
2195 IWL_ERROR("Unable to allocate shared memory\n");
2196 return ret;
2197 }
2198
1053d35f 2199 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2200 if (ret) {
2201 IWL_ERROR("Unable to init nic\n");
2202 return ret;
b481de9c
ZY
2203 }
2204
2205 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2206 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2207 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2208 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2209
2210 /* clear (again), then enable host interrupts */
3395f6e9 2211 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2212 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2213
2214 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2215 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2216 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2217
2218 /* Copy original ucode data image from disk into backup cache.
2219 * This will be used to initialize the on-board processor's
2220 * data SRAM for a clean start when the runtime program first loads. */
2221 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2222 priv->ucode_data.len);
b481de9c 2223
e655b9f0 2224 /* We return success when we resume from suspend and rf_kill is on. */
64e72c3e
MA
2225 if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
2226 test_bit(STATUS_RF_KILL_SW, &priv->status))
b481de9c 2227 return 0;
b481de9c
ZY
2228
2229 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2230
37deb2a0 2231 iwl_clear_stations_table(priv);
b481de9c
ZY
2232
2233 /* load bootstrap state machine,
2234 * load bootstrap program into processor's memory,
2235 * prepare to load the "initialize" uCode */
57aab75a 2236 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2237
57aab75a
TW
2238 if (ret) {
2239 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2240 continue;
2241 }
2242
f3d5b45b
EG
2243 /* Clear out the uCode error bit if it is set */
2244 clear_bit(STATUS_FW_ERROR, &priv->status);
2245
b481de9c 2246 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2247 iwl4965_nic_start(priv);
b481de9c 2248
b481de9c
ZY
2249 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2250
2251 return 0;
2252 }
2253
2254 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2255 __iwl4965_down(priv);
64e72c3e 2256 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2257
2258 /* tried to restart and config the device for as long as our
2259 * patience could withstand */
2260 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2261 return -EIO;
2262}
2263
2264
2265/*****************************************************************************
2266 *
2267 * Workqueue callbacks
2268 *
2269 *****************************************************************************/
2270
4a4a9e81 2271static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2272{
c79dd5b5
TW
2273 struct iwl_priv *priv =
2274 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2275
2276 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2277 return;
2278
2279 mutex_lock(&priv->mutex);
f3ccc08c 2280 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2281 mutex_unlock(&priv->mutex);
2282}
2283
4a4a9e81 2284static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2285{
c79dd5b5
TW
2286 struct iwl_priv *priv =
2287 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2288
2289 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2290 return;
2291
2292 mutex_lock(&priv->mutex);
4a4a9e81 2293 iwl_alive_start(priv);
b481de9c
ZY
2294 mutex_unlock(&priv->mutex);
2295}
2296
bb8c093b 2297static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2298{
c79dd5b5 2299 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2300
2301 wake_up_interruptible(&priv->wait_command_queue);
2302
2303 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2304 return;
2305
2306 mutex_lock(&priv->mutex);
2307
fee1247a 2308 if (!iwl_is_rfkill(priv)) {
f3d67999 2309 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2310 "HW and/or SW RF Kill no longer active, restarting "
2311 "device\n");
2312 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2313 queue_work(priv->workqueue, &priv->restart);
2314 } else {
ad97edd2
MA
2315 /* make sure mac80211 stop sending Tx frame */
2316 if (priv->mac80211_registered)
2317 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2318
2319 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2320 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2321 "disabled by SW switch\n");
2322 else
2323 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2324 "Kill switch must be turned off for "
2325 "wireless networking to work.\n");
2326 }
ad97edd2
MA
2327 iwl_rfkill_set_hw_state(priv);
2328
b481de9c
ZY
2329 mutex_unlock(&priv->mutex);
2330}
2331
4419e39b
AK
2332static void iwl4965_bg_set_monitor(struct work_struct *work)
2333{
2334 struct iwl_priv *priv = container_of(work,
2335 struct iwl_priv, set_monitor);
c46fbefa 2336 int ret;
4419e39b
AK
2337
2338 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2339
2340 mutex_lock(&priv->mutex);
2341
c46fbefa
AK
2342 ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR);
2343
2344 if (ret) {
2345 if (ret == -EAGAIN)
2346 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2347 else
2348 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2349 }
4419e39b
AK
2350
2351 mutex_unlock(&priv->mutex);
2352}
2353
16e727e8
EG
2354static void iwl_bg_run_time_calib_work(struct work_struct *work)
2355{
2356 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2357 run_time_calib_work);
2358
2359 mutex_lock(&priv->mutex);
2360
2361 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2362 test_bit(STATUS_SCANNING, &priv->status)) {
2363 mutex_unlock(&priv->mutex);
2364 return;
2365 }
2366
2367 if (priv->start_calib) {
2368 iwl_chain_noise_calibration(priv, &priv->statistics);
2369
2370 iwl_sensitivity_calibration(priv, &priv->statistics);
2371 }
2372
2373 mutex_unlock(&priv->mutex);
2374 return;
2375}
2376
bb8c093b 2377static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2378{
c79dd5b5 2379 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2380
2381 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2382 return;
2383
2384 mutex_lock(&priv->mutex);
bb8c093b 2385 __iwl4965_up(priv);
b481de9c
ZY
2386 mutex_unlock(&priv->mutex);
2387}
2388
bb8c093b 2389static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2390{
c79dd5b5 2391 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2392
2393 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2394 return;
2395
bb8c093b 2396 iwl4965_down(priv);
b481de9c
ZY
2397 queue_work(priv->workqueue, &priv->up);
2398}
2399
bb8c093b 2400static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2401{
c79dd5b5
TW
2402 struct iwl_priv *priv =
2403 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2404
2405 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2406 return;
2407
2408 mutex_lock(&priv->mutex);
a55360e4 2409 iwl_rx_replenish(priv);
b481de9c
ZY
2410 mutex_unlock(&priv->mutex);
2411}
2412
7878a5a4
MA
2413#define IWL_DELAY_NEXT_SCAN (HZ*2)
2414
508e32e1 2415static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2416{
b481de9c 2417 struct ieee80211_conf *conf = NULL;
857485c0 2418 int ret = 0;
0795af57 2419 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2420
2421 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2422 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
2423 return;
2424 }
2425
0795af57
JP
2426 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2427 priv->assoc_id,
2428 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2429
2430
2431 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2432 return;
2433
b481de9c 2434
508e32e1 2435 if (!priv->vif || !priv->is_open)
948c171c 2436 return;
508e32e1 2437
2a421b91 2438 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2439
b481de9c
ZY
2440 conf = ieee80211_get_hw_conf(priv->hw);
2441
2442 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2443 iwl4965_commit_rxon(priv);
b481de9c 2444
bb8c093b
CH
2445 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2446 iwl4965_setup_rxon_timing(priv);
857485c0 2447 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2448 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2449 if (ret)
b481de9c
ZY
2450 IWL_WARNING("REPLY_RXON_TIMING failed - "
2451 "Attempting to continue.\n");
2452
2453 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2454
fd105e79 2455 if (priv->current_ht_config.is_ht)
47c5196e 2456 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2457
c7de35cd 2458 iwl_set_rxon_chain(priv);
b481de9c
ZY
2459 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2460
2461 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2462 priv->assoc_id, priv->beacon_int);
2463
2464 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2465 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2466 else
2467 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2468
2469 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2470 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2471 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2472 else
2473 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2474
2475 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2476 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2477
2478 }
2479
bb8c093b 2480 iwl4965_commit_rxon(priv);
b481de9c
ZY
2481
2482 switch (priv->iw_mode) {
2483 case IEEE80211_IF_TYPE_STA:
bb8c093b 2484 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
2485 break;
2486
2487 case IEEE80211_IF_TYPE_IBSS:
2488
c46fbefa
AK
2489 /* assume default assoc id */
2490 priv->assoc_id = 1;
b481de9c 2491
4f40e4d9 2492 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b
CH
2493 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
2494 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2495
2496 break;
2497
2498 default:
2499 IWL_ERROR("%s Should not be called in %d mode\n",
2500 __FUNCTION__, priv->iw_mode);
2501 break;
2502 }
2503
b481de9c 2504 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 2505 iwl_chain_noise_reset(priv);
b481de9c 2506 priv->start_calib = 1;
b481de9c
ZY
2507
2508 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2509 priv->assoc_station_added = 1;
2510
bb8c093b 2511 iwl4965_activate_qos(priv, 0);
292ae174 2512
5da4b55f 2513 iwl_power_update_mode(priv, 0);
7878a5a4
MA
2514 /* we have just associated, don't start scan too early */
2515 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
2516}
2517
2518
2519static void iwl4965_bg_post_associate(struct work_struct *data)
2520{
2521 struct iwl_priv *priv = container_of(data, struct iwl_priv,
2522 post_associate.work);
2523
2524 mutex_lock(&priv->mutex);
2525 iwl4965_post_associate(priv);
b481de9c 2526 mutex_unlock(&priv->mutex);
508e32e1 2527
b481de9c
ZY
2528}
2529
76bb77e0
ZY
2530static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
2531
2a421b91 2532static void iwl_bg_scan_completed(struct work_struct *work)
b481de9c 2533{
c79dd5b5
TW
2534 struct iwl_priv *priv =
2535 container_of(work, struct iwl_priv, scan_completed);
b481de9c 2536
630fe9b6 2537 IWL_DEBUG_SCAN("SCAN complete scan\n");
b481de9c
ZY
2538
2539 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2540 return;
2541
a0646470
ZY
2542 if (test_bit(STATUS_CONF_PENDING, &priv->status))
2543 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 2544
b481de9c
ZY
2545 ieee80211_scan_completed(priv->hw);
2546
2547 /* Since setting the TXPOWER may have been deferred while
2548 * performing the scan, fire one off */
2549 mutex_lock(&priv->mutex);
630fe9b6 2550 iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
b481de9c
ZY
2551 mutex_unlock(&priv->mutex);
2552}
2553
2554/*****************************************************************************
2555 *
2556 * mac80211 entry point functions
2557 *
2558 *****************************************************************************/
2559
5a66926a
ZY
2560#define UCODE_READY_TIMEOUT (2 * HZ)
2561
bb8c093b 2562static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2563{
c79dd5b5 2564 struct iwl_priv *priv = hw->priv;
5a66926a 2565 int ret;
b481de9c
ZY
2566
2567 IWL_DEBUG_MAC80211("enter\n");
2568
5a66926a
ZY
2569 if (pci_enable_device(priv->pci_dev)) {
2570 IWL_ERROR("Fail to pci_enable_device\n");
2571 return -ENODEV;
2572 }
2573 pci_restore_state(priv->pci_dev);
2574 pci_enable_msi(priv->pci_dev);
2575
2576 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2577 DRV_NAME, priv);
2578 if (ret) {
2579 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2580 goto out_disable_msi;
2581 }
2582
b481de9c
ZY
2583 /* we should be verifying the device is ready to be opened */
2584 mutex_lock(&priv->mutex);
2585
c1adf9fb 2586 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2587 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2588 * ucode filename and max sizes are card-specific. */
b481de9c 2589
5a66926a
ZY
2590 if (!priv->ucode_code.len) {
2591 ret = iwl4965_read_ucode(priv);
2592 if (ret) {
2593 IWL_ERROR("Could not read microcode: %d\n", ret);
2594 mutex_unlock(&priv->mutex);
2595 goto out_release_irq;
2596 }
2597 }
b481de9c 2598
e655b9f0 2599 ret = __iwl4965_up(priv);
5a66926a 2600
b481de9c 2601 mutex_unlock(&priv->mutex);
5a66926a 2602
e655b9f0
ZY
2603 if (ret)
2604 goto out_release_irq;
2605
2606 IWL_DEBUG_INFO("Start UP work done.\n");
2607
2608 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2609 return 0;
2610
fe9b6b72 2611 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2612 * mac80211 will not be run successfully. */
fe9b6b72
RR
2613 if (priv->ucode_type == UCODE_RT) {
2614 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2615 test_bit(STATUS_READY, &priv->status),
2616 UCODE_READY_TIMEOUT);
2617 if (!ret) {
2618 if (!test_bit(STATUS_READY, &priv->status)) {
2619 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2620 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2621 ret = -ETIMEDOUT;
2622 goto out_release_irq;
2623 }
5a66926a 2624 }
5a66926a 2625
fe9b6b72
RR
2626 priv->is_open = 1;
2627 }
b481de9c
ZY
2628 IWL_DEBUG_MAC80211("leave\n");
2629 return 0;
5a66926a
ZY
2630
2631out_release_irq:
2632 free_irq(priv->pci_dev->irq, priv);
2633out_disable_msi:
2634 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2635 pci_disable_device(priv->pci_dev);
2636 priv->is_open = 0;
2637 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2638 return ret;
b481de9c
ZY
2639}
2640
bb8c093b 2641static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2642{
c79dd5b5 2643 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2644
2645 IWL_DEBUG_MAC80211("enter\n");
948c171c 2646
e655b9f0
ZY
2647 if (!priv->is_open) {
2648 IWL_DEBUG_MAC80211("leave - skip\n");
2649 return;
2650 }
2651
b481de9c 2652 priv->is_open = 0;
5a66926a 2653
fee1247a 2654 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2655 /* stop mac, cancel any scan request and clear
2656 * RXON_FILTER_ASSOC_MSK BIT
2657 */
5a66926a 2658 mutex_lock(&priv->mutex);
2a421b91 2659 iwl_scan_cancel_timeout(priv, 100);
5a66926a 2660 cancel_delayed_work(&priv->post_associate);
fde3571f 2661 mutex_unlock(&priv->mutex);
fde3571f
MA
2662 }
2663
5a66926a
ZY
2664 iwl4965_down(priv);
2665
2666 flush_workqueue(priv->workqueue);
2667 free_irq(priv->pci_dev->irq, priv);
2668 pci_disable_msi(priv->pci_dev);
2669 pci_save_state(priv->pci_dev);
2670 pci_disable_device(priv->pci_dev);
948c171c 2671
b481de9c 2672 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2673}
2674
e039fa4a 2675static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2676{
c79dd5b5 2677 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2678
2679 IWL_DEBUG_MAC80211("enter\n");
2680
2681 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2682 IWL_DEBUG_MAC80211("leave - monitor\n");
2683 return -1;
2684 }
2685
2686 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2687 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2688
e039fa4a 2689 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2690 dev_kfree_skb_any(skb);
2691
2692 IWL_DEBUG_MAC80211("leave\n");
2693 return 0;
2694}
2695
bb8c093b 2696static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2697 struct ieee80211_if_init_conf *conf)
2698{
c79dd5b5 2699 struct iwl_priv *priv = hw->priv;
b481de9c 2700 unsigned long flags;
0795af57 2701 DECLARE_MAC_BUF(mac);
b481de9c 2702
32bfd35d 2703 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2704
32bfd35d
JB
2705 if (priv->vif) {
2706 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2707 return -EOPNOTSUPP;
b481de9c
ZY
2708 }
2709
2710 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2711 priv->vif = conf->vif;
b481de9c
ZY
2712
2713 spin_unlock_irqrestore(&priv->lock, flags);
2714
2715 mutex_lock(&priv->mutex);
864792e3
TW
2716
2717 if (conf->mac_addr) {
2718 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2719 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2720 }
b481de9c 2721
c46fbefa
AK
2722 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2723 /* we are not ready, will run again when ready */
2724 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2725
b481de9c
ZY
2726 mutex_unlock(&priv->mutex);
2727
5a66926a 2728 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2729 return 0;
2730}
2731
2732/**
bb8c093b 2733 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2734 *
2735 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2736 * be set inappropriately and the driver currently sets the hardware up to
2737 * use it whenever needed.
2738 */
bb8c093b 2739static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2740{
c79dd5b5 2741 struct iwl_priv *priv = hw->priv;
bf85ea4f 2742 const struct iwl_channel_info *ch_info;
b481de9c 2743 unsigned long flags;
76bb77e0 2744 int ret = 0;
82a66bbb 2745 u16 channel;
b481de9c
ZY
2746
2747 mutex_lock(&priv->mutex);
8318d78a 2748 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2749
12342c47
ZY
2750 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2751
14a08a7f 2752 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2753 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2754 goto out;
64e72c3e
MA
2755 }
2756
14a08a7f
EG
2757 if (!conf->radio_enabled)
2758 iwl_radio_kill_sw_disable_radio(priv);
2759
fee1247a 2760 if (!iwl_is_ready(priv)) {
b481de9c 2761 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2762 ret = -EIO;
2763 goto out;
b481de9c
ZY
2764 }
2765
1ea87396 2766 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2767 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
2768 IWL_DEBUG_MAC80211("leave - scanning\n");
2769 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 2770 mutex_unlock(&priv->mutex);
a0646470 2771 return 0;
b481de9c
ZY
2772 }
2773
82a66bbb
TW
2774 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2775 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2776 if (!is_channel_valid(ch_info)) {
b481de9c 2777 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2778 ret = -EINVAL;
2779 goto out;
b481de9c
ZY
2780 }
2781
398f9e76
AK
2782 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2783 !is_channel_ibss(ch_info)) {
2784 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2785 conf->channel->hw_value, conf->channel->band);
2786 ret = -EINVAL;
2787 goto out;
2788 }
2789
82a66bbb
TW
2790 spin_lock_irqsave(&priv->lock, flags);
2791
78330fdd 2792 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2793 * from any ht related info since 2.4 does not
2794 * support ht */
82a66bbb 2795 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2796#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2797 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2798#endif
2799 )
2800 priv->staging_rxon.flags = 0;
b481de9c 2801
82a66bbb 2802 iwl_set_rxon_channel(priv, conf->channel->band, channel);
b481de9c 2803
82a66bbb 2804 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2805
2806 /* The list of supported rates and rate mask can be different
8318d78a 2807 * for each band; since the band may have changed, reset
b481de9c 2808 * the rate mask to what mac80211 lists */
bb8c093b 2809 iwl4965_set_rate(priv);
b481de9c
ZY
2810
2811 spin_unlock_irqrestore(&priv->lock, flags);
2812
2813#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2814 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2815 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2816 goto out;
b481de9c
ZY
2817 }
2818#endif
2819
b481de9c
ZY
2820 if (!conf->radio_enabled) {
2821 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2822 goto out;
b481de9c
ZY
2823 }
2824
fee1247a 2825 if (iwl_is_rfkill(priv)) {
b481de9c 2826 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2827 ret = -EIO;
2828 goto out;
b481de9c
ZY
2829 }
2830
630fe9b6
TW
2831 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2832 priv->tx_power_user_lmt, conf->power_level);
2833
2834 iwl_set_tx_power(priv, conf->power_level, false);
2835
bb8c093b 2836 iwl4965_set_rate(priv);
b481de9c
ZY
2837
2838 if (memcmp(&priv->active_rxon,
2839 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2840 iwl4965_commit_rxon(priv);
b481de9c
ZY
2841 else
2842 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2843
2844 IWL_DEBUG_MAC80211("leave\n");
2845
a0646470
ZY
2846out:
2847 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 2848 mutex_unlock(&priv->mutex);
76bb77e0 2849 return ret;
b481de9c
ZY
2850}
2851
c79dd5b5 2852static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2853{
857485c0 2854 int ret = 0;
b481de9c 2855
d986bcd1 2856 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2857 return;
2858
2859 /* The following should be done only at AP bring up */
5d1e2325 2860 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2861
2862 /* RXON - unassoc (to set timing command) */
2863 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2864 iwl4965_commit_rxon(priv);
b481de9c
ZY
2865
2866 /* RXON Timing */
bb8c093b
CH
2867 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2868 iwl4965_setup_rxon_timing(priv);
857485c0 2869 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2870 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2871 if (ret)
b481de9c
ZY
2872 IWL_WARNING("REPLY_RXON_TIMING failed - "
2873 "Attempting to continue.\n");
2874
c7de35cd 2875 iwl_set_rxon_chain(priv);
b481de9c
ZY
2876
2877 /* FIXME: what should be the assoc_id for AP? */
2878 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2879 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2880 priv->staging_rxon.flags |=
2881 RXON_FLG_SHORT_PREAMBLE_MSK;
2882 else
2883 priv->staging_rxon.flags &=
2884 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2885
2886 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2887 if (priv->assoc_capability &
2888 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2889 priv->staging_rxon.flags |=
2890 RXON_FLG_SHORT_SLOT_MSK;
2891 else
2892 priv->staging_rxon.flags &=
2893 ~RXON_FLG_SHORT_SLOT_MSK;
2894
2895 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2896 priv->staging_rxon.flags &=
2897 ~RXON_FLG_SHORT_SLOT_MSK;
2898 }
2899 /* restore RXON assoc */
2900 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2901 iwl4965_commit_rxon(priv);
bb8c093b 2902 iwl4965_activate_qos(priv, 1);
4f40e4d9 2903 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2904 }
bb8c093b 2905 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2906
2907 /* FIXME - we need to add code here to detect a totally new
2908 * configuration, reset the AP, unassoc, rxon timing, assoc,
2909 * clear sta table, add BCAST sta... */
2910}
2911
32bfd35d
JB
2912static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2913 struct ieee80211_vif *vif,
b481de9c
ZY
2914 struct ieee80211_if_conf *conf)
2915{
c79dd5b5 2916 struct iwl_priv *priv = hw->priv;
0795af57 2917 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2918 unsigned long flags;
2919 int rc;
2920
2921 if (conf == NULL)
2922 return -EIO;
2923
b716bb91
EG
2924 if (priv->vif != vif) {
2925 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2926 return 0;
2927 }
2928
b481de9c
ZY
2929 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
2930 (!conf->beacon || !conf->ssid_len)) {
2931 IWL_DEBUG_MAC80211
2932 ("Leaving in AP mode because HostAPD is not ready.\n");
2933 return 0;
2934 }
2935
fee1247a 2936 if (!iwl_is_alive(priv))
5a66926a
ZY
2937 return -EAGAIN;
2938
b481de9c
ZY
2939 mutex_lock(&priv->mutex);
2940
b481de9c 2941 if (conf->bssid)
0795af57
JP
2942 IWL_DEBUG_MAC80211("bssid: %s\n",
2943 print_mac(mac, conf->bssid));
b481de9c 2944
4150c572
JB
2945/*
2946 * very dubious code was here; the probe filtering flag is never set:
2947 *
b481de9c
ZY
2948 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2949 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2950 */
b481de9c
ZY
2951
2952 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2953 if (!conf->bssid) {
2954 conf->bssid = priv->mac_addr;
2955 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
2956 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
2957 print_mac(mac, conf->bssid));
b481de9c
ZY
2958 }
2959 if (priv->ibss_beacon)
2960 dev_kfree_skb(priv->ibss_beacon);
2961
2962 priv->ibss_beacon = conf->beacon;
2963 }
2964
fee1247a 2965 if (iwl_is_rfkill(priv))
fde3571f
MA
2966 goto done;
2967
b481de9c
ZY
2968 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2969 !is_multicast_ether_addr(conf->bssid)) {
2970 /* If there is currently a HW scan going on in the background
2971 * then we need to cancel it else the RXON below will fail. */
2a421b91 2972 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2973 IWL_WARNING("Aborted scan still in progress "
2974 "after 100ms\n");
2975 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2976 mutex_unlock(&priv->mutex);
2977 return -EAGAIN;
2978 }
2979 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2980
2981 /* TODO: Audit driver for usage of these members and see
2982 * if mac80211 deprecates them (priv->bssid looks like it
2983 * shouldn't be there, but I haven't scanned the IBSS code
2984 * to verify) - jpk */
2985 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2986
2987 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 2988 iwl4965_config_ap(priv);
b481de9c 2989 else {
bb8c093b 2990 rc = iwl4965_commit_rxon(priv);
b481de9c 2991 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
4f40e4d9 2992 iwl_rxon_add_station(
b481de9c
ZY
2993 priv, priv->active_rxon.bssid_addr, 1);
2994 }
2995
2996 } else {
2a421b91 2997 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2998 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2999 iwl4965_commit_rxon(priv);
b481de9c
ZY
3000 }
3001
fde3571f 3002 done:
b481de9c
ZY
3003 spin_lock_irqsave(&priv->lock, flags);
3004 if (!conf->ssid_len)
3005 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3006 else
3007 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3008
3009 priv->essid_len = conf->ssid_len;
3010 spin_unlock_irqrestore(&priv->lock, flags);
3011
3012 IWL_DEBUG_MAC80211("leave\n");
3013 mutex_unlock(&priv->mutex);
3014
3015 return 0;
3016}
3017
bb8c093b 3018static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3019 unsigned int changed_flags,
3020 unsigned int *total_flags,
3021 int mc_count, struct dev_addr_list *mc_list)
3022{
3023 /*
3024 * XXX: dummy
bb8c093b 3025 * see also iwl4965_connection_init_rx_config
4150c572 3026 */
4419e39b
AK
3027 struct iwl_priv *priv = hw->priv;
3028 int new_flags = 0;
3029 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
3030 if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
3031 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
3032 IEEE80211_IF_TYPE_MNTR,
3033 changed_flags, *total_flags);
3034 /* queue work 'cuz mac80211 is holding a lock which
3035 * prevents us from issuing (synchronous) f/w cmds */
3036 queue_work(priv->workqueue, &priv->set_monitor);
3037 new_flags &= FIF_PROMISC_IN_BSS |
3038 FIF_OTHER_BSS |
3039 FIF_ALLMULTI;
3040 }
3041 }
3042 *total_flags = new_flags;
4150c572
JB
3043}
3044
bb8c093b 3045static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3046 struct ieee80211_if_init_conf *conf)
3047{
c79dd5b5 3048 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3049
3050 IWL_DEBUG_MAC80211("enter\n");
3051
3052 mutex_lock(&priv->mutex);
948c171c 3053
fee1247a 3054 if (iwl_is_ready_rf(priv)) {
2a421b91 3055 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3056 cancel_delayed_work(&priv->post_associate);
3057 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3058 iwl4965_commit_rxon(priv);
3059 }
32bfd35d
JB
3060 if (priv->vif == conf->vif) {
3061 priv->vif = NULL;
b481de9c
ZY
3062 memset(priv->bssid, 0, ETH_ALEN);
3063 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3064 priv->essid_len = 0;
3065 }
3066 mutex_unlock(&priv->mutex);
3067
3068 IWL_DEBUG_MAC80211("leave\n");
3069
3070}
471b3efd 3071
3109ece1 3072#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3073static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3074 struct ieee80211_vif *vif,
3075 struct ieee80211_bss_conf *bss_conf,
3076 u32 changes)
220173b0 3077{
c79dd5b5 3078 struct iwl_priv *priv = hw->priv;
220173b0 3079
3109ece1
TW
3080 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3081
471b3efd 3082 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3083 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3084 bss_conf->use_short_preamble);
471b3efd 3085 if (bss_conf->use_short_preamble)
220173b0
TW
3086 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3087 else
3088 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3089 }
3090
471b3efd 3091 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3092 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3093 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3094 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3095 else
3096 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3097 }
3098
98952d5d 3099 if (changes & BSS_CHANGED_HT) {
3109ece1 3100 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3101 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3102 iwl_set_rxon_chain(priv);
98952d5d
TW
3103 }
3104
471b3efd 3105 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3106 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3107 /* This should never happen as this function should
3108 * never be called from interrupt context. */
3109 if (WARN_ON_ONCE(in_interrupt()))
3110 return;
3109ece1
TW
3111 if (bss_conf->assoc) {
3112 priv->assoc_id = bss_conf->aid;
3113 priv->beacon_int = bss_conf->beacon_int;
3114 priv->timestamp = bss_conf->timestamp;
3115 priv->assoc_capability = bss_conf->assoc_capability;
3116 priv->next_scan_jiffies = jiffies +
3117 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3118 mutex_lock(&priv->mutex);
3119 iwl4965_post_associate(priv);
3120 mutex_unlock(&priv->mutex);
3109ece1
TW
3121 } else {
3122 priv->assoc_id = 0;
3123 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3124 }
3125 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3126 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3127 iwl_send_rxon_assoc(priv);
471b3efd
JB
3128 }
3129
220173b0 3130}
b481de9c 3131
bb8c093b 3132static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
3133{
3134 int rc = 0;
3135 unsigned long flags;
c79dd5b5 3136 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3137
3138 IWL_DEBUG_MAC80211("enter\n");
3139
052c4b9f 3140 mutex_lock(&priv->mutex);
b481de9c
ZY
3141 spin_lock_irqsave(&priv->lock, flags);
3142
fee1247a 3143 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3144 rc = -EIO;
3145 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3146 goto out_unlock;
3147 }
3148
3149 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
3150 rc = -EIO;
3151 IWL_ERROR("ERROR: APs don't scan\n");
3152 goto out_unlock;
3153 }
3154
7878a5a4
MA
3155 /* we don't schedule scan within next_scan_jiffies period */
3156 if (priv->next_scan_jiffies &&
3157 time_after(priv->next_scan_jiffies, jiffies)) {
3158 rc = -EAGAIN;
3159 goto out_unlock;
3160 }
b481de9c 3161 /* if we just finished scan ask for delay */
7878a5a4
MA
3162 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
3163 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
3164 rc = -EAGAIN;
3165 goto out_unlock;
3166 }
3167 if (len) {
7878a5a4 3168 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
2a421b91 3169 iwl_escape_essid(ssid, len), (int)len);
b481de9c
ZY
3170
3171 priv->one_direct_scan = 1;
3172 priv->direct_ssid_len = (u8)
3173 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
3174 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
3175 } else
3176 priv->one_direct_scan = 0;
b481de9c 3177
2a421b91 3178 rc = iwl_scan_initiate(priv);
b481de9c
ZY
3179
3180 IWL_DEBUG_MAC80211("leave\n");
3181
3182out_unlock:
3183 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3184 mutex_unlock(&priv->mutex);
b481de9c
ZY
3185
3186 return rc;
3187}
3188
ab885f8c
EG
3189static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3190 struct ieee80211_key_conf *keyconf, const u8 *addr,
3191 u32 iv32, u16 *phase1key)
3192{
3193 struct iwl_priv *priv = hw->priv;
3194 u8 sta_id = IWL_INVALID_STATION;
3195 unsigned long flags;
3196 __le16 key_flags = 0;
3197 int i;
3198 DECLARE_MAC_BUF(mac);
3199
3200 IWL_DEBUG_MAC80211("enter\n");
3201
947b13a7 3202 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3203 if (sta_id == IWL_INVALID_STATION) {
3204 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3205 print_mac(mac, addr));
3206 return;
3207 }
3208
2a421b91 3209 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3210
3211 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3212 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3213 key_flags &= ~STA_KEY_FLG_INVALID;
3214
5425e490 3215 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3216 key_flags |= STA_KEY_MULTICAST_MSK;
3217
3218 spin_lock_irqsave(&priv->sta_lock, flags);
3219
ab885f8c
EG
3220 priv->stations[sta_id].sta.key.key_flags = key_flags;
3221 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3222
3223 for (i = 0; i < 5; i++)
3224 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3225 cpu_to_le16(phase1key[i]);
3226
3227 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3228 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3229
133636de 3230 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3231
3232 spin_unlock_irqrestore(&priv->sta_lock, flags);
3233
3234 IWL_DEBUG_MAC80211("leave\n");
3235}
3236
bb8c093b 3237static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3238 const u8 *local_addr, const u8 *addr,
3239 struct ieee80211_key_conf *key)
3240{
c79dd5b5 3241 struct iwl_priv *priv = hw->priv;
0795af57 3242 DECLARE_MAC_BUF(mac);
deb09c43
EG
3243 int ret = 0;
3244 u8 sta_id = IWL_INVALID_STATION;
6974e363 3245 u8 is_default_wep_key = 0;
b481de9c
ZY
3246
3247 IWL_DEBUG_MAC80211("enter\n");
3248
099b40b7 3249 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3250 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3251 return -EOPNOTSUPP;
3252 }
3253
3254 if (is_zero_ether_addr(addr))
3255 /* only support pairwise keys */
3256 return -EOPNOTSUPP;
3257
947b13a7 3258 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3259 if (sta_id == IWL_INVALID_STATION) {
3260 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3261 print_mac(mac, addr));
3262 return -EINVAL;
b481de9c 3263
deb09c43 3264 }
b481de9c 3265
6974e363 3266 mutex_lock(&priv->mutex);
2a421b91 3267 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3268 mutex_unlock(&priv->mutex);
3269
3270 /* If we are getting WEP group key and we didn't receive any key mapping
3271 * so far, we are in legacy wep mode (group key only), otherwise we are
3272 * in 1X mode.
3273 * In legacy wep mode, we use another host command to the uCode */
5425e490 3274 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
3275 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3276 if (cmd == SET_KEY)
3277 is_default_wep_key = !priv->key_mapping_key;
3278 else
ccc038ab
EG
3279 is_default_wep_key =
3280 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3281 }
052c4b9f 3282
b481de9c 3283 switch (cmd) {
deb09c43 3284 case SET_KEY:
6974e363
EG
3285 if (is_default_wep_key)
3286 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3287 else
7480513f 3288 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3289
3290 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3291 break;
3292 case DISABLE_KEY:
6974e363
EG
3293 if (is_default_wep_key)
3294 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3295 else
3ec47732 3296 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3297
3298 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3299 break;
3300 default:
deb09c43 3301 ret = -EINVAL;
b481de9c
ZY
3302 }
3303
3304 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3305
deb09c43 3306 return ret;
b481de9c
ZY
3307}
3308
e100bb64 3309static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3310 const struct ieee80211_tx_queue_params *params)
3311{
c79dd5b5 3312 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3313 unsigned long flags;
3314 int q;
b481de9c
ZY
3315
3316 IWL_DEBUG_MAC80211("enter\n");
3317
fee1247a 3318 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3319 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3320 return -EIO;
3321 }
3322
3323 if (queue >= AC_NUM) {
3324 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3325 return 0;
3326 }
3327
b481de9c
ZY
3328 if (!priv->qos_data.qos_enable) {
3329 priv->qos_data.qos_active = 0;
3330 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3331 return 0;
3332 }
3333 q = AC_NUM - 1 - queue;
3334
3335 spin_lock_irqsave(&priv->lock, flags);
3336
3337 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3338 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3339 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3340 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3341 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3342
3343 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3344 priv->qos_data.qos_active = 1;
3345
3346 spin_unlock_irqrestore(&priv->lock, flags);
3347
3348 mutex_lock(&priv->mutex);
3349 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 3350 iwl4965_activate_qos(priv, 1);
3109ece1 3351 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 3352 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
3353
3354 mutex_unlock(&priv->mutex);
3355
b481de9c
ZY
3356 IWL_DEBUG_MAC80211("leave\n");
3357 return 0;
3358}
3359
bb8c093b 3360static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3361 struct ieee80211_tx_queue_stats *stats)
3362{
c79dd5b5 3363 struct iwl_priv *priv = hw->priv;
b481de9c 3364 int i, avail;
16466903 3365 struct iwl_tx_queue *txq;
443cfd45 3366 struct iwl_queue *q;
b481de9c
ZY
3367 unsigned long flags;
3368
3369 IWL_DEBUG_MAC80211("enter\n");
3370
fee1247a 3371 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3372 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3373 return -EIO;
3374 }
3375
3376 spin_lock_irqsave(&priv->lock, flags);
3377
3378 for (i = 0; i < AC_NUM; i++) {
3379 txq = &priv->txq[i];
3380 q = &txq->q;
443cfd45 3381 avail = iwl_queue_space(q);
b481de9c 3382
57ffc589
JB
3383 stats[i].len = q->n_window - avail;
3384 stats[i].limit = q->n_window - q->high_mark;
3385 stats[i].count = q->n_window;
b481de9c
ZY
3386
3387 }
3388 spin_unlock_irqrestore(&priv->lock, flags);
3389
3390 IWL_DEBUG_MAC80211("leave\n");
3391
3392 return 0;
3393}
3394
bb8c093b 3395static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3396 struct ieee80211_low_level_stats *stats)
3397{
bf403db8
EK
3398 struct iwl_priv *priv = hw->priv;
3399
3400 priv = hw->priv;
b481de9c
ZY
3401 IWL_DEBUG_MAC80211("enter\n");
3402 IWL_DEBUG_MAC80211("leave\n");
3403
3404 return 0;
3405}
3406
bb8c093b 3407static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c 3408{
bf403db8
EK
3409 struct iwl_priv *priv;
3410
3411 priv = hw->priv;
b481de9c
ZY
3412 IWL_DEBUG_MAC80211("enter\n");
3413 IWL_DEBUG_MAC80211("leave\n");
3414
3415 return 0;
3416}
3417
bb8c093b 3418static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3419{
c79dd5b5 3420 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3421 unsigned long flags;
3422
3423 mutex_lock(&priv->mutex);
3424 IWL_DEBUG_MAC80211("enter\n");
3425
3426 priv->lq_mngr.lq_ready = 0;
b481de9c 3427 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3428 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3429 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3430
c7de35cd 3431 iwl_reset_qos(priv);
b481de9c
ZY
3432
3433 cancel_delayed_work(&priv->post_associate);
3434
3435 spin_lock_irqsave(&priv->lock, flags);
3436 priv->assoc_id = 0;
3437 priv->assoc_capability = 0;
b481de9c
ZY
3438 priv->assoc_station_added = 0;
3439
3440 /* new association get rid of ibss beacon skb */
3441 if (priv->ibss_beacon)
3442 dev_kfree_skb(priv->ibss_beacon);
3443
3444 priv->ibss_beacon = NULL;
3445
3446 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3447 priv->timestamp = 0;
b481de9c
ZY
3448 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
3449 priv->beacon_int = 0;
3450
3451 spin_unlock_irqrestore(&priv->lock, flags);
3452
fee1247a 3453 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3454 IWL_DEBUG_MAC80211("leave - not ready\n");
3455 mutex_unlock(&priv->mutex);
3456 return;
3457 }
3458
052c4b9f 3459 /* we are restarting association process
3460 * clear RXON_FILTER_ASSOC_MSK bit
3461 */
3462 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2a421b91 3463 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3464 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3465 iwl4965_commit_rxon(priv);
052c4b9f 3466 }
3467
5da4b55f
MA
3468 iwl_power_update_mode(priv, 0);
3469
b481de9c
ZY
3470 /* Per mac80211.h: This is only used in IBSS mode... */
3471 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 3472
b481de9c
ZY
3473 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3474 mutex_unlock(&priv->mutex);
3475 return;
3476 }
3477
bb8c093b 3478 iwl4965_set_rate(priv);
b481de9c
ZY
3479
3480 mutex_unlock(&priv->mutex);
3481
3482 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3483}
3484
e039fa4a 3485static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3486{
c79dd5b5 3487 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3488 unsigned long flags;
3489
3490 mutex_lock(&priv->mutex);
3491 IWL_DEBUG_MAC80211("enter\n");
3492
fee1247a 3493 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3494 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3495 mutex_unlock(&priv->mutex);
3496 return -EIO;
3497 }
3498
3499 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
3500 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3501 mutex_unlock(&priv->mutex);
3502 return -EIO;
3503 }
3504
3505 spin_lock_irqsave(&priv->lock, flags);
3506
3507 if (priv->ibss_beacon)
3508 dev_kfree_skb(priv->ibss_beacon);
3509
3510 priv->ibss_beacon = skb;
3511
3512 priv->assoc_id = 0;
3513
3514 IWL_DEBUG_MAC80211("leave\n");
3515 spin_unlock_irqrestore(&priv->lock, flags);
3516
c7de35cd 3517 iwl_reset_qos(priv);
b481de9c 3518
c46fbefa 3519 iwl4965_post_associate(priv);
b481de9c
ZY
3520
3521 mutex_unlock(&priv->mutex);
3522
3523 return 0;
3524}
3525
b481de9c
ZY
3526/*****************************************************************************
3527 *
3528 * sysfs attributes
3529 *
3530 *****************************************************************************/
3531
0a6857e7 3532#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3533
3534/*
3535 * The following adds a new attribute to the sysfs representation
3536 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3537 * used for controlling the debug level.
3538 *
3539 * See the level definitions in iwl for details.
3540 */
3541
8cf769c6
EK
3542static ssize_t show_debug_level(struct device *d,
3543 struct device_attribute *attr, char *buf)
b481de9c 3544{
8cf769c6
EK
3545 struct iwl_priv *priv = d->driver_data;
3546
3547 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3548}
8cf769c6
EK
3549static ssize_t store_debug_level(struct device *d,
3550 struct device_attribute *attr,
b481de9c
ZY
3551 const char *buf, size_t count)
3552{
8cf769c6 3553 struct iwl_priv *priv = d->driver_data;
b481de9c
ZY
3554 char *p = (char *)buf;
3555 u32 val;
3556
3557 val = simple_strtoul(p, &p, 0);
3558 if (p == buf)
3559 printk(KERN_INFO DRV_NAME
3560 ": %s is not in hex or decimal form.\n", buf);
3561 else
8cf769c6 3562 priv->debug_level = val;
b481de9c
ZY
3563
3564 return strnlen(buf, count);
3565}
3566
8cf769c6
EK
3567static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3568 show_debug_level, store_debug_level);
3569
b481de9c 3570
0a6857e7 3571#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3572
b481de9c 3573
bc6f59bc
TW
3574static ssize_t show_version(struct device *d,
3575 struct device_attribute *attr, char *buf)
3576{
3577 struct iwl_priv *priv = d->driver_data;
885ba202 3578 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3579 ssize_t pos = 0;
3580 u16 eeprom_ver;
bc6f59bc
TW
3581
3582 if (palive->is_valid)
f236a265
TW
3583 pos += sprintf(buf + pos,
3584 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3585 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3586 palive->ucode_major, palive->ucode_minor,
3587 palive->sw_rev[0], palive->sw_rev[1],
3588 palive->ver_type, palive->ver_subtype);
bc6f59bc 3589 else
f236a265
TW
3590 pos += sprintf(buf + pos, "fw not loaded\n");
3591
3592 if (priv->eeprom) {
3593 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3594 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3595 eeprom_ver);
3596 } else {
3597 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3598 }
3599
3600 return pos;
bc6f59bc
TW
3601}
3602
3603static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3604
b481de9c
ZY
3605static ssize_t show_temperature(struct device *d,
3606 struct device_attribute *attr, char *buf)
3607{
c79dd5b5 3608 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3609
fee1247a 3610 if (!iwl_is_alive(priv))
b481de9c
ZY
3611 return -EAGAIN;
3612
91dbc5bd 3613 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3614}
3615
3616static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3617
3618static ssize_t show_rs_window(struct device *d,
3619 struct device_attribute *attr,
3620 char *buf)
3621{
c79dd5b5 3622 struct iwl_priv *priv = d->driver_data;
bb8c093b 3623 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
3624}
3625static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
3626
3627static ssize_t show_tx_power(struct device *d,
3628 struct device_attribute *attr, char *buf)
3629{
c79dd5b5 3630 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3631 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3632}
3633
3634static ssize_t store_tx_power(struct device *d,
3635 struct device_attribute *attr,
3636 const char *buf, size_t count)
3637{
c79dd5b5 3638 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3639 char *p = (char *)buf;
3640 u32 val;
3641
3642 val = simple_strtoul(p, &p, 10);
3643 if (p == buf)
3644 printk(KERN_INFO DRV_NAME
3645 ": %s is not in decimal form.\n", buf);
3646 else
630fe9b6 3647 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3648
3649 return count;
3650}
3651
3652static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3653
3654static ssize_t show_flags(struct device *d,
3655 struct device_attribute *attr, char *buf)
3656{
c79dd5b5 3657 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3658
3659 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3660}
3661
3662static ssize_t store_flags(struct device *d,
3663 struct device_attribute *attr,
3664 const char *buf, size_t count)
3665{
c79dd5b5 3666 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3667 u32 flags = simple_strtoul(buf, NULL, 0);
3668
3669 mutex_lock(&priv->mutex);
3670 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3671 /* Cancel any currently running scans... */
2a421b91 3672 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3673 IWL_WARNING("Could not cancel scan.\n");
3674 else {
3675 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
3676 flags);
3677 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3678 iwl4965_commit_rxon(priv);
b481de9c
ZY
3679 }
3680 }
3681 mutex_unlock(&priv->mutex);
3682
3683 return count;
3684}
3685
3686static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3687
3688static ssize_t show_filter_flags(struct device *d,
3689 struct device_attribute *attr, char *buf)
3690{
c79dd5b5 3691 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3692
3693 return sprintf(buf, "0x%04X\n",
3694 le32_to_cpu(priv->active_rxon.filter_flags));
3695}
3696
3697static ssize_t store_filter_flags(struct device *d,
3698 struct device_attribute *attr,
3699 const char *buf, size_t count)
3700{
c79dd5b5 3701 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3702 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3703
3704 mutex_lock(&priv->mutex);
3705 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3706 /* Cancel any currently running scans... */
2a421b91 3707 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3708 IWL_WARNING("Could not cancel scan.\n");
3709 else {
3710 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3711 "0x%04X\n", filter_flags);
3712 priv->staging_rxon.filter_flags =
3713 cpu_to_le32(filter_flags);
bb8c093b 3714 iwl4965_commit_rxon(priv);
b481de9c
ZY
3715 }
3716 }
3717 mutex_unlock(&priv->mutex);
3718
3719 return count;
3720}
3721
3722static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3723 store_filter_flags);
3724
c8b0e6e1 3725#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
3726
3727static ssize_t show_measurement(struct device *d,
3728 struct device_attribute *attr, char *buf)
3729{
c79dd5b5 3730 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3731 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
3732 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3733 u8 *data = (u8 *) & measure_report;
3734 unsigned long flags;
3735
3736 spin_lock_irqsave(&priv->lock, flags);
3737 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3738 spin_unlock_irqrestore(&priv->lock, flags);
3739 return 0;
3740 }
3741 memcpy(&measure_report, &priv->measure_report, size);
3742 priv->measurement_status = 0;
3743 spin_unlock_irqrestore(&priv->lock, flags);
3744
3745 while (size && (PAGE_SIZE - len)) {
3746 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3747 PAGE_SIZE - len, 1);
3748 len = strlen(buf);
3749 if (PAGE_SIZE - len)
3750 buf[len++] = '\n';
3751
3752 ofs += 16;
3753 size -= min(size, 16U);
3754 }
3755
3756 return len;
3757}
3758
3759static ssize_t store_measurement(struct device *d,
3760 struct device_attribute *attr,
3761 const char *buf, size_t count)
3762{
c79dd5b5 3763 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3764 struct ieee80211_measurement_params params = {
3765 .channel = le16_to_cpu(priv->active_rxon.channel),
3766 .start_time = cpu_to_le64(priv->last_tsf),
3767 .duration = cpu_to_le16(1),
3768 };
3769 u8 type = IWL_MEASURE_BASIC;
3770 u8 buffer[32];
3771 u8 channel;
3772
3773 if (count) {
3774 char *p = buffer;
3775 strncpy(buffer, buf, min(sizeof(buffer), count));
3776 channel = simple_strtoul(p, NULL, 0);
3777 if (channel)
3778 params.channel = channel;
3779
3780 p = buffer;
3781 while (*p && *p != ' ')
3782 p++;
3783 if (*p)
3784 type = simple_strtoul(p + 1, NULL, 0);
3785 }
3786
3787 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3788 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3789 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3790
3791 return count;
3792}
3793
3794static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3795 show_measurement, store_measurement);
c8b0e6e1 3796#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3797
3798static ssize_t store_retry_rate(struct device *d,
3799 struct device_attribute *attr,
3800 const char *buf, size_t count)
3801{
c79dd5b5 3802 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3803
3804 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3805 if (priv->retry_rate <= 0)
3806 priv->retry_rate = 1;
3807
3808 return count;
3809}
3810
3811static ssize_t show_retry_rate(struct device *d,
3812 struct device_attribute *attr, char *buf)
3813{
c79dd5b5 3814 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3815 return sprintf(buf, "%d", priv->retry_rate);
3816}
3817
3818static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3819 store_retry_rate);
3820
3821static ssize_t store_power_level(struct device *d,
3822 struct device_attribute *attr,
3823 const char *buf, size_t count)
3824{
c79dd5b5 3825 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3826 int rc;
3827 int mode;
3828
3829 mode = simple_strtoul(buf, NULL, 0);
3830 mutex_lock(&priv->mutex);
3831
fee1247a 3832 if (!iwl_is_ready(priv)) {
b481de9c
ZY
3833 rc = -EAGAIN;
3834 goto out;
3835 }
3836
5da4b55f
MA
3837 rc = iwl_power_set_user_mode(priv, mode);
3838 if (rc) {
3839 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3840 goto out;
b481de9c 3841 }
b481de9c
ZY
3842 rc = count;
3843
3844 out:
3845 mutex_unlock(&priv->mutex);
3846 return rc;
3847}
3848
3849#define MAX_WX_STRING 80
3850
3851/* Values are in microsecond */
3852static const s32 timeout_duration[] = {
3853 350000,
3854 250000,
3855 75000,
3856 37000,
3857 25000,
3858};
3859static const s32 period_duration[] = {
3860 400000,
3861 700000,
3862 1000000,
3863 1000000,
3864 1000000
3865};
3866
3867static ssize_t show_power_level(struct device *d,
3868 struct device_attribute *attr, char *buf)
3869{
c79dd5b5 3870 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 3871 int level = priv->power_data.power_mode;
b481de9c
ZY
3872 char *p = buf;
3873
3874 p += sprintf(p, "%d ", level);
3875 switch (level) {
3876 case IWL_POWER_MODE_CAM:
3877 case IWL_POWER_AC:
3878 p += sprintf(p, "(AC)");
3879 break;
3880 case IWL_POWER_BATTERY:
3881 p += sprintf(p, "(BATTERY)");
3882 break;
3883 default:
3884 p += sprintf(p,
3885 "(Timeout %dms, Period %dms)",
3886 timeout_duration[level - 1] / 1000,
3887 period_duration[level - 1] / 1000);
3888 }
5da4b55f 3889/*
b481de9c
ZY
3890 if (!(priv->power_mode & IWL_POWER_ENABLED))
3891 p += sprintf(p, " OFF\n");
3892 else
3893 p += sprintf(p, " \n");
5da4b55f
MA
3894*/
3895 p += sprintf(p, " \n");
b481de9c 3896 return (p - buf + 1);
b481de9c
ZY
3897}
3898
3899static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3900 store_power_level);
3901
3902static ssize_t show_channels(struct device *d,
3903 struct device_attribute *attr, char *buf)
3904{
5d72a1f5
EK
3905
3906 struct iwl_priv *priv = dev_get_drvdata(d);
3907 struct ieee80211_channel *channels = NULL;
3908 const struct ieee80211_supported_band *supp_band = NULL;
3909 int len = 0, i;
3910 int count = 0;
3911
3912 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3913 return -EAGAIN;
3914
3915 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3916 channels = supp_band->channels;
3917 count = supp_band->n_channels;
3918
3919 len += sprintf(&buf[len],
3920 "Displaying %d channels in 2.4GHz band "
3921 "(802.11bg):\n", count);
3922
3923 for (i = 0; i < count; i++)
3924 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3925 ieee80211_frequency_to_channel(
3926 channels[i].center_freq),
3927 channels[i].max_power,
3928 channels[i].flags & IEEE80211_CHAN_RADAR ?
3929 " (IEEE 802.11h required)" : "",
3930 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3931 || (channels[i].flags &
3932 IEEE80211_CHAN_RADAR)) ? "" :
3933 ", IBSS",
3934 channels[i].flags &
3935 IEEE80211_CHAN_PASSIVE_SCAN ?
3936 "passive only" : "active/passive");
3937
3938 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3939 channels = supp_band->channels;
3940 count = supp_band->n_channels;
3941
3942 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3943 "(802.11a):\n", count);
3944
3945 for (i = 0; i < count; i++)
3946 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3947 ieee80211_frequency_to_channel(
3948 channels[i].center_freq),
3949 channels[i].max_power,
3950 channels[i].flags & IEEE80211_CHAN_RADAR ?
3951 " (IEEE 802.11h required)" : "",
3952 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3953 || (channels[i].flags &
3954 IEEE80211_CHAN_RADAR)) ? "" :
3955 ", IBSS",
3956 channels[i].flags &
3957 IEEE80211_CHAN_PASSIVE_SCAN ?
3958 "passive only" : "active/passive");
3959
3960 return len;
b481de9c
ZY
3961}
3962
3963static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3964
3965static ssize_t show_statistics(struct device *d,
3966 struct device_attribute *attr, char *buf)
3967{
c79dd5b5 3968 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3969 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c
ZY
3970 u32 len = 0, ofs = 0;
3971 u8 *data = (u8 *) & priv->statistics;
3972 int rc = 0;
3973
fee1247a 3974 if (!iwl_is_alive(priv))
b481de9c
ZY
3975 return -EAGAIN;
3976
3977 mutex_lock(&priv->mutex);
49ea8596 3978 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3979 mutex_unlock(&priv->mutex);
3980
3981 if (rc) {
3982 len = sprintf(buf,
3983 "Error sending statistics request: 0x%08X\n", rc);
3984 return len;
3985 }
3986
3987 while (size && (PAGE_SIZE - len)) {
3988 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3989 PAGE_SIZE - len, 1);
3990 len = strlen(buf);
3991 if (PAGE_SIZE - len)
3992 buf[len++] = '\n';
3993
3994 ofs += 16;
3995 size -= min(size, 16U);
3996 }
3997
3998 return len;
3999}
4000
4001static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4002
b481de9c
ZY
4003static ssize_t show_status(struct device *d,
4004 struct device_attribute *attr, char *buf)
4005{
c79dd5b5 4006 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4007 if (!iwl_is_alive(priv))
b481de9c
ZY
4008 return -EAGAIN;
4009 return sprintf(buf, "0x%08x\n", (int)priv->status);
4010}
4011
4012static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4013
b481de9c
ZY
4014/*****************************************************************************
4015 *
4016 * driver setup and teardown
4017 *
4018 *****************************************************************************/
4019
4e39317d 4020static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4021{
4022 priv->workqueue = create_workqueue(DRV_NAME);
4023
4024 init_waitqueue_head(&priv->wait_command_queue);
4025
bb8c093b
CH
4026 INIT_WORK(&priv->up, iwl4965_bg_up);
4027 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4028 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4029 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4030 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4031 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4032 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
bb8c093b 4033 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
4a4a9e81
TW
4034 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4035 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91
TW
4036
4037 /* FIXME : remove when resolved PENDING */
4038 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4039 iwl_setup_scan_deferred_work(priv);
bb8c093b 4040
4e39317d
EG
4041 if (priv->cfg->ops->lib->setup_deferred_work)
4042 priv->cfg->ops->lib->setup_deferred_work(priv);
4043
4044 init_timer(&priv->statistics_periodic);
4045 priv->statistics_periodic.data = (unsigned long)priv;
4046 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4047
4048 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4049 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4050}
4051
4e39317d 4052static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4053{
4e39317d
EG
4054 if (priv->cfg->ops->lib->cancel_deferred_work)
4055 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4056
3ae6a054 4057 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4058 cancel_delayed_work(&priv->scan_check);
4059 cancel_delayed_work(&priv->alive_start);
4060 cancel_delayed_work(&priv->post_associate);
4061 cancel_work_sync(&priv->beacon_update);
4e39317d 4062 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4063}
4064
bb8c093b 4065static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4066 &dev_attr_channels.attr,
b481de9c
ZY
4067 &dev_attr_flags.attr,
4068 &dev_attr_filter_flags.attr,
c8b0e6e1 4069#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
4070 &dev_attr_measurement.attr,
4071#endif
4072 &dev_attr_power_level.attr,
4073 &dev_attr_retry_rate.attr,
b481de9c
ZY
4074 &dev_attr_rs_window.attr,
4075 &dev_attr_statistics.attr,
4076 &dev_attr_status.attr,
4077 &dev_attr_temperature.attr,
b481de9c 4078 &dev_attr_tx_power.attr,
8cf769c6
EK
4079#ifdef CONFIG_IWLWIFI_DEBUG
4080 &dev_attr_debug_level.attr,
4081#endif
bc6f59bc 4082 &dev_attr_version.attr,
b481de9c
ZY
4083
4084 NULL
4085};
4086
bb8c093b 4087static struct attribute_group iwl4965_attribute_group = {
b481de9c 4088 .name = NULL, /* put in device directory */
bb8c093b 4089 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4090};
4091
bb8c093b
CH
4092static struct ieee80211_ops iwl4965_hw_ops = {
4093 .tx = iwl4965_mac_tx,
4094 .start = iwl4965_mac_start,
4095 .stop = iwl4965_mac_stop,
4096 .add_interface = iwl4965_mac_add_interface,
4097 .remove_interface = iwl4965_mac_remove_interface,
4098 .config = iwl4965_mac_config,
4099 .config_interface = iwl4965_mac_config_interface,
4100 .configure_filter = iwl4965_configure_filter,
4101 .set_key = iwl4965_mac_set_key,
ab885f8c 4102 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4103 .get_stats = iwl4965_mac_get_stats,
4104 .get_tx_stats = iwl4965_mac_get_tx_stats,
4105 .conf_tx = iwl4965_mac_conf_tx,
4106 .get_tsf = iwl4965_mac_get_tsf,
4107 .reset_tsf = iwl4965_mac_reset_tsf,
4108 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 4109 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4110 .ampdu_action = iwl4965_mac_ampdu_action,
bb8c093b 4111 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
4112};
4113
bb8c093b 4114static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4115{
4116 int err = 0;
c79dd5b5 4117 struct iwl_priv *priv;
b481de9c 4118 struct ieee80211_hw *hw;
82b9a121 4119 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4120 unsigned long flags;
5a66926a 4121 DECLARE_MAC_BUF(mac);
b481de9c 4122
316c30d9
AK
4123 /************************
4124 * 1. Allocating HW data
4125 ************************/
4126
6440adb5
BC
4127 /* Disabling hardware scan means that mac80211 will perform scans
4128 * "the hard way", rather than using device's scan. */
1ea87396 4129 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4130 if (cfg->mod_params->debug & IWL_DL_INFO)
4131 dev_printk(KERN_DEBUG, &(pdev->dev),
4132 "Disabling hw_scan\n");
bb8c093b 4133 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4134 }
4135
1d0a082d
AK
4136 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4137 if (!hw) {
b481de9c
ZY
4138 err = -ENOMEM;
4139 goto out;
4140 }
1d0a082d
AK
4141 priv = hw->priv;
4142 /* At this point both hw and priv are allocated. */
4143
b481de9c
ZY
4144 SET_IEEE80211_DEV(hw, &pdev->dev);
4145
4146 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4147 priv->cfg = cfg;
b481de9c 4148 priv->pci_dev = pdev;
316c30d9 4149
0a6857e7 4150#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4151 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4152 atomic_set(&priv->restrict_refcnt, 0);
4153#endif
b481de9c 4154
316c30d9
AK
4155 /**************************
4156 * 2. Initializing PCI bus
4157 **************************/
4158 if (pci_enable_device(pdev)) {
4159 err = -ENODEV;
4160 goto out_ieee80211_free_hw;
4161 }
4162
4163 pci_set_master(pdev);
4164
cc2a8ea8 4165 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 4166 if (!err)
cc2a8ea8
RR
4167 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4168 if (err) {
4169 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4170 if (!err)
4171 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4172 /* both attempts failed: */
316c30d9 4173 if (err) {
cc2a8ea8
RR
4174 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4175 DRV_NAME);
316c30d9 4176 goto out_pci_disable_device;
cc2a8ea8 4177 }
316c30d9
AK
4178 }
4179
4180 err = pci_request_regions(pdev, DRV_NAME);
4181 if (err)
4182 goto out_pci_disable_device;
4183
4184 pci_set_drvdata(pdev, priv);
4185
4186 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4187 * PCI Tx retries from interfering with C3 CPU state */
4188 pci_write_config_byte(pdev, 0x41, 0x00);
4189
4190 /***********************
4191 * 3. Read REV register
4192 ***********************/
4193 priv->hw_base = pci_iomap(pdev, 0, 0);
4194 if (!priv->hw_base) {
4195 err = -ENODEV;
4196 goto out_pci_release_regions;
4197 }
4198
4199 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4200 (unsigned long long) pci_resource_len(pdev, 0));
4201 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4202
b661c819 4203 iwl_hw_detect(priv);
316c30d9 4204 printk(KERN_INFO DRV_NAME
b661c819
TW
4205 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4206 priv->cfg->name, priv->hw_rev);
316c30d9 4207
91238714
TW
4208 /* amp init */
4209 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4210 if (err < 0) {
91238714 4211 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4212 goto out_iounmap;
4213 }
91238714
TW
4214 /*****************
4215 * 4. Read EEPROM
4216 *****************/
316c30d9
AK
4217 /* Read the EEPROM */
4218 err = iwl_eeprom_init(priv);
4219 if (err) {
4220 IWL_ERROR("Unable to init EEPROM\n");
4221 goto out_iounmap;
4222 }
8614f360
TW
4223 err = iwl_eeprom_check_version(priv);
4224 if (err)
4225 goto out_iounmap;
4226
02883017 4227 /* extract MAC Address */
316c30d9
AK
4228 iwl_eeprom_get_mac(priv, priv->mac_addr);
4229 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4230 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4231
4232 /************************
4233 * 5. Setup HW constants
4234 ************************/
4235 /* Device-specific setup */
5425e490
TW
4236 if (priv->cfg->ops->lib->set_hw_params(priv)) {
4237 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4238 goto out_free_eeprom;
316c30d9
AK
4239 }
4240
4241 /*******************
6ba87956 4242 * 6. Setup priv
316c30d9 4243 *******************/
b481de9c 4244
6ba87956 4245 err = iwl_init_drv(priv);
bf85ea4f 4246 if (err)
399f4900 4247 goto out_free_eeprom;
bf85ea4f 4248 /* At this point both hw and priv are initialized. */
316c30d9
AK
4249
4250 /**********************************
4251 * 7. Initialize module parameters
4252 **********************************/
4253
4254 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4255 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4256 set_bit(STATUS_RF_KILL_SW, &priv->status);
4257 IWL_DEBUG_INFO("Radio disabled.\n");
4258 }
4259
316c30d9
AK
4260 /********************
4261 * 8. Setup services
4262 ********************/
0359facc 4263 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4264 iwl4965_disable_interrupts(priv);
0359facc 4265 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4266
4267 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4268 if (err) {
4269 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4270 goto out_uninit_drv;
316c30d9
AK
4271 }
4272
316c30d9 4273
4e39317d 4274 iwl_setup_deferred_work(priv);
316c30d9
AK
4275 iwl4965_setup_rx_handlers(priv);
4276
4277 /********************
4278 * 9. Conclude
4279 ********************/
5a66926a
ZY
4280 pci_save_state(pdev);
4281 pci_disable_device(pdev);
b481de9c 4282
6ba87956
TW
4283 /**********************************
4284 * 10. Setup and register mac80211
4285 **********************************/
4286
4287 err = iwl_setup_mac(priv);
4288 if (err)
4289 goto out_remove_sysfs;
4290
4291 err = iwl_dbgfs_register(priv, DRV_NAME);
4292 if (err)
4293 IWL_ERROR("failed to create debugfs files\n");
4294
58d0f361
EG
4295 err = iwl_rfkill_init(priv);
4296 if (err)
4297 IWL_ERROR("Unable to initialize RFKILL system. "
4298 "Ignoring error: %d\n", err);
4299 iwl_power_initialize(priv);
b481de9c
ZY
4300 return 0;
4301
316c30d9
AK
4302 out_remove_sysfs:
4303 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4304 out_uninit_drv:
4305 iwl_uninit_drv(priv);
073d3f5f
TW
4306 out_free_eeprom:
4307 iwl_eeprom_free(priv);
b481de9c
ZY
4308 out_iounmap:
4309 pci_iounmap(pdev, priv->hw_base);
4310 out_pci_release_regions:
4311 pci_release_regions(pdev);
316c30d9 4312 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4313 out_pci_disable_device:
4314 pci_disable_device(pdev);
b481de9c
ZY
4315 out_ieee80211_free_hw:
4316 ieee80211_free_hw(priv->hw);
4317 out:
4318 return err;
4319}
4320
c83dbf68 4321static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4322{
c79dd5b5 4323 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4324 unsigned long flags;
b481de9c
ZY
4325
4326 if (!priv)
4327 return;
4328
4329 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4330
67249625
EG
4331 iwl_dbgfs_unregister(priv);
4332 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4333
c4f55232
RR
4334 if (priv->mac80211_registered) {
4335 ieee80211_unregister_hw(priv->hw);
4336 priv->mac80211_registered = 0;
4337 }
4338
b481de9c 4339 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4340
bb8c093b 4341 iwl4965_down(priv);
b481de9c 4342
0359facc
MA
4343 /* make sure we flush any pending irq or
4344 * tasklet for the driver
4345 */
4346 spin_lock_irqsave(&priv->lock, flags);
4347 iwl4965_disable_interrupts(priv);
4348 spin_unlock_irqrestore(&priv->lock, flags);
4349
4350 iwl_synchronize_irq(priv);
4351
58d0f361 4352 iwl_rfkill_unregister(priv);
bb8c093b 4353 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4354
4355 if (priv->rxq.bd)
a55360e4 4356 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4357 iwl_hw_txq_ctx_free(priv);
b481de9c 4358
37deb2a0 4359 iwl_clear_stations_table(priv);
073d3f5f 4360 iwl_eeprom_free(priv);
b481de9c 4361
b481de9c 4362
948c171c
MA
4363 /*netif_stop_queue(dev); */
4364 flush_workqueue(priv->workqueue);
4365
bb8c093b 4366 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4367 * priv->workqueue... so we can't take down the workqueue
4368 * until now... */
4369 destroy_workqueue(priv->workqueue);
4370 priv->workqueue = NULL;
4371
b481de9c
ZY
4372 pci_iounmap(pdev, priv->hw_base);
4373 pci_release_regions(pdev);
4374 pci_disable_device(pdev);
4375 pci_set_drvdata(pdev, NULL);
4376
6ba87956 4377 iwl_uninit_drv(priv);
b481de9c
ZY
4378
4379 if (priv->ibss_beacon)
4380 dev_kfree_skb(priv->ibss_beacon);
4381
4382 ieee80211_free_hw(priv->hw);
4383}
4384
4385#ifdef CONFIG_PM
4386
bb8c093b 4387static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4388{
c79dd5b5 4389 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4390
e655b9f0
ZY
4391 if (priv->is_open) {
4392 set_bit(STATUS_IN_SUSPEND, &priv->status);
4393 iwl4965_mac_stop(priv->hw);
4394 priv->is_open = 1;
4395 }
b481de9c 4396
b481de9c
ZY
4397 pci_set_power_state(pdev, PCI_D3hot);
4398
b481de9c
ZY
4399 return 0;
4400}
4401
bb8c093b 4402static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4403{
c79dd5b5 4404 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4405
b481de9c 4406 pci_set_power_state(pdev, PCI_D0);
b481de9c 4407
e655b9f0
ZY
4408 if (priv->is_open)
4409 iwl4965_mac_start(priv->hw);
b481de9c 4410
e655b9f0 4411 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4412 return 0;
4413}
4414
4415#endif /* CONFIG_PM */
4416
4417/*****************************************************************************
4418 *
4419 * driver and module entry point
4420 *
4421 *****************************************************************************/
4422
fed9017e
RR
4423/* Hardware specific file defines the PCI IDs table for that hardware module */
4424static struct pci_device_id iwl_hw_card_ids[] = {
4425 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4426 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
5a6a256e
TW
4427#ifdef CONFIG_IWL5000
4428 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4429 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
4430 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
4431#endif /* CONFIG_IWL5000 */
fed9017e
RR
4432 {0}
4433};
4434MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4435
4436static struct pci_driver iwl_driver = {
b481de9c 4437 .name = DRV_NAME,
fed9017e 4438 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4439 .probe = iwl4965_pci_probe,
4440 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4441#ifdef CONFIG_PM
bb8c093b
CH
4442 .suspend = iwl4965_pci_suspend,
4443 .resume = iwl4965_pci_resume,
b481de9c
ZY
4444#endif
4445};
4446
bb8c093b 4447static int __init iwl4965_init(void)
b481de9c
ZY
4448{
4449
4450 int ret;
4451 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4452 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4453
4454 ret = iwl4965_rate_control_register();
4455 if (ret) {
4456 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4457 return ret;
4458 }
4459
fed9017e 4460 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4461 if (ret) {
4462 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4463 goto error_register;
b481de9c 4464 }
b481de9c
ZY
4465
4466 return ret;
897e1cf2 4467
897e1cf2
RC
4468error_register:
4469 iwl4965_rate_control_unregister();
4470 return ret;
b481de9c
ZY
4471}
4472
bb8c093b 4473static void __exit iwl4965_exit(void)
b481de9c 4474{
fed9017e 4475 pci_unregister_driver(&iwl_driver);
897e1cf2 4476 iwl4965_rate_control_unregister();
b481de9c
ZY
4477}
4478
bb8c093b
CH
4479module_exit(iwl4965_exit);
4480module_init(iwl4965_init);