Commit | Line | Data |
---|---|---|
34cf6ff6 AK |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called LICENSE.GPL. | |
26 | * | |
27 | * Contact Information: | |
28 | * Tomas Winkler <tomas.winkler@intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | |
34 | * All rights reserved. | |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | *****************************************************************************/ | |
62 | ||
63 | ||
64 | #include <linux/kernel.h> | |
65 | #include <linux/module.h> | |
34cf6ff6 AK |
66 | #include <linux/init.h> |
67 | ||
68 | #include <net/mac80211.h> | |
69 | ||
5a36ba0e | 70 | #include "iwl-commands.h" |
3e0d4cb1 | 71 | #include "iwl-dev.h" |
34cf6ff6 | 72 | #include "iwl-core.h" |
0a6857e7 | 73 | #include "iwl-debug.h" |
34cf6ff6 | 74 | #include "iwl-eeprom.h" |
3395f6e9 | 75 | #include "iwl-io.h" |
34cf6ff6 | 76 | |
bf85ea4f AK |
77 | /************************** EEPROM BANDS **************************** |
78 | * | |
79 | * The iwl_eeprom_band definitions below provide the mapping from the | |
80 | * EEPROM contents to the specific channel number supported for each | |
81 | * band. | |
82 | * | |
83 | * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3 | |
84 | * definition below maps to physical channel 42 in the 5.2GHz spectrum. | |
85 | * The specific geography and calibration information for that channel | |
86 | * is contained in the eeprom map itself. | |
87 | * | |
88 | * During init, we copy the eeprom information and channel map | |
89 | * information into priv->channel_info_24/52 and priv->channel_map_24/52 | |
90 | * | |
91 | * channel_map_24/52 provides the index in the channel_info array for a | |
92 | * given channel. We have to have two separate maps as there is channel | |
93 | * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and | |
94 | * band_2 | |
95 | * | |
96 | * A value of 0xff stored in the channel_map indicates that the channel | |
97 | * is not supported by the hardware at all. | |
98 | * | |
99 | * A value of 0xfe in the channel_map indicates that the channel is not | |
100 | * valid for Tx with the current hardware. This means that | |
101 | * while the system can tune and receive on a given channel, it may not | |
102 | * be able to associate or transmit any frames on that | |
103 | * channel. There is no corresponding channel information for that | |
104 | * entry. | |
105 | * | |
106 | *********************************************************************/ | |
107 | ||
108 | /* 2.4 GHz */ | |
109 | const u8 iwl_eeprom_band_1[14] = { | |
110 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | |
111 | }; | |
112 | ||
113 | /* 5.2 GHz bands */ | |
114 | static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */ | |
115 | 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 | |
116 | }; | |
117 | ||
118 | static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */ | |
119 | 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | |
120 | }; | |
121 | ||
122 | static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */ | |
123 | 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | |
124 | }; | |
125 | ||
126 | static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */ | |
127 | 145, 149, 153, 157, 161, 165 | |
128 | }; | |
129 | ||
130 | static const u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */ | |
131 | 1, 2, 3, 4, 5, 6, 7 | |
132 | }; | |
133 | ||
134 | static const u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */ | |
135 | 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 | |
136 | }; | |
137 | ||
34cf6ff6 AK |
138 | /****************************************************************************** |
139 | * | |
140 | * EEPROM related functions | |
141 | * | |
142 | ******************************************************************************/ | |
143 | ||
c79dd5b5 | 144 | int iwlcore_eeprom_verify_signature(struct iwl_priv *priv) |
34cf6ff6 | 145 | { |
3395f6e9 | 146 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); |
34cf6ff6 | 147 | if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { |
6f147926 | 148 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); |
34cf6ff6 AK |
149 | return -ENOENT; |
150 | } | |
151 | return 0; | |
152 | } | |
153 | EXPORT_SYMBOL(iwlcore_eeprom_verify_signature); | |
154 | ||
155 | /* | |
156 | * The device's EEPROM semaphore prevents conflicts between driver and uCode | |
157 | * when accessing the EEPROM; each access is a series of pulses to/from the | |
158 | * EEPROM chip, not a single event, so even reads could conflict if they | |
159 | * weren't arbitrated by the semaphore. | |
160 | */ | |
c79dd5b5 | 161 | int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv) |
34cf6ff6 AK |
162 | { |
163 | u16 count; | |
164 | int ret; | |
165 | ||
166 | for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { | |
167 | /* Request semaphore */ | |
3395f6e9 TW |
168 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
169 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); | |
34cf6ff6 AK |
170 | |
171 | /* See if we got it */ | |
3395f6e9 TW |
172 | ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG, |
173 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, | |
174 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, | |
175 | EEPROM_SEM_TIMEOUT); | |
34cf6ff6 AK |
176 | if (ret >= 0) { |
177 | IWL_DEBUG_IO("Acquired semaphore after %d tries.\n", | |
178 | count+1); | |
179 | return ret; | |
180 | } | |
181 | } | |
182 | ||
183 | return ret; | |
184 | } | |
185 | EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore); | |
186 | ||
c79dd5b5 | 187 | void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv) |
34cf6ff6 | 188 | { |
3395f6e9 | 189 | iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG, |
34cf6ff6 AK |
190 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); |
191 | ||
192 | } | |
193 | EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore); | |
194 | ||
073d3f5f TW |
195 | const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset) |
196 | { | |
197 | BUG_ON(offset >= priv->cfg->eeprom_size); | |
198 | return &priv->eeprom[offset]; | |
199 | } | |
200 | EXPORT_SYMBOL(iwlcore_eeprom_query_addr); | |
34cf6ff6 AK |
201 | |
202 | /** | |
203 | * iwl_eeprom_init - read EEPROM contents | |
204 | * | |
205 | * Load the EEPROM contents from adapter into priv->eeprom | |
206 | * | |
207 | * NOTE: This routine uses the non-debug IO access functions. | |
208 | */ | |
c79dd5b5 | 209 | int iwl_eeprom_init(struct iwl_priv *priv) |
34cf6ff6 | 210 | { |
073d3f5f | 211 | u16 *e; |
3395f6e9 | 212 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); |
34cf6ff6 | 213 | u32 r; |
073d3f5f | 214 | int sz = priv->cfg->eeprom_size; |
34cf6ff6 AK |
215 | int ret; |
216 | int i; | |
217 | u16 addr; | |
218 | ||
073d3f5f TW |
219 | /* allocate eeprom */ |
220 | priv->eeprom = kzalloc(sz, GFP_KERNEL); | |
221 | if (!priv->eeprom) { | |
222 | ret = -ENOMEM; | |
223 | goto alloc_err; | |
224 | } | |
225 | e = (u16 *)priv->eeprom; | |
34cf6ff6 | 226 | |
073d3f5f TW |
227 | ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv); |
228 | if (ret < 0) { | |
6f147926 | 229 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); |
073d3f5f TW |
230 | ret = -ENOENT; |
231 | goto err; | |
34cf6ff6 AK |
232 | } |
233 | ||
234 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ | |
235 | ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv); | |
236 | if (ret < 0) { | |
237 | IWL_ERROR("Failed to acquire EEPROM semaphore.\n"); | |
073d3f5f TW |
238 | ret = -ENOENT; |
239 | goto err; | |
34cf6ff6 AK |
240 | } |
241 | ||
242 | /* eeprom is an array of 16bit values */ | |
243 | for (addr = 0; addr < sz; addr += sizeof(u16)) { | |
3395f6e9 TW |
244 | _iwl_write32(priv, CSR_EEPROM_REG, addr << 1); |
245 | _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD); | |
34cf6ff6 AK |
246 | |
247 | for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT; | |
248 | i += IWL_EEPROM_ACCESS_DELAY) { | |
3395f6e9 | 249 | r = _iwl_read_direct32(priv, CSR_EEPROM_REG); |
34cf6ff6 AK |
250 | if (r & CSR_EEPROM_REG_READ_VALID_MSK) |
251 | break; | |
252 | udelay(IWL_EEPROM_ACCESS_DELAY); | |
253 | } | |
254 | ||
255 | if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) { | |
6f147926 | 256 | IWL_ERROR("Time out reading EEPROM[%d]\n", addr); |
34cf6ff6 AK |
257 | ret = -ETIMEDOUT; |
258 | goto done; | |
259 | } | |
260 | e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16)); | |
261 | } | |
262 | ret = 0; | |
34cf6ff6 AK |
263 | done: |
264 | priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv); | |
073d3f5f TW |
265 | err: |
266 | if (ret) | |
267 | kfree(priv->eeprom); | |
268 | alloc_err: | |
34cf6ff6 AK |
269 | return ret; |
270 | } | |
271 | EXPORT_SYMBOL(iwl_eeprom_init); | |
272 | ||
073d3f5f TW |
273 | void iwl_eeprom_free(struct iwl_priv *priv) |
274 | { | |
3ac7f146 | 275 | kfree(priv->eeprom); |
073d3f5f TW |
276 | priv->eeprom = NULL; |
277 | } | |
278 | EXPORT_SYMBOL(iwl_eeprom_free); | |
279 | ||
8614f360 TW |
280 | int iwl_eeprom_check_version(struct iwl_priv *priv) |
281 | { | |
282 | return priv->cfg->ops->lib->eeprom_ops.check_version(priv); | |
283 | } | |
284 | EXPORT_SYMBOL(iwl_eeprom_check_version); | |
073d3f5f TW |
285 | |
286 | const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset) | |
287 | { | |
288 | return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset); | |
289 | } | |
290 | EXPORT_SYMBOL(iwl_eeprom_query_addr); | |
291 | ||
292 | u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset) | |
293 | { | |
294 | return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8); | |
295 | } | |
296 | EXPORT_SYMBOL(iwl_eeprom_query16); | |
34cf6ff6 | 297 | |
c79dd5b5 | 298 | void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac) |
34cf6ff6 | 299 | { |
073d3f5f TW |
300 | const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv, |
301 | EEPROM_MAC_ADDRESS); | |
302 | memcpy(mac, addr, ETH_ALEN); | |
34cf6ff6 AK |
303 | } |
304 | EXPORT_SYMBOL(iwl_eeprom_get_mac); | |
305 | ||
bf85ea4f | 306 | static void iwl_init_band_reference(const struct iwl_priv *priv, |
073d3f5f TW |
307 | int eep_band, int *eeprom_ch_count, |
308 | const struct iwl_eeprom_channel **eeprom_ch_info, | |
309 | const u8 **eeprom_ch_index) | |
bf85ea4f | 310 | { |
073d3f5f TW |
311 | u32 offset = priv->cfg->ops->lib-> |
312 | eeprom_ops.regulatory_bands[eep_band - 1]; | |
313 | switch (eep_band) { | |
bf85ea4f AK |
314 | case 1: /* 2.4GHz band */ |
315 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1); | |
073d3f5f TW |
316 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
317 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
318 | *eeprom_ch_index = iwl_eeprom_band_1; |
319 | break; | |
320 | case 2: /* 4.9GHz band */ | |
321 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2); | |
073d3f5f TW |
322 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
323 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
324 | *eeprom_ch_index = iwl_eeprom_band_2; |
325 | break; | |
326 | case 3: /* 5.2GHz band */ | |
327 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3); | |
073d3f5f TW |
328 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
329 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
330 | *eeprom_ch_index = iwl_eeprom_band_3; |
331 | break; | |
332 | case 4: /* 5.5GHz band */ | |
333 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4); | |
073d3f5f TW |
334 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
335 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
336 | *eeprom_ch_index = iwl_eeprom_band_4; |
337 | break; | |
338 | case 5: /* 5.7GHz band */ | |
339 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5); | |
073d3f5f TW |
340 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
341 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
342 | *eeprom_ch_index = iwl_eeprom_band_5; |
343 | break; | |
344 | case 6: /* 2.4GHz FAT channels */ | |
345 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6); | |
073d3f5f TW |
346 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
347 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
348 | *eeprom_ch_index = iwl_eeprom_band_6; |
349 | break; | |
350 | case 7: /* 5 GHz FAT channels */ | |
351 | *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7); | |
073d3f5f TW |
352 | *eeprom_ch_info = (struct iwl_eeprom_channel *) |
353 | iwl_eeprom_query_addr(priv, offset); | |
bf85ea4f AK |
354 | *eeprom_ch_index = iwl_eeprom_band_7; |
355 | break; | |
356 | default: | |
357 | BUG(); | |
358 | return; | |
359 | } | |
360 | } | |
361 | ||
362 | #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \ | |
363 | ? # x " " : "") | |
364 | ||
365 | /** | |
da6833cb | 366 | * iwl_set_fat_chan_info - Copy fat channel info into driver's priv. |
bf85ea4f AK |
367 | * |
368 | * Does not set up a command, or touch hardware. | |
369 | */ | |
da6833cb | 370 | static int iwl_set_fat_chan_info(struct iwl_priv *priv, |
bf85ea4f | 371 | enum ieee80211_band band, u16 channel, |
073d3f5f | 372 | const struct iwl_eeprom_channel *eeprom_ch, |
bf85ea4f AK |
373 | u8 fat_extension_channel) |
374 | { | |
375 | struct iwl_channel_info *ch_info; | |
376 | ||
377 | ch_info = (struct iwl_channel_info *) | |
8622e705 | 378 | iwl_get_channel_info(priv, band, channel); |
bf85ea4f AK |
379 | |
380 | if (!is_channel_valid(ch_info)) | |
381 | return -1; | |
382 | ||
630fe9b6 TW |
383 | IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):" |
384 | " Ad-Hoc %ssupported\n", | |
bf85ea4f AK |
385 | ch_info->channel, |
386 | is_channel_a_band(ch_info) ? | |
387 | "5.2" : "2.4", | |
388 | CHECK_AND_PRINT(IBSS), | |
389 | CHECK_AND_PRINT(ACTIVE), | |
390 | CHECK_AND_PRINT(RADAR), | |
391 | CHECK_AND_PRINT(WIDE), | |
bf85ea4f AK |
392 | CHECK_AND_PRINT(DFS), |
393 | eeprom_ch->flags, | |
394 | eeprom_ch->max_power_avg, | |
395 | ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) | |
396 | && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? | |
397 | "" : "not "); | |
398 | ||
399 | ch_info->fat_eeprom = *eeprom_ch; | |
400 | ch_info->fat_max_power_avg = eeprom_ch->max_power_avg; | |
401 | ch_info->fat_curr_txpow = eeprom_ch->max_power_avg; | |
402 | ch_info->fat_min_power = 0; | |
403 | ch_info->fat_scan_power = eeprom_ch->max_power_avg; | |
404 | ch_info->fat_flags = eeprom_ch->flags; | |
405 | ch_info->fat_extension_channel = fat_extension_channel; | |
406 | ||
407 | return 0; | |
408 | } | |
409 | ||
410 | #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \ | |
411 | ? # x " " : "") | |
412 | ||
413 | /** | |
414 | * iwl_init_channel_map - Set up driver's info for all possible channels | |
415 | */ | |
416 | int iwl_init_channel_map(struct iwl_priv *priv) | |
417 | { | |
418 | int eeprom_ch_count = 0; | |
419 | const u8 *eeprom_ch_index = NULL; | |
073d3f5f | 420 | const struct iwl_eeprom_channel *eeprom_ch_info = NULL; |
bf85ea4f AK |
421 | int band, ch; |
422 | struct iwl_channel_info *ch_info; | |
423 | ||
424 | if (priv->channel_count) { | |
425 | IWL_DEBUG_INFO("Channel map already initialized.\n"); | |
426 | return 0; | |
427 | } | |
428 | ||
bf85ea4f AK |
429 | IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n"); |
430 | ||
431 | priv->channel_count = | |
432 | ARRAY_SIZE(iwl_eeprom_band_1) + | |
433 | ARRAY_SIZE(iwl_eeprom_band_2) + | |
434 | ARRAY_SIZE(iwl_eeprom_band_3) + | |
435 | ARRAY_SIZE(iwl_eeprom_band_4) + | |
436 | ARRAY_SIZE(iwl_eeprom_band_5); | |
437 | ||
438 | IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count); | |
439 | ||
440 | priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) * | |
441 | priv->channel_count, GFP_KERNEL); | |
442 | if (!priv->channel_info) { | |
443 | IWL_ERROR("Could not allocate channel_info\n"); | |
444 | priv->channel_count = 0; | |
445 | return -ENOMEM; | |
446 | } | |
447 | ||
448 | ch_info = priv->channel_info; | |
449 | ||
450 | /* Loop through the 5 EEPROM bands adding them in order to the | |
451 | * channel map we maintain (that contains additional information than | |
452 | * what just in the EEPROM) */ | |
453 | for (band = 1; band <= 5; band++) { | |
454 | ||
455 | iwl_init_band_reference(priv, band, &eeprom_ch_count, | |
456 | &eeprom_ch_info, &eeprom_ch_index); | |
457 | ||
458 | /* Loop through each band adding each of the channels */ | |
459 | for (ch = 0; ch < eeprom_ch_count; ch++) { | |
460 | ch_info->channel = eeprom_ch_index[ch]; | |
461 | ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ : | |
462 | IEEE80211_BAND_5GHZ; | |
463 | ||
464 | /* permanently store EEPROM's channel regulatory flags | |
465 | * and max power in channel info database. */ | |
466 | ch_info->eeprom = eeprom_ch_info[ch]; | |
467 | ||
468 | /* Copy the run-time flags so they are there even on | |
469 | * invalid channels */ | |
470 | ch_info->flags = eeprom_ch_info[ch].flags; | |
963f5517 EG |
471 | /* First write that fat is not enabled, and then enable |
472 | * one by one */ | |
473 | ch_info->fat_extension_channel = | |
474 | (IEEE80211_CHAN_NO_FAT_ABOVE | | |
475 | IEEE80211_CHAN_NO_FAT_BELOW); | |
bf85ea4f AK |
476 | |
477 | if (!(is_channel_valid(ch_info))) { | |
478 | IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - " | |
479 | "No traffic\n", | |
480 | ch_info->channel, | |
481 | ch_info->flags, | |
482 | is_channel_a_band(ch_info) ? | |
483 | "5.2" : "2.4"); | |
484 | ch_info++; | |
485 | continue; | |
486 | } | |
487 | ||
488 | /* Initialize regulatory-based run-time data */ | |
489 | ch_info->max_power_avg = ch_info->curr_txpow = | |
490 | eeprom_ch_info[ch].max_power_avg; | |
491 | ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; | |
492 | ch_info->min_power = 0; | |
493 | ||
630fe9b6 TW |
494 | IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):" |
495 | " Ad-Hoc %ssupported\n", | |
bf85ea4f AK |
496 | ch_info->channel, |
497 | is_channel_a_band(ch_info) ? | |
498 | "5.2" : "2.4", | |
499 | CHECK_AND_PRINT_I(VALID), | |
500 | CHECK_AND_PRINT_I(IBSS), | |
501 | CHECK_AND_PRINT_I(ACTIVE), | |
502 | CHECK_AND_PRINT_I(RADAR), | |
503 | CHECK_AND_PRINT_I(WIDE), | |
bf85ea4f AK |
504 | CHECK_AND_PRINT_I(DFS), |
505 | eeprom_ch_info[ch].flags, | |
506 | eeprom_ch_info[ch].max_power_avg, | |
507 | ((eeprom_ch_info[ch]. | |
508 | flags & EEPROM_CHANNEL_IBSS) | |
509 | && !(eeprom_ch_info[ch]. | |
510 | flags & EEPROM_CHANNEL_RADAR)) | |
511 | ? "" : "not "); | |
512 | ||
513 | /* Set the user_txpower_limit to the highest power | |
514 | * supported by any channel */ | |
515 | if (eeprom_ch_info[ch].max_power_avg > | |
630fe9b6 TW |
516 | priv->tx_power_user_lmt) |
517 | priv->tx_power_user_lmt = | |
bf85ea4f AK |
518 | eeprom_ch_info[ch].max_power_avg; |
519 | ||
520 | ch_info++; | |
521 | } | |
522 | } | |
523 | ||
524 | /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */ | |
525 | for (band = 6; band <= 7; band++) { | |
526 | enum ieee80211_band ieeeband; | |
527 | u8 fat_extension_chan; | |
528 | ||
529 | iwl_init_band_reference(priv, band, &eeprom_ch_count, | |
530 | &eeprom_ch_info, &eeprom_ch_index); | |
531 | ||
532 | /* EEPROM band 6 is 2.4, band 7 is 5 GHz */ | |
533 | ieeeband = | |
534 | (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | |
535 | ||
536 | /* Loop through each band adding each of the channels */ | |
537 | for (ch = 0; ch < eeprom_ch_count; ch++) { | |
538 | ||
539 | if ((band == 6) && | |
963f5517 EG |
540 | ((eeprom_ch_index[ch] == 5) || |
541 | (eeprom_ch_index[ch] == 6) || | |
542 | (eeprom_ch_index[ch] == 7))) | |
543 | /* both are allowed: above and below */ | |
544 | fat_extension_chan = 0; | |
bf85ea4f | 545 | else |
963f5517 EG |
546 | fat_extension_chan = |
547 | IEEE80211_CHAN_NO_FAT_BELOW; | |
bf85ea4f AK |
548 | |
549 | /* Set up driver's info for lower half */ | |
da6833cb TW |
550 | iwl_set_fat_chan_info(priv, ieeeband, |
551 | eeprom_ch_index[ch], | |
552 | &(eeprom_ch_info[ch]), | |
553 | fat_extension_chan); | |
bf85ea4f AK |
554 | |
555 | /* Set up driver's info for upper half */ | |
da6833cb TW |
556 | iwl_set_fat_chan_info(priv, ieeeband, |
557 | (eeprom_ch_index[ch] + 4), | |
558 | &(eeprom_ch_info[ch]), | |
963f5517 | 559 | IEEE80211_CHAN_NO_FAT_ABOVE); |
bf85ea4f AK |
560 | } |
561 | } | |
562 | ||
563 | return 0; | |
564 | } | |
565 | EXPORT_SYMBOL(iwl_init_channel_map); | |
566 | ||
567 | /* | |
da6833cb | 568 | * iwl_free_channel_map - undo allocations in iwl_init_channel_map |
bf85ea4f AK |
569 | */ |
570 | void iwl_free_channel_map(struct iwl_priv *priv) | |
571 | { | |
572 | kfree(priv->channel_info); | |
573 | priv->channel_count = 0; | |
574 | } | |
bf85ea4f AK |
575 | |
576 | /** | |
577 | * iwl_get_channel_info - Find driver's private channel info | |
578 | * | |
579 | * Based on band and channel number. | |
580 | */ | |
82a66bbb TW |
581 | const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv, |
582 | enum ieee80211_band band, u16 channel) | |
bf85ea4f AK |
583 | { |
584 | int i; | |
585 | ||
586 | switch (band) { | |
587 | case IEEE80211_BAND_5GHZ: | |
588 | for (i = 14; i < priv->channel_count; i++) { | |
589 | if (priv->channel_info[i].channel == channel) | |
590 | return &priv->channel_info[i]; | |
591 | } | |
592 | break; | |
593 | case IEEE80211_BAND_2GHZ: | |
594 | if (channel >= 1 && channel <= 14) | |
595 | return &priv->channel_info[channel - 1]; | |
596 | break; | |
597 | default: | |
598 | BUG(); | |
599 | } | |
600 | ||
601 | return NULL; | |
602 | } | |
8622e705 | 603 | EXPORT_SYMBOL(iwl_get_channel_info); |
bf85ea4f | 604 |