iwlwifi: remove rfkill warning from iwl-io
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
4fc22b21 39#define DRV_NAME "iwlagn"
ad97edd2 40#include "iwl-rfkill.h"
6bc913bd 41#include "iwl-eeprom.h"
5d08cd1d 42#include "iwl-4965-hw.h"
6f83eaa1 43#include "iwl-csr.h"
5d08cd1d 44#include "iwl-prph.h"
0a6857e7 45#include "iwl-debug.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
e227ceac 48#include "iwl-agn-rs.h"
5d08cd1d 49
fed9017e
RR
50/* configuration for the iwl4965 */
51extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
52extern struct iwl_cfg iwl5300_agn_cfg;
53extern struct iwl_cfg iwl5100_agn_cfg;
54extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
55extern struct iwl_cfg iwl5100_bg_cfg;
56extern struct iwl_cfg iwl5100_abg_cfg;
fed9017e 57
099b40b7
RR
58/* CT-KILL constants */
59#define CT_KILL_THRESHOLD 110 /* in Celsius */
4bf775cd 60
5d08cd1d
CH
61/* Default noise level to report when noise measurement is not available.
62 * This may be because we're:
63 * 1) Not associated (4965, no beacon statistics being sent to driver)
64 * 2) Scanning (noise measurement does not apply to associated channel)
65 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
66 * Use default noise value of -127 ... this is below the range of measurable
67 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
68 * Also, -127 works better than 0 when averaging frames with/without
69 * noise info (e.g. averaging might be done in app); measured dBm values are
70 * always negative ... using a negative value as the default keeps all
71 * averages within an s8's (used in some apps) range of negative values. */
72#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
73
5d08cd1d
CH
74/*
75 * RTS threshold here is total size [2347] minus 4 FCS bytes
76 * Per spec:
77 * a value of 0 means RTS on all data/management packets
78 * a value > max MSDU size means no RTS
79 * else RTS for data/management frames where MPDU is larger
80 * than RTS value.
81 */
82#define DEFAULT_RTS_THRESHOLD 2347U
83#define MIN_RTS_THRESHOLD 0U
84#define MAX_RTS_THRESHOLD 2347U
85#define MAX_MSDU_SIZE 2304U
86#define MAX_MPDU_SIZE 2346U
87#define DEFAULT_BEACON_INTERVAL 100U
88#define DEFAULT_SHORT_RETRY_LIMIT 7U
89#define DEFAULT_LONG_RETRY_LIMIT 4U
90
a55360e4 91struct iwl_rx_mem_buffer {
5d08cd1d
CH
92 dma_addr_t dma_addr;
93 struct sk_buff *skb;
94 struct list_head list;
95};
96
5d08cd1d
CH
97/*
98 * Generic queue structure
99 *
100 * Contains common data for Rx and Tx queues
101 */
443cfd45 102struct iwl_queue {
5d08cd1d
CH
103 int n_bd; /* number of BDs in this queue */
104 int write_ptr; /* 1-st empty entry (index) host_w*/
105 int read_ptr; /* last used entry (index) host_r*/
106 dma_addr_t dma_addr; /* physical addr for BD's */
107 int n_window; /* safe queue window */
108 u32 id;
109 int low_mark; /* low watermark, resume queue if free
110 * space more than this */
111 int high_mark; /* high watermark, stop queue if free
112 * space less than this */
113} __attribute__ ((packed));
114
115#define MAX_NUM_OF_TBS (20)
116
bc47279f 117/* One for each TFD */
8567c63e 118struct iwl_tx_info {
5d08cd1d
CH
119 struct sk_buff *skb[MAX_NUM_OF_TBS];
120};
121
122/**
16466903 123 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
124 * @q: generic Rx/Tx queue descriptor
125 * @bd: base of circular buffer of TFDs
126 * @cmd: array of command/Tx buffers
127 * @dma_addr_cmd: physical address of cmd/tx buffer array
128 * @txb: array of per-TFD driver data
129 * @need_update: indicates need to update read/write index
130 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 131 *
bc47279f
BC
132 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
133 * descriptors) and required locking structures.
5d08cd1d 134 */
16466903 135struct iwl_tx_queue {
443cfd45 136 struct iwl_queue q;
1053d35f 137 struct iwl_tfd_frame *bd;
da99c4b6 138 struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS];
8567c63e 139 struct iwl_tx_info *txb;
5d08cd1d
CH
140 int need_update;
141 int sched_retry;
142 int active;
143};
144
145#define IWL_NUM_SCAN_RATES (2)
146
bb8c093b 147struct iwl4965_channel_tgd_info {
5d08cd1d
CH
148 u8 type;
149 s8 max_power;
150};
151
bb8c093b 152struct iwl4965_channel_tgh_info {
5d08cd1d
CH
153 s64 last_radar_time;
154};
155
5d08cd1d
CH
156/*
157 * One for each channel, holds all channel setup data
158 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
159 * with one another!
160 */
bf85ea4f 161struct iwl_channel_info {
bb8c093b
CH
162 struct iwl4965_channel_tgd_info tgd;
163 struct iwl4965_channel_tgh_info tgh;
073d3f5f
TW
164 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
165 struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
166 * FAT channel */
5d08cd1d
CH
167
168 u8 channel; /* channel number */
169 u8 flags; /* flags copied from EEPROM */
170 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 171 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
172 s8 min_power; /* always 0 */
173 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
174
175 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
176 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 177 enum ieee80211_band band;
5d08cd1d 178
5d08cd1d
CH
179 /* FAT channel info */
180 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
181 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
182 s8 fat_min_power; /* always 0 */
183 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
184 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 185 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
5d08cd1d
CH
186};
187
bb8c093b 188struct iwl4965_clip_group {
5d08cd1d
CH
189 /* maximum power level to prevent clipping for each rate, derived by
190 * us from this band's saturation power in EEPROM */
191 const s8 clip_powers[IWL_MAX_RATES];
192};
193
5d08cd1d
CH
194
195#define IWL_TX_FIFO_AC0 0
196#define IWL_TX_FIFO_AC1 1
197#define IWL_TX_FIFO_AC2 2
198#define IWL_TX_FIFO_AC3 3
199#define IWL_TX_FIFO_HCCA_1 5
200#define IWL_TX_FIFO_HCCA_2 6
201#define IWL_TX_FIFO_NONE 7
202
203/* Minimum number of queues. MAX_NUM is defined in hw specific files */
204#define IWL_MIN_NUM_QUEUES 4
205
206/* Power management (not Tx power) structures */
207
6f4083aa
TW
208enum iwl_pwr_src {
209 IWL_PWR_SRC_VMAIN,
210 IWL_PWR_SRC_VAUX,
211};
212
5d08cd1d
CH
213#define IEEE80211_DATA_LEN 2304
214#define IEEE80211_4ADDR_LEN 30
215#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
216#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
217
fcab423d 218struct iwl_frame {
5d08cd1d
CH
219 union {
220 struct ieee80211_hdr frame;
4bf64efd 221 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
222 u8 raw[IEEE80211_FRAME_LEN];
223 u8 cmd[360];
224 } u;
225 struct list_head list;
226};
227
228#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
229#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
a0b484fe
JB
230#define SEQ_TO_INDEX(x) ((u8)(x & 0xff))
231#define INDEX_TO_SEQ(x) ((u8)(x & 0xff))
5d08cd1d
CH
232#define SEQ_HUGE_FRAME (0x4000)
233#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
234#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
235#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
236#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
237
238enum {
239 /* CMD_SIZE_NORMAL = 0, */
240 CMD_SIZE_HUGE = (1 << 0),
241 /* CMD_SYNC = 0, */
242 CMD_ASYNC = (1 << 1),
243 /* CMD_NO_SKB = 0, */
244 CMD_WANT_SKB = (1 << 2),
245};
246
857485c0 247struct iwl_cmd;
c79dd5b5 248struct iwl_priv;
5d08cd1d 249
857485c0
TW
250struct iwl_cmd_meta {
251 struct iwl_cmd_meta *source;
5d08cd1d
CH
252 union {
253 struct sk_buff *skb;
c79dd5b5 254 int (*callback)(struct iwl_priv *priv,
857485c0 255 struct iwl_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH
256 } __attribute__ ((packed)) u;
257
258 /* The CMD_SIZE_HUGE flag bit indicates that the command
259 * structure is stored at the end of the shared queue memory. */
260 u32 flags;
261
262} __attribute__ ((packed));
263
d2f18bfd 264#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 265
bc47279f 266/**
857485c0 267 * struct iwl_cmd
bc47279f
BC
268 *
269 * For allocation of the command and tx queues, this establishes the overall
270 * size of the largest command we send to uCode, except for a scan command
271 * (which is relatively huge; space is allocated separately).
272 */
857485c0
TW
273struct iwl_cmd {
274 struct iwl_cmd_meta meta; /* driver data */
275 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 276 union {
133636de 277 struct iwl_addsta_cmd addsta;
ec1a7460 278 struct iwl_led_cmd led;
5d08cd1d
CH
279 u32 flags;
280 u8 val8;
281 u16 val16;
282 u32 val32;
bb8c093b
CH
283 struct iwl4965_bt_cmd bt;
284 struct iwl4965_rxon_time_cmd rxon_time;
ca579617 285 struct iwl_powertable_cmd powertable;
1ff50bda 286 struct iwl_qosparam_cmd qosparam;
83d527d9 287 struct iwl_tx_cmd tx;
bb8c093b 288 struct iwl4965_rxon_assoc_cmd rxon_assoc;
7a999bf0 289 struct iwl_rem_sta_cmd rm_sta;
5d08cd1d 290 u8 *indirect;
bd68fb6f 291 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
292 } __attribute__ ((packed)) cmd;
293} __attribute__ ((packed));
294
857485c0 295struct iwl_host_cmd {
5d08cd1d
CH
296 u8 id;
297 u16 len;
857485c0 298 struct iwl_cmd_meta meta;
5d08cd1d
CH
299 const void *data;
300};
301
857485c0
TW
302#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
303 sizeof(struct iwl_cmd_meta))
5d08cd1d
CH
304
305/*
306 * RX related structures and functions
307 */
308#define RX_FREE_BUFFERS 64
309#define RX_LOW_WATERMARK 8
310
311#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
312#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
313#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
314
315/**
a55360e4 316 * struct iwl_rx_queue - Rx queue
5d08cd1d
CH
317 * @processed: Internal index to last handled Rx packet
318 * @read: Shared index to newest available Rx buffer
319 * @write: Shared index to oldest written Rx packet
320 * @free_count: Number of pre-allocated buffers in rx_free
321 * @rx_free: list of free SKBs for use
322 * @rx_used: List of Rx buffers with no SKB
323 * @need_update: flag to indicate we need to update read/write index
324 *
a55360e4 325 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 326 */
a55360e4 327struct iwl_rx_queue {
5d08cd1d
CH
328 __le32 *bd;
329 dma_addr_t dma_addr;
a55360e4
TW
330 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
331 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
332 u32 processed;
333 u32 read;
334 u32 write;
335 u32 free_count;
336 struct list_head rx_free;
337 struct list_head rx_used;
338 int need_update;
339 spinlock_t lock;
340};
341
342#define IWL_SUPPORTED_RATES_IE_LEN 8
343
344#define SCAN_INTERVAL 100
345
346#define MAX_A_CHANNELS 252
347#define MIN_A_CHANNELS 7
348
349#define MAX_B_CHANNELS 14
350#define MIN_B_CHANNELS 1
351
5d08cd1d
CH
352#define MAX_TID_COUNT 9
353
354#define IWL_INVALID_RATE 0xFF
355#define IWL_INVALID_VALUE -1
356
bc47279f 357/**
6def9761 358 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
359 * @txq_id: Tx queue used for Tx attempt
360 * @frame_count: # frames attempted by Tx command
361 * @wait_for_ba: Expect block-ack before next Tx reply
362 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
363 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
364 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
365 * @rate_n_flags: Rate at which Tx was attempted
366 *
367 * If REPLY_TX indicates that aggregation was attempted, driver must wait
368 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
369 * until block ack arrives.
370 */
6def9761 371struct iwl_ht_agg {
5d08cd1d
CH
372 u16 txq_id;
373 u16 frame_count;
374 u16 wait_for_ba;
375 u16 start_idx;
fe01b477 376 u64 bitmap;
5d08cd1d 377 u32 rate_n_flags;
fe01b477
RR
378#define IWL_AGG_OFF 0
379#define IWL_AGG_ON 1
380#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
381#define IWL_EMPTYING_HW_QUEUE_DELBA 3
382 u8 state;
5d08cd1d 383};
fe01b477 384
5d08cd1d 385
6def9761 386struct iwl_tid_data {
5d08cd1d 387 u16 seq_number;
fe01b477 388 u16 tfds_in_queue;
6def9761 389 struct iwl_ht_agg agg;
5d08cd1d
CH
390};
391
6def9761 392struct iwl_hw_key {
5d08cd1d
CH
393 enum ieee80211_key_alg alg;
394 int keylen;
0211ddda 395 u8 keyidx;
5d08cd1d
CH
396 u8 key[32];
397};
398
bb8c093b 399union iwl4965_ht_rate_supp {
5d08cd1d
CH
400 u16 rates;
401 struct {
402 u8 siso_rate;
403 u8 mimo_rate;
404 };
405};
406
5d08cd1d 407#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH
408#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
409#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
410
9e0cc6de
RR
411struct iwl_ht_info {
412 /* self configuration data */
5d08cd1d 413 u8 is_ht;
9e0cc6de 414 u8 supported_chan_width;
5d08cd1d 415 u16 tx_mimo_ps_mode;
9e0cc6de 416 u8 is_green_field;
bb54244b 417 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH
418 u8 max_amsdu_size;
419 u8 ampdu_factor;
420 u8 mpdu_density;
9e0cc6de
RR
421 u8 supp_mcs_set[16];
422 /* BSS related data */
423 u8 control_channel;
5d08cd1d 424 u8 extension_chan_offset;
5d08cd1d 425 u8 tx_chan_width;
9e0cc6de
RR
426 u8 ht_protection;
427 u8 non_GF_STA_present;
5d08cd1d 428};
5d08cd1d 429
1ff50bda 430union iwl_qos_capabity {
5d08cd1d
CH
431 struct {
432 u8 edca_count:4; /* bit 0-3 */
433 u8 q_ack:1; /* bit 4 */
434 u8 queue_request:1; /* bit 5 */
435 u8 txop_request:1; /* bit 6 */
436 u8 reserved:1; /* bit 7 */
437 } q_AP;
438 struct {
439 u8 acvo_APSD:1; /* bit 0 */
440 u8 acvi_APSD:1; /* bit 1 */
441 u8 ac_bk_APSD:1; /* bit 2 */
442 u8 ac_be_APSD:1; /* bit 3 */
443 u8 q_ack:1; /* bit 4 */
444 u8 max_len:2; /* bit 5-6 */
445 u8 more_data_ack:1; /* bit 7 */
446 } q_STA;
447 u8 val;
448};
449
450/* QoS structures */
1ff50bda 451struct iwl_qos_info {
5d08cd1d
CH
452 int qos_enable;
453 int qos_active;
1ff50bda
EG
454 union iwl_qos_capabity qos_cap;
455 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 456};
5d08cd1d
CH
457
458#define STA_PS_STATUS_WAKE 0
459#define STA_PS_STATUS_SLEEP 1
460
6def9761 461struct iwl_station_entry {
133636de 462 struct iwl_addsta_cmd sta;
6def9761 463 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
464 u8 used;
465 u8 ps_status;
6def9761 466 struct iwl_hw_key keyinfo;
5d08cd1d
CH
467};
468
469/* one for each uCode image (inst/data, boot/init/runtime) */
470struct fw_desc {
471 void *v_addr; /* access by driver */
472 dma_addr_t p_addr; /* access by card's busmaster DMA */
473 u32 len; /* bytes */
474};
475
476/* uCode file layout */
14b3d338 477struct iwl_ucode {
5d08cd1d
CH
478 __le32 ver; /* major/minor/subminor */
479 __le32 inst_size; /* bytes of runtime instructions */
480 __le32 data_size; /* bytes of runtime data */
481 __le32 init_size; /* bytes of initialization instructions */
482 __le32 init_data_size; /* bytes of initialization data */
483 __le32 boot_size; /* bytes of bootstrap instructions */
484 u8 data[0]; /* data in same order as "size" elements */
485};
486
bb8c093b 487struct iwl4965_ibss_seq {
5d08cd1d
CH
488 u8 mac[ETH_ALEN];
489 u16 seq_num;
490 u16 frag_num;
491 unsigned long packet_time;
492 struct list_head list;
493};
494
f0832f13
EG
495struct iwl_sensitivity_ranges {
496 u16 min_nrg_cck;
497 u16 max_nrg_cck;
498
499 u16 nrg_th_cck;
500 u16 nrg_th_ofdm;
501
502 u16 auto_corr_min_ofdm;
503 u16 auto_corr_min_ofdm_mrc;
504 u16 auto_corr_min_ofdm_x1;
505 u16 auto_corr_min_ofdm_mrc_x1;
506
507 u16 auto_corr_max_ofdm;
508 u16 auto_corr_max_ofdm_mrc;
509 u16 auto_corr_max_ofdm_x1;
510 u16 auto_corr_max_ofdm_mrc_x1;
511
512 u16 auto_corr_max_cck;
513 u16 auto_corr_max_cck_mrc;
514 u16 auto_corr_min_cck;
515 u16 auto_corr_min_cck_mrc;
516};
517
099b40b7
RR
518
519#define IWL_FAT_CHANNEL_52 BIT(IEEE80211_BAND_5GHZ)
520
bc47279f 521/**
5425e490 522 * struct iwl_hw_params
bc47279f 523 * @max_txq_num: Max # Tx queues supported
099b40b7
RR
524 * @tx/rx_chains_num: Number of TX/RX chains
525 * @valid_tx/rx_ant: usable antennas
bc47279f 526 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 527 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 528 * @rx_buf_size: Rx buffer size
bc47279f
BC
529 * @max_stations:
530 * @bcast_sta_id:
099b40b7
RR
531 * @fat_channel: is 40MHz width possible in band 2.4
532 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
533 * @sw_crypto: 0 for hw, 1 for sw
534 * @max_xxx_size: for ucode uses
535 * @ct_kill_threshold: temperature threshold
f0832f13 536 * @struct iwl_sensitivity_ranges: range of sensitivity values
7f3e4bb6 537 * @first_ampdu_q: first HW queue available for ampdu
bc47279f 538 */
5425e490 539struct iwl_hw_params {
5d08cd1d 540 u16 max_txq_num;
ec35cf2a
TW
541 u8 tx_chains_num;
542 u8 rx_chains_num;
543 u8 valid_tx_ant;
544 u8 valid_rx_ant;
5d08cd1d 545 u16 max_rxq_size;
ec35cf2a 546 u16 max_rxq_log;
9ee1ba47
RR
547 u32 rx_buf_size;
548 u32 max_pkt_size;
5d08cd1d
CH
549 u8 max_stations;
550 u8 bcast_sta_id;
099b40b7
RR
551 u8 fat_channel;
552 u8 sw_crypto;
553 u32 max_inst_size;
554 u32 max_data_size;
555 u32 max_bsm_size;
556 u32 ct_kill_threshold; /* value in hw-dependent units */
f0832f13 557 const struct iwl_sensitivity_ranges *sens;
7f3e4bb6 558 u8 first_ampdu_q;
5d08cd1d
CH
559};
560
a9841013
EG
561#define HT_SHORT_GI_20MHZ (1 << 0)
562#define HT_SHORT_GI_40MHZ (1 << 1)
5d08cd1d
CH
563
564
bb8c093b 565#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH
566 x->u.rx_frame.stats.payload + \
567 x->u.rx_frame.stats.phy_count))
bb8c093b 568#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH
569 IWL_RX_HDR(x)->payload + \
570 le16_to_cpu(IWL_RX_HDR(x)->len)))
571#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
572#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
573
574
575/******************************************************************************
576 *
577 * Functions implemented in iwl-base.c which are forward declared here
578 * for use by iwl-*.c
579 *
580 *****************************************************************************/
133636de
TW
581struct iwl_addsta_cmd;
582extern int iwl_send_add_sta(struct iwl_priv *priv,
583 struct iwl_addsta_cmd *sta, u8 flags);
4f40e4d9
TW
584u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr, int is_ap,
585 u8 flags, struct ieee80211_ht_info *ht_info);
c79dd5b5 586extern unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
5d08cd1d
CH
587 struct ieee80211_hdr *hdr,
588 const u8 *dest, int left);
5da4b55f 589extern void iwl4965_update_chain_flags(struct iwl_priv *priv);
079a2533 590int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
ca579617 591extern int iwl4965_set_power(struct iwl_priv *priv, void *cmd);
079a2533 592
57bd1bea 593extern const u8 iwl_bcast_addr[ETH_ALEN];
5d08cd1d
CH
594
595/******************************************************************************
596 *
597 * Functions implemented in iwl-[34]*.c which are forward declared here
598 * for use by iwl-base.c
599 *
600 * NOTE: The implementation of these functions are hardware specific
601 * which is why they are in the hardware specific files (vs. iwl-base.c)
602 *
603 * Naming convention --
bb8c093b
CH
604 * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_)
605 * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
5d08cd1d 606 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
607 * iwl4965_bg_ <-- Called from work queue context
608 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
609 *
610 ****************************************************************************/
b3bbacb7 611extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 612extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
c79dd5b5 613extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
fcab423d 614 struct iwl_frame *frame, u8 rate);
c79dd5b5 615extern void iwl4965_disable_events(struct iwl_priv *priv);
5d08cd1d 616
c79dd5b5 617extern int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel);
443cfd45 618extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
619static inline int iwl_queue_used(const struct iwl_queue *q, int i)
620{
621 return q->write_ptr > q->read_ptr ?
622 (i >= q->read_ptr && i < q->write_ptr) :
623 !(i < q->read_ptr && i >= q->write_ptr);
624}
625
626
627static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
628{
629 /* This is for scan command, the big buffer at end of command array */
630 if (is_huge)
631 return q->n_window; /* must be power of 2 */
632
633 /* Otherwise, use normal size buffers */
634 return index & (q->n_window - 1);
635}
636
637
c79dd5b5 638struct iwl_priv;
b481de9c 639
78330fdd 640
b481de9c
ZY
641/* Structures, enum, and defines specific to the 4965 */
642
16466903 643#define IWL_KW_SIZE 0x1000 /*4k */
b481de9c 644
16466903 645struct iwl_kw {
b481de9c
ZY
646 dma_addr_t dma_addr;
647 void *v_addr;
648 size_t size;
649};
650
b481de9c
ZY
651#define IWL_CHANNEL_WIDTH_20MHZ 0
652#define IWL_CHANNEL_WIDTH_40MHZ 1
653
654#define IWL_MIMO_PS_STATIC 0
655#define IWL_MIMO_PS_NONE 3
656#define IWL_MIMO_PS_DYNAMIC 1
657#define IWL_MIMO_PS_INVALID 2
658
659#define IWL_OPERATION_MODE_AUTO 0
660#define IWL_OPERATION_MODE_HT_ONLY 1
661#define IWL_OPERATION_MODE_MIXED 2
662#define IWL_OPERATION_MODE_20MHZ 3
663
3195cdb7
TW
664#define IWL_TX_CRC_SIZE 4
665#define IWL_TX_DELIMITER_SIZE 4
b481de9c 666
b481de9c 667#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 668
b481de9c
ZY
669/* Sensitivity and chain noise calibration */
670#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
671#define INITIALIZATION_VALUE 0xFFFF
672#define CAL_NUM_OF_BEACONS 20
673#define MAXIMUM_ALLOWED_PATHLOSS 15
674
b481de9c
ZY
675#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
676
677#define MAX_FA_OFDM 50
678#define MIN_FA_OFDM 5
679#define MAX_FA_CCK 50
680#define MIN_FA_CCK 5
681
b481de9c
ZY
682#define AUTO_CORR_STEP_OFDM 1
683
b481de9c
ZY
684#define AUTO_CORR_STEP_CCK 3
685#define AUTO_CORR_MAX_TH_CCK 160
686
b481de9c
ZY
687#define NRG_DIFF 2
688#define NRG_STEP_CCK 2
689#define NRG_MARGIN 8
690#define MAX_NUMBER_CCK_NO_FA 100
691
692#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
693
694#define CHAIN_A 0
695#define CHAIN_B 1
696#define CHAIN_C 2
697#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
698#define ALL_BAND_FILTER 0xFF00
699#define IN_BAND_FILTER 0xFF
700#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
701
3195cdb7
TW
702#define NRG_NUM_PREV_STAT_L 20
703#define NUM_RX_CHAINS 3
704
bb8c093b 705enum iwl4965_false_alarm_state {
b481de9c
ZY
706 IWL_FA_TOO_MANY = 0,
707 IWL_FA_TOO_FEW = 1,
708 IWL_FA_GOOD_RANGE = 2,
709};
710
bb8c093b 711enum iwl4965_chain_noise_state {
b481de9c
ZY
712 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
713 IWL_CHAIN_NOISE_ACCUMULATE = 1,
714 IWL_CHAIN_NOISE_CALIBRATED = 2,
715};
716
bb8c093b 717enum iwl4965_calib_enabled_state {
b481de9c
ZY
718 IWL_CALIB_DISABLED = 0, /* must be 0 */
719 IWL_CALIB_ENABLED = 1,
720};
721
722struct statistics_general_data {
723 u32 beacon_silence_rssi_a;
724 u32 beacon_silence_rssi_b;
725 u32 beacon_silence_rssi_c;
726 u32 beacon_energy_a;
727 u32 beacon_energy_b;
728 u32 beacon_energy_c;
729};
730
7c616cba
TW
731struct iwl_calib_results {
732 void *tx_iq_res;
733 void *tx_iq_perd_res;
734 void *lo_res;
735 u32 tx_iq_res_len;
736 u32 tx_iq_perd_res_len;
737 u32 lo_res_len;
738};
739
dbb983b7
RR
740enum ucode_type {
741 UCODE_NONE = 0,
742 UCODE_INIT,
743 UCODE_RT
744};
745
b481de9c 746/* Sensitivity calib data */
f0832f13 747struct iwl_sensitivity_data {
b481de9c
ZY
748 u32 auto_corr_ofdm;
749 u32 auto_corr_ofdm_mrc;
750 u32 auto_corr_ofdm_x1;
751 u32 auto_corr_ofdm_mrc_x1;
752 u32 auto_corr_cck;
753 u32 auto_corr_cck_mrc;
754
755 u32 last_bad_plcp_cnt_ofdm;
756 u32 last_fa_cnt_ofdm;
757 u32 last_bad_plcp_cnt_cck;
758 u32 last_fa_cnt_cck;
759
760 u32 nrg_curr_state;
761 u32 nrg_prev_state;
762 u32 nrg_value[10];
763 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
764 u32 nrg_silence_ref;
765 u32 nrg_energy_idx;
766 u32 nrg_silence_idx;
767 u32 nrg_th_cck;
768 s32 nrg_auto_corr_silence_diff;
769 u32 num_in_cck_no_fa;
770 u32 nrg_th_ofdm;
b481de9c
ZY
771};
772
773/* Chain noise (differential Rx gain) calib data */
f0832f13 774struct iwl_chain_noise_data {
b481de9c
ZY
775 u8 state;
776 u16 beacon_count;
777 u32 chain_noise_a;
778 u32 chain_noise_b;
779 u32 chain_noise_c;
780 u32 chain_signal_a;
781 u32 chain_signal_b;
782 u32 chain_signal_c;
783 u8 disconn_array[NUM_RX_CHAINS];
784 u8 delta_gain_code[NUM_RX_CHAINS];
785 u8 radio_write;
786};
787
abceddb4
BC
788#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
789#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 790
5d08cd1d 791
5d08cd1d
CH
792enum {
793 MEASUREMENT_READY = (1 << 0),
794 MEASUREMENT_ACTIVE = (1 << 1),
795};
796
5d08cd1d 797
dfe7d458
RR
798#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
799
c79dd5b5 800struct iwl_priv {
5d08cd1d
CH
801
802 /* ieee device used by generic ieee processing code */
803 struct ieee80211_hw *hw;
804 struct ieee80211_channel *ieee_channels;
805 struct ieee80211_rate *ieee_rates;
82b9a121 806 struct iwl_cfg *cfg;
5d08cd1d
CH
807
808 /* temporary frame storage list */
809 struct list_head free_frames;
810 int frames_count;
811
8318d78a 812 enum ieee80211_band band;
5d08cd1d
CH
813 int alloc_rxb_skb;
814
c79dd5b5 815 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 816 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 817
8318d78a 818 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 819
4fc22b21 820#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
5d08cd1d 821 /* spectrum measurement report caching */
bb8c093b 822 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH
823 u8 measurement_status;
824#endif
825 /* ucode beacon time */
826 u32 ucode_beacon_time;
827
bb8c093b 828 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 829 * Access via channel # using indirect index array */
bf85ea4f 830 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
831 u8 channel_count; /* # of channels */
832
833 /* each calibration channel group in the EEPROM has a derived
834 * clip setting for each rate. */
bb8c093b 835 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH
836
837 /* thermal calibration */
838 s32 temperature; /* degrees Kelvin */
839 s32 last_temperature;
840
7c616cba
TW
841 /* init calibration results */
842 struct iwl_calib_results calib_results;
843
5d08cd1d
CH
844 /* Scan related variables */
845 unsigned long last_scan_jiffies;
7878a5a4 846 unsigned long next_scan_jiffies;
5d08cd1d
CH
847 unsigned long scan_start;
848 unsigned long scan_pass_start;
849 unsigned long scan_start_tsf;
850 int scan_bands;
851 int one_direct_scan;
852 u8 direct_ssid_len;
853 u8 direct_ssid[IW_ESSID_MAX_SIZE];
2a421b91 854 struct iwl_scan_cmd *scan;
f53696de 855 u32 scan_tx_ant[IEEE80211_NUM_BANDS];
5d08cd1d
CH
856
857 /* spinlock */
858 spinlock_t lock; /* protect general shared data */
859 spinlock_t hcmd_lock; /* protect hcmd */
860 struct mutex mutex;
861
862 /* basic pci-network driver stuff */
863 struct pci_dev *pci_dev;
864
865 /* pci hardware address support */
866 void __iomem *hw_base;
b661c819
TW
867 u32 hw_rev;
868 u32 hw_wa_rev;
869 u8 rev_id;
5d08cd1d
CH
870
871 /* uCode images, save to reload in case of failure */
872 struct fw_desc ucode_code; /* runtime inst */
873 struct fw_desc ucode_data; /* runtime data original */
874 struct fw_desc ucode_data_backup; /* runtime data save/restore */
875 struct fw_desc ucode_init; /* initialization inst */
876 struct fw_desc ucode_init_data; /* initialization data */
877 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
878 enum ucode_type ucode_type;
879 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
880
881
bb8c093b 882 struct iwl4965_rxon_time_cmd rxon_timing;
5d08cd1d
CH
883
884 /* We declare this const so it can only be
885 * changed via explicit cast within the
886 * routines that actually update the physical
887 * hardware */
c1adf9fb
GG
888 const struct iwl_rxon_cmd active_rxon;
889 struct iwl_rxon_cmd staging_rxon;
5d08cd1d
CH
890
891 int error_recovering;
c1adf9fb 892 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
893
894 /* 1st responses from initialize and runtime uCode images.
895 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
896 struct iwl_init_alive_resp card_alive_init;
897 struct iwl_alive_resp card_alive;
eadd3c4b 898#ifdef CONFIG_IWLWIFI_RFKILL
80fcc9e2 899 struct rfkill *rfkill;
ad97edd2 900#endif
5d08cd1d 901
36316126 902#ifdef CONFIG_IWLWIFI_LEDS
0eee6127 903 struct iwl_led led[IWL_LED_TRG_MAX];
ab53d8af
MA
904 unsigned long last_blink_time;
905 u8 last_blink_rate;
906 u8 allow_blinking;
907 u64 led_tpt;
5d08cd1d
CH
908#endif
909
910 u16 active_rate;
911 u16 active_rate_basic;
912
5d08cd1d
CH
913 u8 assoc_station_added;
914 u8 use_ant_b_for_management_frame; /* Tx antenna selection */
5d08cd1d 915 u8 start_calib;
f0832f13
EG
916 struct iwl_sensitivity_data sensitivity_data;
917 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 918 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 919
9e0cc6de 920 struct iwl_ht_info current_ht_config;
5d08cd1d
CH
921 u8 last_phy_res[100];
922
5d08cd1d
CH
923 /* Rate scaling data */
924 s8 data_retry_limit;
925 u8 retry_rate;
926
927 wait_queue_head_t wait_command_queue;
928
929 int activity_timer_active;
930
931 /* Rx and Tx DMA processing queues */
a55360e4 932 struct iwl_rx_queue rxq;
16466903 933 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 934 unsigned long txq_ctx_active_msk;
16466903 935 struct iwl_kw kw; /* keep warm address */
5d08cd1d
CH
936 u32 scd_base_addr; /* scheduler sram base address */
937
938 unsigned long status;
5d08cd1d
CH
939
940 int last_rx_rssi; /* From Rx packet statisitics */
941 int last_rx_noise; /* From beacon statistics */
942
19758bef
TW
943 /* counts mgmt, ctl, and data packets */
944 struct traffic_stats {
945 u32 cnt;
946 u64 bytes;
947 } tx_stats[3], rx_stats[3];
948
5da4b55f 949 struct iwl_power_mgr power_data;
5d08cd1d 950
8f91aecb 951 struct iwl_notif_statistics statistics;
5d08cd1d
CH
952 unsigned long last_statistics_time;
953
954 /* context information */
955 u8 essid[IW_ESSID_MAX_SIZE];
956 u8 essid_len;
957 u16 rates_mask;
958
959 u32 power_mode;
960 u32 antenna;
961 u8 bssid[ETH_ALEN];
962 u16 rts_threshold;
963 u8 mac_addr[ETH_ALEN];
964
965 /*station table variables */
966 spinlock_t sta_lock;
967 int num_stations;
6def9761 968 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
969 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
970 u8 default_wep_key;
971 u8 key_mapping_key;
80fb47a1 972 unsigned long ucode_key_table;
5d08cd1d
CH
973
974 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 975 u8 is_open;
5d08cd1d
CH
976
977 u8 mac80211_registered;
5d08cd1d 978
5d08cd1d
CH
979 /* Rx'd packet timing information */
980 u32 last_beacon_time;
981 u64 last_tsf;
982
5d08cd1d 983 /* eeprom */
073d3f5f
TW
984 u8 *eeprom;
985 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 986
69dc5d9d 987 enum ieee80211_if_types iw_mode;
5d08cd1d
CH
988
989 struct sk_buff *ibss_beacon;
990
991 /* Last Rx'd beacon timestamp */
3109ece1 992 u64 timestamp;
5d08cd1d 993 u16 beacon_int;
32bfd35d 994 struct ieee80211_vif *vif;
5d08cd1d 995
5425e490 996 struct iwl_hw_params hw_params;
059ff826
TW
997 /* driver/uCode shared Tx Byte Counts and Rx status */
998 void *shared_virt;
d67f5489 999 int rb_closed_offset;
059ff826
TW
1000 /* Physical Pointer to Tx Byte Counts and Rx status */
1001 dma_addr_t shared_phys;
1002
5d08cd1d
CH
1003 /* Current association information needed to configure the
1004 * hardware */
1005 u16 assoc_id;
1006 u16 assoc_capability;
1007 u8 ps_mode;
1008
1ff50bda 1009 struct iwl_qos_info qos_data;
5d08cd1d
CH
1010
1011 struct workqueue_struct *workqueue;
1012
1013 struct work_struct up;
1014 struct work_struct restart;
1015 struct work_struct calibrated_work;
1016 struct work_struct scan_completed;
1017 struct work_struct rx_replenish;
1018 struct work_struct rf_kill;
1019 struct work_struct abort_scan;
1020 struct work_struct update_link_led;
1021 struct work_struct auth_work;
1022 struct work_struct report_work;
1023 struct work_struct request_scan;
1024 struct work_struct beacon_update;
4419e39b 1025 struct work_struct set_monitor;
5d08cd1d
CH
1026
1027 struct tasklet_struct irq_tasklet;
1028
1029 struct delayed_work init_alive_start;
1030 struct delayed_work alive_start;
5d08cd1d 1031 struct delayed_work scan_check;
630fe9b6
TW
1032 /* TX Power */
1033 s8 tx_power_user_lmt;
1034 s8 tx_power_channel_lmt;
5d08cd1d
CH
1035
1036#ifdef CONFIG_PM
1037 u32 pm_state[16];
1038#endif
1039
0a6857e7 1040#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1041 /* debugging info */
bf403db8 1042 u32 debug_level;
5d08cd1d
CH
1043 u32 framecnt_to_us;
1044 atomic_t restrict_refcnt;
712b6cf5
TW
1045#ifdef CONFIG_IWLWIFI_DEBUGFS
1046 /* debugfs */
1047 struct iwl_debugfs *dbgfs;
1048#endif /* CONFIG_IWLWIFI_DEBUGFS */
1049#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1050
1051 struct work_struct txpower_work;
445c2dff
TW
1052 u32 disable_sens_cal;
1053 u32 disable_chain_noise_cal;
203566f3 1054 u32 disable_tx_power_cal;
16e727e8 1055 struct work_struct run_time_calib_work;
5d08cd1d 1056 struct timer_list statistics_periodic;
c79dd5b5 1057}; /*iwl_priv */
5d08cd1d 1058
36470749
RR
1059static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1060{
1061 set_bit(txq_id, &priv->txq_ctx_active_msk);
1062}
1063
1064static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1065{
1066 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1067}
1068
994d31f7 1069#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6
TW
1070const char *iwl_get_tx_fail_reason(u32 status);
1071#else
1072static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1073#endif
1074
1075
a332f8d6
TW
1076static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1077 int txq_id, int idx)
1078{
1079 if (priv->txq[txq_id].txb[idx].skb[0])
1080 return (struct ieee80211_hdr *)priv->txq[txq_id].
1081 txb[idx].skb[0]->data;
1082 return NULL;
1083}
a332f8d6
TW
1084
1085
3109ece1 1086static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1087{
1088 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1089}
1090
bf85ea4f 1091static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1092{
1093 if (ch_info == NULL)
1094 return 0;
1095 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1096}
1097
bf85ea4f 1098static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1099{
1100 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1101}
1102
bf85ea4f 1103static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1104{
8318d78a 1105 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1106}
1107
bf85ea4f 1108static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1109{
8318d78a 1110 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1111}
1112
bf85ea4f 1113static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1114{
1115 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1116}
1117
bf85ea4f 1118static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1119{
1120 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1121}
1122
bf403db8
EK
1123#ifdef CONFIG_IWLWIFI_DEBUG
1124static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1125 void *p, u32 len)
1126{
1127 if (!(priv->debug_level & level))
1128 return;
1129
1130 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
1131 p, len, 1);
1132}
1133#else
1134static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1135 void *p, u32 len)
1136{
1137}
1138#endif
1139
8622e705 1140extern const struct iwl_channel_info *iwl_get_channel_info(
c79dd5b5 1141 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
5d08cd1d 1142
c79dd5b5 1143/* Requires full declaration of iwl_priv before including */
5d08cd1d 1144
be1f3ab6 1145#endif /* __iwl_dev_h__ */