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Merge branch 'master' into next
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / iwl-5000.c
CommitLineData
5a6a256e
TW		 1/******************************************************************************
2 *
1f447808 3 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
5a6a256e
TW		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
3d2b162e 22 * Intel Linux Wireless <ilw@linux.intel.com>
5a6a256e
TW		 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
5a6a256e
TW		 29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
d43c36dc 33#include <linux/sched.h>
5a6a256e
TW		 34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <linux/wireless.h>
37#include <net/mac80211.h>
38#include <linux/etherdevice.h>
39#include <asm/unaligned.h>
40
41#include "iwl-eeprom.h"
3e0d4cb1 42#include "iwl-dev.h"
5a6a256e
TW		 43#include "iwl-core.h"
44#include "iwl-io.h"
e26e47d9 45#include "iwl-sta.h"
5a6a256e 46#include "iwl-helpers.h"
a1175124 47#include "iwl-agn.h"
e932a609 48#include "iwl-agn-led.h"
19e6cda0 49#include "iwl-agn-hw.h"
5a6a256e 50#include "iwl-5000-hw.h"
b8c76267 51#include "iwl-agn-debugfs.h"
5a6a256e 52
a0987a8d 53/* Highest firmware API version supported */
41504cce 54#define IWL5000_UCODE_API_MAX 5
39e6d225 55#define IWL5150_UCODE_API_MAX 2
5a6a256e 56
a0987a8d
RC		 57/* Lowest firmware API version supported */
58#define IWL5000_UCODE_API_MIN 1
59#define IWL5150_UCODE_API_MIN 1
60
61#define IWL5000_FW_PRE "iwlwifi-5000-"
62#define _IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode"
63#define IWL5000_MODULE_FIRMWARE(api) _IWL5000_MODULE_FIRMWARE(api)
64
65#define IWL5150_FW_PRE "iwlwifi-5150-"
66#define _IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode"
67#define IWL5150_MODULE_FIRMWARE(api) _IWL5150_MODULE_FIRMWARE(api)
4e062f99 68
9371d4ed 69/* NIC configuration for 5000 series */
510cb791 70static void iwl5000_nic_config(struct iwl_priv *priv)
e86fe9f6
TW		 71{
72 unsigned long flags;
73 u16 radio_cfg;
e86fe9f6
TW		 74
75 spin_lock_irqsave(&priv->lock, flags);
76
e86fe9f6
TW		 77 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
78
79 /* write radio config values to register */
9371d4ed 80 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_RF_CONFIG_TYPE_MAX)
e86fe9f6
TW		 81 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
82 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
83 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
84 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
85
86 /* set CSR_HW_CONFIG_REG for uCode use */
87 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
88 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
89 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
90
4c43e0d0
TW		 91 /* W/A : NIC is stuck in a reset state after Early PCIe power off
92 * (PCIe power is lost before PERST# is asserted),
93 * causing ME FW to lose ownership and not being able to obtain it back.
94 */
2d3db679 95 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
4c43e0d0
TW		 96 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
97 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
98
02c06e4a 99
e86fe9f6
TW		 100 spin_unlock_irqrestore(&priv->lock, flags);
101}
102
33fd5033
EG		 103static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
104 .min_nrg_cck = 95,
fe6efb4b 105 .max_nrg_cck = 0, /* not used, set to 0 */
33fd5033
EG		 106 .auto_corr_min_ofdm = 90,
107 .auto_corr_min_ofdm_mrc = 170,
108 .auto_corr_min_ofdm_x1 = 120,
109 .auto_corr_min_ofdm_mrc_x1 = 240,
110
111 .auto_corr_max_ofdm = 120,
112 .auto_corr_max_ofdm_mrc = 210,
9bead763
WYG		 113 .auto_corr_max_ofdm_x1 = 120,
114 .auto_corr_max_ofdm_mrc_x1 = 240,
33fd5033
EG		 115
116 .auto_corr_min_cck = 125,
117 .auto_corr_max_cck = 200,
118 .auto_corr_min_cck_mrc = 170,
119 .auto_corr_max_cck_mrc = 400,
120 .nrg_th_cck = 95,
121 .nrg_th_ofdm = 95,
55036d66
WYG		 122
123 .barker_corr_th_min = 190,
124 .barker_corr_th_min_mrc = 390,
125 .nrg_th_cca = 62,
33fd5033
EG		 126};
127
9d67187d
WYG		 128static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
129 .min_nrg_cck = 95,
130 .max_nrg_cck = 0, /* not used, set to 0 */
131 .auto_corr_min_ofdm = 90,
132 .auto_corr_min_ofdm_mrc = 170,
133 .auto_corr_min_ofdm_x1 = 105,
134 .auto_corr_min_ofdm_mrc_x1 = 220,
135
136 .auto_corr_max_ofdm = 120,
137 .auto_corr_max_ofdm_mrc = 210,
138 /* max = min for performance bug in 5150 DSP */
139 .auto_corr_max_ofdm_x1 = 105,
140 .auto_corr_max_ofdm_mrc_x1 = 220,
141
142 .auto_corr_min_cck = 125,
143 .auto_corr_max_cck = 200,
144 .auto_corr_min_cck_mrc = 170,
145 .auto_corr_max_cck_mrc = 400,
146 .nrg_th_cck = 95,
147 .nrg_th_ofdm = 95,
55036d66
WYG		 148
149 .barker_corr_th_min = 190,
150 .barker_corr_th_min_mrc = 390,
151 .nrg_th_cca = 62,
9d67187d
WYG		 152};
153
62161aef 154static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
339afc89 155{
62161aef 156 const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
672639de 157 s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -
62161aef
WYG		 158 iwl_temp_calib_to_offset(priv);
159
160 priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef;
161}
162
163static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
164{
165 /* want Celsius */
672639de 166 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
339afc89
TW		 167}
168
510cb791 169static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
fdd3e8a4 170{
88804e2b 171 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
19e6cda0 172 priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
7cb1b088 173 priv->cfg->base_params->num_of_queues =
88804e2b 174 priv->cfg->mod_params->num_of_queues;
25ae3986 175
7cb1b088 176 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
f3f911d1 177 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
4ddbb7d0 178 priv->hw_params.scd_bc_tbls_size =
7cb1b088 179 priv->cfg->base_params->num_of_queues *
19e6cda0 180 sizeof(struct iwlagn_scd_bc_tbl);
a8e74e27 181 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
bf3c7fdd 182 priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
a194e324 183 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
c0bac76a 184
19e6cda0
WYG		 185 priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
186 priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
c0bac76a 187
da154e30 188 priv->hw_params.max_bsm_size = 0;
7aafef1c 189 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
fdd3e8a4 190 BIT(IEEE80211_BAND_5GHZ);
141c43a3
WT		 191 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
192
c0bac76a
JS		 193 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
194 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
195 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
196 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
c031bf80 197
0453674c 198 iwl5000_set_ct_threshold(priv);
c031bf80 199
9d67187d 200 /* Set initial sensitivity parameters */
be5d56ed 201 /* Set initial calibration set */
e517736a
WYG		 202 priv->hw_params.sens = &iwl5000_sensitivity;
203 priv->hw_params.calib_init_cfg =
204 BIT(IWL_CALIB_XTAL) |
205 BIT(IWL_CALIB_LO) |
206 BIT(IWL_CALIB_TX_IQ) |
207 BIT(IWL_CALIB_TX_IQ_PERD) |
208 BIT(IWL_CALIB_BASE_BAND);
209
a0ee74cf
WYG		 210 priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
211
e517736a
WYG		 212 return 0;
213}
214
215static int iwl5150_hw_set_hw_params(struct iwl_priv *priv)
216{
217 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
218 priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
7cb1b088 219 priv->cfg->base_params->num_of_queues =
e517736a
WYG		 220 priv->cfg->mod_params->num_of_queues;
221
7cb1b088 222 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
e517736a
WYG		 223 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
224 priv->hw_params.scd_bc_tbls_size =
7cb1b088 225 priv->cfg->base_params->num_of_queues *
e517736a
WYG		 226 sizeof(struct iwlagn_scd_bc_tbl);
227 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
bf3c7fdd 228 priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
a194e324 229 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
e517736a
WYG		 230
231 priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
232 priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
233
234 priv->hw_params.max_bsm_size = 0;
235 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
236 BIT(IEEE80211_BAND_5GHZ);
237 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
238
239 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
240 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
241 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
242 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
243
0453674c 244 iwl5150_set_ct_threshold(priv);
e517736a
WYG		 245
246 /* Set initial sensitivity parameters */
247 /* Set initial calibration set */
248 priv->hw_params.sens = &iwl5150_sensitivity;
249 priv->hw_params.calib_init_cfg =
e517736a
WYG		 250 BIT(IWL_CALIB_LO) |
251 BIT(IWL_CALIB_TX_IQ) |
252 BIT(IWL_CALIB_BASE_BAND);
178d1596
WYG		 253 if (priv->cfg->need_dc_calib)
254 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_DC);
be5d56ed 255
a0ee74cf
WYG		 256 priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
257
fdd3e8a4
TW		 258 return 0;
259}
d4100dd9 260
62161aef
WYG		 261static void iwl5150_temperature(struct iwl_priv *priv)
262{
263 u32 vt = 0;
264 s32 offset = iwl_temp_calib_to_offset(priv);
265
325322ee 266 vt = le32_to_cpu(priv->_agn.statistics.general.common.temperature);
62161aef
WYG		 267 vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;
268 /* now vt hold the temperature in Kelvin */
269 priv->temperature = KELVIN_TO_CELSIUS(vt);
15993e08 270 iwl_tt_handler(priv);
62161aef
WYG		 271}
272
79d07325
WYG		 273static int iwl5000_hw_channel_switch(struct iwl_priv *priv,
274 struct ieee80211_channel_switch *ch_switch)
4a56e965 275{
246ed355
JB		 276 /*
277 * MULTI-FIXME
278 * See iwl_mac_channel_switch.
279 */
280 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
4a56e965
WYG		 281 struct iwl5000_channel_switch_cmd cmd;
282 const struct iwl_channel_info *ch_info;
79d07325
WYG		 283 u32 switch_time_in_usec, ucode_switch_time;
284 u16 ch;
285 u32 tsf_low;
286 u8 switch_count;
246ed355 287 u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
8bd413e6 288 struct ieee80211_vif *vif = ctx->vif;
4a56e965
WYG		 289 struct iwl_host_cmd hcmd = {
290 .id = REPLY_CHANNEL_SWITCH,
291 .len = sizeof(cmd),
3839f7ce 292 .flags = CMD_SYNC,
4a56e965
WYG		 293 .data = &cmd,
294 };
295
4a56e965 296 cmd.band = priv->band == IEEE80211_BAND_2GHZ;
81e95430 297 ch = ch_switch->channel->hw_value;
79d07325 298 IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
246ed355 299 ctx->active.channel, ch);
79d07325 300 cmd.channel = cpu_to_le16(ch);
246ed355
JB		 301 cmd.rxon_flags = ctx->staging.flags;
302 cmd.rxon_filter_flags = ctx->staging.filter_flags;
79d07325
WYG		 303 switch_count = ch_switch->count;
304 tsf_low = ch_switch->timestamp & 0x0ffffffff;
305 /*
306 * calculate the ucode channel switch time
307 * adding TSF as one of the factor for when to switch
308 */
309 if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
310 if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
311 beacon_interval)) {
312 switch_count -= (priv->ucode_beacon_time -
313 tsf_low) / beacon_interval;
314 } else
315 switch_count = 0;
316 }
317 if (switch_count <= 1)
318 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
319 else {
320 switch_time_in_usec =
321 vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
322 ucode_switch_time = iwl_usecs_to_beacons(priv,
323 switch_time_in_usec,
324 beacon_interval);
325 cmd.switch_time = iwl_add_beacon_time(priv,
326 priv->ucode_beacon_time,
327 ucode_switch_time,
328 beacon_interval);
329 }
330 IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
331 cmd.switch_time);
332 ch_info = iwl_get_channel_info(priv, priv->band, ch);
4a56e965
WYG		 333 if (ch_info)
334 cmd.expect_beacon = is_channel_radar(ch_info);
335 else {
336 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
246ed355 337 ctx->active.channel, ch);
4a56e965
WYG		 338 return -EFAULT;
339 }
79d07325 340 priv->switch_rxon.channel = cmd.channel;
0924e519 341 priv->switch_rxon.switch_in_progress = true;
4a56e965
WYG		 342
343 return iwl_send_cmd_sync(priv, &hcmd);
344}
345
510cb791 346static struct iwl_lib_ops iwl5000_lib = {
fdd3e8a4 347 .set_hw_params = iwl5000_hw_set_hw_params,
b305a080
WYG		 348 .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
349 .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
350 .txq_set_sched = iwlagn_txq_set_sched,
351 .txq_agg_enable = iwlagn_txq_agg_enable,
352 .txq_agg_disable = iwlagn_txq_agg_disable,
7aaa1d79
SO		 353 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
354 .txq_free_tfd = iwl_hw_txq_free_tfd,
a8e74e27 355 .txq_init = iwl_hw_tx_queue_init,
e04ed0a5
WYG		 356 .rx_handler_setup = iwlagn_rx_handler_setup,
357 .setup_deferred_work = iwlagn_setup_deferred_work,
358 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
b7a79404
RC		 359 .dump_nic_event_log = iwl_dump_nic_event_log,
360 .dump_nic_error_log = iwl_dump_nic_error_log,
696bdee3 361 .dump_csr = iwl_dump_csr,
1b3eb823 362 .dump_fh = iwl_dump_fh,
81b8176e 363 .load_ucode = iwlagn_load_ucode,
741a6266
WYG		 364 .init_alive_start = iwlagn_init_alive_start,
365 .alive_notify = iwlagn_alive_notify,
e04ed0a5 366 .send_tx_power = iwlagn_send_tx_power,
5b9f8cd3 367 .update_chain_flags = iwl_update_chain_flags,
4a56e965 368 .set_channel_switch = iwl5000_hw_channel_switch,
30d59260 369 .apm_ops = {
fadb3582 370 .init = iwl_apm_init,
5a835353 371 .config = iwl5000_nic_config,
30d59260 372 },
da8dec29 373 .eeprom_ops = {
25ae3986 374 .regulatory_bands = {
e04ed0a5
WYG		 375 EEPROM_REG_BAND_1_CHANNELS,
376 EEPROM_REG_BAND_2_CHANNELS,
377 EEPROM_REG_BAND_3_CHANNELS,
378 EEPROM_REG_BAND_4_CHANNELS,
379 EEPROM_REG_BAND_5_CHANNELS,
380 EEPROM_REG_BAND_24_HT40_CHANNELS,
381 EEPROM_REG_BAND_52_HT40_CHANNELS
25ae3986 382 },
da8dec29
TW		 383 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
384 .release_semaphore = iwlcore_eeprom_release_semaphore,
e04ed0a5
WYG		 385 .calib_version = iwlagn_eeprom_calib_version,
386 .query_addr = iwlagn_eeprom_query_addr,
da8dec29 387 },
e39fdee1
WYG		 388 .isr_ops = {
389 .isr = iwl_isr_ict,
390 .free = iwl_free_isr_ict,
391 .alloc = iwl_alloc_isr_ict,
392 .reset = iwl_reset_ict,
393 .disable = iwl_disable_ict,
394 },
62161aef 395 .temp_ops = {
e04ed0a5 396 .temperature = iwlagn_temperature,
62161aef 397 },
b8c76267
AK		 398 .debugfs_ops = {
399 .rx_stats_read = iwl_ucode_rx_stats_read,
400 .tx_stats_read = iwl_ucode_tx_stats_read,
401 .general_stats_read = iwl_ucode_general_stats_read,
ffb7d896 402 .bt_stats_read = iwl_ucode_bt_stats_read,
54a9aa65 403 .reply_tx_error = iwl_reply_tx_error_read,
b8c76267 404 },
716c74b0 405 .txfifo_flush = iwlagn_txfifo_flush,
65550636 406 .dev_txfifo_flush = iwlagn_dev_txfifo_flush,
0975cc8f
WYG		 407 .tt_ops = {
408 .lower_power_detection = iwl_tt_is_low_power_state,
409 .tt_power_mode = iwl_tt_current_power_mode,
410 .ct_kill_check = iwl_check_for_ct_kill,
411 }
62161aef
WYG		 412};
413
414static struct iwl_lib_ops iwl5150_lib = {
e517736a 415 .set_hw_params = iwl5150_hw_set_hw_params,
b305a080
WYG		 416 .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
417 .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
418 .txq_set_sched = iwlagn_txq_set_sched,
419 .txq_agg_enable = iwlagn_txq_agg_enable,
420 .txq_agg_disable = iwlagn_txq_agg_disable,
62161aef
WYG		 421 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
422 .txq_free_tfd = iwl_hw_txq_free_tfd,
423 .txq_init = iwl_hw_tx_queue_init,
e04ed0a5
WYG		 424 .rx_handler_setup = iwlagn_rx_handler_setup,
425 .setup_deferred_work = iwlagn_setup_deferred_work,
426 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
b7a79404
RC		 427 .dump_nic_event_log = iwl_dump_nic_event_log,
428 .dump_nic_error_log = iwl_dump_nic_error_log,
696bdee3 429 .dump_csr = iwl_dump_csr,
81b8176e 430 .load_ucode = iwlagn_load_ucode,
741a6266
WYG		 431 .init_alive_start = iwlagn_init_alive_start,
432 .alive_notify = iwlagn_alive_notify,
e04ed0a5 433 .send_tx_power = iwlagn_send_tx_power,
62161aef 434 .update_chain_flags = iwl_update_chain_flags,
4a56e965 435 .set_channel_switch = iwl5000_hw_channel_switch,
62161aef 436 .apm_ops = {
fadb3582 437 .init = iwl_apm_init,
62161aef 438 .config = iwl5000_nic_config,
62161aef
WYG		 439 },
440 .eeprom_ops = {
441 .regulatory_bands = {
e04ed0a5
WYG		 442 EEPROM_REG_BAND_1_CHANNELS,
443 EEPROM_REG_BAND_2_CHANNELS,
444 EEPROM_REG_BAND_3_CHANNELS,
445 EEPROM_REG_BAND_4_CHANNELS,
446 EEPROM_REG_BAND_5_CHANNELS,
447 EEPROM_REG_BAND_24_HT40_CHANNELS,
448 EEPROM_REG_BAND_52_HT40_CHANNELS
62161aef 449 },
62161aef
WYG		 450 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
451 .release_semaphore = iwlcore_eeprom_release_semaphore,
e04ed0a5
WYG		 452 .calib_version = iwlagn_eeprom_calib_version,
453 .query_addr = iwlagn_eeprom_query_addr,
62161aef 454 },
e39fdee1
WYG		 455 .isr_ops = {
456 .isr = iwl_isr_ict,
457 .free = iwl_free_isr_ict,
458 .alloc = iwl_alloc_isr_ict,
459 .reset = iwl_reset_ict,
460 .disable = iwl_disable_ict,
461 },
62161aef
WYG		 462 .temp_ops = {
463 .temperature = iwl5150_temperature,
62161aef 464 },
b8c76267
AK		 465 .debugfs_ops = {
466 .rx_stats_read = iwl_ucode_rx_stats_read,
467 .tx_stats_read = iwl_ucode_tx_stats_read,
468 .general_stats_read = iwl_ucode_general_stats_read,
a437fbb9 469 .bt_stats_read = iwl_ucode_bt_stats_read,
54a9aa65 470 .reply_tx_error = iwl_reply_tx_error_read,
b8c76267 471 },
716c74b0 472 .txfifo_flush = iwlagn_txfifo_flush,
65550636 473 .dev_txfifo_flush = iwlagn_dev_txfifo_flush,
0975cc8f
WYG		 474 .tt_ops = {
475 .lower_power_detection = iwl_tt_is_low_power_state,
476 .tt_power_mode = iwl_tt_current_power_mode,
477 .ct_kill_check = iwl_check_for_ct_kill,
478 }
da8dec29
TW		 479};
480
45d5d805 481static const struct iwl_ops iwl5000_ops = {
da8dec29 482 .lib = &iwl5000_lib,
7dc77dba
WYG		 483 .hcmd = &iwlagn_hcmd,
484 .utils = &iwlagn_hcmd_utils,
e932a609 485 .led = &iwlagn_led_ops,
dc21b545 486 .ieee80211_ops = &iwlagn_hw_ops,
da8dec29
TW		 487};
488
45d5d805 489static const struct iwl_ops iwl5150_ops = {
62161aef 490 .lib = &iwl5150_lib,
7dc77dba
WYG		 491 .hcmd = &iwlagn_hcmd,
492 .utils = &iwlagn_hcmd_utils,
e932a609 493 .led = &iwlagn_led_ops,
dc21b545 494 .ieee80211_ops = &iwlagn_hw_ops,
62161aef
WYG		 495};
496
7cb1b088 497static struct iwl_base_params iwl5000_base_params = {
19e6cda0 498 .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
19e6cda0
WYG		 499 .num_of_queues = IWLAGN_NUM_QUEUES,
500 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
fadb3582
BC		 501 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
502 .set_l0s = true,
503 .use_bsm = false,
f2d0d0e2 504 .led_compensation = 51,
d8c07e7a 505 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
3e4fb5fa 506 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
d4fe5ac9 507 .chain_noise_scale = 1000,
22de94de 508 .wd_timeout = IWL_LONG_WD_TIMEOUT,
678b385d 509 .max_event_log_size = 512,
6e5c800e 510 .ucode_tracing = true,
65d1f896
WYG		 511 .sensitivity_calib_by_driver = true,
512 .chain_noise_calib_by_driver = true,
5a6a256e 513};
7cb1b088
WYG		 514static struct iwl_ht_params iwl5000_ht_params = {
515 .ht_greenfield_support = true,
516 .use_rts_for_aggregation = true, /* use rts/cts protection */
517};
518
65af8dea
WYG		 519#define IWL_DEVICE_5000 \
520 .fw_name_pre = IWL5000_FW_PRE, \
521 .ucode_api_max = IWL5000_UCODE_API_MAX, \
522 .ucode_api_min = IWL5000_UCODE_API_MIN, \
523 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, \
524 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, \
525 .ops = &iwl5000_ops, \
526 .mod_params = &iwlagn_mod_params, \
527 .base_params = &iwl5000_base_params, \
528 .led_mode = IWL_LED_BLINK
529
7cb1b088
WYG		 530struct iwl_cfg iwl5300_agn_cfg = {
531 .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
65af8dea 532 IWL_DEVICE_5000,
2845fd85
JB		 533 /* at least EEPROM 0x11A has wrong info */
534 .valid_tx_ant = ANT_ABC, /* .cfg overwrite */
535 .valid_rx_ant = ANT_ABC, /* .cfg overwrite */
7cb1b088
WYG		 536 .ht_params = &iwl5000_ht_params,
537};
5a6a256e 538
ac592574 539struct iwl_cfg iwl5100_bgn_cfg = {
c11362c0 540 .name = "Intel(R) WiFi Link 5100 BGN",
65af8dea 541 IWL_DEVICE_5000,
dbbf1755
WYG		 542 .valid_tx_ant = ANT_B, /* .cfg overwrite */
543 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
7cb1b088 544 .ht_params = &iwl5000_ht_params,
47408639
EK		 545};
546
547struct iwl_cfg iwl5100_abg_cfg = {
c11362c0 548 .name = "Intel(R) WiFi Link 5100 ABG",
65af8dea 549 IWL_DEVICE_5000,
dbbf1755
WYG		 550 .valid_tx_ant = ANT_B, /* .cfg overwrite */
551 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
47408639
EK		 552};
553
5a6a256e 554struct iwl_cfg iwl5100_agn_cfg = {
c11362c0 555 .name = "Intel(R) WiFi Link 5100 AGN",
65af8dea 556 IWL_DEVICE_5000,
dbbf1755
WYG		 557 .valid_tx_ant = ANT_B, /* .cfg overwrite */
558 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
7cb1b088 559 .ht_params = &iwl5000_ht_params,
5a6a256e
TW		 560};
561
562struct iwl_cfg iwl5350_agn_cfg = {
c11362c0 563 .name = "Intel(R) WiMAX/WiFi Link 5350 AGN",
a0987a8d
RC		 564 .fw_name_pre = IWL5000_FW_PRE,
565 .ucode_api_max = IWL5000_UCODE_API_MAX,
566 .ucode_api_min = IWL5000_UCODE_API_MIN,
0ef2ca67
TW		 567 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
568 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
7cb1b088 569 .ops = &iwl5000_ops,
348ee7cd 570 .mod_params = &iwlagn_mod_params,
7cb1b088
WYG		 571 .base_params = &iwl5000_base_params,
572 .ht_params = &iwl5000_ht_params,
564b344c 573 .led_mode = IWL_LED_BLINK,
50619ac9 574 .internal_wimax_coex = true,
5a6a256e
TW		 575};
576
65af8dea
WYG		 577#define IWL_DEVICE_5150 \
578 .fw_name_pre = IWL5150_FW_PRE, \
579 .ucode_api_max = IWL5150_UCODE_API_MAX, \
580 .ucode_api_min = IWL5150_UCODE_API_MIN, \
581 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, \
582 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, \
583 .ops = &iwl5150_ops, \
584 .mod_params = &iwlagn_mod_params, \
585 .base_params = &iwl5000_base_params, \
586 .need_dc_calib = true, \
587 .led_mode = IWL_LED_BLINK, \
588 .internal_wimax_coex = true
589
7100e924 590struct iwl_cfg iwl5150_agn_cfg = {
c11362c0 591 .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
65af8dea 592 IWL_DEVICE_5150,
7cb1b088 593 .ht_params = &iwl5000_ht_params,
65af8dea 594
7100e924
TW		 595};
596
ac592574 597struct iwl_cfg iwl5150_abg_cfg = {
c11362c0 598 .name = "Intel(R) WiMAX/WiFi Link 5150 ABG",
65af8dea 599 IWL_DEVICE_5150,
7100e924
TW		 600};
601
a0987a8d
RC		 602MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
603MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
kernel source for telekom puls (alcatel/mediatek)