Merge branch 'bind_unbind' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / wireless / intel / iwlwifi / mvm / ops.c
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
4fb06283 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
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27 *
28 * Contact Information:
cb2f8277 29 * Intel Linux Wireless <linuxwifi@intel.com>
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30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
4fb06283 35 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
0db056d3 36 * Copyright(c) 2016 Intel Deutschland GmbH
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37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66#include <linux/module.h>
1bd3cbc1 67#include <linux/vmalloc.h>
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68#include <net/mac80211.h>
69
70#include "iwl-notif-wait.h"
71#include "iwl-trans.h"
72#include "iwl-op-mode.h"
73#include "iwl-fw.h"
74#include "iwl-debug.h"
75#include "iwl-drv.h"
76#include "iwl-modparams.h"
77#include "mvm.h"
78#include "iwl-phy-db.h"
79#include "iwl-eeprom-parse.h"
80#include "iwl-csr.h"
81#include "iwl-io.h"
82#include "iwl-prph.h"
83#include "rs.h"
84#include "fw-api-scan.h"
85#include "time-event.h"
2f89a5d7 86#include "fw-dbg.h"
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SD
87#include "fw-api.h"
88#include "fw-api-scan.h"
8ca151b5 89
8ca151b5 90#define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux"
8ca151b5 91MODULE_DESCRIPTION(DRV_DESCRIPTION);
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92MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
93MODULE_LICENSE("GPL");
94
95static const struct iwl_op_mode_ops iwl_mvm_ops;
0316d30e 96static const struct iwl_op_mode_ops iwl_mvm_ops_mq;
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97
98struct iwl_mvm_mod_params iwlmvm_mod_params = {
99 .power_scheme = IWL_POWER_SCHEME_BPS,
ce71c2f7 100 .tfd_q_hang_detect = true
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101 /* rest of fields are 0 by default */
102};
103
104module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO);
105MODULE_PARM_DESC(init_dbg,
106 "set to true to debug an ASSERT in INIT fw (default: false");
107module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO);
108MODULE_PARM_DESC(power_scheme,
109 "power management scheme: 1-active, 2-balanced, 3-low power, default: 2");
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110module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect,
111 bool, S_IRUGO);
112MODULE_PARM_DESC(tfd_q_hang_detect,
113 "TFD queues hang detection (default: true");
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114
115/*
116 * module init and exit functions
117 */
118static int __init iwl_mvm_init(void)
119{
120 int ret;
121
122 ret = iwl_mvm_rate_control_register();
123 if (ret) {
124 pr_err("Unable to register rate control algorithm: %d\n", ret);
125 return ret;
126 }
127
128 ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops);
129
130 if (ret) {
131 pr_err("Unable to register MVM op_mode: %d\n", ret);
132 iwl_mvm_rate_control_unregister();
133 }
134
135 return ret;
136}
137module_init(iwl_mvm_init);
138
139static void __exit iwl_mvm_exit(void)
140{
141 iwl_opmode_deregister("iwlmvm");
142 iwl_mvm_rate_control_unregister();
143}
144module_exit(iwl_mvm_exit);
145
146static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
147{
148 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
149 u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash;
150 u32 reg_val = 0;
a0544272
MH
151 u32 phy_config = iwl_mvm_get_phy_config(mvm);
152
153 radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >>
154 FW_PHY_CFG_RADIO_TYPE_POS;
155 radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >>
156 FW_PHY_CFG_RADIO_STEP_POS;
157 radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >>
158 FW_PHY_CFG_RADIO_DASH_POS;
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159
160 /* SKU control */
161 reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) <<
162 CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
163 reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) <<
164 CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
165
166 /* radio configuration */
167 reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
168 reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
169 reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
170
171 WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) &
172 ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE);
173
9b1fcc11
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174 /*
175 * TODO: Bits 7-8 of CSR in 8000 HW family set the ADC sampling, and
176 * shouldn't be set to any non-zero value. The same is supposed to be
177 * true of the other HW, but unsetting them (such as the 7260) causes
178 * automatic tests to fail on seemingly unrelated errors. Need to
179 * further investigate this, but for now we'll separate cases.
180 */
181 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
182 reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
8ca151b5 183
e139dc4a
LE
184 iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
185 CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
186 CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
187 CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
188 CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
189 CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH |
190 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
191 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,
192 reg_val);
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193
194 IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
195 radio_cfg_step, radio_cfg_dash);
196
197 /*
198 * W/A : NIC is stuck in a reset state after Early PCIe power off
199 * (PCIe power is lost before PERST# is asserted), causing ME FW
200 * to lose ownership and not being able to obtain it back.
201 */
95411d04 202 if (!mvm->trans->cfg->apmg_not_supported)
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EH
203 iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
204 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
205 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
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206}
207
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CRI
208/**
209 * enum iwl_rx_handler_context context for Rx handler
210 * @RX_HANDLER_SYNC : this means that it will be called in the Rx path
211 * which can't acquire mvm->mutex.
212 * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex
213 * (and only in this case!), it should be set as ASYNC. In that case,
214 * it will be called from a worker with mvm->mutex held.
215 * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the
216 * mutex itself, it will be called from a worker without mvm->mutex held.
217 */
218enum iwl_rx_handler_context {
219 RX_HANDLER_SYNC,
220 RX_HANDLER_ASYNC_LOCKED,
221 RX_HANDLER_ASYNC_UNLOCKED,
222};
223
224/**
225 * struct iwl_rx_handlers handler for FW notification
226 * @cmd_id: command id
227 * @context: see &iwl_rx_handler_context
228 * @fn: the function is called when notification is received
229 */
8ca151b5 230struct iwl_rx_handlers {
1230b16b 231 u16 cmd_id;
c9cb14a6 232 enum iwl_rx_handler_context context;
0416841d 233 void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
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234};
235
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236#define RX_HANDLER(_cmd_id, _fn, _context) \
237 { .cmd_id = _cmd_id, .fn = _fn, .context = _context }
238#define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \
239 { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context }
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240
241/*
242 * Handlers for fw notifications
243 * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME
244 * This list should be in order of frequency for performance purposes.
245 *
c9cb14a6 246 * The handler can be one from three contexts, see &iwl_rx_handler_context
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247 */
248static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = {
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CRI
249 RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC),
250 RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC),
251
252 RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif,
253 RX_HANDLER_ASYNC_LOCKED),
254 RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif,
255 RX_HANDLER_ASYNC_LOCKED),
256 RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics,
257 RX_HANDLER_ASYNC_LOCKED),
b9fae2d5 258 RX_HANDLER(ANTENNA_COUPLING_NOTIFICATION,
c9cb14a6 259 iwl_mvm_rx_ant_coupling_notif, RX_HANDLER_ASYNC_LOCKED),
f421f9c3 260
3af512d6 261 RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID,
c9cb14a6 262 iwl_mvm_window_status_notif, RX_HANDLER_SYNC),
3af512d6 263
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CRI
264 RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif,
265 RX_HANDLER_SYNC),
266 RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc,
267 RX_HANDLER_ASYNC_LOCKED),
497b49d2 268
c9cb14a6 269 RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC),
3e56eadf 270
e5d74646 271 RX_HANDLER(SCAN_ITERATION_COMPLETE,
c9cb14a6 272 iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC),
35a000b7 273 RX_HANDLER(SCAN_OFFLOAD_COMPLETE,
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CRI
274 iwl_mvm_rx_lmac_scan_complete_notif,
275 RX_HANDLER_ASYNC_LOCKED),
6e56f01d 276 RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found,
c9cb14a6 277 RX_HANDLER_SYNC),
d2496221 278 RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif,
c9cb14a6 279 RX_HANDLER_ASYNC_LOCKED),
ee9219b2 280 RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC,
c9cb14a6 281 iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC),
497b49d2 282
c9cb14a6
CRI
283 RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif,
284 RX_HANDLER_SYNC),
8ca151b5 285
d64048ed 286 RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif,
c9cb14a6 287 RX_HANDLER_SYNC),
d64048ed 288
c9cb14a6 289 RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC),
175a70b7 290 RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION,
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CRI
291 iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC),
292 RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif,
293 RX_HANDLER_ASYNC_LOCKED),
09eef330 294 RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE,
ec77a33e 295 iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED),
0a3b7119 296 RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION,
c9cb14a6 297 iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC),
ea9af24d 298
1d3c3f63 299 RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif,
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CRI
300 RX_HANDLER_ASYNC_LOCKED),
301 RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif,
302 RX_HANDLER_SYNC),
303 RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler,
304 RX_HANDLER_ASYNC_LOCKED),
bdccdb85
GBA
305 RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF,
306 iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC),
0db056d3 307 RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF,
c9cb14a6 308 iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC),
f92659a1 309 RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF,
c9cb14a6 310 iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC),
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JB
311 RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF,
312 iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC),
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313};
314#undef RX_HANDLER
1230b16b 315#undef RX_HANDLER_GRP
39bdb17e
SD
316
317/* Please keep this array *SORTED* by hex value.
318 * Access is done through binary search
319 */
320static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = {
321 HCMD_NAME(MVM_ALIVE),
322 HCMD_NAME(REPLY_ERROR),
323 HCMD_NAME(ECHO_CMD),
324 HCMD_NAME(INIT_COMPLETE_NOTIF),
325 HCMD_NAME(PHY_CONTEXT_CMD),
326 HCMD_NAME(DBG_CFG),
327 HCMD_NAME(ANTENNA_COUPLING_NOTIFICATION),
328 HCMD_NAME(SCAN_CFG_CMD),
329 HCMD_NAME(SCAN_REQ_UMAC),
330 HCMD_NAME(SCAN_ABORT_UMAC),
331 HCMD_NAME(SCAN_COMPLETE_UMAC),
332 HCMD_NAME(TOF_CMD),
333 HCMD_NAME(TOF_NOTIFICATION),
3af512d6 334 HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID),
39bdb17e
SD
335 HCMD_NAME(ADD_STA_KEY),
336 HCMD_NAME(ADD_STA),
337 HCMD_NAME(REMOVE_STA),
338 HCMD_NAME(FW_GET_ITEM_CMD),
339 HCMD_NAME(TX_CMD),
340 HCMD_NAME(SCD_QUEUE_CFG),
341 HCMD_NAME(TXPATH_FLUSH),
342 HCMD_NAME(MGMT_MCAST_KEY),
343 HCMD_NAME(WEP_KEY),
344 HCMD_NAME(SHARED_MEM_CFG),
345 HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD),
346 HCMD_NAME(MAC_CONTEXT_CMD),
347 HCMD_NAME(TIME_EVENT_CMD),
348 HCMD_NAME(TIME_EVENT_NOTIFICATION),
349 HCMD_NAME(BINDING_CONTEXT_CMD),
350 HCMD_NAME(TIME_QUOTA_CMD),
351 HCMD_NAME(NON_QOS_TX_COUNTER_CMD),
352 HCMD_NAME(LQ_CMD),
353 HCMD_NAME(FW_PAGING_BLOCK_CMD),
354 HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD),
355 HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD),
356 HCMD_NAME(HOT_SPOT_CMD),
357 HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD),
358 HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD),
359 HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD),
360 HCMD_NAME(BT_COEX_UPDATE_SW_BOOST),
361 HCMD_NAME(BT_COEX_UPDATE_CORUN_LUT),
362 HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP),
363 HCMD_NAME(BT_COEX_CI),
364 HCMD_NAME(PHY_CONFIGURATION_CMD),
365 HCMD_NAME(CALIB_RES_NOTIF_PHY_DB),
176aa60b 366 HCMD_NAME(PHY_DB_CMD),
39bdb17e
SD
367 HCMD_NAME(SCAN_OFFLOAD_COMPLETE),
368 HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD),
369 HCMD_NAME(SCAN_OFFLOAD_CONFIG_CMD),
370 HCMD_NAME(POWER_TABLE_CMD),
371 HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION),
372 HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF),
373 HCMD_NAME(DC2DC_CONFIG_CMD),
374 HCMD_NAME(NVM_ACCESS_CMD),
375 HCMD_NAME(SET_CALIB_DEFAULT_CMD),
376 HCMD_NAME(BEACON_NOTIFICATION),
377 HCMD_NAME(BEACON_TEMPLATE_CMD),
378 HCMD_NAME(TX_ANT_CONFIGURATION_CMD),
379 HCMD_NAME(BT_CONFIG),
380 HCMD_NAME(STATISTICS_CMD),
381 HCMD_NAME(STATISTICS_NOTIFICATION),
382 HCMD_NAME(EOSP_NOTIFICATION),
383 HCMD_NAME(REDUCE_TX_POWER_CMD),
384 HCMD_NAME(CARD_STATE_CMD),
385 HCMD_NAME(CARD_STATE_NOTIFICATION),
386 HCMD_NAME(MISSED_BEACONS_NOTIFICATION),
387 HCMD_NAME(TDLS_CONFIG_CMD),
388 HCMD_NAME(MAC_PM_POWER_TABLE),
389 HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION),
390 HCMD_NAME(MFUART_LOAD_NOTIFICATION),
43413a97 391 HCMD_NAME(RSS_CONFIG_CMD),
39bdb17e
SD
392 HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC),
393 HCMD_NAME(REPLY_RX_PHY_CMD),
394 HCMD_NAME(REPLY_RX_MPDU_CMD),
395 HCMD_NAME(BA_NOTIF),
396 HCMD_NAME(MCC_UPDATE_CMD),
397 HCMD_NAME(MCC_CHUB_UPDATE_CMD),
398 HCMD_NAME(MARKER_CMD),
399 HCMD_NAME(BT_COEX_PRIO_TABLE),
400 HCMD_NAME(BT_COEX_PROT_ENV),
401 HCMD_NAME(BT_PROFILE_NOTIFICATION),
402 HCMD_NAME(BCAST_FILTER_CMD),
403 HCMD_NAME(MCAST_FILTER_CMD),
404 HCMD_NAME(REPLY_SF_CFG_CMD),
405 HCMD_NAME(REPLY_BEACON_FILTERING_CMD),
406 HCMD_NAME(D3_CONFIG_CMD),
407 HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD),
408 HCMD_NAME(OFFLOADS_QUERY_CMD),
409 HCMD_NAME(REMOTE_WAKE_CONFIG_CMD),
410 HCMD_NAME(MATCH_FOUND_NOTIFICATION),
411 HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER),
412 HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION),
413 HCMD_NAME(WOWLAN_PATTERNS),
414 HCMD_NAME(WOWLAN_CONFIGURATION),
415 HCMD_NAME(WOWLAN_TSC_RSC_PARAM),
416 HCMD_NAME(WOWLAN_TKIP_PARAM),
417 HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL),
418 HCMD_NAME(WOWLAN_GET_STATUSES),
419 HCMD_NAME(WOWLAN_TX_POWER_PER_DB),
420 HCMD_NAME(SCAN_ITERATION_COMPLETE),
421 HCMD_NAME(D0I3_END_CMD),
422 HCMD_NAME(LTR_CONFIG),
423 HCMD_NAME(REPLY_DEBUG_CMD),
8ca151b5 424};
39bdb17e 425
5b086414
GBA
426/* Please keep this array *SORTED* by hex value.
427 * Access is done through binary search
428 */
429static const struct iwl_hcmd_names iwl_mvm_system_names[] = {
430 HCMD_NAME(SHARED_MEM_CFG_CMD),
4399caaa 431 HCMD_NAME(INIT_EXTENDED_CFG_CMD),
5b086414
GBA
432};
433
03098268
AE
434/* Please keep this array *SORTED* by hex value.
435 * Access is done through binary search
436 */
437static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = {
438 HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD),
439 HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF),
d3a108a4 440 HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF),
03098268
AE
441};
442
39bdb17e
SD
443/* Please keep this array *SORTED* by hex value.
444 * Access is done through binary search
445 */
446static const struct iwl_hcmd_names iwl_mvm_phy_names[] = {
447 HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE),
5c89e7bc 448 HCMD_NAME(CTDP_CONFIG_CMD),
c221daf2 449 HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD),
a6bff3cb 450 HCMD_NAME(GEO_TX_POWER_LIMIT),
0a3b7119 451 HCMD_NAME(CT_KILL_NOTIFICATION),
39bdb17e
SD
452 HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE),
453};
454
e0d8fdec
SS
455/* Please keep this array *SORTED* by hex value.
456 * Access is done through binary search
457 */
458static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = {
ddef2f98 459 HCMD_NAME(DQA_ENABLE_CMD),
e0d8fdec 460 HCMD_NAME(UPDATE_MU_GROUPS_CMD),
94bb4481 461 HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD),
65e25482 462 HCMD_NAME(STA_PM_NOTIF),
f92659a1 463 HCMD_NAME(MU_GROUP_MGMT_NOTIF),
94bb4481 464 HCMD_NAME(RX_QUEUES_NOTIFICATION),
e0d8fdec
SS
465};
466
bdccdb85
GBA
467/* Please keep this array *SORTED* by hex value.
468 * Access is done through binary search
469 */
470static const struct iwl_hcmd_names iwl_mvm_debug_names[] = {
471 HCMD_NAME(MFU_ASSERT_DUMP_NTF),
472};
473
0db056d3
SS
474/* Please keep this array *SORTED* by hex value.
475 * Access is done through binary search
476 */
477static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = {
478 HCMD_NAME(STORED_BEACON_NTF),
479};
480
1f370650
SS
481/* Please keep this array *SORTED* by hex value.
482 * Access is done through binary search
483 */
484static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = {
485 HCMD_NAME(NVM_ACCESS_COMPLETE),
486};
487
39bdb17e
SD
488static const struct iwl_hcmd_arr iwl_mvm_groups[] = {
489 [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
490 [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
5b086414 491 [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names),
03098268 492 [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names),
39bdb17e 493 [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names),
e0d8fdec 494 [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names),
0db056d3 495 [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names),
1f370650
SS
496 [REGULATORY_AND_NVM_GROUP] =
497 HCMD_ARR(iwl_mvm_regulatory_and_nvm_names),
39bdb17e
SD
498};
499
8ca151b5
JB
500/* this forward declaration can avoid to export the function */
501static void iwl_mvm_async_handlers_wk(struct work_struct *wk);
37577fe2 502static void iwl_mvm_d0i3_exit_work(struct work_struct *wk);
8ca151b5 503
0c0e2c71
IY
504static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg)
505{
506 const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs;
507
508 if (!pwr_tx_backoff)
509 return 0;
510
511 while (pwr_tx_backoff->pwr) {
512 if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr)
513 return pwr_tx_backoff->backoff;
514
515 pwr_tx_backoff++;
516 }
517
518 return 0;
519}
520
4bfa47f3
EG
521static void iwl_mvm_fw_error_dump_wk(struct work_struct *work);
522
d3a108a4
AO
523static void iwl_mvm_tx_unblock_dwork(struct work_struct *work)
524{
525 struct iwl_mvm *mvm =
526 container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work);
527 struct ieee80211_vif *tx_blocked_vif;
528 struct iwl_mvm_vif *mvmvif;
529
530 mutex_lock(&mvm->mutex);
531
532 tx_blocked_vif =
533 rcu_dereference_protected(mvm->csa_tx_blocked_vif,
534 lockdep_is_held(&mvm->mutex));
535
536 if (!tx_blocked_vif)
537 goto unlock;
538
539 mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif);
540 iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false);
541 RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL);
542unlock:
543 mutex_unlock(&mvm->mutex);
544}
545
8ca151b5
JB
546static struct iwl_op_mode *
547iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
548 const struct iwl_fw *fw, struct dentry *dbgfs_dir)
549{
550 struct ieee80211_hw *hw;
551 struct iwl_op_mode *op_mode;
552 struct iwl_mvm *mvm;
553 struct iwl_trans_config trans_cfg = {};
554 static const u8 no_reclaim_cmds[] = {
555 TX_CMD,
556 };
557 int err, scan_size;
0c0e2c71 558 u32 min_backoff;
8ca151b5 559
c4d83271
EG
560 /*
561 * We use IWL_MVM_STATION_COUNT to check the validity of the station
562 * index all over the driver - check that its value corresponds to the
563 * array size.
564 */
565 BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT);
566
8ca151b5
JB
567 /********************************
568 * 1. Allocating and configuring HW data
569 ********************************/
570 hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) +
571 sizeof(struct iwl_mvm),
572 &iwl_mvm_hw_ops);
573 if (!hw)
574 return NULL;
575
745160ee
OG
576 if (cfg->max_rx_agg_size)
577 hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size;
578
77d96730
GG
579 if (cfg->max_tx_agg_size)
580 hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size;
581
8ca151b5 582 op_mode = hw->priv;
8ca151b5
JB
583
584 mvm = IWL_OP_MODE_GET_MVM(op_mode);
585 mvm->dev = trans->dev;
586 mvm->trans = trans;
587 mvm->cfg = cfg;
588 mvm->fw = fw;
589 mvm->hw = hw;
590
0316d30e
JB
591 if (iwl_mvm_has_new_rx_api(mvm)) {
592 op_mode->ops = &iwl_mvm_ops_mq;
25c2b22c 593 trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc);
0316d30e
JB
594 } else {
595 op_mode->ops = &iwl_mvm_ops;
25c2b22c
SS
596 trans->rx_mpdu_cmd_hdr_size =
597 sizeof(struct iwl_rx_mpdu_res_start);
0316d30e
JB
598
599 if (WARN_ON(trans->num_rx_queues > 1))
600 goto out_free;
601 }
602
291aa7c4
EH
603 mvm->restart_fw = iwlwifi_mod_params.restart_fw ? -1 : 0;
604
cf961e16 605 if (!iwl_mvm_is_dqa_supported(mvm)) {
cf961e16 606 mvm->last_agg_queue = mvm->cfg->base_params->num_of_queues - 1;
28d0793e
LK
607
608 if (mvm->cfg->base_params->num_of_queues == 16) {
609 mvm->aux_queue = 11;
610 mvm->first_agg_queue = 12;
611 } else {
612 mvm->aux_queue = 15;
613 mvm->first_agg_queue = 16;
614 }
cf961e16 615 } else {
28d0793e 616 mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE;
49f71713
SS
617 mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
618 mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE;
cf961e16
LK
619 mvm->first_agg_queue = IWL_MVM_DQA_MIN_DATA_QUEUE;
620 mvm->last_agg_queue = IWL_MVM_DQA_MAX_DATA_QUEUE;
621 }
1f3b0ff8 622 mvm->sf_state = SF_UNINIT;
1f370650
SS
623 if (iwl_mvm_has_new_tx_api(mvm))
624 mvm->cur_ucode = IWL_UCODE_REGULAR;
625 else
626 mvm->cur_ucode = IWL_UCODE_INIT;
c89e333d 627 mvm->drop_bcn_ap_mode = true;
19e737c9 628
8ca151b5 629 mutex_init(&mvm->mutex);
d15a747f 630 mutex_init(&mvm->d0i3_suspend_mutex);
8ca151b5
JB
631 spin_lock_init(&mvm->async_handlers_lock);
632 INIT_LIST_HEAD(&mvm->time_event_list);
b112889c 633 INIT_LIST_HEAD(&mvm->aux_roc_te_list);
8ca151b5
JB
634 INIT_LIST_HEAD(&mvm->async_handlers_list);
635 spin_lock_init(&mvm->time_event_lock);
4ecafae9 636 spin_lock_init(&mvm->queue_info_lock);
8ca151b5
JB
637
638 INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk);
639 INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk);
640 INIT_WORK(&mvm->sta_drained_wk, iwl_mvm_sta_drained_wk);
37577fe2 641 INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work);
d2709ad7 642 INIT_DELAYED_WORK(&mvm->fw_dump_wk, iwl_mvm_fw_error_dump_wk);
1d3c3f63 643 INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work);
69e04642 644 INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk);
24afba76 645 INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk);
8ca151b5 646
b2492501 647 spin_lock_init(&mvm->d0i3_tx_lock);
576eeee9 648 spin_lock_init(&mvm->refs_lock);
b2492501
AN
649 skb_queue_head_init(&mvm->d0i3_tx);
650 init_waitqueue_head(&mvm->d0i3_exit_waitq);
3a732c65 651 init_waitqueue_head(&mvm->rx_sync_waitq);
b2492501 652
0636b938
SS
653 atomic_set(&mvm->queue_sync_counter, 0);
654
8ca151b5
JB
655 SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev);
656
d3a108a4
AO
657 INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork);
658
8ca151b5
JB
659 /*
660 * Populate the state variables that the transport layer needs
661 * to know about.
662 */
663 trans_cfg.op_mode = op_mode;
664 trans_cfg.no_reclaim_cmds = no_reclaim_cmds;
665 trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds);
6c4fbcbc 666 switch (iwlwifi_mod_params.amsdu_size) {
4bdd4dfe 667 case IWL_AMSDU_DEF:
6c4fbcbc
EG
668 case IWL_AMSDU_4K:
669 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
670 break;
671 case IWL_AMSDU_8K:
672 trans_cfg.rx_buf_size = IWL_AMSDU_8K;
673 break;
674 case IWL_AMSDU_12K:
675 trans_cfg.rx_buf_size = IWL_AMSDU_12K;
676 break;
677 default:
678 pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME,
679 iwlwifi_mod_params.amsdu_size);
680 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
681 }
4bdd4dfe
EG
682
683 /* the hardware splits the A-MSDU */
684 if (mvm->cfg->mq_rx_supported)
685 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
8ca151b5 686
4b87e5af
LC
687 trans->wide_cmd_header = true;
688 trans_cfg.bc_table_dword = true;
8ca151b5 689
39bdb17e
SD
690 trans_cfg.command_groups = iwl_mvm_groups;
691 trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups);
8ca151b5 692
097129c9
LK
693 if (iwl_mvm_is_dqa_supported(mvm))
694 trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE;
695 else
696 trans_cfg.cmd_queue = IWL_MVM_CMD_QUEUE;
b2d81db7 697 trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD;
3a736bcb 698 trans_cfg.scd_set_active = true;
8ca151b5 699
21cb3222
JB
700 trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info,
701 driver_data[2]);
702
b4821767 703 trans_cfg.sdio_adma_addr = fw->sdio_adma_addr;
41837ca9 704 trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD;
b4821767 705
4cf677fd
EG
706 /* Set a short watchdog for the command queue */
707 trans_cfg.cmd_q_wdg_timeout =
5d42e7b2 708 iwl_mvm_get_wd_timeout(mvm, NULL, false, true);
4cf677fd 709
8ca151b5
JB
710 snprintf(mvm->hw->wiphy->fw_version,
711 sizeof(mvm->hw->wiphy->fw_version),
712 "%s", fw->fw_version);
713
714 /* Configure transport layer */
715 iwl_trans_configure(mvm->trans, &trans_cfg);
716
717 trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD;
09e350f7
LK
718 trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv;
719 trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num;
720 memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv,
721 sizeof(trans->dbg_conf_tlv));
d2709ad7 722 trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
8ca151b5
JB
723
724 /* set up notification wait support */
725 iwl_notification_wait_init(&mvm->notif_wait);
726
727 /* Init phy db */
728 mvm->phy_db = iwl_phy_db_init(trans);
729 if (!mvm->phy_db) {
730 IWL_ERR(mvm, "Cannot init phy_db\n");
731 goto out_free;
732 }
733
734 IWL_INFO(mvm, "Detected %s, REV=0x%X\n",
735 mvm->cfg->name, mvm->trans->hw_rev);
736
4fb06283 737 if (iwlwifi_mod_params.nvm_file)
e02a9d60 738 mvm->nvm_file_name = iwlwifi_mod_params.nvm_file;
4fb06283
EH
739 else
740 IWL_DEBUG_EEPROM(mvm->trans->dev,
741 "working without external nvm file\n");
9ee718aa 742
56f2929b
SS
743 err = iwl_trans_start_hw(mvm->trans);
744 if (err)
14b485f0
EH
745 goto out_free;
746
56f2929b
SS
747 mutex_lock(&mvm->mutex);
748 iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE);
8c5f47b1 749 err = iwl_run_init_mvm_ucode(mvm, true);
56f2929b
SS
750 if (!err || !iwlmvm_mod_params.init_dbg)
751 iwl_mvm_stop_device(mvm);
752 iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE);
753 mutex_unlock(&mvm->mutex);
754 /* returns 0 if successful, 1 if success but in rfkill */
755 if (err < 0 && !iwlmvm_mod_params.init_dbg) {
756 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err);
757 goto out_free;
8ca151b5
JB
758 }
759
d2496221 760 scan_size = iwl_mvm_scan_size(mvm);
fb98be5e 761
8ca151b5
JB
762 mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL);
763 if (!mvm->scan_cmd)
764 goto out_free;
765
5a4b2afa
HD
766 /* Set EBS as successful as long as not stated otherwise by the FW. */
767 mvm->last_ebs_successful = true;
768
8ca151b5
JB
769 err = iwl_mvm_mac_setup_register(mvm);
770 if (err)
771 goto out_free;
1f370650 772 mvm->hw_registered = true;
8ca151b5 773
04ddc2aa
CRI
774 min_backoff = calc_min_backoff(trans, cfg);
775 iwl_mvm_thermal_initialize(mvm, min_backoff);
776
8ca151b5
JB
777 err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
778 if (err)
779 goto out_unregister;
780
3848ab66
MG
781 memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx));
782
33c85ead
LC
783 /* The transport always starts with a taken reference, we can
784 * release it now if d0i3 is supported */
785 if (iwl_mvm_is_d0i3_supported(mvm))
786 iwl_trans_unref(mvm->trans);
7498cf4c 787
ce792918
GG
788 iwl_mvm_tof_init(mvm);
789
8ca151b5
JB
790 return op_mode;
791
792 out_unregister:
793 ieee80211_unregister_hw(mvm->hw);
1f370650 794 mvm->hw_registered = false;
91b0d119 795 iwl_mvm_leds_exit(mvm);
c221daf2 796 iwl_mvm_thermal_exit(mvm);
8ca151b5 797 out_free:
dbf73d4a 798 flush_delayed_work(&mvm->fw_dump_wk);
8ca151b5
JB
799 iwl_phy_db_free(mvm->phy_db);
800 kfree(mvm->scan_cmd);
56f2929b
SS
801 iwl_trans_op_mode_leave(trans);
802
8ca151b5
JB
803 ieee80211_free_hw(mvm->hw);
804 return NULL;
805}
806
807static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode)
808{
809 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
810 int i;
811
e27deb45
LC
812 /* If d0i3 is supported, we have released the reference that
813 * the transport started with, so we should take it back now
814 * that we are leaving.
815 */
816 if (iwl_mvm_is_d0i3_supported(mvm))
817 iwl_trans_ref(mvm->trans);
818
8ca151b5
JB
819 iwl_mvm_leds_exit(mvm);
820
c221daf2 821 iwl_mvm_thermal_exit(mvm);
9ee718aa 822
8ca151b5
JB
823 ieee80211_unregister_hw(mvm->hw);
824
825 kfree(mvm->scan_cmd);
e59647ea
EP
826 kfree(mvm->mcast_filter_cmd);
827 mvm->mcast_filter_cmd = NULL;
8ca151b5 828
afc66bb7
JB
829#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS)
830 kfree(mvm->d3_resume_sram);
831#endif
832
a4082843 833 iwl_trans_op_mode_leave(mvm->trans);
8ca151b5
JB
834
835 iwl_phy_db_free(mvm->phy_db);
836 mvm->phy_db = NULL;
837
8ca151b5 838 iwl_free_nvm_data(mvm->nvm_data);
ae2b21b0 839 for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++)
8ca151b5
JB
840 kfree(mvm->nvm_sections[i].data);
841
ce792918
GG
842 iwl_mvm_tof_clean(mvm);
843
a2a57a35
EG
844 mutex_destroy(&mvm->mutex);
845 mutex_destroy(&mvm->d0i3_suspend_mutex);
846
8ca151b5
JB
847 ieee80211_free_hw(mvm->hw);
848}
849
850struct iwl_async_handler_entry {
851 struct list_head list;
852 struct iwl_rx_cmd_buffer rxb;
c9cb14a6 853 enum iwl_rx_handler_context context;
0416841d 854 void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
8ca151b5
JB
855};
856
857void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm)
858{
859 struct iwl_async_handler_entry *entry, *tmp;
860
861 spin_lock_bh(&mvm->async_handlers_lock);
862 list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) {
863 iwl_free_rxb(&entry->rxb);
864 list_del(&entry->list);
865 kfree(entry);
866 }
867 spin_unlock_bh(&mvm->async_handlers_lock);
868}
869
870static void iwl_mvm_async_handlers_wk(struct work_struct *wk)
871{
872 struct iwl_mvm *mvm =
873 container_of(wk, struct iwl_mvm, async_handlers_wk);
874 struct iwl_async_handler_entry *entry, *tmp;
8098203f 875 LIST_HEAD(local_list);
8ca151b5
JB
876
877 /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */
8ca151b5
JB
878
879 /*
880 * Sync with Rx path with a lock. Remove all the entries from this list,
881 * add them to a local one (lock free), and then handle them.
882 */
883 spin_lock_bh(&mvm->async_handlers_lock);
884 list_splice_init(&mvm->async_handlers_list, &local_list);
885 spin_unlock_bh(&mvm->async_handlers_lock);
886
887 list_for_each_entry_safe(entry, tmp, &local_list, list) {
c9cb14a6
CRI
888 if (entry->context == RX_HANDLER_ASYNC_LOCKED)
889 mutex_lock(&mvm->mutex);
0416841d 890 entry->fn(mvm, &entry->rxb);
8ca151b5
JB
891 iwl_free_rxb(&entry->rxb);
892 list_del(&entry->list);
c9cb14a6
CRI
893 if (entry->context == RX_HANDLER_ASYNC_LOCKED)
894 mutex_unlock(&mvm->mutex);
8ca151b5
JB
895 kfree(entry);
896 }
8ca151b5
JB
897}
898
917f39bb
EG
899static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm,
900 struct iwl_rx_packet *pkt)
901{
902 struct iwl_fw_dbg_trigger_tlv *trig;
903 struct iwl_fw_dbg_trigger_cmd *cmds_trig;
917f39bb
EG
904 int i;
905
906 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF))
907 return;
908
909 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF);
910 cmds_trig = (void *)trig->data;
911
912 if (!iwl_fw_dbg_trigger_check_stop(mvm, NULL, trig))
913 return;
914
915 for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) {
916 /* don't collect on CMD 0 */
917 if (!cmds_trig->cmds[i].cmd_id)
918 break;
919
0ab66e6d
SS
920 if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd ||
921 cmds_trig->cmds[i].group_id != pkt->hdr.group_id)
917f39bb
EG
922 continue;
923
5d4f929e 924 iwl_mvm_fw_dbg_collect_trig(mvm, trig,
0ab66e6d
SS
925 "CMD 0x%02x.%02x received",
926 pkt->hdr.group_id, pkt->hdr.cmd);
917f39bb
EG
927 break;
928 }
929}
930
0316d30e
JB
931static void iwl_mvm_rx_common(struct iwl_mvm *mvm,
932 struct iwl_rx_cmd_buffer *rxb,
933 struct iwl_rx_packet *pkt)
8ca151b5 934{
0316d30e 935 int i;
1738d60b 936
917f39bb
EG
937 iwl_mvm_rx_check_trigger(mvm, pkt);
938
8ca151b5
JB
939 /*
940 * Do the notification wait before RX handlers so
941 * even if the RX handler consumes the RXB we have
942 * access to it in the notification wait entry.
943 */
944 iwl_notification_wait_notify(&mvm->notif_wait, pkt);
945
946 for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) {
947 const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i];
36eed56a
EG
948 struct iwl_async_handler_entry *entry;
949
1230b16b 950 if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd))
36eed56a
EG
951 continue;
952
c9cb14a6 953 if (rx_h->context == RX_HANDLER_SYNC) {
0416841d 954 rx_h->fn(mvm, rxb);
f7e6469f 955 return;
0416841d 956 }
36eed56a
EG
957
958 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
959 /* we can't do much... */
960 if (!entry)
f7e6469f 961 return;
36eed56a
EG
962
963 entry->rxb._page = rxb_steal_page(rxb);
964 entry->rxb._offset = rxb->_offset;
965 entry->rxb._rx_page_order = rxb->_rx_page_order;
966 entry->fn = rx_h->fn;
c9cb14a6 967 entry->context = rx_h->context;
36eed56a
EG
968 spin_lock(&mvm->async_handlers_lock);
969 list_add_tail(&entry->list, &mvm->async_handlers_list);
970 spin_unlock(&mvm->async_handlers_lock);
971 schedule_work(&mvm->async_handlers_wk);
972 break;
8ca151b5 973 }
8ca151b5
JB
974}
975
0316d30e
JB
976static void iwl_mvm_rx(struct iwl_op_mode *op_mode,
977 struct napi_struct *napi,
978 struct iwl_rx_cmd_buffer *rxb)
979{
980 struct iwl_rx_packet *pkt = rxb_addr(rxb);
981 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
61b0f5d7 982 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 983
61b0f5d7 984 if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
0316d30e 985 iwl_mvm_rx_rx_mpdu(mvm, napi, rxb);
61b0f5d7 986 else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD))
0316d30e
JB
987 iwl_mvm_rx_rx_phy_cmd(mvm, rxb);
988 else
989 iwl_mvm_rx_common(mvm, rxb, pkt);
990}
991
992static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode,
993 struct napi_struct *napi,
994 struct iwl_rx_cmd_buffer *rxb)
995{
996 struct iwl_rx_packet *pkt = rxb_addr(rxb);
997 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
61b0f5d7 998 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 999
61b0f5d7 1000 if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
780e87c2 1001 iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);
61b0f5d7
JB
1002 else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1003 RX_QUEUES_NOTIFICATION)))
94bb4481 1004 iwl_mvm_rx_queue_notif(mvm, rxb, 0);
61b0f5d7 1005 else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))
58035432 1006 iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);
0316d30e
JB
1007 else
1008 iwl_mvm_rx_common(mvm, rxb, pkt);
1009}
1010
b4f7a9d1 1011void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
8ca151b5 1012{
4ecafae9 1013 int q;
8ca151b5 1014
4ecafae9 1015 if (WARN_ON_ONCE(!mq))
8ca151b5 1016 return;
8ca151b5 1017
4ecafae9
LK
1018 for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1019 if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) {
1020 IWL_DEBUG_TX_QUEUES(mvm,
b4f7a9d1 1021 "mac80211 %d already stopped\n", q);
4ecafae9
LK
1022 continue;
1023 }
1024
1025 ieee80211_stop_queue(mvm->hw, q);
1026 }
8ca151b5
JB
1027}
1028
156f92f2
EG
1029static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode,
1030 const struct iwl_device_cmd *cmd)
1031{
1032 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1033
1034 /*
1035 * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA
1036 * commands that need to block the Tx queues.
1037 */
1038 iwl_trans_block_txq_ptrs(mvm->trans, false);
1039}
1040
b4f7a9d1 1041static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
8ca151b5
JB
1042{
1043 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
4ecafae9 1044 unsigned long mq;
8ca151b5 1045
4ecafae9 1046 spin_lock_bh(&mvm->queue_info_lock);
34e10860 1047 mq = mvm->hw_queue_to_mac80211[hw_queue];
4ecafae9 1048 spin_unlock_bh(&mvm->queue_info_lock);
8ca151b5 1049
b4f7a9d1
LK
1050 iwl_mvm_stop_mac_queues(mvm, mq);
1051}
1052
1053void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
1054{
1055 int q;
1056
4ecafae9 1057 if (WARN_ON_ONCE(!mq))
8ca151b5 1058 return;
8ca151b5 1059
4ecafae9
LK
1060 for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1061 if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) {
1062 IWL_DEBUG_TX_QUEUES(mvm,
b4f7a9d1 1063 "mac80211 %d still stopped\n", q);
4ecafae9
LK
1064 continue;
1065 }
1066
1067 ieee80211_wake_queue(mvm->hw, q);
1068 }
8ca151b5
JB
1069}
1070
b4f7a9d1
LK
1071static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
1072{
1073 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1074 unsigned long mq;
1075
1076 spin_lock_bh(&mvm->queue_info_lock);
34e10860 1077 mq = mvm->hw_queue_to_mac80211[hw_queue];
b4f7a9d1
LK
1078 spin_unlock_bh(&mvm->queue_info_lock);
1079
1080 iwl_mvm_start_mac_queues(mvm, mq);
1081}
1082
9ee718aa
EL
1083void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
1084{
1085 if (state)
1086 set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1087 else
1088 clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1089
1090 wiphy_rfkill_set_hw_state(mvm->hw->wiphy, iwl_mvm_is_radio_killed(mvm));
1091}
1092
14cfca71 1093static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
8ca151b5
JB
1094{
1095 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
31b8b343 1096 bool calibrating = ACCESS_ONCE(mvm->calibrating);
8ca151b5
JB
1097
1098 if (state)
1099 set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1100 else
1101 clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1102
9ee718aa 1103 wiphy_rfkill_set_hw_state(mvm->hw->wiphy, iwl_mvm_is_radio_killed(mvm));
14cfca71 1104
31b8b343
EG
1105 /* iwl_run_init_mvm_ucode is waiting for results, abort it */
1106 if (calibrating)
1107 iwl_abort_notification_waits(&mvm->notif_wait);
1108
1109 /*
1110 * Stop the device if we run OPERATIONAL firmware or if we are in the
1111 * middle of the calibrations.
1112 */
1113 return state && (mvm->cur_ucode != IWL_UCODE_INIT || calibrating);
8ca151b5
JB
1114}
1115
1116static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
1117{
1118 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1119 struct ieee80211_tx_info *info;
1120
1121 info = IEEE80211_SKB_CB(skb);
1122 iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]);
1123 ieee80211_free_txskb(mvm->hw, skb);
1124}
1125
ac1ed416
JB
1126struct iwl_mvm_reprobe {
1127 struct device *dev;
1128 struct work_struct work;
1129};
1130
1131static void iwl_mvm_reprobe_wk(struct work_struct *wk)
1132{
1133 struct iwl_mvm_reprobe *reprobe;
1134
1135 reprobe = container_of(wk, struct iwl_mvm_reprobe, work);
1136 if (device_reprobe(reprobe->dev))
1137 dev_err(reprobe->dev, "reprobe failed!\n");
1138 kfree(reprobe);
1139 module_put(THIS_MODULE);
1140}
1141
4bfa47f3
EG
1142static void iwl_mvm_fw_error_dump_wk(struct work_struct *work)
1143{
1144 struct iwl_mvm *mvm =
d2709ad7 1145 container_of(work, struct iwl_mvm, fw_dump_wk.work);
4bfa47f3 1146
fb2380a2
LK
1147 if (iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT))
1148 return;
1149
4bfa47f3 1150 mutex_lock(&mvm->mutex);
145d90b6 1151
145d90b6 1152 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
addce854 1153 /* stop recording */
145d90b6 1154 iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
addce854
EG
1155
1156 iwl_mvm_fw_error_dump(mvm);
1157
1158 /* start recording again if the firmware is not crashed */
1159 if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) &&
1160 mvm->fw->dbg_dest_tlv)
1161 iwl_clear_bits_prph(mvm->trans,
1162 MON_BUFF_SAMPLE_CTL, 0x100);
145d90b6 1163 } else {
addce854
EG
1164 u32 in_sample = iwl_read_prph(mvm->trans, DBGC_IN_SAMPLE);
1165 u32 out_ctrl = iwl_read_prph(mvm->trans, DBGC_OUT_CTRL);
1166
1167 /* stop recording */
145d90b6 1168 iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0);
145d90b6 1169 udelay(100);
addce854
EG
1170 iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, 0);
1171 /* wait before we collect the data till the DBGC stop */
1172 udelay(500);
145d90b6 1173
addce854 1174 iwl_mvm_fw_error_dump(mvm);
e66e0b70 1175
addce854
EG
1176 /* start recording again if the firmware is not crashed */
1177 if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) &&
1178 mvm->fw->dbg_dest_tlv) {
1179 iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, in_sample);
1180 iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, out_ctrl);
1181 }
1182 }
e66e0b70 1183
4bfa47f3 1184 mutex_unlock(&mvm->mutex);
fb2380a2
LK
1185
1186 iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
4bfa47f3
EG
1187}
1188
b08c1d97 1189void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
8ca151b5 1190{
8ca151b5
JB
1191 iwl_abort_notification_waits(&mvm->notif_wait);
1192
992f81fc
DS
1193 /*
1194 * This is a bit racy, but worst case we tell mac80211 about
1195 * a stopped/aborted scan when that was already done which
1196 * is not a problem. It is necessary to abort any os scan
1197 * here because mac80211 requires having the scan cleared
1198 * before restarting.
1199 * We'll reset the scan_status to NONE in restart cleanup in
1200 * the next start() call from mac80211. If restart isn't called
1201 * (no fw restart) scan status will stay busy.
1202 */
4ffb3650 1203 iwl_mvm_report_scan_aborted(mvm);
992f81fc 1204
8ca151b5
JB
1205 /*
1206 * If we're restarting already, don't cycle restarts.
1207 * If INIT fw asserted, it will likely fail again.
1208 * If WoWLAN fw asserted, don't restart either, mac80211
1209 * can't recover this since we're already half suspended.
1210 */
60f1071c 1211 if (!mvm->restart_fw && fw_error) {
36fb9017
OG
1212 iwl_mvm_fw_dbg_collect_desc(mvm, &iwl_mvm_dump_desc_assert,
1213 NULL);
60f1071c
LC
1214 } else if (test_and_set_bit(IWL_MVM_STATUS_IN_HW_RESTART,
1215 &mvm->status)) {
ac1ed416
JB
1216 struct iwl_mvm_reprobe *reprobe;
1217
1218 IWL_ERR(mvm,
1219 "Firmware error during reconfiguration - reprobe!\n");
1220
1221 /*
1222 * get a module reference to avoid doing this while unloading
1223 * anyway and to avoid scheduling a work with code that's
1224 * being removed.
1225 */
1226 if (!try_module_get(THIS_MODULE)) {
1227 IWL_ERR(mvm, "Module is being unloaded - abort\n");
1228 return;
1229 }
1230
1231 reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC);
1232 if (!reprobe) {
1233 module_put(THIS_MODULE);
1234 return;
1235 }
1236 reprobe->dev = mvm->trans->dev;
1237 INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk);
1238 schedule_work(&reprobe->work);
1f370650
SS
1239 } else if (mvm->cur_ucode == IWL_UCODE_REGULAR &&
1240 mvm->hw_registered) {
7498cf4c
EP
1241 /* don't let the transport/FW power down */
1242 iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN);
1243
b08c1d97 1244 if (fw_error && mvm->restart_fw > 0)
291aa7c4 1245 mvm->restart_fw--;
8ca151b5
JB
1246 ieee80211_restart_hw(mvm->hw);
1247 }
1248}
1249
715c998f
EG
1250static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode)
1251{
1252 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1253
1254 iwl_mvm_dump_nic_error_log(mvm);
1bd3cbc1 1255
b08c1d97 1256 iwl_mvm_nic_restart(mvm, true);
715c998f
EG
1257}
1258
8ca151b5
JB
1259static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode)
1260{
715c998f
EG
1261 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1262
8ca151b5 1263 WARN_ON(1);
b08c1d97 1264 iwl_mvm_nic_restart(mvm, true);
8ca151b5
JB
1265}
1266
37577fe2
EP
1267struct iwl_d0i3_iter_data {
1268 struct iwl_mvm *mvm;
a3f7ba5c 1269 struct ieee80211_vif *connected_vif;
37577fe2
EP
1270 u8 ap_sta_id;
1271 u8 vif_count;
b2492501
AN
1272 u8 offloading_tid;
1273 bool disable_offloading;
37577fe2
EP
1274};
1275
b2492501
AN
1276static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm,
1277 struct ieee80211_vif *vif,
1278 struct iwl_d0i3_iter_data *iter_data)
1279{
1280 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
b2492501
AN
1281 struct iwl_mvm_sta *mvmsta;
1282 u32 available_tids = 0;
1283 u8 tid;
1284
1285 if (WARN_ON(vif->type != NL80211_IFTYPE_STATION ||
0ae98812 1286 mvmvif->ap_sta_id == IWL_MVM_INVALID_STA))
b2492501
AN
1287 return false;
1288
13303c0f
SS
1289 mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id);
1290 if (!mvmsta)
b2492501
AN
1291 return false;
1292
b2492501
AN
1293 spin_lock_bh(&mvmsta->lock);
1294 for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) {
1295 struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
1296
1297 /*
1298 * in case of pending tx packets, don't use this tid
1299 * for offloading in order to prevent reuse of the same
1300 * qos seq counters.
1301 */
1302 if (iwl_mvm_tid_queued(tid_data))
1303 continue;
1304
1305 if (tid_data->state != IWL_AGG_OFF)
1306 continue;
1307
1308 available_tids |= BIT(tid);
1309 }
1310 spin_unlock_bh(&mvmsta->lock);
1311
1312 /*
1313 * disallow protocol offloading if we have no available tid
1314 * (with no pending frames and no active aggregation,
1315 * as we don't handle "holes" properly - the scheduler needs the
1316 * frame's seq number and TFD index to match)
1317 */
1318 if (!available_tids)
1319 return true;
1320
1321 /* for simplicity, just use the first available tid */
1322 iter_data->offloading_tid = ffs(available_tids) - 1;
1323 return false;
1324}
1325
d6230972
EP
1326static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac,
1327 struct ieee80211_vif *vif)
1328{
37577fe2
EP
1329 struct iwl_d0i3_iter_data *data = _data;
1330 struct iwl_mvm *mvm = data->mvm;
1331 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
d6230972
EP
1332 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
1333
1334 IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr);
1335 if (vif->type != NL80211_IFTYPE_STATION ||
1336 !vif->bss_conf.assoc)
1337 return;
1338
b2492501
AN
1339 /*
1340 * in case of pending tx packets or active aggregations,
1341 * avoid offloading features in order to prevent reuse of
1342 * the same qos seq counters.
1343 */
1344 if (iwl_mvm_disallow_offloading(mvm, vif, data))
1345 data->disable_offloading = true;
1346
d6230972 1347 iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags);
c97dab40
SS
1348 iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading,
1349 false, flags);
d6230972
EP
1350
1351 /*
1352 * on init/association, mvm already configures POWER_TABLE_CMD
1353 * and REPLY_MCAST_FILTER_CMD, so currently don't
1354 * reconfigure them (we might want to use different
1355 * params later on, though).
1356 */
37577fe2
EP
1357 data->ap_sta_id = mvmvif->ap_sta_id;
1358 data->vif_count++;
a3f7ba5c
EP
1359
1360 /*
1361 * no new commands can be sent at this stage, so it's safe
1362 * to save the vif pointer during d0i3 entrance.
1363 */
1364 data->connected_vif = vif;
d6230972
EP
1365}
1366
1a95c8df 1367static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm,
c8b06a99 1368 struct iwl_wowlan_config_cmd *cmd,
1a95c8df
EP
1369 struct iwl_d0i3_iter_data *iter_data)
1370{
1371 struct ieee80211_sta *ap_sta;
1372 struct iwl_mvm_sta *mvm_ap_sta;
1373
0ae98812 1374 if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA)
1a95c8df
EP
1375 return;
1376
1377 rcu_read_lock();
1378
1379 ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]);
1380 if (IS_ERR_OR_NULL(ap_sta))
1381 goto out;
1382
1383 mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta);
c8b06a99 1384 cmd->is_11n_connection = ap_sta->ht_cap.ht_supported;
b2492501 1385 cmd->offloading_tid = iter_data->offloading_tid;
70b4c536 1386 cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING |
0db056d3 1387 ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON;
1a95c8df
EP
1388 /*
1389 * The d0i3 uCode takes care of the nonqos counters,
1390 * so configure only the qos seq ones.
1391 */
c8b06a99 1392 iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd);
1a95c8df
EP
1393out:
1394 rcu_read_unlock();
1395}
6735943f
EP
1396
1397int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode)
b3370d47
EP
1398{
1399 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
98ee7783 1400 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
b77f06d9 1401 int ret;
37577fe2
EP
1402 struct iwl_d0i3_iter_data d0i3_iter_data = {
1403 .mvm = mvm,
1404 };
c8b06a99
EG
1405 struct iwl_wowlan_config_cmd wowlan_config_cmd = {
1406 .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME |
1407 IWL_WOWLAN_WAKEUP_BEACON_MISS |
0db056d3 1408 IWL_WOWLAN_WAKEUP_LINK_CHANGE),
b77f06d9 1409 };
98ee7783
AN
1410 struct iwl_d3_manager_config d3_cfg_cmd = {
1411 .min_sleep_time = cpu_to_le32(1000),
d9f1fc20 1412 .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR),
98ee7783 1413 };
b3370d47
EP
1414
1415 IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n");
98ee7783 1416
08f0d23d
EP
1417 if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR))
1418 return -EINVAL;
1419
b2492501 1420 set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
b2492501 1421
f4cf8680
EP
1422 /*
1423 * iwl_mvm_ref_sync takes a reference before checking the flag.
1424 * so by checking there is no held reference we prevent a state
1425 * in which iwl_mvm_ref_sync continues successfully while we
1426 * configure the firmware to enter d0i3
1427 */
1428 if (iwl_mvm_ref_taken(mvm)) {
1429 IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n");
1430 clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
caf1578a 1431 wake_up(&mvm->d0i3_exit_waitq);
f4cf8680
EP
1432 return 1;
1433 }
1434
d6230972
EP
1435 ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1436 IEEE80211_IFACE_ITER_NORMAL,
1437 iwl_mvm_enter_d0i3_iterator,
37577fe2
EP
1438 &d0i3_iter_data);
1439 if (d0i3_iter_data.vif_count == 1) {
1440 mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id;
b2492501 1441 mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading;
37577fe2
EP
1442 } else {
1443 WARN_ON_ONCE(d0i3_iter_data.vif_count > 1);
0ae98812 1444 mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
b2492501 1445 mvm->d0i3_offloading = false;
37577fe2 1446 }
d6230972 1447
ecc7c518
EG
1448 /* make sure we have no running tx while configuring the seqno */
1449 synchronize_net();
1450
eb3908d3
LC
1451 /* Flush the hw queues, in case something got queued during entry */
1452 ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), flags);
1453 if (ret)
1454 return ret;
1455
183edd84 1456 /* configure wowlan configuration only if needed */
0ae98812 1457 if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) {
0db056d3
SS
1458 /* wake on beacons only if beacon storing isn't supported */
1459 if (!fw_has_capa(&mvm->fw->ucode_capa,
1460 IWL_UCODE_TLV_CAPA_BEACON_STORING))
1461 wowlan_config_cmd.wakeup_filter |=
1462 cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING);
1463
a3f7ba5c
EP
1464 iwl_mvm_wowlan_config_key_params(mvm,
1465 d0i3_iter_data.connected_vif,
1466 true, flags);
1467
183edd84
EP
1468 iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd,
1469 &d0i3_iter_data);
1470
1471 ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags,
1472 sizeof(wowlan_config_cmd),
1473 &wowlan_config_cmd);
1474 if (ret)
1475 return ret;
1476 }
b77f06d9 1477
98ee7783
AN
1478 return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD,
1479 flags | CMD_MAKE_TRANS_IDLE,
1480 sizeof(d3_cfg_cmd), &d3_cfg_cmd);
b3370d47
EP
1481}
1482
d6230972
EP
1483static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac,
1484 struct ieee80211_vif *vif)
1485{
1486 struct iwl_mvm *mvm = _data;
1487 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO;
1488
1489 IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr);
1490 if (vif->type != NL80211_IFTYPE_STATION ||
1491 !vif->bss_conf.assoc)
1492 return;
1493
1494 iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags);
1495}
1496
a3f7ba5c 1497struct iwl_mvm_d0i3_exit_work_iter_data {
b3df2247 1498 struct iwl_mvm *mvm;
a3f7ba5c 1499 struct iwl_wowlan_status *status;
b3df2247
DS
1500 u32 wakeup_reasons;
1501};
1502
a3f7ba5c
EP
1503static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac,
1504 struct ieee80211_vif *vif)
37577fe2 1505{
a3f7ba5c 1506 struct iwl_mvm_d0i3_exit_work_iter_data *data = _data;
37577fe2 1507 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
a3f7ba5c 1508 u32 reasons = data->wakeup_reasons;
37577fe2 1509
a3f7ba5c
EP
1510 /* consider only the relevant station interface */
1511 if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc ||
1512 data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id)
1513 return;
1514
1515 if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH)
1516 iwl_mvm_connection_loss(data->mvm, vif, "D0i3");
1517 else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON)
1518 ieee80211_beacon_loss(vif);
1519 else
1520 iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status);
37577fe2
EP
1521}
1522
b2492501
AN
1523void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq)
1524{
1525 struct ieee80211_sta *sta = NULL;
1526 struct iwl_mvm_sta *mvm_ap_sta;
1527 int i;
1528 bool wake_queues = false;
1529
1530 lockdep_assert_held(&mvm->mutex);
1531
1532 spin_lock_bh(&mvm->d0i3_tx_lock);
1533
0ae98812 1534 if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA)
b2492501
AN
1535 goto out;
1536
1537 IWL_DEBUG_RPM(mvm, "re-enqueue packets\n");
1538
1539 /* get the sta in order to update seq numbers and re-enqueue skbs */
1540 sta = rcu_dereference_protected(
1541 mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id],
1542 lockdep_is_held(&mvm->mutex));
1543
1544 if (IS_ERR_OR_NULL(sta)) {
1545 sta = NULL;
1546 goto out;
1547 }
1548
1549 if (mvm->d0i3_offloading && qos_seq) {
1550 /* update qos seq numbers if offloading was enabled */
9d8ce6af 1551 mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta);
b2492501
AN
1552 for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
1553 u16 seq = le16_to_cpu(qos_seq[i]);
1554 /* firmware stores last-used one, we store next one */
1555 seq += 0x10;
1556 mvm_ap_sta->tid_data[i].seq_number = seq;
1557 }
1558 }
1559out:
1560 /* re-enqueue (or drop) all packets */
1561 while (!skb_queue_empty(&mvm->d0i3_tx)) {
1562 struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx);
1563
1564 if (!sta || iwl_mvm_tx_skb(mvm, skb, sta))
1565 ieee80211_free_txskb(mvm->hw, skb);
1566
1567 /* if the skb_queue is not empty, we need to wake queues */
1568 wake_queues = true;
1569 }
1570 clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
1571 wake_up(&mvm->d0i3_exit_waitq);
0ae98812 1572 mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
b2492501
AN
1573 if (wake_queues)
1574 ieee80211_wake_queues(mvm->hw);
1575
1576 spin_unlock_bh(&mvm->d0i3_tx_lock);
1577}
1578
37577fe2
EP
1579static void iwl_mvm_d0i3_exit_work(struct work_struct *wk)
1580{
1581 struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work);
1582 struct iwl_host_cmd get_status_cmd = {
1583 .id = WOWLAN_GET_STATUSES,
a1022927 1584 .flags = CMD_HIGH_PRIO | CMD_WANT_SKB,
37577fe2 1585 };
a3f7ba5c
EP
1586 struct iwl_mvm_d0i3_exit_work_iter_data iter_data = {
1587 .mvm = mvm,
1588 };
1589
3afec639 1590 struct iwl_wowlan_status *status;
37577fe2 1591 int ret;
a3f7ba5c 1592 u32 wakeup_reasons = 0;
b2492501 1593 __le16 *qos_seq = NULL;
37577fe2
EP
1594
1595 mutex_lock(&mvm->mutex);
1596 ret = iwl_mvm_send_cmd(mvm, &get_status_cmd);
1597 if (ret)
1598 goto out;
1599
1600 if (!get_status_cmd.resp_pkt)
1601 goto out;
1602
1603 status = (void *)get_status_cmd.resp_pkt->data;
1604 wakeup_reasons = le32_to_cpu(status->wakeup_reasons);
b2492501 1605 qos_seq = status->qos_seq_ctr;
37577fe2
EP
1606
1607 IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons);
1608
a3f7ba5c
EP
1609 iter_data.wakeup_reasons = wakeup_reasons;
1610 iter_data.status = status;
1611 ieee80211_iterate_active_interfaces(mvm->hw,
1612 IEEE80211_IFACE_ITER_NORMAL,
1613 iwl_mvm_d0i3_exit_work_iter,
1614 &iter_data);
37577fe2 1615out:
b2492501 1616 iwl_mvm_d0i3_enable_tx(mvm, qos_seq);
47c8b154 1617
7c014e35
EP
1618 IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n",
1619 wakeup_reasons);
1620
e5629be7
EP
1621 /* qos_seq might point inside resp_pkt, so free it only now */
1622 if (get_status_cmd.resp_pkt)
1623 iwl_free_resp(&get_status_cmd);
1624
47c8b154
JD
1625 /* the FW might have updated the regdomain */
1626 iwl_mvm_update_changed_regdom(mvm);
1627
d15a747f 1628 iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK);
37577fe2
EP
1629 mutex_unlock(&mvm->mutex);
1630}
1631
d15a747f 1632int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm)
b3370d47 1633{
98ee7783
AN
1634 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE |
1635 CMD_WAKE_UP_TRANS;
d6230972 1636 int ret;
b3370d47
EP
1637
1638 IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n");
98ee7783 1639
08f0d23d
EP
1640 if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR))
1641 return -EINVAL;
1642
d15a747f
EP
1643 mutex_lock(&mvm->d0i3_suspend_mutex);
1644 if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) {
1645 IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n");
1646 __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags);
1647 mutex_unlock(&mvm->d0i3_suspend_mutex);
1648 return 0;
1649 }
1650 mutex_unlock(&mvm->d0i3_suspend_mutex);
1651
d6230972
EP
1652 ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL);
1653 if (ret)
37577fe2 1654 goto out;
d6230972
EP
1655
1656 ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1657 IEEE80211_IFACE_ITER_NORMAL,
1658 iwl_mvm_exit_d0i3_iterator,
1659 mvm);
37577fe2
EP
1660out:
1661 schedule_work(&mvm->d0i3_exit_work);
1662 return ret;
b3370d47
EP
1663}
1664
6735943f 1665int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode)
d15a747f
EP
1666{
1667 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1668
1669 iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK);
1670 return _iwl_mvm_exit_d0i3(mvm);
1671}
1672
0316d30e
JB
1673#define IWL_MVM_COMMON_OPS \
1674 /* these could be differentiated */ \
156f92f2 1675 .async_cb = iwl_mvm_async_cb, \
0316d30e
JB
1676 .queue_full = iwl_mvm_stop_sw_queue, \
1677 .queue_not_full = iwl_mvm_wake_sw_queue, \
1678 .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \
1679 .free_skb = iwl_mvm_free_skb, \
1680 .nic_error = iwl_mvm_nic_error, \
1681 .cmd_queue_full = iwl_mvm_cmd_queue_full, \
1682 .nic_config = iwl_mvm_nic_config, \
1683 .enter_d0i3 = iwl_mvm_enter_d0i3, \
1684 .exit_d0i3 = iwl_mvm_exit_d0i3, \
1685 /* as we only register one, these MUST be common! */ \
1686 .start = iwl_op_mode_mvm_start, \
1687 .stop = iwl_op_mode_mvm_stop
1688
8ca151b5 1689static const struct iwl_op_mode_ops iwl_mvm_ops = {
0316d30e
JB
1690 IWL_MVM_COMMON_OPS,
1691 .rx = iwl_mvm_rx,
1692};
1693
1694static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode,
1695 struct napi_struct *napi,
1696 struct iwl_rx_cmd_buffer *rxb,
1697 unsigned int queue)
1698{
1699 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
585a6fcc 1700 struct iwl_rx_packet *pkt = rxb_addr(rxb);
61b0f5d7 1701 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 1702
61b0f5d7 1703 if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)))
a338384b 1704 iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);
61b0f5d7
JB
1705 else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1706 RX_QUEUES_NOTIFICATION)))
94bb4481 1707 iwl_mvm_rx_queue_notif(mvm, rxb, queue);
61b0f5d7 1708 else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
585a6fcc 1709 iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);
0316d30e
JB
1710}
1711
1712static const struct iwl_op_mode_ops iwl_mvm_ops_mq = {
1713 IWL_MVM_COMMON_OPS,
1714 .rx = iwl_mvm_rx_mq,
1715 .rx_rss = iwl_mvm_rx_mq_rss,
8ca151b5 1716};