Commit | Line | Data |
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bdcd8170 KV |
1 | |
2 | /* | |
3 | * Copyright (c) 2011 Atheros Communications Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
c6efe578 | 18 | #include <linux/moduleparam.h> |
f7830202 | 19 | #include <linux/errno.h> |
92ecbff4 | 20 | #include <linux/of.h> |
bdcd8170 KV |
21 | #include <linux/mmc/sdio_func.h> |
22 | #include "core.h" | |
23 | #include "cfg80211.h" | |
24 | #include "target.h" | |
25 | #include "debug.h" | |
26 | #include "hif-ops.h" | |
27 | ||
28 | unsigned int debug_mask; | |
003353b0 | 29 | static unsigned int testmode; |
8277de15 | 30 | static bool suspend_cutpower; |
bdcd8170 KV |
31 | |
32 | module_param(debug_mask, uint, 0644); | |
003353b0 | 33 | module_param(testmode, uint, 0644); |
8277de15 | 34 | module_param(suspend_cutpower, bool, 0444); |
bdcd8170 | 35 | |
856f4b31 KV |
36 | static const struct ath6kl_hw hw_list[] = { |
37 | { | |
0d0192ba | 38 | .id = AR6003_HW_2_0_VERSION, |
293badf4 | 39 | .name = "ar6003 hw 2.0", |
856f4b31 KV |
40 | .dataset_patch_addr = 0x57e884, |
41 | .app_load_addr = 0x543180, | |
42 | .board_ext_data_addr = 0x57e500, | |
43 | .reserved_ram_size = 6912, | |
39586bf2 RH |
44 | .refclk_hz = 26000000, |
45 | .uarttx_pin = 8, | |
856f4b31 KV |
46 | |
47 | /* hw2.0 needs override address hardcoded */ | |
48 | .app_start_override_addr = 0x944C00, | |
d1a9421d KV |
49 | |
50 | .fw_otp = AR6003_HW_2_0_OTP_FILE, | |
51 | .fw = AR6003_HW_2_0_FIRMWARE_FILE, | |
52 | .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, | |
53 | .fw_patch = AR6003_HW_2_0_PATCH_FILE, | |
54 | .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE, | |
55 | .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, | |
56 | .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
57 | }, |
58 | { | |
0d0192ba | 59 | .id = AR6003_HW_2_1_1_VERSION, |
293badf4 | 60 | .name = "ar6003 hw 2.1.1", |
856f4b31 KV |
61 | .dataset_patch_addr = 0x57ff74, |
62 | .app_load_addr = 0x1234, | |
63 | .board_ext_data_addr = 0x542330, | |
64 | .reserved_ram_size = 512, | |
39586bf2 RH |
65 | .refclk_hz = 26000000, |
66 | .uarttx_pin = 8, | |
d1a9421d KV |
67 | |
68 | .fw_otp = AR6003_HW_2_1_1_OTP_FILE, | |
69 | .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, | |
70 | .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, | |
71 | .fw_patch = AR6003_HW_2_1_1_PATCH_FILE, | |
72 | .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE, | |
73 | .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, | |
74 | .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
75 | }, |
76 | { | |
0d0192ba | 77 | .id = AR6004_HW_1_0_VERSION, |
293badf4 | 78 | .name = "ar6004 hw 1.0", |
856f4b31 KV |
79 | .dataset_patch_addr = 0x57e884, |
80 | .app_load_addr = 0x1234, | |
81 | .board_ext_data_addr = 0x437000, | |
82 | .reserved_ram_size = 19456, | |
0d4d72bf | 83 | .board_addr = 0x433900, |
39586bf2 RH |
84 | .refclk_hz = 26000000, |
85 | .uarttx_pin = 11, | |
d1a9421d KV |
86 | |
87 | .fw = AR6004_HW_1_0_FIRMWARE_FILE, | |
88 | .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE, | |
89 | .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, | |
90 | .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
91 | }, |
92 | { | |
0d0192ba | 93 | .id = AR6004_HW_1_1_VERSION, |
293badf4 | 94 | .name = "ar6004 hw 1.1", |
856f4b31 KV |
95 | .dataset_patch_addr = 0x57e884, |
96 | .app_load_addr = 0x1234, | |
97 | .board_ext_data_addr = 0x437000, | |
98 | .reserved_ram_size = 11264, | |
0d4d72bf | 99 | .board_addr = 0x43d400, |
39586bf2 RH |
100 | .refclk_hz = 40000000, |
101 | .uarttx_pin = 11, | |
d1a9421d KV |
102 | |
103 | .fw = AR6004_HW_1_1_FIRMWARE_FILE, | |
104 | .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE, | |
105 | .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, | |
106 | .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
107 | }, |
108 | }; | |
109 | ||
bdcd8170 KV |
110 | /* |
111 | * Include definitions here that can be used to tune the WLAN module | |
112 | * behavior. Different customers can tune the behavior as per their needs, | |
113 | * here. | |
114 | */ | |
115 | ||
116 | /* | |
117 | * This configuration item enable/disable keepalive support. | |
118 | * Keepalive support: In the absence of any data traffic to AP, null | |
119 | * frames will be sent to the AP at periodic interval, to keep the association | |
120 | * active. This configuration item defines the periodic interval. | |
121 | * Use value of zero to disable keepalive support | |
122 | * Default: 60 seconds | |
123 | */ | |
124 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | |
125 | ||
126 | /* | |
127 | * This configuration item sets the value of disconnect timeout | |
128 | * Firmware delays sending the disconnec event to the host for this | |
129 | * timeout after is gets disconnected from the current AP. | |
130 | * If the firmware successly roams within the disconnect timeout | |
131 | * it sends a new connect event | |
132 | */ | |
133 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | |
134 | ||
bdcd8170 | 135 | |
bdcd8170 KV |
136 | #define ATH6KL_DATA_OFFSET 64 |
137 | struct sk_buff *ath6kl_buf_alloc(int size) | |
138 | { | |
139 | struct sk_buff *skb; | |
140 | u16 reserved; | |
141 | ||
142 | /* Add chacheline space at front and back of buffer */ | |
143 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | |
1df94a85 | 144 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
bdcd8170 KV |
145 | skb = dev_alloc_skb(size + reserved); |
146 | ||
147 | if (skb) | |
148 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | |
149 | return skb; | |
150 | } | |
151 | ||
e29f25f5 | 152 | void ath6kl_init_profile_info(struct ath6kl_vif *vif) |
bdcd8170 | 153 | { |
3450334f VT |
154 | vif->ssid_len = 0; |
155 | memset(vif->ssid, 0, sizeof(vif->ssid)); | |
156 | ||
157 | vif->dot11_auth_mode = OPEN_AUTH; | |
158 | vif->auth_mode = NONE_AUTH; | |
159 | vif->prwise_crypto = NONE_CRYPT; | |
160 | vif->prwise_crypto_len = 0; | |
161 | vif->grp_crypto = NONE_CRYPT; | |
162 | vif->grp_crypto_len = 0; | |
6f2a73f9 | 163 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
8c8b65e3 VT |
164 | memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); |
165 | memset(vif->bssid, 0, sizeof(vif->bssid)); | |
f74bac54 | 166 | vif->bss_ch = 0; |
bdcd8170 KV |
167 | } |
168 | ||
bdcd8170 KV |
169 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
170 | { | |
171 | u32 address, data; | |
172 | struct host_app_area host_app_area; | |
173 | ||
174 | /* Fetch the address of the host_app_area_s | |
175 | * instance in the host interest area */ | |
176 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | |
31024d99 | 177 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 | 178 | |
addb44be | 179 | if (ath6kl_diag_read32(ar, address, &data)) |
bdcd8170 KV |
180 | return -EIO; |
181 | ||
31024d99 | 182 | address = TARG_VTOP(ar->target_type, data); |
cbf49a6f | 183 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
addb44be KV |
184 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
185 | sizeof(struct host_app_area))) | |
bdcd8170 KV |
186 | return -EIO; |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | static inline void set_ac2_ep_map(struct ath6kl *ar, | |
192 | u8 ac, | |
193 | enum htc_endpoint_id ep) | |
194 | { | |
195 | ar->ac2ep_map[ac] = ep; | |
196 | ar->ep2ac_map[ep] = ac; | |
197 | } | |
198 | ||
199 | /* connect to a service */ | |
200 | static int ath6kl_connectservice(struct ath6kl *ar, | |
201 | struct htc_service_connect_req *con_req, | |
202 | char *desc) | |
203 | { | |
204 | int status; | |
205 | struct htc_service_connect_resp response; | |
206 | ||
207 | memset(&response, 0, sizeof(response)); | |
208 | ||
ad226ec2 | 209 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
bdcd8170 KV |
210 | if (status) { |
211 | ath6kl_err("failed to connect to %s service status:%d\n", | |
212 | desc, status); | |
213 | return status; | |
214 | } | |
215 | ||
216 | switch (con_req->svc_id) { | |
217 | case WMI_CONTROL_SVC: | |
218 | if (test_bit(WMI_ENABLED, &ar->flag)) | |
219 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | |
220 | ar->ctrl_ep = response.endpoint; | |
221 | break; | |
222 | case WMI_DATA_BE_SVC: | |
223 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | |
224 | break; | |
225 | case WMI_DATA_BK_SVC: | |
226 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | |
227 | break; | |
228 | case WMI_DATA_VI_SVC: | |
229 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | |
230 | break; | |
231 | case WMI_DATA_VO_SVC: | |
232 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | |
233 | break; | |
234 | default: | |
235 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | |
236 | return -EINVAL; | |
237 | } | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
242 | static int ath6kl_init_service_ep(struct ath6kl *ar) | |
243 | { | |
244 | struct htc_service_connect_req connect; | |
245 | ||
246 | memset(&connect, 0, sizeof(connect)); | |
247 | ||
248 | /* these fields are the same for all service endpoints */ | |
249 | connect.ep_cb.rx = ath6kl_rx; | |
250 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | |
251 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | |
252 | ||
253 | /* | |
254 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | |
255 | * gets called. | |
256 | */ | |
257 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | |
258 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | |
259 | if (!connect.ep_cb.rx_refill_thresh) | |
260 | connect.ep_cb.rx_refill_thresh++; | |
261 | ||
262 | /* connect to control service */ | |
263 | connect.svc_id = WMI_CONTROL_SVC; | |
264 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | |
265 | return -EIO; | |
266 | ||
267 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | |
268 | ||
269 | /* | |
270 | * Limit the HTC message size on the send path, although e can | |
271 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | |
272 | * (802.3) frames on the send path. | |
273 | */ | |
274 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | |
275 | ||
276 | /* | |
277 | * To reduce the amount of committed memory for larger A_MSDU | |
278 | * frames, use the recv-alloc threshold mechanism for larger | |
279 | * packets. | |
280 | */ | |
281 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | |
282 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | |
283 | ||
284 | /* | |
285 | * For the remaining data services set the connection flag to | |
286 | * reduce dribbling, if configured to do so. | |
287 | */ | |
288 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | |
289 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | |
290 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | |
291 | ||
292 | connect.svc_id = WMI_DATA_BE_SVC; | |
293 | ||
294 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | |
295 | return -EIO; | |
296 | ||
297 | /* connect to back-ground map this to WMI LOW_PRI */ | |
298 | connect.svc_id = WMI_DATA_BK_SVC; | |
299 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | |
300 | return -EIO; | |
301 | ||
302 | /* connect to Video service, map this to to HI PRI */ | |
303 | connect.svc_id = WMI_DATA_VI_SVC; | |
304 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | |
305 | return -EIO; | |
306 | ||
307 | /* | |
308 | * Connect to VO service, this is currently not mapped to a WMI | |
309 | * priority stream due to historical reasons. WMI originally | |
310 | * defined 3 priorities over 3 mailboxes We can change this when | |
311 | * WMI is reworked so that priorities are not dependent on | |
312 | * mailboxes. | |
313 | */ | |
314 | connect.svc_id = WMI_DATA_VO_SVC; | |
315 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | |
316 | return -EIO; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
e29f25f5 | 321 | void ath6kl_init_control_info(struct ath6kl_vif *vif) |
bdcd8170 | 322 | { |
e29f25f5 | 323 | ath6kl_init_profile_info(vif); |
3450334f | 324 | vif->def_txkey_index = 0; |
6f2a73f9 | 325 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
f74bac54 | 326 | vif->ch_hint = 0; |
bdcd8170 KV |
327 | } |
328 | ||
329 | /* | |
330 | * Set HTC/Mbox operational parameters, this can only be called when the | |
331 | * target is in the BMI phase. | |
332 | */ | |
333 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |
334 | u8 htc_ctrl_buf) | |
335 | { | |
336 | int status; | |
337 | u32 blk_size; | |
338 | ||
339 | blk_size = ar->mbox_info.block_size; | |
340 | ||
341 | if (htc_ctrl_buf) | |
342 | blk_size |= ((u32)htc_ctrl_buf) << 16; | |
343 | ||
344 | /* set the host interest area for the block size */ | |
345 | status = ath6kl_bmi_write(ar, | |
346 | ath6kl_get_hi_item_addr(ar, | |
347 | HI_ITEM(hi_mbox_io_block_sz)), | |
348 | (u8 *)&blk_size, | |
349 | 4); | |
350 | if (status) { | |
351 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | |
352 | goto out; | |
353 | } | |
354 | ||
355 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | |
356 | blk_size, | |
357 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | |
358 | ||
359 | if (mbox_isr_yield_val) { | |
360 | /* set the host interest area for the mbox ISR yield limit */ | |
361 | status = ath6kl_bmi_write(ar, | |
362 | ath6kl_get_hi_item_addr(ar, | |
363 | HI_ITEM(hi_mbox_isr_yield_limit)), | |
364 | (u8 *)&mbox_isr_yield_val, | |
365 | 4); | |
366 | if (status) { | |
367 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | |
368 | goto out; | |
369 | } | |
370 | } | |
371 | ||
372 | out: | |
373 | return status; | |
374 | } | |
375 | ||
0ce59445 | 376 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) |
bdcd8170 KV |
377 | { |
378 | int status = 0; | |
4dea08e0 | 379 | int ret; |
bdcd8170 KV |
380 | |
381 | /* | |
382 | * Configure the device for rx dot11 header rules. "0,0" are the | |
383 | * default values. Required if checksum offload is needed. Set | |
384 | * RxMetaVersion to 2. | |
385 | */ | |
0ce59445 | 386 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, |
bdcd8170 KV |
387 | ar->rx_meta_ver, 0, 0)) { |
388 | ath6kl_err("unable to set the rx frame format\n"); | |
389 | status = -EIO; | |
390 | } | |
391 | ||
392 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | |
0ce59445 | 393 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, |
bdcd8170 KV |
394 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { |
395 | ath6kl_err("unable to set power save fail event policy\n"); | |
396 | status = -EIO; | |
397 | } | |
398 | ||
399 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | |
0ce59445 | 400 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, |
bdcd8170 KV |
401 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { |
402 | ath6kl_err("unable to set barker preamble policy\n"); | |
403 | status = -EIO; | |
404 | } | |
405 | ||
0ce59445 | 406 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, |
bdcd8170 KV |
407 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { |
408 | ath6kl_err("unable to set keep alive interval\n"); | |
409 | status = -EIO; | |
410 | } | |
411 | ||
0ce59445 | 412 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, |
bdcd8170 KV |
413 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { |
414 | ath6kl_err("unable to set disconnect timeout\n"); | |
415 | status = -EIO; | |
416 | } | |
417 | ||
418 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | |
0ce59445 | 419 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { |
bdcd8170 KV |
420 | ath6kl_err("unable to set txop bursting\n"); |
421 | status = -EIO; | |
422 | } | |
423 | ||
b64de356 | 424 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
0ce59445 | 425 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, |
6bbc7c35 JM |
426 | P2P_FLAG_CAPABILITIES_REQ | |
427 | P2P_FLAG_MACADDR_REQ | | |
428 | P2P_FLAG_HMODEL_REQ); | |
429 | if (ret) { | |
430 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " | |
431 | "capabilities (%d) - assuming P2P not " | |
432 | "supported\n", ret); | |
3db1cd5c | 433 | ar->p2p = false; |
6bbc7c35 JM |
434 | } |
435 | } | |
436 | ||
b64de356 | 437 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
6bbc7c35 | 438 | /* Enable Probe Request reporting for P2P */ |
0ce59445 | 439 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); |
6bbc7c35 JM |
440 | if (ret) { |
441 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " | |
442 | "Request reporting (%d)\n", ret); | |
443 | } | |
4dea08e0 JM |
444 | } |
445 | ||
bdcd8170 KV |
446 | return status; |
447 | } | |
448 | ||
449 | int ath6kl_configure_target(struct ath6kl *ar) | |
450 | { | |
451 | u32 param, ram_reserved_size; | |
3226f68a | 452 | u8 fw_iftype, fw_mode = 0, fw_submode = 0; |
39586bf2 | 453 | int i, status; |
bdcd8170 | 454 | |
7b85832d VT |
455 | /* |
456 | * Note: Even though the firmware interface type is | |
457 | * chosen as BSS_STA for all three interfaces, can | |
458 | * be configured to IBSS/AP as long as the fw submode | |
459 | * remains normal mode (0 - AP, STA and IBSS). But | |
460 | * due to an target assert in firmware only one interface is | |
461 | * configured for now. | |
462 | */ | |
dd3751f7 | 463 | fw_iftype = HI_OPTION_FW_MODE_BSS_STA; |
bdcd8170 | 464 | |
71f96ee6 | 465 | for (i = 0; i < ar->vif_max; i++) |
7b85832d VT |
466 | fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); |
467 | ||
468 | /* | |
3226f68a VT |
469 | * By default, submodes : |
470 | * vif[0] - AP/STA/IBSS | |
471 | * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" | |
472 | * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" | |
7b85832d | 473 | */ |
3226f68a VT |
474 | |
475 | for (i = 0; i < ar->max_norm_iface; i++) | |
476 | fw_submode |= HI_OPTION_FW_SUBMODE_NONE << | |
477 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
478 | ||
71f96ee6 | 479 | for (i = ar->max_norm_iface; i < ar->vif_max; i++) |
3226f68a VT |
480 | fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << |
481 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
7b85832d | 482 | |
b64de356 | 483 | if (ar->p2p && ar->vif_max == 1) |
7b85832d | 484 | fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; |
7b85832d | 485 | |
bdcd8170 KV |
486 | param = HTC_PROTOCOL_VERSION; |
487 | if (ath6kl_bmi_write(ar, | |
488 | ath6kl_get_hi_item_addr(ar, | |
489 | HI_ITEM(hi_app_host_interest)), | |
490 | (u8 *)¶m, 4) != 0) { | |
491 | ath6kl_err("bmi_write_memory for htc version failed\n"); | |
492 | return -EIO; | |
493 | } | |
494 | ||
495 | /* set the firmware mode to STA/IBSS/AP */ | |
496 | param = 0; | |
497 | ||
498 | if (ath6kl_bmi_read(ar, | |
499 | ath6kl_get_hi_item_addr(ar, | |
500 | HI_ITEM(hi_option_flag)), | |
501 | (u8 *)¶m, 4) != 0) { | |
502 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | |
503 | return -EIO; | |
504 | } | |
505 | ||
71f96ee6 | 506 | param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); |
7b85832d VT |
507 | param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; |
508 | param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; | |
509 | ||
bdcd8170 KV |
510 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
511 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
512 | ||
513 | if (ath6kl_bmi_write(ar, | |
514 | ath6kl_get_hi_item_addr(ar, | |
515 | HI_ITEM(hi_option_flag)), | |
516 | (u8 *)¶m, | |
517 | 4) != 0) { | |
518 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | |
519 | return -EIO; | |
520 | } | |
521 | ||
522 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | |
523 | ||
524 | /* | |
525 | * Hardcode the address use for the extended board data | |
526 | * Ideally this should be pre-allocate by the OS at boot time | |
527 | * But since it is a new feature and board data is loaded | |
528 | * at init time, we have to workaround this from host. | |
529 | * It is difficult to patch the firmware boot code, | |
530 | * but possible in theory. | |
531 | */ | |
532 | ||
991b27ea KV |
533 | param = ar->hw.board_ext_data_addr; |
534 | ram_reserved_size = ar->hw.reserved_ram_size; | |
bdcd8170 | 535 | |
991b27ea KV |
536 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
537 | HI_ITEM(hi_board_ext_data)), | |
538 | (u8 *)¶m, 4) != 0) { | |
539 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | |
540 | return -EIO; | |
541 | } | |
542 | ||
543 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | |
544 | HI_ITEM(hi_end_ram_reserve_sz)), | |
545 | (u8 *)&ram_reserved_size, 4) != 0) { | |
546 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | |
547 | return -EIO; | |
bdcd8170 KV |
548 | } |
549 | ||
550 | /* set the block size for the target */ | |
551 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | |
552 | /* use default number of control buffers */ | |
553 | return -EIO; | |
554 | ||
39586bf2 RH |
555 | /* Configure GPIO AR600x UART */ |
556 | param = ar->hw.uarttx_pin; | |
557 | status = ath6kl_bmi_write(ar, | |
558 | ath6kl_get_hi_item_addr(ar, | |
559 | HI_ITEM(hi_dbg_uart_txpin)), | |
560 | (u8 *)¶m, 4); | |
561 | if (status) | |
562 | return status; | |
563 | ||
564 | /* Configure target refclk_hz */ | |
565 | param = ar->hw.refclk_hz; | |
566 | status = ath6kl_bmi_write(ar, | |
567 | ath6kl_get_hi_item_addr(ar, | |
568 | HI_ITEM(hi_refclk_hz)), | |
569 | (u8 *)¶m, 4); | |
570 | if (status) | |
571 | return status; | |
572 | ||
bdcd8170 KV |
573 | return 0; |
574 | } | |
575 | ||
8dafb70e | 576 | void ath6kl_core_free(struct ath6kl *ar) |
bdcd8170 | 577 | { |
8dafb70e | 578 | wiphy_free(ar->wiphy); |
bdcd8170 KV |
579 | } |
580 | ||
6db8fa53 | 581 | void ath6kl_core_cleanup(struct ath6kl *ar) |
bdcd8170 | 582 | { |
b2e75698 KV |
583 | ath6kl_hif_power_off(ar); |
584 | ||
6db8fa53 | 585 | destroy_workqueue(ar->ath6kl_wq); |
bdcd8170 | 586 | |
6db8fa53 VT |
587 | if (ar->htc_target) |
588 | ath6kl_htc_cleanup(ar->htc_target); | |
589 | ||
590 | ath6kl_cookie_cleanup(ar); | |
591 | ||
592 | ath6kl_cleanup_amsdu_rxbufs(ar); | |
593 | ||
594 | ath6kl_bmi_cleanup(ar); | |
595 | ||
596 | ath6kl_debug_cleanup(ar); | |
597 | ||
598 | kfree(ar->fw_board); | |
599 | kfree(ar->fw_otp); | |
600 | kfree(ar->fw); | |
601 | kfree(ar->fw_patch); | |
602 | ||
603 | ath6kl_deinit_ieee80211_hw(ar); | |
bdcd8170 KV |
604 | } |
605 | ||
606 | /* firmware upload */ | |
bdcd8170 KV |
607 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
608 | u8 **fw, size_t *fw_len) | |
609 | { | |
610 | const struct firmware *fw_entry; | |
611 | int ret; | |
612 | ||
613 | ret = request_firmware(&fw_entry, filename, ar->dev); | |
614 | if (ret) | |
615 | return ret; | |
616 | ||
617 | *fw_len = fw_entry->size; | |
618 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
619 | ||
620 | if (*fw == NULL) | |
621 | ret = -ENOMEM; | |
622 | ||
623 | release_firmware(fw_entry); | |
624 | ||
625 | return ret; | |
626 | } | |
627 | ||
92ecbff4 SL |
628 | #ifdef CONFIG_OF |
629 | static const char *get_target_ver_dir(const struct ath6kl *ar) | |
630 | { | |
631 | switch (ar->version.target_ver) { | |
0d0192ba | 632 | case AR6003_HW_1_0_VERSION: |
92ecbff4 | 633 | return "ath6k/AR6003/hw1.0"; |
0d0192ba | 634 | case AR6003_HW_2_0_VERSION: |
92ecbff4 | 635 | return "ath6k/AR6003/hw2.0"; |
0d0192ba | 636 | case AR6003_HW_2_1_1_VERSION: |
92ecbff4 SL |
637 | return "ath6k/AR6003/hw2.1.1"; |
638 | } | |
639 | ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, | |
640 | ar->version.target_ver); | |
641 | return NULL; | |
642 | } | |
643 | ||
644 | /* | |
645 | * Check the device tree for a board-id and use it to construct | |
646 | * the pathname to the firmware file. Used (for now) to find a | |
647 | * fallback to the "bdata.bin" file--typically a symlink to the | |
648 | * appropriate board-specific file. | |
649 | */ | |
650 | static bool check_device_tree(struct ath6kl *ar) | |
651 | { | |
652 | static const char *board_id_prop = "atheros,board-id"; | |
653 | struct device_node *node; | |
654 | char board_filename[64]; | |
655 | const char *board_id; | |
656 | int ret; | |
657 | ||
658 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { | |
659 | board_id = of_get_property(node, board_id_prop, NULL); | |
660 | if (board_id == NULL) { | |
661 | ath6kl_warn("No \"%s\" property on %s node.\n", | |
662 | board_id_prop, node->name); | |
663 | continue; | |
664 | } | |
665 | snprintf(board_filename, sizeof(board_filename), | |
666 | "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); | |
667 | ||
668 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, | |
669 | &ar->fw_board_len); | |
670 | if (ret) { | |
671 | ath6kl_err("Failed to get DT board file %s: %d\n", | |
672 | board_filename, ret); | |
673 | continue; | |
674 | } | |
675 | return true; | |
676 | } | |
677 | return false; | |
678 | } | |
679 | #else | |
680 | static bool check_device_tree(struct ath6kl *ar) | |
681 | { | |
682 | return false; | |
683 | } | |
684 | #endif /* CONFIG_OF */ | |
685 | ||
bdcd8170 KV |
686 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
687 | { | |
688 | const char *filename; | |
689 | int ret; | |
690 | ||
772c31ee KV |
691 | if (ar->fw_board != NULL) |
692 | return 0; | |
693 | ||
d1a9421d KV |
694 | if (WARN_ON(ar->hw.fw_board == NULL)) |
695 | return -EINVAL; | |
696 | ||
697 | filename = ar->hw.fw_board; | |
bdcd8170 KV |
698 | |
699 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
700 | &ar->fw_board_len); | |
701 | if (ret == 0) { | |
702 | /* managed to get proper board file */ | |
703 | return 0; | |
704 | } | |
705 | ||
92ecbff4 SL |
706 | if (check_device_tree(ar)) { |
707 | /* got board file from device tree */ | |
708 | return 0; | |
709 | } | |
710 | ||
bdcd8170 KV |
711 | /* there was no proper board file, try to use default instead */ |
712 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | |
713 | filename, ret); | |
714 | ||
d1a9421d | 715 | filename = ar->hw.fw_default_board; |
bdcd8170 KV |
716 | |
717 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
718 | &ar->fw_board_len); | |
719 | if (ret) { | |
720 | ath6kl_err("Failed to get default board file %s: %d\n", | |
721 | filename, ret); | |
722 | return ret; | |
723 | } | |
724 | ||
725 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | |
726 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | |
727 | ||
728 | return 0; | |
729 | } | |
730 | ||
772c31ee KV |
731 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
732 | { | |
733 | const char *filename; | |
734 | int ret; | |
735 | ||
736 | if (ar->fw_otp != NULL) | |
737 | return 0; | |
738 | ||
d1a9421d KV |
739 | if (ar->hw.fw_otp == NULL) { |
740 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
741 | "no OTP file configured for this hw\n"); | |
772c31ee | 742 | return 0; |
772c31ee KV |
743 | } |
744 | ||
d1a9421d KV |
745 | filename = ar->hw.fw_otp; |
746 | ||
772c31ee KV |
747 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, |
748 | &ar->fw_otp_len); | |
749 | if (ret) { | |
750 | ath6kl_err("Failed to get OTP file %s: %d\n", | |
751 | filename, ret); | |
752 | return ret; | |
753 | } | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
758 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) | |
759 | { | |
760 | const char *filename; | |
761 | int ret; | |
762 | ||
763 | if (ar->fw != NULL) | |
764 | return 0; | |
765 | ||
766 | if (testmode) { | |
d1a9421d KV |
767 | if (ar->hw.fw_tcmd == NULL) { |
768 | ath6kl_warn("testmode not supported\n"); | |
772c31ee | 769 | return -EOPNOTSUPP; |
772c31ee KV |
770 | } |
771 | ||
d1a9421d KV |
772 | filename = ar->hw.fw_tcmd; |
773 | ||
772c31ee KV |
774 | set_bit(TESTMODE, &ar->flag); |
775 | ||
776 | goto get_fw; | |
777 | } | |
778 | ||
d1a9421d KV |
779 | if (WARN_ON(ar->hw.fw == NULL)) |
780 | return -EINVAL; | |
781 | ||
782 | filename = ar->hw.fw; | |
772c31ee KV |
783 | |
784 | get_fw: | |
785 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | |
786 | if (ret) { | |
787 | ath6kl_err("Failed to get firmware file %s: %d\n", | |
788 | filename, ret); | |
789 | return ret; | |
790 | } | |
791 | ||
792 | return 0; | |
793 | } | |
794 | ||
795 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) | |
796 | { | |
797 | const char *filename; | |
798 | int ret; | |
799 | ||
d1a9421d | 800 | if (ar->fw_patch != NULL) |
772c31ee | 801 | return 0; |
772c31ee | 802 | |
d1a9421d KV |
803 | if (ar->hw.fw_patch == NULL) |
804 | return 0; | |
805 | ||
806 | filename = ar->hw.fw_patch; | |
807 | ||
808 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | |
809 | &ar->fw_patch_len); | |
810 | if (ret) { | |
811 | ath6kl_err("Failed to get patch file %s: %d\n", | |
812 | filename, ret); | |
813 | return ret; | |
772c31ee KV |
814 | } |
815 | ||
816 | return 0; | |
817 | } | |
818 | ||
50d41234 | 819 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
772c31ee KV |
820 | { |
821 | int ret; | |
822 | ||
772c31ee KV |
823 | ret = ath6kl_fetch_otp_file(ar); |
824 | if (ret) | |
825 | return ret; | |
826 | ||
827 | ret = ath6kl_fetch_fw_file(ar); | |
828 | if (ret) | |
829 | return ret; | |
830 | ||
831 | ret = ath6kl_fetch_patch_file(ar); | |
832 | if (ret) | |
833 | return ret; | |
834 | ||
835 | return 0; | |
836 | } | |
bdcd8170 | 837 | |
50d41234 KV |
838 | static int ath6kl_fetch_fw_api2(struct ath6kl *ar) |
839 | { | |
840 | size_t magic_len, len, ie_len; | |
841 | const struct firmware *fw; | |
842 | struct ath6kl_fw_ie *hdr; | |
843 | const char *filename; | |
844 | const u8 *data; | |
97e0496d | 845 | int ret, ie_id, i, index, bit; |
8a137480 | 846 | __le32 *val; |
50d41234 | 847 | |
d1a9421d | 848 | if (ar->hw.fw_api2 == NULL) |
50d41234 | 849 | return -EOPNOTSUPP; |
d1a9421d KV |
850 | |
851 | filename = ar->hw.fw_api2; | |
50d41234 KV |
852 | |
853 | ret = request_firmware(&fw, filename, ar->dev); | |
854 | if (ret) | |
855 | return ret; | |
856 | ||
857 | data = fw->data; | |
858 | len = fw->size; | |
859 | ||
860 | /* magic also includes the null byte, check that as well */ | |
861 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; | |
862 | ||
863 | if (len < magic_len) { | |
864 | ret = -EINVAL; | |
865 | goto out; | |
866 | } | |
867 | ||
868 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { | |
869 | ret = -EINVAL; | |
870 | goto out; | |
871 | } | |
872 | ||
873 | len -= magic_len; | |
874 | data += magic_len; | |
875 | ||
876 | /* loop elements */ | |
877 | while (len > sizeof(struct ath6kl_fw_ie)) { | |
878 | /* hdr is unaligned! */ | |
879 | hdr = (struct ath6kl_fw_ie *) data; | |
880 | ||
881 | ie_id = le32_to_cpup(&hdr->id); | |
882 | ie_len = le32_to_cpup(&hdr->len); | |
883 | ||
884 | len -= sizeof(*hdr); | |
885 | data += sizeof(*hdr); | |
886 | ||
887 | if (len < ie_len) { | |
888 | ret = -EINVAL; | |
889 | goto out; | |
890 | } | |
891 | ||
892 | switch (ie_id) { | |
893 | case ATH6KL_FW_IE_OTP_IMAGE: | |
ef548626 | 894 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
6bc36431 KV |
895 | ie_len); |
896 | ||
50d41234 KV |
897 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
898 | ||
899 | if (ar->fw_otp == NULL) { | |
900 | ret = -ENOMEM; | |
901 | goto out; | |
902 | } | |
903 | ||
904 | ar->fw_otp_len = ie_len; | |
905 | break; | |
906 | case ATH6KL_FW_IE_FW_IMAGE: | |
ef548626 | 907 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
6bc36431 KV |
908 | ie_len); |
909 | ||
50d41234 KV |
910 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
911 | ||
912 | if (ar->fw == NULL) { | |
913 | ret = -ENOMEM; | |
914 | goto out; | |
915 | } | |
916 | ||
917 | ar->fw_len = ie_len; | |
918 | break; | |
919 | case ATH6KL_FW_IE_PATCH_IMAGE: | |
ef548626 | 920 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
6bc36431 KV |
921 | ie_len); |
922 | ||
50d41234 KV |
923 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
924 | ||
925 | if (ar->fw_patch == NULL) { | |
926 | ret = -ENOMEM; | |
927 | goto out; | |
928 | } | |
929 | ||
930 | ar->fw_patch_len = ie_len; | |
931 | break; | |
8a137480 KV |
932 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
933 | val = (__le32 *) data; | |
934 | ar->hw.reserved_ram_size = le32_to_cpup(val); | |
6bc36431 KV |
935 | |
936 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
937 | "found reserved ram size ie 0x%d\n", | |
938 | ar->hw.reserved_ram_size); | |
8a137480 | 939 | break; |
97e0496d | 940 | case ATH6KL_FW_IE_CAPABILITIES: |
277d90f4 KV |
941 | if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) |
942 | break; | |
943 | ||
6bc36431 | 944 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
ef548626 | 945 | "found firmware capabilities ie (%zd B)\n", |
6bc36431 KV |
946 | ie_len); |
947 | ||
97e0496d | 948 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
277d90f4 | 949 | index = i / 8; |
97e0496d KV |
950 | bit = i % 8; |
951 | ||
952 | if (data[index] & (1 << bit)) | |
953 | __set_bit(i, ar->fw_capabilities); | |
954 | } | |
6bc36431 KV |
955 | |
956 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", | |
957 | ar->fw_capabilities, | |
958 | sizeof(ar->fw_capabilities)); | |
97e0496d | 959 | break; |
1b4304da KV |
960 | case ATH6KL_FW_IE_PATCH_ADDR: |
961 | if (ie_len != sizeof(*val)) | |
962 | break; | |
963 | ||
964 | val = (__le32 *) data; | |
965 | ar->hw.dataset_patch_addr = le32_to_cpup(val); | |
6bc36431 KV |
966 | |
967 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
03ef0250 | 968 | "found patch address ie 0x%x\n", |
6bc36431 | 969 | ar->hw.dataset_patch_addr); |
1b4304da | 970 | break; |
03ef0250 KV |
971 | case ATH6KL_FW_IE_BOARD_ADDR: |
972 | if (ie_len != sizeof(*val)) | |
973 | break; | |
974 | ||
975 | val = (__le32 *) data; | |
976 | ar->hw.board_addr = le32_to_cpup(val); | |
977 | ||
978 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
979 | "found board address ie 0x%x\n", | |
980 | ar->hw.board_addr); | |
981 | break; | |
368b1b0f KV |
982 | case ATH6KL_FW_IE_VIF_MAX: |
983 | if (ie_len != sizeof(*val)) | |
984 | break; | |
985 | ||
986 | val = (__le32 *) data; | |
987 | ar->vif_max = min_t(unsigned int, le32_to_cpup(val), | |
988 | ATH6KL_VIF_MAX); | |
989 | ||
f143379d VT |
990 | if (ar->vif_max > 1 && !ar->p2p) |
991 | ar->max_norm_iface = 2; | |
992 | ||
368b1b0f KV |
993 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
994 | "found vif max ie %d\n", ar->vif_max); | |
995 | break; | |
50d41234 | 996 | default: |
6bc36431 | 997 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
50d41234 KV |
998 | le32_to_cpup(&hdr->id)); |
999 | break; | |
1000 | } | |
1001 | ||
1002 | len -= ie_len; | |
1003 | data += ie_len; | |
1004 | }; | |
1005 | ||
1006 | ret = 0; | |
1007 | out: | |
1008 | release_firmware(fw); | |
1009 | ||
1010 | return ret; | |
1011 | } | |
1012 | ||
1013 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) | |
1014 | { | |
1015 | int ret; | |
1016 | ||
1017 | ret = ath6kl_fetch_board_file(ar); | |
1018 | if (ret) | |
1019 | return ret; | |
1020 | ||
1021 | ret = ath6kl_fetch_fw_api2(ar); | |
6bc36431 KV |
1022 | if (ret == 0) { |
1023 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); | |
50d41234 | 1024 | return 0; |
6bc36431 | 1025 | } |
50d41234 KV |
1026 | |
1027 | ret = ath6kl_fetch_fw_api1(ar); | |
1028 | if (ret) | |
1029 | return ret; | |
1030 | ||
6bc36431 KV |
1031 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); |
1032 | ||
50d41234 KV |
1033 | return 0; |
1034 | } | |
1035 | ||
bdcd8170 KV |
1036 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
1037 | { | |
1038 | u32 board_address, board_ext_address, param; | |
31024d99 | 1039 | u32 board_data_size, board_ext_data_size; |
bdcd8170 KV |
1040 | int ret; |
1041 | ||
772c31ee KV |
1042 | if (WARN_ON(ar->fw_board == NULL)) |
1043 | return -ENOENT; | |
bdcd8170 | 1044 | |
31024d99 KF |
1045 | /* |
1046 | * Determine where in Target RAM to write Board Data. | |
1047 | * For AR6004, host determine Target RAM address for | |
1048 | * writing board data. | |
1049 | */ | |
0d4d72bf KV |
1050 | if (ar->hw.board_addr != 0) { |
1051 | board_address = ar->hw.board_addr; | |
31024d99 KF |
1052 | ath6kl_bmi_write(ar, |
1053 | ath6kl_get_hi_item_addr(ar, | |
1054 | HI_ITEM(hi_board_data)), | |
1055 | (u8 *) &board_address, 4); | |
1056 | } else { | |
1057 | ath6kl_bmi_read(ar, | |
1058 | ath6kl_get_hi_item_addr(ar, | |
1059 | HI_ITEM(hi_board_data)), | |
1060 | (u8 *) &board_address, 4); | |
1061 | } | |
1062 | ||
bdcd8170 KV |
1063 | /* determine where in target ram to write extended board data */ |
1064 | ath6kl_bmi_read(ar, | |
1065 | ath6kl_get_hi_item_addr(ar, | |
1066 | HI_ITEM(hi_board_ext_data)), | |
1067 | (u8 *) &board_ext_address, 4); | |
1068 | ||
50e2740b KV |
1069 | if (ar->target_type == TARGET_TYPE_AR6003 && |
1070 | board_ext_address == 0) { | |
bdcd8170 KV |
1071 | ath6kl_err("Failed to get board file target address.\n"); |
1072 | return -EINVAL; | |
1073 | } | |
1074 | ||
31024d99 KF |
1075 | switch (ar->target_type) { |
1076 | case TARGET_TYPE_AR6003: | |
1077 | board_data_size = AR6003_BOARD_DATA_SZ; | |
1078 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; | |
1079 | break; | |
1080 | case TARGET_TYPE_AR6004: | |
1081 | board_data_size = AR6004_BOARD_DATA_SZ; | |
1082 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; | |
1083 | break; | |
1084 | default: | |
1085 | WARN_ON(1); | |
1086 | return -EINVAL; | |
1087 | break; | |
1088 | } | |
1089 | ||
50e2740b KV |
1090 | if (board_ext_address && |
1091 | ar->fw_board_len == (board_data_size + board_ext_data_size)) { | |
31024d99 | 1092 | |
bdcd8170 | 1093 | /* write extended board data */ |
6bc36431 KV |
1094 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1095 | "writing extended board data to 0x%x (%d B)\n", | |
1096 | board_ext_address, board_ext_data_size); | |
1097 | ||
bdcd8170 | 1098 | ret = ath6kl_bmi_write(ar, board_ext_address, |
31024d99 KF |
1099 | ar->fw_board + board_data_size, |
1100 | board_ext_data_size); | |
bdcd8170 KV |
1101 | if (ret) { |
1102 | ath6kl_err("Failed to write extended board data: %d\n", | |
1103 | ret); | |
1104 | return ret; | |
1105 | } | |
1106 | ||
1107 | /* record that extended board data is initialized */ | |
31024d99 KF |
1108 | param = (board_ext_data_size << 16) | 1; |
1109 | ||
bdcd8170 KV |
1110 | ath6kl_bmi_write(ar, |
1111 | ath6kl_get_hi_item_addr(ar, | |
1112 | HI_ITEM(hi_board_ext_data_config)), | |
1113 | (unsigned char *) ¶m, 4); | |
1114 | } | |
1115 | ||
31024d99 | 1116 | if (ar->fw_board_len < board_data_size) { |
bdcd8170 KV |
1117 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
1118 | ret = -EINVAL; | |
1119 | return ret; | |
1120 | } | |
1121 | ||
6bc36431 KV |
1122 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
1123 | board_address, board_data_size); | |
1124 | ||
bdcd8170 | 1125 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
31024d99 | 1126 | board_data_size); |
bdcd8170 KV |
1127 | |
1128 | if (ret) { | |
1129 | ath6kl_err("Board file bmi write failed: %d\n", ret); | |
1130 | return ret; | |
1131 | } | |
1132 | ||
1133 | /* record the fact that Board Data IS initialized */ | |
1134 | param = 1; | |
1135 | ath6kl_bmi_write(ar, | |
1136 | ath6kl_get_hi_item_addr(ar, | |
1137 | HI_ITEM(hi_board_data_initialized)), | |
1138 | (u8 *)¶m, 4); | |
1139 | ||
1140 | return ret; | |
1141 | } | |
1142 | ||
1143 | static int ath6kl_upload_otp(struct ath6kl *ar) | |
1144 | { | |
bdcd8170 | 1145 | u32 address, param; |
bef26a7f | 1146 | bool from_hw = false; |
bdcd8170 KV |
1147 | int ret; |
1148 | ||
50e2740b KV |
1149 | if (ar->fw_otp == NULL) |
1150 | return 0; | |
bdcd8170 | 1151 | |
a01ac414 | 1152 | address = ar->hw.app_load_addr; |
bdcd8170 | 1153 | |
ef548626 | 1154 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
6bc36431 KV |
1155 | ar->fw_otp_len); |
1156 | ||
bdcd8170 KV |
1157 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
1158 | ar->fw_otp_len); | |
1159 | if (ret) { | |
1160 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | |
1161 | return ret; | |
1162 | } | |
1163 | ||
639d0b89 KV |
1164 | /* read firmware start address */ |
1165 | ret = ath6kl_bmi_read(ar, | |
1166 | ath6kl_get_hi_item_addr(ar, | |
1167 | HI_ITEM(hi_app_start)), | |
1168 | (u8 *) &address, sizeof(address)); | |
1169 | ||
1170 | if (ret) { | |
1171 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); | |
1172 | return ret; | |
1173 | } | |
1174 | ||
bef26a7f KV |
1175 | if (ar->hw.app_start_override_addr == 0) { |
1176 | ar->hw.app_start_override_addr = address; | |
1177 | from_hw = true; | |
1178 | } | |
639d0b89 | 1179 | |
bef26a7f KV |
1180 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
1181 | from_hw ? " (from hw)" : "", | |
6bc36431 KV |
1182 | ar->hw.app_start_override_addr); |
1183 | ||
bdcd8170 | 1184 | /* execute the OTP code */ |
bef26a7f KV |
1185 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
1186 | ar->hw.app_start_override_addr); | |
bdcd8170 | 1187 | param = 0; |
bef26a7f | 1188 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
bdcd8170 KV |
1189 | |
1190 | return ret; | |
1191 | } | |
1192 | ||
1193 | static int ath6kl_upload_firmware(struct ath6kl *ar) | |
1194 | { | |
bdcd8170 KV |
1195 | u32 address; |
1196 | int ret; | |
1197 | ||
772c31ee | 1198 | if (WARN_ON(ar->fw == NULL)) |
50e2740b | 1199 | return 0; |
bdcd8170 | 1200 | |
a01ac414 | 1201 | address = ar->hw.app_load_addr; |
bdcd8170 | 1202 | |
ef548626 | 1203 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
6bc36431 KV |
1204 | address, ar->fw_len); |
1205 | ||
bdcd8170 KV |
1206 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
1207 | ||
1208 | if (ret) { | |
1209 | ath6kl_err("Failed to write firmware: %d\n", ret); | |
1210 | return ret; | |
1211 | } | |
1212 | ||
31024d99 KF |
1213 | /* |
1214 | * Set starting address for firmware | |
1215 | * Don't need to setup app_start override addr on AR6004 | |
1216 | */ | |
1217 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
a01ac414 | 1218 | address = ar->hw.app_start_override_addr; |
31024d99 KF |
1219 | ath6kl_bmi_set_app_start(ar, address); |
1220 | } | |
bdcd8170 KV |
1221 | return ret; |
1222 | } | |
1223 | ||
1224 | static int ath6kl_upload_patch(struct ath6kl *ar) | |
1225 | { | |
bdcd8170 KV |
1226 | u32 address, param; |
1227 | int ret; | |
1228 | ||
50e2740b KV |
1229 | if (ar->fw_patch == NULL) |
1230 | return 0; | |
bdcd8170 | 1231 | |
a01ac414 | 1232 | address = ar->hw.dataset_patch_addr; |
bdcd8170 | 1233 | |
ef548626 | 1234 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
6bc36431 KV |
1235 | address, ar->fw_patch_len); |
1236 | ||
bdcd8170 KV |
1237 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
1238 | if (ret) { | |
1239 | ath6kl_err("Failed to write patch file: %d\n", ret); | |
1240 | return ret; | |
1241 | } | |
1242 | ||
1243 | param = address; | |
1244 | ath6kl_bmi_write(ar, | |
1245 | ath6kl_get_hi_item_addr(ar, | |
1246 | HI_ITEM(hi_dset_list_head)), | |
1247 | (unsigned char *) ¶m, 4); | |
1248 | ||
1249 | return 0; | |
1250 | } | |
1251 | ||
1252 | static int ath6kl_init_upload(struct ath6kl *ar) | |
1253 | { | |
1254 | u32 param, options, sleep, address; | |
1255 | int status = 0; | |
1256 | ||
31024d99 KF |
1257 | if (ar->target_type != TARGET_TYPE_AR6003 && |
1258 | ar->target_type != TARGET_TYPE_AR6004) | |
bdcd8170 KV |
1259 | return -EINVAL; |
1260 | ||
1261 | /* temporarily disable system sleep */ | |
1262 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1263 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1264 | if (status) | |
1265 | return status; | |
1266 | ||
1267 | options = param; | |
1268 | ||
1269 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | |
1270 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1271 | if (status) | |
1272 | return status; | |
1273 | ||
1274 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1275 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1276 | if (status) | |
1277 | return status; | |
1278 | ||
1279 | sleep = param; | |
1280 | ||
1281 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | |
1282 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1283 | if (status) | |
1284 | return status; | |
1285 | ||
1286 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | |
1287 | options, sleep); | |
1288 | ||
1289 | /* program analog PLL register */ | |
31024d99 KF |
1290 | /* no need to control 40/44MHz clock on AR6004 */ |
1291 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
1292 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | |
1293 | 0xF9104001); | |
bdcd8170 | 1294 | |
31024d99 KF |
1295 | if (status) |
1296 | return status; | |
bdcd8170 | 1297 | |
31024d99 KF |
1298 | /* Run at 80/88MHz by default */ |
1299 | param = SM(CPU_CLOCK_STANDARD, 1); | |
1300 | ||
1301 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | |
1302 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1303 | if (status) | |
1304 | return status; | |
1305 | } | |
bdcd8170 KV |
1306 | |
1307 | param = 0; | |
1308 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | |
1309 | param = SM(LPO_CAL_ENABLE, 1); | |
1310 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1311 | if (status) | |
1312 | return status; | |
1313 | ||
1314 | /* WAR to avoid SDIO CRC err */ | |
0d0192ba | 1315 | if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { |
bdcd8170 KV |
1316 | ath6kl_err("temporary war to avoid sdio crc error\n"); |
1317 | ||
1318 | param = 0x20; | |
1319 | ||
1320 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | |
1321 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1322 | if (status) | |
1323 | return status; | |
1324 | ||
1325 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | |
1326 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1327 | if (status) | |
1328 | return status; | |
1329 | ||
1330 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | |
1331 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1332 | if (status) | |
1333 | return status; | |
1334 | ||
1335 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | |
1336 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1337 | if (status) | |
1338 | return status; | |
1339 | } | |
1340 | ||
1341 | /* write EEPROM data to Target RAM */ | |
1342 | status = ath6kl_upload_board_file(ar); | |
1343 | if (status) | |
1344 | return status; | |
1345 | ||
1346 | /* transfer One time Programmable data */ | |
1347 | status = ath6kl_upload_otp(ar); | |
1348 | if (status) | |
1349 | return status; | |
1350 | ||
1351 | /* Download Target firmware */ | |
1352 | status = ath6kl_upload_firmware(ar); | |
1353 | if (status) | |
1354 | return status; | |
1355 | ||
1356 | status = ath6kl_upload_patch(ar); | |
1357 | if (status) | |
1358 | return status; | |
1359 | ||
1360 | /* Restore system sleep */ | |
1361 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1362 | status = ath6kl_bmi_reg_write(ar, address, sleep); | |
1363 | if (status) | |
1364 | return status; | |
1365 | ||
1366 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1367 | param = options | 0x20; | |
1368 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1369 | if (status) | |
1370 | return status; | |
1371 | ||
bdcd8170 KV |
1372 | return status; |
1373 | } | |
1374 | ||
a01ac414 KV |
1375 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
1376 | { | |
856f4b31 KV |
1377 | const struct ath6kl_hw *hw; |
1378 | int i; | |
bef26a7f | 1379 | |
856f4b31 KV |
1380 | for (i = 0; i < ARRAY_SIZE(hw_list); i++) { |
1381 | hw = &hw_list[i]; | |
bef26a7f | 1382 | |
856f4b31 KV |
1383 | if (hw->id == ar->version.target_ver) |
1384 | break; | |
1385 | } | |
1386 | ||
1387 | if (i == ARRAY_SIZE(hw_list)) { | |
a01ac414 KV |
1388 | ath6kl_err("Unsupported hardware version: 0x%x\n", |
1389 | ar->version.target_ver); | |
1390 | return -EINVAL; | |
1391 | } | |
1392 | ||
856f4b31 KV |
1393 | ar->hw = *hw; |
1394 | ||
6bc36431 KV |
1395 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1396 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", | |
1397 | ar->version.target_ver, ar->target_type, | |
1398 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); | |
1399 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
1400 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", | |
1401 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, | |
1402 | ar->hw.reserved_ram_size); | |
39586bf2 RH |
1403 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1404 | "refclk_hz %d uarttx_pin %d", | |
1405 | ar->hw.refclk_hz, ar->hw.uarttx_pin); | |
6bc36431 | 1406 | |
a01ac414 KV |
1407 | return 0; |
1408 | } | |
1409 | ||
293badf4 KV |
1410 | static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) |
1411 | { | |
1412 | switch (type) { | |
1413 | case ATH6KL_HIF_TYPE_SDIO: | |
1414 | return "sdio"; | |
1415 | case ATH6KL_HIF_TYPE_USB: | |
1416 | return "usb"; | |
1417 | } | |
1418 | ||
1419 | return NULL; | |
1420 | } | |
1421 | ||
5fe4dffb | 1422 | int ath6kl_init_hw_start(struct ath6kl *ar) |
20459ee2 KV |
1423 | { |
1424 | long timeleft; | |
1425 | int ret, i; | |
1426 | ||
5fe4dffb KV |
1427 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); |
1428 | ||
20459ee2 KV |
1429 | ret = ath6kl_hif_power_on(ar); |
1430 | if (ret) | |
1431 | return ret; | |
1432 | ||
1433 | ret = ath6kl_configure_target(ar); | |
1434 | if (ret) | |
1435 | goto err_power_off; | |
1436 | ||
1437 | ret = ath6kl_init_upload(ar); | |
1438 | if (ret) | |
1439 | goto err_power_off; | |
1440 | ||
1441 | /* Do we need to finish the BMI phase */ | |
1442 | /* FIXME: return error from ath6kl_bmi_done() */ | |
1443 | if (ath6kl_bmi_done(ar)) { | |
1444 | ret = -EIO; | |
1445 | goto err_power_off; | |
1446 | } | |
1447 | ||
1448 | /* | |
1449 | * The reason we have to wait for the target here is that the | |
1450 | * driver layer has to init BMI in order to set the host block | |
1451 | * size. | |
1452 | */ | |
1453 | if (ath6kl_htc_wait_target(ar->htc_target)) { | |
1454 | ret = -EIO; | |
1455 | goto err_power_off; | |
1456 | } | |
1457 | ||
1458 | if (ath6kl_init_service_ep(ar)) { | |
1459 | ret = -EIO; | |
1460 | goto err_cleanup_scatter; | |
1461 | } | |
1462 | ||
1463 | /* setup credit distribution */ | |
1464 | ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); | |
1465 | ||
1466 | /* start HTC */ | |
1467 | ret = ath6kl_htc_start(ar->htc_target); | |
1468 | if (ret) { | |
1469 | /* FIXME: call this */ | |
1470 | ath6kl_cookie_cleanup(ar); | |
1471 | goto err_cleanup_scatter; | |
1472 | } | |
1473 | ||
1474 | /* Wait for Wmi event to be ready */ | |
1475 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | |
1476 | test_bit(WMI_READY, | |
1477 | &ar->flag), | |
1478 | WMI_TIMEOUT); | |
1479 | ||
1480 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); | |
1481 | ||
293badf4 KV |
1482 | |
1483 | if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { | |
1484 | ath6kl_info("%s %s fw %s%s\n", | |
1485 | ar->hw.name, | |
1486 | ath6kl_init_get_hif_name(ar->hif_type), | |
1487 | ar->wiphy->fw_version, | |
1488 | test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); | |
1489 | } | |
1490 | ||
20459ee2 KV |
1491 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
1492 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | |
1493 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | |
1494 | ret = -EIO; | |
1495 | goto err_htc_stop; | |
1496 | } | |
1497 | ||
1498 | if (!timeleft || signal_pending(current)) { | |
1499 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | |
1500 | ret = -EIO; | |
1501 | goto err_htc_stop; | |
1502 | } | |
1503 | ||
1504 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | |
1505 | ||
1506 | /* communicate the wmi protocol verision to the target */ | |
1507 | /* FIXME: return error */ | |
1508 | if ((ath6kl_set_host_app_area(ar)) != 0) | |
1509 | ath6kl_err("unable to set the host app area\n"); | |
1510 | ||
71f96ee6 | 1511 | for (i = 0; i < ar->vif_max; i++) { |
20459ee2 KV |
1512 | ret = ath6kl_target_config_wlan_params(ar, i); |
1513 | if (ret) | |
1514 | goto err_htc_stop; | |
1515 | } | |
1516 | ||
76a9fbe2 KV |
1517 | ar->state = ATH6KL_STATE_ON; |
1518 | ||
20459ee2 KV |
1519 | return 0; |
1520 | ||
1521 | err_htc_stop: | |
1522 | ath6kl_htc_stop(ar->htc_target); | |
1523 | err_cleanup_scatter: | |
1524 | ath6kl_hif_cleanup_scatter(ar); | |
1525 | err_power_off: | |
1526 | ath6kl_hif_power_off(ar); | |
1527 | ||
1528 | return ret; | |
1529 | } | |
1530 | ||
5fe4dffb KV |
1531 | int ath6kl_init_hw_stop(struct ath6kl *ar) |
1532 | { | |
1533 | int ret; | |
1534 | ||
1535 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); | |
1536 | ||
1537 | ath6kl_htc_stop(ar->htc_target); | |
1538 | ||
1539 | ath6kl_hif_stop(ar); | |
1540 | ||
1541 | ath6kl_bmi_reset(ar); | |
1542 | ||
1543 | ret = ath6kl_hif_power_off(ar); | |
1544 | if (ret) | |
1545 | ath6kl_warn("failed to power off hif: %d\n", ret); | |
1546 | ||
76a9fbe2 KV |
1547 | ar->state = ATH6KL_STATE_OFF; |
1548 | ||
5fe4dffb KV |
1549 | return 0; |
1550 | } | |
1551 | ||
61448a93 | 1552 | int ath6kl_core_init(struct ath6kl *ar) |
bdcd8170 | 1553 | { |
61448a93 | 1554 | struct ath6kl_bmi_target_info targ_info; |
8dafb70e | 1555 | struct net_device *ndev; |
20459ee2 | 1556 | int ret = 0, i; |
bdcd8170 | 1557 | |
61448a93 KV |
1558 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); |
1559 | if (!ar->ath6kl_wq) | |
1560 | return -ENOMEM; | |
1561 | ||
1562 | ret = ath6kl_bmi_init(ar); | |
1563 | if (ret) | |
1564 | goto err_wq; | |
1565 | ||
20459ee2 KV |
1566 | /* |
1567 | * Turn on power to get hardware (target) version and leave power | |
1568 | * on delibrately as we will boot the hardware anyway within few | |
1569 | * seconds. | |
1570 | */ | |
61448a93 KV |
1571 | ret = ath6kl_hif_power_on(ar); |
1572 | if (ret) | |
1573 | goto err_bmi_cleanup; | |
1574 | ||
1575 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | |
1576 | if (ret) | |
1577 | goto err_power_off; | |
1578 | ||
1579 | ar->version.target_ver = le32_to_cpu(targ_info.version); | |
1580 | ar->target_type = le32_to_cpu(targ_info.type); | |
1581 | ar->wiphy->hw_version = le32_to_cpu(targ_info.version); | |
1582 | ||
1583 | ret = ath6kl_init_hw_params(ar); | |
1584 | if (ret) | |
1585 | goto err_power_off; | |
1586 | ||
61448a93 KV |
1587 | ar->htc_target = ath6kl_htc_create(ar); |
1588 | ||
1589 | if (!ar->htc_target) { | |
1590 | ret = -ENOMEM; | |
1591 | goto err_power_off; | |
1592 | } | |
1593 | ||
1594 | ret = ath6kl_fetch_firmwares(ar); | |
1595 | if (ret) | |
1596 | goto err_htc_cleanup; | |
1597 | ||
1598 | /* FIXME: we should free all firmwares in the error cases below */ | |
1599 | ||
bdcd8170 KV |
1600 | /* Indicate that WMI is enabled (although not ready yet) */ |
1601 | set_bit(WMI_ENABLED, &ar->flag); | |
2865785e | 1602 | ar->wmi = ath6kl_wmi_init(ar); |
bdcd8170 KV |
1603 | if (!ar->wmi) { |
1604 | ath6kl_err("failed to initialize wmi\n"); | |
61448a93 KV |
1605 | ret = -EIO; |
1606 | goto err_htc_cleanup; | |
bdcd8170 KV |
1607 | } |
1608 | ||
1609 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | |
1610 | ||
61448a93 KV |
1611 | ret = ath6kl_register_ieee80211_hw(ar); |
1612 | if (ret) | |
8dafb70e VT |
1613 | goto err_node_cleanup; |
1614 | ||
61448a93 KV |
1615 | ret = ath6kl_debug_init(ar); |
1616 | if (ret) { | |
8dafb70e VT |
1617 | wiphy_unregister(ar->wiphy); |
1618 | goto err_node_cleanup; | |
1619 | } | |
1620 | ||
71f96ee6 | 1621 | for (i = 0; i < ar->vif_max; i++) |
55055976 VT |
1622 | ar->avail_idx_map |= BIT(i); |
1623 | ||
27929723 VT |
1624 | rtnl_lock(); |
1625 | ||
8dafb70e | 1626 | /* Add an initial station interface */ |
55055976 VT |
1627 | ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, |
1628 | INFRA_NETWORK); | |
27929723 VT |
1629 | |
1630 | rtnl_unlock(); | |
1631 | ||
8dafb70e VT |
1632 | if (!ndev) { |
1633 | ath6kl_err("Failed to instantiate a network device\n"); | |
61448a93 | 1634 | ret = -ENOMEM; |
8dafb70e VT |
1635 | wiphy_unregister(ar->wiphy); |
1636 | goto err_debug_init; | |
1637 | } | |
1638 | ||
1639 | ||
1640 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | |
28ae58dd | 1641 | __func__, ndev->name, ndev, ar); |
8dafb70e | 1642 | |
bdcd8170 KV |
1643 | /* setup access class priority mappings */ |
1644 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | |
1645 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | |
1646 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | |
1647 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | |
1648 | ||
1649 | /* give our connected endpoints some buffers */ | |
1650 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | |
1651 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | |
1652 | ||
1653 | /* allocate some buffers that handle larger AMSDU frames */ | |
1654 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | |
1655 | ||
bdcd8170 KV |
1656 | ath6kl_cookie_init(ar); |
1657 | ||
bdcd8170 KV |
1658 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | |
1659 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | |
1660 | ||
8277de15 KV |
1661 | if (suspend_cutpower) |
1662 | ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; | |
1663 | ||
be98e3a4 | 1664 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
7c4ef712 | 1665 | WIPHY_FLAG_HAVE_AP_SME | |
7e95e365 | 1666 | WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | |
fb94333a AN |
1667 | WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD; |
1668 | ||
10509f90 KV |
1669 | if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities)) |
1670 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; | |
1671 | ||
fb94333a AN |
1672 | ar->wiphy->probe_resp_offload = |
1673 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | | |
1674 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | | |
1675 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | | |
1676 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; | |
011a36e1 | 1677 | |
5fe4dffb KV |
1678 | set_bit(FIRST_BOOT, &ar->flag); |
1679 | ||
1680 | ret = ath6kl_init_hw_start(ar); | |
20459ee2 | 1681 | if (ret) { |
5fe4dffb | 1682 | ath6kl_err("Failed to start hardware: %d\n", ret); |
20459ee2 | 1683 | goto err_rxbuf_cleanup; |
0ce59445 | 1684 | } |
d66ea4f9 VT |
1685 | |
1686 | /* | |
1687 | * Set mac address which is received in ready event | |
1688 | * FIXME: Move to ath6kl_interface_add() | |
1689 | */ | |
1690 | memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); | |
1691 | ||
61448a93 | 1692 | return ret; |
bdcd8170 | 1693 | |
bdcd8170 | 1694 | err_rxbuf_cleanup: |
ad226ec2 | 1695 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
bdcd8170 | 1696 | ath6kl_cleanup_amsdu_rxbufs(ar); |
27929723 | 1697 | rtnl_lock(); |
108438bc | 1698 | ath6kl_deinit_if_data(netdev_priv(ndev)); |
27929723 | 1699 | rtnl_unlock(); |
8dafb70e VT |
1700 | wiphy_unregister(ar->wiphy); |
1701 | err_debug_init: | |
1702 | ath6kl_debug_cleanup(ar); | |
852bd9d9 | 1703 | err_node_cleanup: |
bdcd8170 KV |
1704 | ath6kl_wmi_shutdown(ar->wmi); |
1705 | clear_bit(WMI_ENABLED, &ar->flag); | |
1706 | ar->wmi = NULL; | |
bdcd8170 | 1707 | err_htc_cleanup: |
ad226ec2 | 1708 | ath6kl_htc_cleanup(ar->htc_target); |
b2e75698 KV |
1709 | err_power_off: |
1710 | ath6kl_hif_power_off(ar); | |
bdcd8170 KV |
1711 | err_bmi_cleanup: |
1712 | ath6kl_bmi_cleanup(ar); | |
1713 | err_wq: | |
1714 | destroy_workqueue(ar->ath6kl_wq); | |
8dafb70e | 1715 | |
bdcd8170 KV |
1716 | return ret; |
1717 | } | |
1718 | ||
55055976 | 1719 | void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) |
6db8fa53 VT |
1720 | { |
1721 | static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | |
1722 | bool discon_issued; | |
1723 | ||
1724 | netif_stop_queue(vif->ndev); | |
1725 | ||
1726 | clear_bit(WLAN_ENABLED, &vif->flags); | |
1727 | ||
1728 | if (wmi_ready) { | |
1729 | discon_issued = test_bit(CONNECTED, &vif->flags) || | |
1730 | test_bit(CONNECT_PEND, &vif->flags); | |
1731 | ath6kl_disconnect(vif); | |
1732 | del_timer(&vif->disconnect_timer); | |
1733 | ||
1734 | if (discon_issued) | |
1735 | ath6kl_disconnect_event(vif, DISCONNECT_CMD, | |
1736 | (vif->nw_type & AP_NETWORK) ? | |
1737 | bcast_mac : vif->bssid, | |
1738 | 0, NULL, 0); | |
1739 | } | |
1740 | ||
1741 | if (vif->scan_req) { | |
1742 | cfg80211_scan_done(vif->scan_req, true); | |
1743 | vif->scan_req = NULL; | |
1744 | } | |
6db8fa53 VT |
1745 | } |
1746 | ||
bdcd8170 KV |
1747 | void ath6kl_stop_txrx(struct ath6kl *ar) |
1748 | { | |
990bd915 | 1749 | struct ath6kl_vif *vif, *tmp_vif; |
bdcd8170 KV |
1750 | |
1751 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
1752 | ||
1753 | if (down_interruptible(&ar->sem)) { | |
1754 | ath6kl_err("down_interruptible failed\n"); | |
1755 | return; | |
1756 | } | |
1757 | ||
11f6e40d | 1758 | spin_lock_bh(&ar->list_lock); |
990bd915 VT |
1759 | list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { |
1760 | list_del(&vif->list); | |
11f6e40d | 1761 | spin_unlock_bh(&ar->list_lock); |
990bd915 | 1762 | ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); |
27929723 VT |
1763 | rtnl_lock(); |
1764 | ath6kl_deinit_if_data(vif); | |
1765 | rtnl_unlock(); | |
11f6e40d | 1766 | spin_lock_bh(&ar->list_lock); |
990bd915 | 1767 | } |
11f6e40d | 1768 | spin_unlock_bh(&ar->list_lock); |
bdcd8170 | 1769 | |
6db8fa53 | 1770 | clear_bit(WMI_READY, &ar->flag); |
bdcd8170 | 1771 | |
6db8fa53 VT |
1772 | /* |
1773 | * After wmi_shudown all WMI events will be dropped. We | |
1774 | * need to cleanup the buffers allocated in AP mode and | |
1775 | * give disconnect notification to stack, which usually | |
1776 | * happens in the disconnect_event. Simulate the disconnect | |
1777 | * event by calling the function directly. Sometimes | |
1778 | * disconnect_event will be received when the debug logs | |
1779 | * are collected. | |
1780 | */ | |
1781 | ath6kl_wmi_shutdown(ar->wmi); | |
bdcd8170 | 1782 | |
6db8fa53 VT |
1783 | clear_bit(WMI_ENABLED, &ar->flag); |
1784 | if (ar->htc_target) { | |
1785 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); | |
1786 | ath6kl_htc_stop(ar->htc_target); | |
bdcd8170 KV |
1787 | } |
1788 | ||
6db8fa53 VT |
1789 | /* |
1790 | * Try to reset the device if we can. The driver may have been | |
1791 | * configure NOT to reset the target during a debug session. | |
1792 | */ | |
1793 | ath6kl_dbg(ATH6KL_DBG_TRC, | |
1794 | "attempting to reset target on instance destroy\n"); | |
1795 | ath6kl_reset_device(ar, ar->target_type, true, true); | |
19703573 | 1796 | |
6db8fa53 | 1797 | clear_bit(WLAN_ENABLED, &ar->flag); |
bdcd8170 | 1798 | } |