drivers/net/sb1250-mac.c: kmalloc + memset conversion to kcalloc
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
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1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
11 * Big-endian support
12 * rx_copybreak/alignment
13 * Scatter gather
14 * More testing
15 *
16 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@redhat.com>
17 * Additional fixes and clean up: Francois Romieu
18 *
19 * This source has not been verified for use in safety critical systems.
20 *
21 * Please direct queries about the revamped driver to the linux-kernel
22 * list not VIA.
23 *
24 * Original code:
25 *
26 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
27 * All rights reserved.
28 *
29 * This software may be redistributed and/or modified under
30 * the terms of the GNU General Public License as published by the Free
31 * Software Foundation; either version 2 of the License, or
32 * any later version.
33 *
34 * This program is distributed in the hope that it will be useful, but
35 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
36 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
37 * for more details.
38 *
39 * Author: Chuang Liang-Shing, AJ Jiang
40 *
41 * Date: Jan 24, 2003
42 *
43 * MODULE_LICENSE("GPL");
44 *
45 */
46
47
48#include <linux/module.h>
49#include <linux/types.h>
1da177e4
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50#include <linux/init.h>
51#include <linux/mm.h>
52#include <linux/errno.h>
53#include <linux/ioport.h>
54#include <linux/pci.h>
55#include <linux/kernel.h>
56#include <linux/netdevice.h>
57#include <linux/etherdevice.h>
58#include <linux/skbuff.h>
59#include <linux/delay.h>
60#include <linux/timer.h>
61#include <linux/slab.h>
62#include <linux/interrupt.h>
1da177e4
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63#include <linux/string.h>
64#include <linux/wait.h>
65#include <asm/io.h>
66#include <linux/if.h>
1da177e4
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67#include <asm/uaccess.h>
68#include <linux/proc_fs.h>
69#include <linux/inetdevice.h>
70#include <linux/reboot.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/in.h>
74#include <linux/if_arp.h>
75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
87
88static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 89static const struct ethtool_ops velocity_ethtool_ops;
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90
91/*
92 Define module options
93*/
94
95MODULE_AUTHOR("VIA Networking Technologies, Inc.");
96MODULE_LICENSE("GPL");
97MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
98
99#define VELOCITY_PARAM(N,D) \
100 static int N[MAX_UNITS]=OPTION_DEFAULT;\
101 module_param_array(N, int, NULL, 0); \
102 MODULE_PARM_DESC(N, D);
103
104#define RX_DESC_MIN 64
105#define RX_DESC_MAX 255
106#define RX_DESC_DEF 64
107VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
108
109#define TX_DESC_MIN 16
110#define TX_DESC_MAX 256
111#define TX_DESC_DEF 64
112VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
113
114#define VLAN_ID_MIN 0
115#define VLAN_ID_MAX 4095
116#define VLAN_ID_DEF 0
117/* VID_setting[] is used for setting the VID of NIC.
118 0: default VID.
119 1-4094: other VIDs.
120*/
121VELOCITY_PARAM(VID_setting, "802.1Q VLAN ID");
122
123#define RX_THRESH_MIN 0
124#define RX_THRESH_MAX 3
125#define RX_THRESH_DEF 0
126/* rx_thresh[] is used for controlling the receive fifo threshold.
127 0: indicate the rxfifo threshold is 128 bytes.
128 1: indicate the rxfifo threshold is 512 bytes.
129 2: indicate the rxfifo threshold is 1024 bytes.
130 3: indicate the rxfifo threshold is store & forward.
131*/
132VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
133
134#define DMA_LENGTH_MIN 0
135#define DMA_LENGTH_MAX 7
136#define DMA_LENGTH_DEF 0
137
138/* DMA_length[] is used for controlling the DMA length
139 0: 8 DWORDs
140 1: 16 DWORDs
141 2: 32 DWORDs
142 3: 64 DWORDs
143 4: 128 DWORDs
144 5: 256 DWORDs
145 6: SF(flush till emply)
146 7: SF(flush till emply)
147*/
148VELOCITY_PARAM(DMA_length, "DMA length");
149
150#define TAGGING_DEF 0
151/* enable_tagging[] is used for enabling 802.1Q VID tagging.
152 0: disable VID seeting(default).
153 1: enable VID setting.
154*/
155VELOCITY_PARAM(enable_tagging, "Enable 802.1Q tagging");
156
157#define IP_ALIG_DEF 0
158/* IP_byte_align[] is used for IP header DWORD byte aligned
159 0: indicate the IP header won't be DWORD byte aligned.(Default) .
160 1: indicate the IP header will be DWORD byte aligned.
161 In some enviroment, the IP header should be DWORD byte aligned,
162 or the packet will be droped when we receive it. (eg: IPVS)
163*/
164VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
165
166#define TX_CSUM_DEF 1
167/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
168 (We only support RX checksum offload now)
169 0: disable csum_offload[checksum offload
170 1: enable checksum offload. (Default)
171*/
172VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
173
174#define FLOW_CNTL_DEF 1
175#define FLOW_CNTL_MIN 1
176#define FLOW_CNTL_MAX 5
177
178/* flow_control[] is used for setting the flow control ability of NIC.
179 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
180 2: enable TX flow control.
181 3: enable RX flow control.
182 4: enable RX/TX flow control.
183 5: disable
184*/
185VELOCITY_PARAM(flow_control, "Enable flow control ability");
186
187#define MED_LNK_DEF 0
188#define MED_LNK_MIN 0
189#define MED_LNK_MAX 4
190/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
191 0: indicate autonegotiation for both speed and duplex mode
192 1: indicate 100Mbps half duplex mode
193 2: indicate 100Mbps full duplex mode
194 3: indicate 10Mbps half duplex mode
195 4: indicate 10Mbps full duplex mode
196
197 Note:
198 if EEPROM have been set to the force mode, this option is ignored
199 by driver.
200*/
201VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
202
203#define VAL_PKT_LEN_DEF 0
204/* ValPktLen[] is used for setting the checksum offload ability of NIC.
205 0: Receive frame with invalid layer 2 length (Default)
206 1: Drop frame with invalid layer 2 length
207*/
208VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
209
210#define WOL_OPT_DEF 0
211#define WOL_OPT_MIN 0
212#define WOL_OPT_MAX 7
213/* wol_opts[] is used for controlling wake on lan behavior.
214 0: Wake up if recevied a magic packet. (Default)
215 1: Wake up if link status is on/off.
216 2: Wake up if recevied an arp packet.
217 4: Wake up if recevied any unicast packet.
218 Those value can be sumed up to support more than one option.
219*/
220VELOCITY_PARAM(wol_opts, "Wake On Lan options");
221
222#define INT_WORKS_DEF 20
223#define INT_WORKS_MIN 10
224#define INT_WORKS_MAX 64
225
226VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
227
228static int rx_copybreak = 200;
229module_param(rx_copybreak, int, 0644);
230MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
231
cabb7667
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232static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
233 const struct velocity_info_tbl *info);
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234static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
235static void velocity_print_info(struct velocity_info *vptr);
236static int velocity_open(struct net_device *dev);
237static int velocity_change_mtu(struct net_device *dev, int mtu);
238static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 239static int velocity_intr(int irq, void *dev_instance);
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240static void velocity_set_multi(struct net_device *dev);
241static struct net_device_stats *velocity_get_stats(struct net_device *dev);
242static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
243static int velocity_close(struct net_device *dev);
244static int velocity_receive_frame(struct velocity_info *, int idx);
245static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
246static void velocity_free_rd_ring(struct velocity_info *vptr);
247static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
248static int velocity_soft_reset(struct velocity_info *vptr);
249static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 250static u32 velocity_get_link(struct net_device *dev);
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251static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
252static void velocity_print_link_status(struct velocity_info *vptr);
253static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
254static void velocity_shutdown(struct velocity_info *vptr);
255static void enable_flow_control_ability(struct velocity_info *vptr);
256static void enable_mii_autopoll(struct mac_regs __iomem * regs);
257static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
258static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
259static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
260static u32 check_connection_type(struct mac_regs __iomem * regs);
261static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
262
263#ifdef CONFIG_PM
264
265static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
266static int velocity_resume(struct pci_dev *pdev);
267
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268static DEFINE_SPINLOCK(velocity_dev_list_lock);
269static LIST_HEAD(velocity_dev_list);
270
271#endif
272
273#if defined(CONFIG_PM) && defined(CONFIG_INET)
274
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275static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
276
277static struct notifier_block velocity_inetaddr_notifier = {
278 .notifier_call = velocity_netdev_event,
279};
280
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281static void velocity_register_notifier(void)
282{
283 register_inetaddr_notifier(&velocity_inetaddr_notifier);
284}
285
286static void velocity_unregister_notifier(void)
287{
288 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
289}
290
ce9f7fe3 291#else
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292
293#define velocity_register_notifier() do {} while (0)
294#define velocity_unregister_notifier() do {} while (0)
295
ce9f7fe3 296#endif
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297
298/*
299 * Internal board variants. At the moment we have only one
300 */
301
cabb7667
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302static const struct velocity_info_tbl chip_info_table[] __devinitdata = {
303 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
304 { }
1da177e4
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305};
306
307/*
308 * Describe the PCI device identifiers that we support in this
309 * device driver. Used for hotplug autoloading.
310 */
311
e54f4893
JG
312static const struct pci_device_id velocity_id_table[] __devinitdata = {
313 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
314 { }
1da177e4
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315};
316
317MODULE_DEVICE_TABLE(pci, velocity_id_table);
318
319/**
320 * get_chip_name - identifier to name
321 * @id: chip identifier
322 *
323 * Given a chip identifier return a suitable description. Returns
324 * a pointer a static string valid while the driver is loaded.
325 */
326
327static char __devinit *get_chip_name(enum chip_type chip_id)
328{
329 int i;
330 for (i = 0; chip_info_table[i].name != NULL; i++)
331 if (chip_info_table[i].chip_id == chip_id)
332 break;
333 return chip_info_table[i].name;
334}
335
336/**
337 * velocity_remove1 - device unplug
338 * @pdev: PCI device being removed
339 *
340 * Device unload callback. Called on an unplug or on module
341 * unload for each active device that is present. Disconnects
342 * the device from the network layer and frees all the resources
343 */
344
345static void __devexit velocity_remove1(struct pci_dev *pdev)
346{
347 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 348 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
349
350#ifdef CONFIG_PM
351 unsigned long flags;
352
353 spin_lock_irqsave(&velocity_dev_list_lock, flags);
354 if (!list_empty(&velocity_dev_list))
355 list_del(&vptr->list);
356 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
357#endif
358 unregister_netdev(dev);
359 iounmap(vptr->mac_regs);
360 pci_release_regions(pdev);
361 pci_disable_device(pdev);
362 pci_set_drvdata(pdev, NULL);
363 free_netdev(dev);
364
365 velocity_nics--;
366}
367
368/**
369 * velocity_set_int_opt - parser for integer options
370 * @opt: pointer to option value
371 * @val: value the user requested (or -1 for default)
372 * @min: lowest value allowed
373 * @max: highest value allowed
374 * @def: default value
375 * @name: property name
376 * @dev: device name
377 *
378 * Set an integer property in the module options. This function does
379 * all the verification and checking as well as reporting so that
380 * we don't duplicate code for each option.
381 */
382
383static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
384{
385 if (val == -1)
386 *opt = def;
387 else if (val < min || val > max) {
388 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
389 devname, name, min, max);
390 *opt = def;
391 } else {
392 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
393 devname, name, val);
394 *opt = val;
395 }
396}
397
398/**
399 * velocity_set_bool_opt - parser for boolean options
400 * @opt: pointer to option value
401 * @val: value the user requested (or -1 for default)
402 * @def: default value (yes/no)
403 * @flag: numeric value to set for true.
404 * @name: property name
405 * @dev: device name
406 *
407 * Set a boolean property in the module options. This function does
408 * all the verification and checking as well as reporting so that
409 * we don't duplicate code for each option.
410 */
411
412static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
413{
414 (*opt) &= (~flag);
415 if (val == -1)
416 *opt |= (def ? flag : 0);
417 else if (val < 0 || val > 1) {
6aa20a22 418 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT
419 devname, name);
420 *opt |= (def ? flag : 0);
421 } else {
6aa20a22 422 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT
423 devname, name, val ? "TRUE" : "FALSE");
424 *opt |= (val ? flag : 0);
425 }
426}
427
428/**
429 * velocity_get_options - set options on device
430 * @opts: option structure for the device
431 * @index: index of option to use in module options array
432 * @devname: device name
433 *
434 * Turn the module and command options into a single structure
435 * for the current device
436 */
437
438static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
439{
440
441 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
442 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
443 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
444 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
445 velocity_set_int_opt(&opts->vid, VID_setting[index], VLAN_ID_MIN, VLAN_ID_MAX, VLAN_ID_DEF, "VID_setting", devname);
446 velocity_set_bool_opt(&opts->flags, enable_tagging[index], TAGGING_DEF, VELOCITY_FLAGS_TAGGING, "enable_tagging", devname);
447 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
448 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
449 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
450 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
451 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
452 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
453 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
454 opts->numrx = (opts->numrx & ~3);
455}
456
457/**
458 * velocity_init_cam_filter - initialise CAM
459 * @vptr: velocity to program
460 *
461 * Initialize the content addressable memory used for filters. Load
462 * appropriately according to the presence of VLAN
463 */
464
465static void velocity_init_cam_filter(struct velocity_info *vptr)
466{
467 struct mac_regs __iomem * regs = vptr->mac_regs;
468
469 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
470 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
471 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
472
473 /* Disable all CAMs */
474 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
475 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
476 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);
477 mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
478
479 /* Enable first VCAM */
480 if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
481 /* If Tagging option is enabled and VLAN ID is not zero, then
482 turn on MCFG_RTGOPT also */
483 if (vptr->options.vid != 0)
484 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
485
486 mac_set_cam(regs, 0, (u8 *) & (vptr->options.vid), VELOCITY_VLAN_ID_CAM);
487 vptr->vCAMmask[0] |= 1;
488 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);
489 } else {
490 u16 temp = 0;
491 mac_set_cam(regs, 0, (u8 *) &temp, VELOCITY_VLAN_ID_CAM);
492 temp = 1;
493 mac_set_cam_mask(regs, (u8 *) &temp, VELOCITY_VLAN_ID_CAM);
494 }
495}
496
497/**
498 * velocity_rx_reset - handle a receive reset
499 * @vptr: velocity we are resetting
500 *
501 * Reset the ownership and status for the receive ring side.
502 * Hand all the receive queue to the NIC.
503 */
504
505static void velocity_rx_reset(struct velocity_info *vptr)
506{
507
508 struct mac_regs __iomem * regs = vptr->mac_regs;
509 int i;
510
511 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
512
513 /*
514 * Init state, all RD entries belong to the NIC
515 */
516 for (i = 0; i < vptr->options.numrx; ++i)
517 vptr->rd_ring[i].rdesc0.owner = OWNED_BY_NIC;
518
519 writew(vptr->options.numrx, &regs->RBRDU);
520 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
521 writew(0, &regs->RDIdx);
522 writew(vptr->options.numrx - 1, &regs->RDCSize);
523}
524
525/**
526 * velocity_init_registers - initialise MAC registers
527 * @vptr: velocity to init
528 * @type: type of initialisation (hot or cold)
529 *
530 * Initialise the MAC on a reset or on first set up on the
531 * hardware.
532 */
533
6aa20a22 534static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT
535 enum velocity_init_type type)
536{
537 struct mac_regs __iomem * regs = vptr->mac_regs;
538 int i, mii_status;
539
540 mac_wol_reset(regs);
541
542 switch (type) {
543 case VELOCITY_INIT_RESET:
544 case VELOCITY_INIT_WOL:
545
546 netif_stop_queue(vptr->dev);
547
548 /*
549 * Reset RX to prevent RX pointer not on the 4X location
550 */
551 velocity_rx_reset(vptr);
552 mac_rx_queue_run(regs);
553 mac_rx_queue_wake(regs);
554
555 mii_status = velocity_get_opt_media_mode(vptr);
556 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
557 velocity_print_link_status(vptr);
558 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
559 netif_wake_queue(vptr->dev);
560 }
561
562 enable_flow_control_ability(vptr);
563
564 mac_clear_isr(regs);
565 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 566 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT
567 &regs->CR0Set);
568
569 break;
570
571 case VELOCITY_INIT_COLD:
572 default:
573 /*
574 * Do reset
575 */
576 velocity_soft_reset(vptr);
577 mdelay(5);
578
579 mac_eeprom_reload(regs);
580 for (i = 0; i < 6; i++) {
581 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
582 }
583 /*
584 * clear Pre_ACPI bit.
585 */
586 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
587 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
588 mac_set_dma_length(regs, vptr->options.DMA_length);
589
590 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
591 /*
592 * Back off algorithm use original IEEE standard
593 */
594 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
595
596 /*
597 * Init CAM filter
598 */
599 velocity_init_cam_filter(vptr);
600
601 /*
602 * Set packet filter: Receive directed and broadcast address
603 */
604 velocity_set_multi(vptr->dev);
605
606 /*
607 * Enable MII auto-polling
608 */
609 enable_mii_autopoll(regs);
610
611 vptr->int_mask = INT_MASK_DEF;
612
613 writel(cpu_to_le32(vptr->rd_pool_dma), &regs->RDBaseLo);
614 writew(vptr->options.numrx - 1, &regs->RDCSize);
615 mac_rx_queue_run(regs);
616 mac_rx_queue_wake(regs);
617
618 writew(vptr->options.numtx - 1, &regs->TDCSize);
619
620 for (i = 0; i < vptr->num_txq; i++) {
621 writel(cpu_to_le32(vptr->td_pool_dma[i]), &(regs->TDBaseLo[i]));
622 mac_tx_queue_run(regs, i);
623 }
624
625 init_flow_control_register(vptr);
626
627 writel(CR0_STOP, &regs->CR0Clr);
628 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
629
630 mii_status = velocity_get_opt_media_mode(vptr);
631 netif_stop_queue(vptr->dev);
632
633 mii_init(vptr, mii_status);
634
635 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
636 velocity_print_link_status(vptr);
637 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
638 netif_wake_queue(vptr->dev);
639 }
640
641 enable_flow_control_ability(vptr);
642 mac_hw_mibs_init(regs);
643 mac_write_int_mask(vptr->int_mask, regs);
644 mac_clear_isr(regs);
645
646 }
647}
648
649/**
650 * velocity_soft_reset - soft reset
651 * @vptr: velocity to reset
652 *
653 * Kick off a soft reset of the velocity adapter and then poll
654 * until the reset sequence has completed before returning.
655 */
656
657static int velocity_soft_reset(struct velocity_info *vptr)
658{
659 struct mac_regs __iomem * regs = vptr->mac_regs;
660 int i = 0;
661
662 writel(CR0_SFRST, &regs->CR0Set);
663
664 for (i = 0; i < W_MAX_TIMEOUT; i++) {
665 udelay(5);
666 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
667 break;
668 }
669
670 if (i == W_MAX_TIMEOUT) {
671 writel(CR0_FORSRST, &regs->CR0Set);
672 /* FIXME: PCI POSTING */
673 /* delay 2ms */
674 mdelay(2);
675 }
676 return 0;
677}
678
679/**
680 * velocity_found1 - set up discovered velocity card
681 * @pdev: PCI device
682 * @ent: PCI device table entry that matched
683 *
684 * Configure a discovered adapter from scratch. Return a negative
685 * errno error code on failure paths.
686 */
687
688static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
689{
690 static int first = 1;
691 struct net_device *dev;
692 int i;
cabb7667 693 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT
694 struct velocity_info *vptr;
695 struct mac_regs __iomem * regs;
696 int ret = -ENOMEM;
697
e54f4893
JG
698 /* FIXME: this driver, like almost all other ethernet drivers,
699 * can support more than MAX_UNITS.
700 */
1da177e4 701 if (velocity_nics >= MAX_UNITS) {
6aa20a22 702 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 703 velocity_nics);
1da177e4
LT
704 return -ENODEV;
705 }
706
707 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 708 if (!dev) {
9b91cf9d 709 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT
710 goto out;
711 }
6aa20a22 712
1da177e4 713 /* Chain it all together */
6aa20a22 714
1da177e4
LT
715 SET_MODULE_OWNER(dev);
716 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 717 vptr = netdev_priv(dev);
1da177e4
LT
718
719
720 if (first) {
6aa20a22 721 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT
722 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
723 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
724 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
725 first = 0;
726 }
727
728 velocity_init_info(pdev, vptr, info);
729
730 vptr->dev = dev;
731
732 dev->irq = pdev->irq;
733
734 ret = pci_enable_device(pdev);
6aa20a22 735 if (ret < 0)
1da177e4
LT
736 goto err_free_dev;
737
738 ret = velocity_get_pci_info(vptr, pdev);
739 if (ret < 0) {
e54f4893 740 /* error message already printed */
1da177e4
LT
741 goto err_disable;
742 }
743
744 ret = pci_request_regions(pdev, VELOCITY_NAME);
745 if (ret < 0) {
9b91cf9d 746 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT
747 goto err_disable;
748 }
749
cabb7667 750 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT
751 if (regs == NULL) {
752 ret = -EIO;
753 goto err_release_res;
754 }
755
756 vptr->mac_regs = regs;
757
758 mac_wol_reset(regs);
759
760 dev->base_addr = vptr->ioaddr;
761
762 for (i = 0; i < 6; i++)
763 dev->dev_addr[i] = readb(&regs->PAR[i]);
764
765
766 velocity_get_options(&vptr->options, velocity_nics, dev->name);
767
6aa20a22 768 /*
1da177e4
LT
769 * Mask out the options cannot be set to the chip
770 */
6aa20a22 771
1da177e4
LT
772 vptr->options.flags &= info->flags;
773
774 /*
775 * Enable the chip specified capbilities
776 */
6aa20a22 777
1da177e4
LT
778 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
779
780 vptr->wol_opts = vptr->options.wol_opts;
781 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
782
783 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
784
785 dev->irq = pdev->irq;
786 dev->open = velocity_open;
787 dev->hard_start_xmit = velocity_xmit;
788 dev->stop = velocity_close;
789 dev->get_stats = velocity_get_stats;
790 dev->set_multicast_list = velocity_set_multi;
791 dev->do_ioctl = velocity_ioctl;
792 dev->ethtool_ops = &velocity_ethtool_ops;
793 dev->change_mtu = velocity_change_mtu;
794#ifdef VELOCITY_ZERO_COPY_SUPPORT
795 dev->features |= NETIF_F_SG;
796#endif
797
798 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM) {
9f3f46b5 799 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT
800 }
801
802 ret = register_netdev(dev);
803 if (ret < 0)
804 goto err_iounmap;
805
8a22dddb
FR
806 if (velocity_get_link(dev))
807 netif_carrier_off(dev);
808
1da177e4
LT
809 velocity_print_info(vptr);
810 pci_set_drvdata(pdev, dev);
6aa20a22 811
1da177e4 812 /* and leave the chip powered down */
6aa20a22 813
1da177e4
LT
814 pci_set_power_state(pdev, PCI_D3hot);
815#ifdef CONFIG_PM
816 {
817 unsigned long flags;
818
819 spin_lock_irqsave(&velocity_dev_list_lock, flags);
820 list_add(&vptr->list, &velocity_dev_list);
821 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
822 }
823#endif
824 velocity_nics++;
825out:
826 return ret;
827
828err_iounmap:
829 iounmap(regs);
830err_release_res:
831 pci_release_regions(pdev);
832err_disable:
833 pci_disable_device(pdev);
834err_free_dev:
835 free_netdev(dev);
836 goto out;
837}
838
839/**
840 * velocity_print_info - per driver data
841 * @vptr: velocity
842 *
843 * Print per driver data as the kernel driver finds Velocity
844 * hardware
845 */
846
847static void __devinit velocity_print_info(struct velocity_info *vptr)
848{
849 struct net_device *dev = vptr->dev;
850
851 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG
852 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
853 dev->name,
854 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT
855 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
856}
857
858/**
859 * velocity_init_info - init private data
860 * @pdev: PCI device
861 * @vptr: Velocity info
862 * @info: Board type
863 *
864 * Set up the initial velocity_info struct for the device that has been
865 * discovered.
866 */
867
cabb7667
JG
868static void __devinit velocity_init_info(struct pci_dev *pdev,
869 struct velocity_info *vptr,
870 const struct velocity_info_tbl *info)
1da177e4
LT
871{
872 memset(vptr, 0, sizeof(struct velocity_info));
873
874 vptr->pdev = pdev;
875 vptr->chip_id = info->chip_id;
1da177e4
LT
876 vptr->num_txq = info->txqueue;
877 vptr->multicast_limit = MCAM_SIZE;
878 spin_lock_init(&vptr->lock);
879 INIT_LIST_HEAD(&vptr->list);
880}
881
882/**
883 * velocity_get_pci_info - retrieve PCI info for device
884 * @vptr: velocity device
885 * @pdev: PCI device it matches
886 *
887 * Retrieve the PCI configuration space data that interests us from
888 * the kernel PCI layer
889 */
890
891static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
892{
44c10138 893 vptr->rev_id = pdev->revision;
6aa20a22 894
1da177e4
LT
895 pci_set_master(pdev);
896
897 vptr->ioaddr = pci_resource_start(pdev, 0);
898 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 899
e54f4893 900 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 901 dev_err(&pdev->dev,
e54f4893 902 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT
903 return -EINVAL;
904 }
905
e54f4893 906 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 907 dev_err(&pdev->dev,
e54f4893 908 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT
909 return -EINVAL;
910 }
911
cabb7667 912 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 913 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT
914 return -EINVAL;
915 }
916 vptr->pdev = pdev;
917
918 return 0;
919}
920
921/**
922 * velocity_init_rings - set up DMA rings
923 * @vptr: Velocity to set up
924 *
925 * Allocate PCI mapped DMA rings for the receive and transmit layer
926 * to use.
927 */
928
929static int velocity_init_rings(struct velocity_info *vptr)
930{
931 int i;
932 unsigned int psize;
933 unsigned int tsize;
934 dma_addr_t pool_dma;
935 u8 *pool;
936
937 /*
6aa20a22 938 * Allocate all RD/TD rings a single pool
1da177e4 939 */
6aa20a22
JG
940
941 psize = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT
942 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
943
944 /*
945 * pci_alloc_consistent() fulfills the requirement for 64 bytes
946 * alignment
947 */
948 pool = pci_alloc_consistent(vptr->pdev, psize, &pool_dma);
949
950 if (pool == NULL) {
6aa20a22 951 printk(KERN_ERR "%s : DMA memory allocation failed.\n",
1da177e4
LT
952 vptr->dev->name);
953 return -ENOMEM;
954 }
955
956 memset(pool, 0, psize);
957
958 vptr->rd_ring = (struct rx_desc *) pool;
959
960 vptr->rd_pool_dma = pool_dma;
961
962 tsize = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
6aa20a22 963 vptr->tx_bufs = pci_alloc_consistent(vptr->pdev, tsize,
1da177e4
LT
964 &vptr->tx_bufs_dma);
965
966 if (vptr->tx_bufs == NULL) {
6aa20a22 967 printk(KERN_ERR "%s: DMA memory allocation failed.\n",
1da177e4
LT
968 vptr->dev->name);
969 pci_free_consistent(vptr->pdev, psize, pool, pool_dma);
970 return -ENOMEM;
971 }
972
973 memset(vptr->tx_bufs, 0, vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq);
974
975 i = vptr->options.numrx * sizeof(struct rx_desc);
976 pool += i;
977 pool_dma += i;
978 for (i = 0; i < vptr->num_txq; i++) {
979 int offset = vptr->options.numtx * sizeof(struct tx_desc);
980
981 vptr->td_pool_dma[i] = pool_dma;
982 vptr->td_rings[i] = (struct tx_desc *) pool;
983 pool += offset;
984 pool_dma += offset;
985 }
986 return 0;
987}
988
989/**
990 * velocity_free_rings - free PCI ring pointers
991 * @vptr: Velocity to free from
992 *
993 * Clean up the PCI ring buffers allocated to this velocity.
994 */
995
996static void velocity_free_rings(struct velocity_info *vptr)
997{
998 int size;
999
6aa20a22 1000 size = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT
1001 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1002
1003 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1004
1005 size = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
1006
1007 pci_free_consistent(vptr->pdev, size, vptr->tx_bufs, vptr->tx_bufs_dma);
1008}
1009
1010static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
1011{
1012 struct mac_regs __iomem *regs = vptr->mac_regs;
1013 int avail, dirty, unusable;
1014
1015 /*
1016 * RD number must be equal to 4X per hardware spec
1017 * (programming guide rev 1.20, p.13)
1018 */
1019 if (vptr->rd_filled < 4)
1020 return;
1021
1022 wmb();
1023
1024 unusable = vptr->rd_filled & 0x0003;
1025 dirty = vptr->rd_dirty - unusable;
1026 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1027 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1028 vptr->rd_ring[dirty].rdesc0.owner = OWNED_BY_NIC;
1029 }
1030
1031 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1032 vptr->rd_filled = unusable;
1033}
1034
1035static int velocity_rx_refill(struct velocity_info *vptr)
1036{
1037 int dirty = vptr->rd_dirty, done = 0, ret = 0;
1038
1039 do {
1040 struct rx_desc *rd = vptr->rd_ring + dirty;
1041
1042 /* Fine for an all zero Rx desc at init time as well */
1043 if (rd->rdesc0.owner == OWNED_BY_NIC)
1044 break;
1045
1046 if (!vptr->rd_info[dirty].skb) {
1047 ret = velocity_alloc_rx_buf(vptr, dirty);
1048 if (ret < 0)
1049 break;
1050 }
1051 done++;
6aa20a22 1052 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT
1053 } while (dirty != vptr->rd_curr);
1054
1055 if (done) {
1056 vptr->rd_dirty = dirty;
1057 vptr->rd_filled += done;
1058 velocity_give_many_rx_descs(vptr);
1059 }
1060
1061 return ret;
1062}
1063
1064/**
1065 * velocity_init_rd_ring - set up receive ring
1066 * @vptr: velocity to configure
1067 *
1068 * Allocate and set up the receive buffers for each ring slot and
1069 * assign them to the network adapter.
1070 */
1071
1072static int velocity_init_rd_ring(struct velocity_info *vptr)
1073{
1074 int ret = -ENOMEM;
6aa20a22 1075 unsigned int rsize = sizeof(struct velocity_rd_info) *
1da177e4
LT
1076 vptr->options.numrx;
1077
1078 vptr->rd_info = kmalloc(rsize, GFP_KERNEL);
1079 if(vptr->rd_info == NULL)
1080 goto out;
1081 memset(vptr->rd_info, 0, rsize);
1082
1083 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1084
1085 ret = velocity_rx_refill(vptr);
1086 if (ret < 0) {
1087 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1088 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1089 velocity_free_rd_ring(vptr);
1090 }
1091out:
1092 return ret;
1093}
1094
1095/**
1096 * velocity_free_rd_ring - free receive ring
1097 * @vptr: velocity to clean up
1098 *
1099 * Free the receive buffers for each ring slot and any
1100 * attached socket buffers that need to go away.
1101 */
1102
1103static void velocity_free_rd_ring(struct velocity_info *vptr)
1104{
1105 int i;
1106
1107 if (vptr->rd_info == NULL)
1108 return;
1109
1110 for (i = 0; i < vptr->options.numrx; i++) {
1111 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR
1112 struct rx_desc *rd = vptr->rd_ring + i;
1113
1114 memset(rd, 0, sizeof(*rd));
1da177e4
LT
1115
1116 if (!rd_info->skb)
1117 continue;
1118 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1119 PCI_DMA_FROMDEVICE);
1120 rd_info->skb_dma = (dma_addr_t) NULL;
1121
1122 dev_kfree_skb(rd_info->skb);
1123 rd_info->skb = NULL;
1124 }
1125
1126 kfree(vptr->rd_info);
1127 vptr->rd_info = NULL;
1128}
1129
1130/**
1131 * velocity_init_td_ring - set up transmit ring
1132 * @vptr: velocity
1133 *
1134 * Set up the transmit ring and chain the ring pointers together.
1135 * Returns zero on success or a negative posix errno code for
1136 * failure.
1137 */
6aa20a22 1138
1da177e4
LT
1139static int velocity_init_td_ring(struct velocity_info *vptr)
1140{
1141 int i, j;
1142 dma_addr_t curr;
1143 struct tx_desc *td;
1144 struct velocity_td_info *td_info;
6aa20a22 1145 unsigned int tsize = sizeof(struct velocity_td_info) *
1da177e4
LT
1146 vptr->options.numtx;
1147
1148 /* Init the TD ring entries */
1149 for (j = 0; j < vptr->num_txq; j++) {
1150 curr = vptr->td_pool_dma[j];
1151
1152 vptr->td_infos[j] = kmalloc(tsize, GFP_KERNEL);
1153 if(vptr->td_infos[j] == NULL)
1154 {
1155 while(--j >= 0)
1156 kfree(vptr->td_infos[j]);
1157 return -ENOMEM;
1158 }
1159 memset(vptr->td_infos[j], 0, tsize);
1160
1161 for (i = 0; i < vptr->options.numtx; i++, curr += sizeof(struct tx_desc)) {
1162 td = &(vptr->td_rings[j][i]);
1163 td_info = &(vptr->td_infos[j][i]);
1164 td_info->buf = vptr->tx_bufs +
1165 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1166 td_info->buf_dma = vptr->tx_bufs_dma +
1167 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1168 }
1169 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1170 }
1171 return 0;
1172}
1173
1174/*
1175 * FIXME: could we merge this with velocity_free_tx_buf ?
1176 */
1177
1178static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1179 int q, int n)
1180{
1181 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1182 int i;
6aa20a22 1183
1da177e4
LT
1184 if (td_info == NULL)
1185 return;
6aa20a22 1186
1da177e4
LT
1187 if (td_info->skb) {
1188 for (i = 0; i < td_info->nskb_dma; i++)
1189 {
1190 if (td_info->skb_dma[i]) {
6aa20a22 1191 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT
1192 td_info->skb->len, PCI_DMA_TODEVICE);
1193 td_info->skb_dma[i] = (dma_addr_t) NULL;
1194 }
1195 }
1196 dev_kfree_skb(td_info->skb);
1197 td_info->skb = NULL;
1198 }
1199}
1200
1201/**
1202 * velocity_free_td_ring - free td ring
1203 * @vptr: velocity
1204 *
1205 * Free up the transmit ring for this particular velocity adapter.
1206 * We free the ring contents but not the ring itself.
1207 */
6aa20a22 1208
1da177e4
LT
1209static void velocity_free_td_ring(struct velocity_info *vptr)
1210{
1211 int i, j;
1212
1213 for (j = 0; j < vptr->num_txq; j++) {
1214 if (vptr->td_infos[j] == NULL)
1215 continue;
1216 for (i = 0; i < vptr->options.numtx; i++) {
1217 velocity_free_td_ring_entry(vptr, j, i);
1218
1219 }
b4558ea9
JJ
1220 kfree(vptr->td_infos[j]);
1221 vptr->td_infos[j] = NULL;
1da177e4
LT
1222 }
1223}
1224
1225/**
1226 * velocity_rx_srv - service RX interrupt
1227 * @vptr: velocity
1228 * @status: adapter status (unused)
1229 *
1230 * Walk the receive ring of the velocity adapter and remove
1231 * any received packets from the receive queue. Hand the ring
1232 * slots back to the adapter for reuse.
1233 */
6aa20a22 1234
1da177e4
LT
1235static int velocity_rx_srv(struct velocity_info *vptr, int status)
1236{
1237 struct net_device_stats *stats = &vptr->stats;
1238 int rd_curr = vptr->rd_curr;
1239 int works = 0;
1240
1241 do {
1242 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1243
1244 if (!vptr->rd_info[rd_curr].skb)
1245 break;
1246
1247 if (rd->rdesc0.owner == OWNED_BY_NIC)
1248 break;
1249
1250 rmb();
1251
1252 /*
1253 * Don't drop CE or RL error frame although RXOK is off
1254 */
1255 if ((rd->rdesc0.RSR & RSR_RXOK) || (!(rd->rdesc0.RSR & RSR_RXOK) && (rd->rdesc0.RSR & (RSR_CE | RSR_RL)))) {
1256 if (velocity_receive_frame(vptr, rd_curr) < 0)
1257 stats->rx_dropped++;
1258 } else {
1259 if (rd->rdesc0.RSR & RSR_CRC)
1260 stats->rx_crc_errors++;
1261 if (rd->rdesc0.RSR & RSR_FAE)
1262 stats->rx_frame_errors++;
1263
1264 stats->rx_dropped++;
1265 }
1266
1267 rd->inten = 1;
1268
1269 vptr->dev->last_rx = jiffies;
1270
1271 rd_curr++;
1272 if (rd_curr >= vptr->options.numrx)
1273 rd_curr = 0;
1274 } while (++works <= 15);
1275
1276 vptr->rd_curr = rd_curr;
1277
1278 if (works > 0 && velocity_rx_refill(vptr) < 0) {
1279 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1280 "%s: rx buf allocation failure\n", vptr->dev->name);
1281 }
1282
1283 VAR_USED(stats);
1284 return works;
1285}
1286
1287/**
1288 * velocity_rx_csum - checksum process
1289 * @rd: receive packet descriptor
1290 * @skb: network layer packet buffer
1291 *
1292 * Process the status bits for the received packet and determine
1293 * if the checksum was computed and verified by the hardware
1294 */
6aa20a22 1295
1da177e4
LT
1296static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1297{
1298 skb->ip_summed = CHECKSUM_NONE;
1299
1300 if (rd->rdesc1.CSM & CSM_IPKT) {
1301 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1302 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT
1303 (rd->rdesc1.CSM & CSM_UDPKT)) {
1304 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1305 return;
1306 }
1307 }
1308 skb->ip_summed = CHECKSUM_UNNECESSARY;
1309 }
1310 }
1311}
1312
1313/**
1314 * velocity_rx_copy - in place Rx copy for small packets
1315 * @rx_skb: network layer packet buffer candidate
1316 * @pkt_size: received data size
1317 * @rd: receive packet descriptor
1318 * @dev: network device
1319 *
1320 * Replace the current skb that is scheduled for Rx processing by a
1321 * shorter, immediatly allocated skb, if the received packet is small
1322 * enough. This function returns a negative value if the received
1323 * packet is too big or if memory is exhausted.
1324 */
1325static inline int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1326 struct velocity_info *vptr)
1327{
1328 int ret = -1;
1329
1330 if (pkt_size < rx_copybreak) {
1331 struct sk_buff *new_skb;
1332
1333 new_skb = dev_alloc_skb(pkt_size + 2);
1334 if (new_skb) {
1335 new_skb->dev = vptr->dev;
1336 new_skb->ip_summed = rx_skb[0]->ip_summed;
1337
1338 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN)
1339 skb_reserve(new_skb, 2);
1340
d626f62b
ACM
1341 skb_copy_from_linear_data(rx_skb[0], new_skb->data,
1342 pkt_size);
1da177e4
LT
1343 *rx_skb = new_skb;
1344 ret = 0;
1345 }
6aa20a22 1346
1da177e4
LT
1347 }
1348 return ret;
1349}
1350
1351/**
1352 * velocity_iph_realign - IP header alignment
1353 * @vptr: velocity we are handling
1354 * @skb: network layer packet buffer
1355 * @pkt_size: received data size
1356 *
1357 * Align IP header on a 2 bytes boundary. This behavior can be
1358 * configured by the user.
1359 */
1360static inline void velocity_iph_realign(struct velocity_info *vptr,
1361 struct sk_buff *skb, int pkt_size)
1362{
1363 /* FIXME - memmove ? */
1364 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
1365 int i;
1366
1367 for (i = pkt_size; i >= 0; i--)
1368 *(skb->data + i + 2) = *(skb->data + i);
1369 skb_reserve(skb, 2);
1370 }
1371}
1372
1373/**
1374 * velocity_receive_frame - received packet processor
1375 * @vptr: velocity we are handling
1376 * @idx: ring index
6aa20a22 1377 *
1da177e4
LT
1378 * A packet has arrived. We process the packet and if appropriate
1379 * pass the frame up the network stack
1380 */
6aa20a22 1381
1da177e4
LT
1382static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1383{
1384 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1385 struct net_device_stats *stats = &vptr->stats;
1386 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1387 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1388 int pkt_len = rd->rdesc0.len;
1389 struct sk_buff *skb;
1390
1391 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1392 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1393 stats->rx_length_errors++;
1394 return -EINVAL;
1395 }
1396
1397 if (rd->rdesc0.RSR & RSR_MAR)
1398 vptr->stats.multicast++;
1399
1400 skb = rd_info->skb;
1da177e4
LT
1401
1402 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1403 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1404
1405 /*
1406 * Drop frame not meeting IEEE 802.3
1407 */
6aa20a22 1408
1da177e4
LT
1409 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1410 if (rd->rdesc0.RSR & RSR_RL) {
1411 stats->rx_length_errors++;
1412 return -EINVAL;
1413 }
1414 }
1415
1416 pci_action = pci_dma_sync_single_for_device;
1417
1418 velocity_rx_csum(rd, skb);
1419
1420 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1421 velocity_iph_realign(vptr, skb, pkt_len);
1422 pci_action = pci_unmap_single;
1423 rd_info->skb = NULL;
1424 }
1425
1426 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1427 PCI_DMA_FROMDEVICE);
1428
1429 skb_put(skb, pkt_len - 4);
4c13eb66 1430 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4
LT
1431
1432 stats->rx_bytes += pkt_len;
1433 netif_rx(skb);
1434
1435 return 0;
1436}
1437
1438/**
1439 * velocity_alloc_rx_buf - allocate aligned receive buffer
1440 * @vptr: velocity
1441 * @idx: ring index
1442 *
1443 * Allocate a new full sized buffer for the reception of a frame and
1444 * map it into PCI space for the hardware to use. The hardware
1445 * requires *64* byte alignment of the buffer which makes life
1446 * less fun than would be ideal.
1447 */
6aa20a22 1448
1da177e4
LT
1449static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1450{
1451 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1452 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1453
1454 rd_info->skb = dev_alloc_skb(vptr->rx_buf_sz + 64);
1455 if (rd_info->skb == NULL)
1456 return -ENOMEM;
1457
1458 /*
1459 * Do the gymnastics to get the buffer head for data at
1460 * 64byte alignment.
1461 */
689be439 1462 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
1da177e4 1463 rd_info->skb->dev = vptr->dev;
689be439 1464 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1465
1da177e4
LT
1466 /*
1467 * Fill in the descriptor to match
6aa20a22
JG
1468 */
1469
1da177e4
LT
1470 *((u32 *) & (rd->rdesc0)) = 0;
1471 rd->len = cpu_to_le32(vptr->rx_buf_sz);
1472 rd->inten = 1;
1473 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1474 rd->pa_high = 0;
1475 return 0;
1476}
1477
1478/**
1479 * tx_srv - transmit interrupt service
1480 * @vptr; Velocity
1481 * @status:
1482 *
1483 * Scan the queues looking for transmitted packets that
1484 * we can complete and clean up. Update any statistics as
1485 * neccessary/
1486 */
6aa20a22 1487
1da177e4
LT
1488static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1489{
1490 struct tx_desc *td;
1491 int qnum;
1492 int full = 0;
1493 int idx;
1494 int works = 0;
1495 struct velocity_td_info *tdinfo;
1496 struct net_device_stats *stats = &vptr->stats;
1497
1498 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1499 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT
1500 idx = (idx + 1) % vptr->options.numtx) {
1501
1502 /*
1503 * Get Tx Descriptor
1504 */
1505 td = &(vptr->td_rings[qnum][idx]);
1506 tdinfo = &(vptr->td_infos[qnum][idx]);
1507
1508 if (td->tdesc0.owner == OWNED_BY_NIC)
1509 break;
1510
1511 if ((works++ > 15))
1512 break;
1513
1514 if (td->tdesc0.TSR & TSR0_TERR) {
1515 stats->tx_errors++;
1516 stats->tx_dropped++;
1517 if (td->tdesc0.TSR & TSR0_CDH)
1518 stats->tx_heartbeat_errors++;
1519 if (td->tdesc0.TSR & TSR0_CRS)
1520 stats->tx_carrier_errors++;
1521 if (td->tdesc0.TSR & TSR0_ABT)
1522 stats->tx_aborted_errors++;
1523 if (td->tdesc0.TSR & TSR0_OWC)
1524 stats->tx_window_errors++;
1525 } else {
1526 stats->tx_packets++;
1527 stats->tx_bytes += tdinfo->skb->len;
1528 }
1529 velocity_free_tx_buf(vptr, tdinfo);
1530 vptr->td_used[qnum]--;
1531 }
1532 vptr->td_tail[qnum] = idx;
1533
1534 if (AVAIL_TD(vptr, qnum) < 1) {
1535 full = 1;
1536 }
1537 }
1538 /*
1539 * Look to see if we should kick the transmit network
1540 * layer for more work.
1541 */
1542 if (netif_queue_stopped(vptr->dev) && (full == 0)
1543 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1544 netif_wake_queue(vptr->dev);
1545 }
1546 return works;
1547}
1548
1549/**
1550 * velocity_print_link_status - link status reporting
1551 * @vptr: velocity to report on
1552 *
1553 * Turn the link status of the velocity card into a kernel log
1554 * description of the new link state, detailing speed and duplex
1555 * status
1556 */
1557
1558static void velocity_print_link_status(struct velocity_info *vptr)
1559{
1560
1561 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1562 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1563 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1564 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT
1565
1566 if (vptr->mii_status & VELOCITY_SPEED_1000)
1567 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1568 else if (vptr->mii_status & VELOCITY_SPEED_100)
1569 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1570 else
1571 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1572
1573 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1574 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1575 else
1576 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1577 } else {
1578 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1579 switch (vptr->options.spd_dpx) {
1580 case SPD_DPX_100_HALF:
1581 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1582 break;
1583 case SPD_DPX_100_FULL:
1584 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1585 break;
1586 case SPD_DPX_10_HALF:
1587 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1588 break;
1589 case SPD_DPX_10_FULL:
1590 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1591 break;
1592 default:
1593 break;
1594 }
1595 }
1596}
1597
1598/**
1599 * velocity_error - handle error from controller
1600 * @vptr: velocity
1601 * @status: card status
1602 *
1603 * Process an error report from the hardware and attempt to recover
6aa20a22 1604 * the card itself. At the moment we cannot recover from some
1da177e4
LT
1605 * theoretically impossible errors but this could be fixed using
1606 * the pci_device_failed logic to bounce the hardware
1607 *
1608 */
6aa20a22 1609
1da177e4
LT
1610static void velocity_error(struct velocity_info *vptr, int status)
1611{
1612
1613 if (status & ISR_TXSTLI) {
1614 struct mac_regs __iomem * regs = vptr->mac_regs;
1615
0e6ff158 1616 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT
1617 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1618 writew(TRDCSR_RUN, &regs->TDCSRClr);
1619 netif_stop_queue(vptr->dev);
6aa20a22 1620
1da177e4
LT
1621 /* FIXME: port over the pci_device_failed code and use it
1622 here */
1623 }
1624
1625 if (status & ISR_SRCI) {
1626 struct mac_regs __iomem * regs = vptr->mac_regs;
1627 int linked;
1628
1629 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1630 vptr->mii_status = check_connection_type(regs);
1631
1632 /*
6aa20a22 1633 * If it is a 3119, disable frame bursting in
1da177e4
LT
1634 * halfduplex mode and enable it in fullduplex
1635 * mode
1636 */
1637 if (vptr->rev_id < REV_ID_VT3216_A0) {
1638 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1639 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1640 else
1641 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1642 }
1643 /*
1644 * Only enable CD heart beat counter in 10HD mode
1645 */
1646 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1647 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1648 } else {
1649 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1650 }
1651 }
1652 /*
1653 * Get link status from PHYSR0
1654 */
1655 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1656
1657 if (linked) {
1658 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1659 netif_carrier_on(vptr->dev);
1da177e4
LT
1660 } else {
1661 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1662 netif_carrier_off(vptr->dev);
1da177e4
LT
1663 }
1664
1665 velocity_print_link_status(vptr);
1666 enable_flow_control_ability(vptr);
1667
1668 /*
6aa20a22 1669 * Re-enable auto-polling because SRCI will disable
1da177e4
LT
1670 * auto-polling
1671 */
6aa20a22 1672
1da177e4
LT
1673 enable_mii_autopoll(regs);
1674
1675 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1676 netif_stop_queue(vptr->dev);
1677 else
1678 netif_wake_queue(vptr->dev);
1679
1680 };
1681 if (status & ISR_MIBFI)
1682 velocity_update_hw_mibs(vptr);
1683 if (status & ISR_LSTEI)
1684 mac_rx_queue_wake(vptr->mac_regs);
1685}
1686
1687/**
1688 * velocity_free_tx_buf - free transmit buffer
1689 * @vptr: velocity
1690 * @tdinfo: buffer
1691 *
1692 * Release an transmit buffer. If the buffer was preallocated then
1693 * recycle it, if not then unmap the buffer.
1694 */
6aa20a22 1695
1da177e4
LT
1696static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1697{
1698 struct sk_buff *skb = tdinfo->skb;
1699 int i;
1700
1701 /*
1702 * Don't unmap the pre-allocated tx_bufs
1703 */
1704 if (tdinfo->skb_dma && (tdinfo->skb_dma[0] != tdinfo->buf_dma)) {
1705
1706 for (i = 0; i < tdinfo->nskb_dma; i++) {
1707#ifdef VELOCITY_ZERO_COPY_SUPPORT
1708 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], td->tdesc1.len, PCI_DMA_TODEVICE);
1709#else
1710 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1711#endif
1712 tdinfo->skb_dma[i] = 0;
1713 }
1714 }
1715 dev_kfree_skb_irq(skb);
1716 tdinfo->skb = NULL;
1717}
1718
1719/**
1720 * velocity_open - interface activation callback
1721 * @dev: network layer device to open
1722 *
1723 * Called when the network layer brings the interface up. Returns
1724 * a negative posix error code on failure, or zero on success.
1725 *
1726 * All the ring allocation and set up is done on open for this
1727 * adapter to minimise memory usage when inactive
1728 */
6aa20a22 1729
1da177e4
LT
1730static int velocity_open(struct net_device *dev)
1731{
8ab6f3f7 1732 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1733 int ret;
1734
1735 vptr->rx_buf_sz = (dev->mtu <= 1504 ? PKT_BUF_SZ : dev->mtu + 32);
1736
1737 ret = velocity_init_rings(vptr);
1738 if (ret < 0)
1739 goto out;
1740
1741 ret = velocity_init_rd_ring(vptr);
1742 if (ret < 0)
1743 goto err_free_desc_rings;
1744
1745 ret = velocity_init_td_ring(vptr);
1746 if (ret < 0)
1747 goto err_free_rd_ring;
6aa20a22
JG
1748
1749 /* Ensure chip is running */
1da177e4 1750 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1751
1da177e4
LT
1752 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1753
1fb9df5d 1754 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT
1755 dev->name, dev);
1756 if (ret < 0) {
1757 /* Power down the chip */
1758 pci_set_power_state(vptr->pdev, PCI_D3hot);
1759 goto err_free_td_ring;
1760 }
1761
1762 mac_enable_int(vptr->mac_regs);
1763 netif_start_queue(dev);
1764 vptr->flags |= VELOCITY_FLAGS_OPENED;
1765out:
1766 return ret;
1767
1768err_free_td_ring:
1769 velocity_free_td_ring(vptr);
1770err_free_rd_ring:
1771 velocity_free_rd_ring(vptr);
1772err_free_desc_rings:
1773 velocity_free_rings(vptr);
1774 goto out;
1775}
1776
6aa20a22 1777/**
1da177e4
LT
1778 * velocity_change_mtu - MTU change callback
1779 * @dev: network device
1780 * @new_mtu: desired MTU
1781 *
1782 * Handle requests from the networking layer for MTU change on
1783 * this interface. It gets called on a change by the network layer.
1784 * Return zero for success or negative posix error code.
1785 */
6aa20a22 1786
1da177e4
LT
1787static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1788{
8ab6f3f7 1789 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1790 unsigned long flags;
1791 int oldmtu = dev->mtu;
1792 int ret = 0;
1793
1794 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1795 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT
1796 vptr->dev->name);
1797 return -EINVAL;
1798 }
1799
1800 if (new_mtu != oldmtu) {
1801 spin_lock_irqsave(&vptr->lock, flags);
1802
1803 netif_stop_queue(dev);
1804 velocity_shutdown(vptr);
1805
1806 velocity_free_td_ring(vptr);
1807 velocity_free_rd_ring(vptr);
1808
1809 dev->mtu = new_mtu;
1810 if (new_mtu > 8192)
1811 vptr->rx_buf_sz = 9 * 1024;
1812 else if (new_mtu > 4096)
1813 vptr->rx_buf_sz = 8192;
1814 else
1815 vptr->rx_buf_sz = 4 * 1024;
1816
1817 ret = velocity_init_rd_ring(vptr);
1818 if (ret < 0)
1819 goto out_unlock;
1820
1821 ret = velocity_init_td_ring(vptr);
1822 if (ret < 0)
1823 goto out_unlock;
1824
1825 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1826
1827 mac_enable_int(vptr->mac_regs);
1828 netif_start_queue(dev);
1829out_unlock:
1830 spin_unlock_irqrestore(&vptr->lock, flags);
1831 }
1832
1833 return ret;
1834}
1835
1836/**
1837 * velocity_shutdown - shut down the chip
1838 * @vptr: velocity to deactivate
1839 *
1840 * Shuts down the internal operations of the velocity and
1841 * disables interrupts, autopolling, transmit and receive
1842 */
6aa20a22 1843
1da177e4
LT
1844static void velocity_shutdown(struct velocity_info *vptr)
1845{
1846 struct mac_regs __iomem * regs = vptr->mac_regs;
1847 mac_disable_int(regs);
1848 writel(CR0_STOP, &regs->CR0Set);
1849 writew(0xFFFF, &regs->TDCSRClr);
1850 writeb(0xFF, &regs->RDCSRClr);
1851 safe_disable_mii_autopoll(regs);
1852 mac_clear_isr(regs);
1853}
1854
1855/**
1856 * velocity_close - close adapter callback
1857 * @dev: network device
1858 *
1859 * Callback from the network layer when the velocity is being
1860 * deactivated by the network layer
1861 */
1862
1863static int velocity_close(struct net_device *dev)
1864{
8ab6f3f7 1865 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1866
1867 netif_stop_queue(dev);
1868 velocity_shutdown(vptr);
1869
1870 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
1871 velocity_get_ip(vptr);
1872 if (dev->irq != 0)
1873 free_irq(dev->irq, dev);
6aa20a22 1874
1da177e4
LT
1875 /* Power down the chip */
1876 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 1877
1da177e4
LT
1878 /* Free the resources */
1879 velocity_free_td_ring(vptr);
1880 velocity_free_rd_ring(vptr);
1881 velocity_free_rings(vptr);
1882
1883 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
1884 return 0;
1885}
1886
1887/**
1888 * velocity_xmit - transmit packet callback
1889 * @skb: buffer to transmit
1890 * @dev: network device
1891 *
1892 * Called by the networ layer to request a packet is queued to
1893 * the velocity. Returns zero on success.
1894 */
6aa20a22 1895
1da177e4
LT
1896static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
1897{
8ab6f3f7 1898 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1899 int qnum = 0;
1900 struct tx_desc *td_ptr;
1901 struct velocity_td_info *tdinfo;
1902 unsigned long flags;
1903 int index;
1904
1905 int pktlen = skb->len;
1906
364c6bad
HX
1907#ifdef VELOCITY_ZERO_COPY_SUPPORT
1908 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
1909 kfree_skb(skb);
1910 return 0;
1911 }
1912#endif
1913
1da177e4
LT
1914 spin_lock_irqsave(&vptr->lock, flags);
1915
1916 index = vptr->td_curr[qnum];
1917 td_ptr = &(vptr->td_rings[qnum][index]);
1918 tdinfo = &(vptr->td_infos[qnum][index]);
1919
1920 td_ptr->tdesc1.TCPLS = TCPLS_NORMAL;
1921 td_ptr->tdesc1.TCR = TCR0_TIC;
1922 td_ptr->td_buf[0].queue = 0;
1923
1924 /*
6aa20a22 1925 * Pad short frames.
1da177e4
LT
1926 */
1927 if (pktlen < ETH_ZLEN) {
1928 /* Cannot occur until ZC support */
1da177e4 1929 pktlen = ETH_ZLEN;
d626f62b 1930 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4
LT
1931 memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len);
1932 tdinfo->skb = skb;
1933 tdinfo->skb_dma[0] = tdinfo->buf_dma;
1934 td_ptr->tdesc0.pktsize = pktlen;
1935 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1936 td_ptr->td_buf[0].pa_high = 0;
1937 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1938 tdinfo->nskb_dma = 1;
1939 td_ptr->tdesc1.CMDZ = 2;
1940 } else
1941#ifdef VELOCITY_ZERO_COPY_SUPPORT
1942 if (skb_shinfo(skb)->nr_frags > 0) {
1943 int nfrags = skb_shinfo(skb)->nr_frags;
1944 tdinfo->skb = skb;
1945 if (nfrags > 6) {
d626f62b 1946 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 1947 tdinfo->skb_dma[0] = tdinfo->buf_dma;
6aa20a22 1948 td_ptr->tdesc0.pktsize =
1da177e4
LT
1949 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1950 td_ptr->td_buf[0].pa_high = 0;
1951 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1952 tdinfo->nskb_dma = 1;
1953 td_ptr->tdesc1.CMDZ = 2;
1954 } else {
1955 int i = 0;
1956 tdinfo->nskb_dma = 0;
1957 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data, skb->len - skb->data_len, PCI_DMA_TODEVICE);
1958
1959 td_ptr->tdesc0.pktsize = pktlen;
1960
1961 /* FIXME: support 48bit DMA later */
1962 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
1963 td_ptr->td_buf[i].pa_high = 0;
1964 td_ptr->td_buf[i].bufsize = skb->len->skb->data_len;
1965
1966 for (i = 0; i < nfrags; i++) {
1967 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1968 void *addr = ((void *) page_address(frag->page + frag->page_offset));
1969
1970 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
1971
1972 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
1973 td_ptr->td_buf[i + 1].pa_high = 0;
1974 td_ptr->td_buf[i + 1].bufsize = frag->size;
1975 }
1976 tdinfo->nskb_dma = i - 1;
1977 td_ptr->tdesc1.CMDZ = i;
1978 }
1979
1980 } else
1981#endif
1982 {
1983 /*
1984 * Map the linear network buffer into PCI space and
1985 * add it to the transmit ring.
1986 */
1987 tdinfo->skb = skb;
1988 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
1989 td_ptr->tdesc0.pktsize = pktlen;
1990 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
1991 td_ptr->td_buf[0].pa_high = 0;
1992 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
1993 tdinfo->nskb_dma = 1;
1994 td_ptr->tdesc1.CMDZ = 2;
1995 }
1996
1997 if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
1998 td_ptr->tdesc1.pqinf.VID = (vptr->options.vid & 0xfff);
1999 td_ptr->tdesc1.pqinf.priority = 0;
2000 td_ptr->tdesc1.pqinf.CFI = 0;
2001 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2002 }
2003
2004 /*
2005 * Handle hardware checksum
2006 */
2007 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2008 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2009 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT
2010 if (ip->protocol == IPPROTO_TCP)
2011 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2012 else if (ip->protocol == IPPROTO_UDP)
2013 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2014 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2015 }
2016 {
2017
2018 int prev = index - 1;
2019
2020 if (prev < 0)
2021 prev = vptr->options.numtx - 1;
2022 td_ptr->tdesc0.owner = OWNED_BY_NIC;
2023 vptr->td_used[qnum]++;
2024 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2025
2026 if (AVAIL_TD(vptr, qnum) < 1)
2027 netif_stop_queue(dev);
2028
2029 td_ptr = &(vptr->td_rings[qnum][prev]);
2030 td_ptr->td_buf[0].queue = 1;
2031 mac_tx_queue_wake(vptr->mac_regs, qnum);
2032 }
2033 dev->trans_start = jiffies;
2034 spin_unlock_irqrestore(&vptr->lock, flags);
2035 return 0;
2036}
2037
2038/**
2039 * velocity_intr - interrupt callback
2040 * @irq: interrupt number
2041 * @dev_instance: interrupting device
1da177e4
LT
2042 *
2043 * Called whenever an interrupt is generated by the velocity
2044 * adapter IRQ line. We may not be the source of the interrupt
2045 * and need to identify initially if we are, and if not exit as
2046 * efficiently as possible.
2047 */
6aa20a22 2048
7d12e780 2049static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT
2050{
2051 struct net_device *dev = dev_instance;
8ab6f3f7 2052 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2053 u32 isr_status;
2054 int max_count = 0;
2055
2056
2057 spin_lock(&vptr->lock);
2058 isr_status = mac_read_isr(vptr->mac_regs);
2059
2060 /* Not us ? */
2061 if (isr_status == 0) {
2062 spin_unlock(&vptr->lock);
2063 return IRQ_NONE;
2064 }
2065
2066 mac_disable_int(vptr->mac_regs);
2067
2068 /*
2069 * Keep processing the ISR until we have completed
2070 * processing and the isr_status becomes zero
2071 */
6aa20a22 2072
1da177e4
LT
2073 while (isr_status != 0) {
2074 mac_write_isr(vptr->mac_regs, isr_status);
2075 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2076 velocity_error(vptr, isr_status);
2077 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2078 max_count += velocity_rx_srv(vptr, isr_status);
2079 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2080 max_count += velocity_tx_srv(vptr, isr_status);
2081 isr_status = mac_read_isr(vptr->mac_regs);
2082 if (max_count > vptr->options.int_works)
2083 {
6aa20a22 2084 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT
2085 dev->name);
2086 max_count = 0;
2087 }
2088 }
2089 spin_unlock(&vptr->lock);
2090 mac_enable_int(vptr->mac_regs);
2091 return IRQ_HANDLED;
2092
2093}
2094
2095
2096/**
2097 * velocity_set_multi - filter list change callback
2098 * @dev: network device
2099 *
2100 * Called by the network layer when the filter lists need to change
2101 * for a velocity adapter. Reload the CAMs with the new address
2102 * filter ruleset.
2103 */
6aa20a22 2104
1da177e4
LT
2105static void velocity_set_multi(struct net_device *dev)
2106{
8ab6f3f7 2107 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2108 struct mac_regs __iomem * regs = vptr->mac_regs;
2109 u8 rx_mode;
2110 int i;
2111 struct dev_mc_list *mclist;
2112
2113 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT
2114 writel(0xffffffff, &regs->MARCAM[0]);
2115 writel(0xffffffff, &regs->MARCAM[4]);
2116 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2117 } else if ((dev->mc_count > vptr->multicast_limit)
2118 || (dev->flags & IFF_ALLMULTI)) {
2119 writel(0xffffffff, &regs->MARCAM[0]);
2120 writel(0xffffffff, &regs->MARCAM[4]);
2121 rx_mode = (RCR_AM | RCR_AB);
2122 } else {
2123 int offset = MCAM_SIZE - vptr->multicast_limit;
2124 mac_get_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
2125
2126 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
2127 mac_set_cam(regs, i + offset, mclist->dmi_addr, VELOCITY_MULTICAST_CAM);
2128 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2129 }
2130
2131 mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
2132 rx_mode = (RCR_AM | RCR_AB);
2133 }
2134 if (dev->mtu > 1500)
2135 rx_mode |= RCR_AL;
2136
2137 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2138
2139}
2140
2141/**
2142 * velocity_get_status - statistics callback
2143 * @dev: network device
2144 *
2145 * Callback from the network layer to allow driver statistics
2146 * to be resynchronized with hardware collected state. In the
2147 * case of the velocity we need to pull the MIB counters from
2148 * the hardware into the counters before letting the network
2149 * layer display them.
2150 */
6aa20a22 2151
1da177e4
LT
2152static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2153{
8ab6f3f7 2154 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2155
1da177e4
LT
2156 /* If the hardware is down, don't touch MII */
2157 if(!netif_running(dev))
2158 return &vptr->stats;
2159
2160 spin_lock_irq(&vptr->lock);
2161 velocity_update_hw_mibs(vptr);
2162 spin_unlock_irq(&vptr->lock);
2163
2164 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2165 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2166 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2167
2168// unsigned long rx_dropped; /* no space in linux buffers */
2169 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2170 /* detailed rx_errors: */
2171// unsigned long rx_length_errors;
2172// unsigned long rx_over_errors; /* receiver ring buff overflow */
2173 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2174// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2175// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2176// unsigned long rx_missed_errors; /* receiver missed packet */
2177
2178 /* detailed tx_errors */
2179// unsigned long tx_fifo_errors;
2180
2181 return &vptr->stats;
2182}
2183
2184
2185/**
2186 * velocity_ioctl - ioctl entry point
2187 * @dev: network device
2188 * @rq: interface request ioctl
2189 * @cmd: command code
2190 *
2191 * Called when the user issues an ioctl request to the network
2192 * device in question. The velocity interface supports MII.
2193 */
6aa20a22 2194
1da177e4
LT
2195static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2196{
8ab6f3f7 2197 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2198 int ret;
2199
2200 /* If we are asked for information and the device is power
2201 saving then we need to bring the device back up to talk to it */
6aa20a22 2202
1da177e4
LT
2203 if (!netif_running(dev))
2204 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2205
1da177e4
LT
2206 switch (cmd) {
2207 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2208 case SIOCGMIIREG: /* Read MII PHY register. */
2209 case SIOCSMIIREG: /* Write to MII PHY register. */
2210 ret = velocity_mii_ioctl(dev, rq, cmd);
2211 break;
2212
2213 default:
2214 ret = -EOPNOTSUPP;
2215 }
2216 if (!netif_running(dev))
2217 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG
2218
2219
1da177e4
LT
2220 return ret;
2221}
2222
2223/*
2224 * Definition for our device driver. The PCI layer interface
2225 * uses this to handle all our card discover and plugging
2226 */
6aa20a22 2227
1da177e4
LT
2228static struct pci_driver velocity_driver = {
2229 .name = VELOCITY_NAME,
2230 .id_table = velocity_id_table,
2231 .probe = velocity_found1,
2232 .remove = __devexit_p(velocity_remove1),
2233#ifdef CONFIG_PM
2234 .suspend = velocity_suspend,
2235 .resume = velocity_resume,
2236#endif
2237};
2238
2239/**
2240 * velocity_init_module - load time function
2241 *
2242 * Called when the velocity module is loaded. The PCI driver
2243 * is registered with the PCI layer, and in turn will call
2244 * the probe functions for each velocity adapter installed
2245 * in the system.
2246 */
6aa20a22 2247
1da177e4
LT
2248static int __init velocity_init_module(void)
2249{
2250 int ret;
2251
2252 velocity_register_notifier();
29917620 2253 ret = pci_register_driver(&velocity_driver);
1da177e4
LT
2254 if (ret < 0)
2255 velocity_unregister_notifier();
2256 return ret;
2257}
2258
2259/**
2260 * velocity_cleanup - module unload
2261 *
2262 * When the velocity hardware is unloaded this function is called.
6aa20a22 2263 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT
2264 * driver interface for this hardware. This in turn cleans up
2265 * all discovered interfaces before returning from the function
2266 */
6aa20a22 2267
1da177e4
LT
2268static void __exit velocity_cleanup_module(void)
2269{
2270 velocity_unregister_notifier();
2271 pci_unregister_driver(&velocity_driver);
2272}
2273
2274module_init(velocity_init_module);
2275module_exit(velocity_cleanup_module);
2276
2277
2278/*
2279 * MII access , media link mode setting functions
2280 */
6aa20a22
JG
2281
2282
1da177e4
LT
2283/**
2284 * mii_init - set up MII
2285 * @vptr: velocity adapter
2286 * @mii_status: links tatus
2287 *
2288 * Set up the PHY for the current link state.
2289 */
6aa20a22 2290
1da177e4
LT
2291static void mii_init(struct velocity_info *vptr, u32 mii_status)
2292{
2293 u16 BMCR;
2294
2295 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2296 case PHYID_CICADA_CS8201:
2297 /*
2298 * Reset to hardware default
2299 */
2300 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2301 /*
2302 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2303 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT
2304 * legacy-forced issue.
2305 */
2306 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2307 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2308 else
2309 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2310 /*
2311 * Turn on Link/Activity LED enable bit for CIS8201
2312 */
2313 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2314 break;
2315 case PHYID_VT3216_32BIT:
2316 case PHYID_VT3216_64BIT:
2317 /*
2318 * Reset to hardware default
2319 */
2320 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2321 /*
2322 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2323 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT
2324 * legacy-forced issue
2325 */
2326 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2327 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2328 else
2329 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2330 break;
2331
2332 case PHYID_MARVELL_1000:
2333 case PHYID_MARVELL_1000S:
2334 /*
6aa20a22 2335 * Assert CRS on Transmit
1da177e4
LT
2336 */
2337 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2338 /*
6aa20a22 2339 * Reset to hardware default
1da177e4
LT
2340 */
2341 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2342 break;
2343 default:
2344 ;
2345 }
2346 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2347 if (BMCR & BMCR_ISO) {
2348 BMCR &= ~BMCR_ISO;
2349 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2350 }
2351}
2352
2353/**
2354 * safe_disable_mii_autopoll - autopoll off
2355 * @regs: velocity registers
2356 *
2357 * Turn off the autopoll and wait for it to disable on the chip
2358 */
6aa20a22 2359
1da177e4
LT
2360static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2361{
2362 u16 ww;
2363
2364 /* turn off MAUTO */
2365 writeb(0, &regs->MIICR);
2366 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2367 udelay(1);
2368 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2369 break;
2370 }
2371}
2372
2373/**
2374 * enable_mii_autopoll - turn on autopolling
2375 * @regs: velocity registers
2376 *
2377 * Enable the MII link status autopoll feature on the Velocity
2378 * hardware. Wait for it to enable.
2379 */
2380
2381static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2382{
2383 int ii;
2384
2385 writeb(0, &(regs->MIICR));
2386 writeb(MIIADR_SWMPL, &regs->MIIADR);
2387
2388 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2389 udelay(1);
2390 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2391 break;
2392 }
2393
2394 writeb(MIICR_MAUTO, &regs->MIICR);
2395
2396 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2397 udelay(1);
2398 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2399 break;
2400 }
2401
2402}
2403
2404/**
2405 * velocity_mii_read - read MII data
2406 * @regs: velocity registers
2407 * @index: MII register index
2408 * @data: buffer for received data
2409 *
2410 * Perform a single read of an MII 16bit register. Returns zero
2411 * on success or -ETIMEDOUT if the PHY did not respond.
2412 */
6aa20a22 2413
1da177e4
LT
2414static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2415{
2416 u16 ww;
2417
2418 /*
2419 * Disable MIICR_MAUTO, so that mii addr can be set normally
2420 */
2421 safe_disable_mii_autopoll(regs);
2422
2423 writeb(index, &regs->MIIADR);
2424
2425 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2426
2427 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2428 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2429 break;
2430 }
2431
2432 *data = readw(&regs->MIIDATA);
2433
2434 enable_mii_autopoll(regs);
2435 if (ww == W_MAX_TIMEOUT)
2436 return -ETIMEDOUT;
2437 return 0;
2438}
2439
2440/**
2441 * velocity_mii_write - write MII data
2442 * @regs: velocity registers
2443 * @index: MII register index
2444 * @data: 16bit data for the MII register
2445 *
2446 * Perform a single write to an MII 16bit register. Returns zero
2447 * on success or -ETIMEDOUT if the PHY did not respond.
2448 */
6aa20a22 2449
1da177e4
LT
2450static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2451{
2452 u16 ww;
2453
2454 /*
2455 * Disable MIICR_MAUTO, so that mii addr can be set normally
2456 */
2457 safe_disable_mii_autopoll(regs);
2458
2459 /* MII reg offset */
2460 writeb(mii_addr, &regs->MIIADR);
2461 /* set MII data */
2462 writew(data, &regs->MIIDATA);
2463
2464 /* turn on MIICR_WCMD */
2465 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2466
2467 /* W_MAX_TIMEOUT is the timeout period */
2468 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2469 udelay(5);
2470 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2471 break;
2472 }
2473 enable_mii_autopoll(regs);
2474
2475 if (ww == W_MAX_TIMEOUT)
2476 return -ETIMEDOUT;
2477 return 0;
2478}
2479
2480/**
2481 * velocity_get_opt_media_mode - get media selection
2482 * @vptr: velocity adapter
2483 *
2484 * Get the media mode stored in EEPROM or module options and load
2485 * mii_status accordingly. The requested link state information
2486 * is also returned.
2487 */
6aa20a22 2488
1da177e4
LT
2489static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2490{
2491 u32 status = 0;
2492
2493 switch (vptr->options.spd_dpx) {
2494 case SPD_DPX_AUTO:
2495 status = VELOCITY_AUTONEG_ENABLE;
2496 break;
2497 case SPD_DPX_100_FULL:
2498 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2499 break;
2500 case SPD_DPX_10_FULL:
2501 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2502 break;
2503 case SPD_DPX_100_HALF:
2504 status = VELOCITY_SPEED_100;
2505 break;
2506 case SPD_DPX_10_HALF:
2507 status = VELOCITY_SPEED_10;
2508 break;
2509 }
2510 vptr->mii_status = status;
2511 return status;
2512}
2513
2514/**
2515 * mii_set_auto_on - autonegotiate on
2516 * @vptr: velocity
2517 *
2518 * Enable autonegotation on this interface
2519 */
6aa20a22 2520
1da177e4
LT
2521static void mii_set_auto_on(struct velocity_info *vptr)
2522{
2523 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2524 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2525 else
2526 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2527}
2528
2529
2530/*
2531static void mii_set_auto_off(struct velocity_info * vptr)
2532{
2533 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2534}
2535*/
2536
2537/**
2538 * set_mii_flow_control - flow control setup
2539 * @vptr: velocity interface
2540 *
2541 * Set up the flow control on this interface according to
2542 * the supplied user/eeprom options.
2543 */
6aa20a22 2544
1da177e4
LT
2545static void set_mii_flow_control(struct velocity_info *vptr)
2546{
2547 /*Enable or Disable PAUSE in ANAR */
2548 switch (vptr->options.flow_cntl) {
2549 case FLOW_CNTL_TX:
2550 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2551 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2552 break;
2553
2554 case FLOW_CNTL_RX:
2555 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2556 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2557 break;
2558
2559 case FLOW_CNTL_TX_RX:
2560 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2561 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2562 break;
2563
2564 case FLOW_CNTL_DISABLE:
2565 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2566 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2567 break;
2568 default:
2569 break;
2570 }
2571}
2572
2573/**
2574 * velocity_set_media_mode - set media mode
2575 * @mii_status: old MII link state
2576 *
2577 * Check the media link state and configure the flow control
2578 * PHY and also velocity hardware setup accordingly. In particular
2579 * we need to set up CD polling and frame bursting.
2580 */
6aa20a22 2581
1da177e4
LT
2582static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2583{
2584 u32 curr_status;
2585 struct mac_regs __iomem * regs = vptr->mac_regs;
2586
2587 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2588 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2589
2590 /* Set mii link status */
2591 set_mii_flow_control(vptr);
2592
2593 /*
2594 Check if new status is consisent with current status
2595 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2596 || (mii_status==curr_status)) {
2597 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2598 vptr->mii_status=check_connection_type(vptr->mac_regs);
2599 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2600 return 0;
2601 }
2602 */
2603
2604 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2605 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2606 }
2607
2608 /*
2609 * If connection type is AUTO
2610 */
2611 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2612 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2613 /* clear force MAC mode bit */
2614 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2615 /* set duplex mode of MAC according to duplex mode of MII */
2616 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2617 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2618 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2619
2620 /* enable AUTO-NEGO mode */
2621 mii_set_auto_on(vptr);
2622 } else {
2623 u16 ANAR;
2624 u8 CHIPGCR;
2625
2626 /*
2627 * 1. if it's 3119, disable frame bursting in halfduplex mode
2628 * and enable it in fullduplex mode
2629 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2630 * 3. only enable CD heart beat counter in 10HD mode
2631 */
2632
2633 /* set force MAC mode bit */
2634 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2635
2636 CHIPGCR = readb(&regs->CHIPGCR);
2637 CHIPGCR &= ~CHIPGCR_FCGMII;
2638
2639 if (mii_status & VELOCITY_DUPLEX_FULL) {
2640 CHIPGCR |= CHIPGCR_FCFDX;
2641 writeb(CHIPGCR, &regs->CHIPGCR);
2642 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2643 if (vptr->rev_id < REV_ID_VT3216_A0)
2644 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2645 } else {
2646 CHIPGCR &= ~CHIPGCR_FCFDX;
2647 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2648 writeb(CHIPGCR, &regs->CHIPGCR);
2649 if (vptr->rev_id < REV_ID_VT3216_A0)
2650 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2651 }
2652
2653 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2654
2655 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2656 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2657 } else {
2658 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2659 }
2660 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2661 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2662 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2663 if (mii_status & VELOCITY_SPEED_100) {
2664 if (mii_status & VELOCITY_DUPLEX_FULL)
2665 ANAR |= ANAR_TXFD;
2666 else
2667 ANAR |= ANAR_TX;
2668 } else {
2669 if (mii_status & VELOCITY_DUPLEX_FULL)
2670 ANAR |= ANAR_10FD;
2671 else
2672 ANAR |= ANAR_10;
2673 }
2674 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2675 /* enable AUTO-NEGO mode */
2676 mii_set_auto_on(vptr);
2677 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2678 }
2679 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2680 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2681 return VELOCITY_LINK_CHANGE;
2682}
2683
2684/**
2685 * mii_check_media_mode - check media state
2686 * @regs: velocity registers
2687 *
2688 * Check the current MII status and determine the link status
2689 * accordingly
2690 */
6aa20a22 2691
1da177e4
LT
2692static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2693{
2694 u32 status = 0;
2695 u16 ANAR;
2696
2697 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2698 status |= VELOCITY_LINK_FAIL;
2699
2700 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2701 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2702 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2703 status |= (VELOCITY_SPEED_1000);
2704 else {
2705 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2706 if (ANAR & ANAR_TXFD)
2707 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2708 else if (ANAR & ANAR_TX)
2709 status |= VELOCITY_SPEED_100;
2710 else if (ANAR & ANAR_10FD)
2711 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2712 else
2713 status |= (VELOCITY_SPEED_10);
2714 }
2715
2716 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2717 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2718 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2719 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2720 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2721 status |= VELOCITY_AUTONEG_ENABLE;
2722 }
2723 }
2724
2725 return status;
2726}
2727
2728static u32 check_connection_type(struct mac_regs __iomem * regs)
2729{
2730 u32 status = 0;
2731 u8 PHYSR0;
2732 u16 ANAR;
2733 PHYSR0 = readb(&regs->PHYSR0);
2734
2735 /*
2736 if (!(PHYSR0 & PHYSR0_LINKGD))
2737 status|=VELOCITY_LINK_FAIL;
2738 */
2739
2740 if (PHYSR0 & PHYSR0_FDPX)
2741 status |= VELOCITY_DUPLEX_FULL;
2742
2743 if (PHYSR0 & PHYSR0_SPDG)
2744 status |= VELOCITY_SPEED_1000;
59b693fb 2745 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT
2746 status |= VELOCITY_SPEED_10;
2747 else
2748 status |= VELOCITY_SPEED_100;
2749
2750 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2751 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2752 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2753 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2754 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2755 status |= VELOCITY_AUTONEG_ENABLE;
2756 }
2757 }
2758
2759 return status;
2760}
2761
2762/**
2763 * enable_flow_control_ability - flow control
2764 * @vptr: veloity to configure
2765 *
2766 * Set up flow control according to the flow control options
2767 * determined by the eeprom/configuration.
2768 */
2769
2770static void enable_flow_control_ability(struct velocity_info *vptr)
2771{
2772
2773 struct mac_regs __iomem * regs = vptr->mac_regs;
2774
2775 switch (vptr->options.flow_cntl) {
2776
2777 case FLOW_CNTL_DEFAULT:
2778 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2779 writel(CR0_FDXRFCEN, &regs->CR0Set);
2780 else
2781 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2782
2783 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2784 writel(CR0_FDXTFCEN, &regs->CR0Set);
2785 else
2786 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2787 break;
2788
2789 case FLOW_CNTL_TX:
2790 writel(CR0_FDXTFCEN, &regs->CR0Set);
2791 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2792 break;
2793
2794 case FLOW_CNTL_RX:
2795 writel(CR0_FDXRFCEN, &regs->CR0Set);
2796 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2797 break;
2798
2799 case FLOW_CNTL_TX_RX:
2800 writel(CR0_FDXTFCEN, &regs->CR0Set);
2801 writel(CR0_FDXRFCEN, &regs->CR0Set);
2802 break;
2803
2804 case FLOW_CNTL_DISABLE:
2805 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2806 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2807 break;
2808
2809 default:
2810 break;
2811 }
2812
2813}
2814
2815
2816/**
2817 * velocity_ethtool_up - pre hook for ethtool
2818 * @dev: network device
2819 *
2820 * Called before an ethtool operation. We need to make sure the
2821 * chip is out of D3 state before we poke at it.
2822 */
6aa20a22 2823
1da177e4
LT
2824static int velocity_ethtool_up(struct net_device *dev)
2825{
8ab6f3f7 2826 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2827 if (!netif_running(dev))
2828 pci_set_power_state(vptr->pdev, PCI_D0);
2829 return 0;
6aa20a22 2830}
1da177e4
LT
2831
2832/**
2833 * velocity_ethtool_down - post hook for ethtool
2834 * @dev: network device
2835 *
2836 * Called after an ethtool operation. Restore the chip back to D3
2837 * state if it isn't running.
2838 */
6aa20a22 2839
1da177e4
LT
2840static void velocity_ethtool_down(struct net_device *dev)
2841{
8ab6f3f7 2842 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2843 if (!netif_running(dev))
2844 pci_set_power_state(vptr->pdev, PCI_D3hot);
2845}
2846
2847static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2848{
8ab6f3f7 2849 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2850 struct mac_regs __iomem * regs = vptr->mac_regs;
2851 u32 status;
2852 status = check_connection_type(vptr->mac_regs);
2853
59b693fb
JC
2854 cmd->supported = SUPPORTED_TP |
2855 SUPPORTED_Autoneg |
2856 SUPPORTED_10baseT_Half |
2857 SUPPORTED_10baseT_Full |
2858 SUPPORTED_100baseT_Half |
2859 SUPPORTED_100baseT_Full |
2860 SUPPORTED_1000baseT_Half |
2861 SUPPORTED_1000baseT_Full;
2862 if (status & VELOCITY_SPEED_1000)
2863 cmd->speed = SPEED_1000;
2864 else if (status & VELOCITY_SPEED_100)
1da177e4
LT
2865 cmd->speed = SPEED_100;
2866 else
2867 cmd->speed = SPEED_10;
2868 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2869 cmd->port = PORT_TP;
2870 cmd->transceiver = XCVR_INTERNAL;
2871 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
2872
2873 if (status & VELOCITY_DUPLEX_FULL)
2874 cmd->duplex = DUPLEX_FULL;
2875 else
2876 cmd->duplex = DUPLEX_HALF;
6aa20a22 2877
1da177e4
LT
2878 return 0;
2879}
2880
2881static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2882{
8ab6f3f7 2883 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2884 u32 curr_status;
2885 u32 new_status = 0;
2886 int ret = 0;
6aa20a22 2887
1da177e4
LT
2888 curr_status = check_connection_type(vptr->mac_regs);
2889 curr_status &= (~VELOCITY_LINK_FAIL);
2890
2891 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
2892 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
2893 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
2894 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
2895
2896 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
2897 ret = -EINVAL;
2898 else
2899 velocity_set_media_mode(vptr, new_status);
2900
2901 return ret;
2902}
2903
2904static u32 velocity_get_link(struct net_device *dev)
2905{
8ab6f3f7 2906 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2907 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 2908 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT
2909}
2910
2911static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2912{
8ab6f3f7 2913 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2914 strcpy(info->driver, VELOCITY_NAME);
2915 strcpy(info->version, VELOCITY_VERSION);
2916 strcpy(info->bus_info, pci_name(vptr->pdev));
2917}
2918
2919static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2920{
8ab6f3f7 2921 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2922 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
2923 wol->wolopts |= WAKE_MAGIC;
2924 /*
2925 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2926 wol.wolopts|=WAKE_PHY;
2927 */
2928 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
2929 wol->wolopts |= WAKE_UCAST;
2930 if (vptr->wol_opts & VELOCITY_WOL_ARP)
2931 wol->wolopts |= WAKE_ARP;
2932 memcpy(&wol->sopass, vptr->wol_passwd, 6);
2933}
2934
2935static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2936{
8ab6f3f7 2937 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2938
2939 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
2940 return -EFAULT;
2941 vptr->wol_opts = VELOCITY_WOL_MAGIC;
2942
2943 /*
2944 if (wol.wolopts & WAKE_PHY) {
2945 vptr->wol_opts|=VELOCITY_WOL_PHY;
2946 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
2947 }
2948 */
2949
2950 if (wol->wolopts & WAKE_MAGIC) {
2951 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
2952 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2953 }
2954 if (wol->wolopts & WAKE_UCAST) {
2955 vptr->wol_opts |= VELOCITY_WOL_UCAST;
2956 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2957 }
2958 if (wol->wolopts & WAKE_ARP) {
2959 vptr->wol_opts |= VELOCITY_WOL_ARP;
2960 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2961 }
2962 memcpy(vptr->wol_passwd, wol->sopass, 6);
2963 return 0;
2964}
2965
2966static u32 velocity_get_msglevel(struct net_device *dev)
2967{
2968 return msglevel;
2969}
2970
2971static void velocity_set_msglevel(struct net_device *dev, u32 value)
2972{
2973 msglevel = value;
2974}
2975
7282d491 2976static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT
2977 .get_settings = velocity_get_settings,
2978 .set_settings = velocity_set_settings,
2979 .get_drvinfo = velocity_get_drvinfo,
2980 .get_wol = velocity_ethtool_get_wol,
2981 .set_wol = velocity_ethtool_set_wol,
2982 .get_msglevel = velocity_get_msglevel,
2983 .set_msglevel = velocity_set_msglevel,
2984 .get_link = velocity_get_link,
2985 .begin = velocity_ethtool_up,
2986 .complete = velocity_ethtool_down
2987};
2988
2989/**
2990 * velocity_mii_ioctl - MII ioctl handler
2991 * @dev: network device
2992 * @ifr: the ifreq block for the ioctl
2993 * @cmd: the command
2994 *
2995 * Process MII requests made via ioctl from the network layer. These
2996 * are used by tools like kudzu to interrogate the link state of the
2997 * hardware
2998 */
6aa20a22 2999
1da177e4
LT
3000static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3001{
8ab6f3f7 3002 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3003 struct mac_regs __iomem * regs = vptr->mac_regs;
3004 unsigned long flags;
3005 struct mii_ioctl_data *miidata = if_mii(ifr);
3006 int err;
6aa20a22 3007
1da177e4
LT
3008 switch (cmd) {
3009 case SIOCGMIIPHY:
3010 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3011 break;
3012 case SIOCGMIIREG:
3013 if (!capable(CAP_NET_ADMIN))
3014 return -EPERM;
3015 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3016 return -ETIMEDOUT;
3017 break;
3018 case SIOCSMIIREG:
3019 if (!capable(CAP_NET_ADMIN))
3020 return -EPERM;
3021 spin_lock_irqsave(&vptr->lock, flags);
3022 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3023 spin_unlock_irqrestore(&vptr->lock, flags);
3024 check_connection_type(vptr->mac_regs);
3025 if(err)
3026 return err;
3027 break;
3028 default:
3029 return -EOPNOTSUPP;
3030 }
3031 return 0;
3032}
3033
3034#ifdef CONFIG_PM
3035
3036/**
3037 * velocity_save_context - save registers
6aa20a22 3038 * @vptr: velocity
1da177e4
LT
3039 * @context: buffer for stored context
3040 *
3041 * Retrieve the current configuration from the velocity hardware
3042 * and stash it in the context structure, for use by the context
3043 * restore functions. This allows us to save things we need across
3044 * power down states
3045 */
6aa20a22 3046
1da177e4
LT
3047static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3048{
3049 struct mac_regs __iomem * regs = vptr->mac_regs;
3050 u16 i;
3051 u8 __iomem *ptr = (u8 __iomem *)regs;
3052
3053 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3054 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3055
3056 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3057 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3058
3059 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3060 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3061
3062}
3063
3064/**
3065 * velocity_restore_context - restore registers
6aa20a22 3066 * @vptr: velocity
1da177e4
LT
3067 * @context: buffer for stored context
3068 *
6aa20a22 3069 * Reload the register configuration from the velocity context
1da177e4
LT
3070 * created by velocity_save_context.
3071 */
6aa20a22 3072
1da177e4
LT
3073static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3074{
3075 struct mac_regs __iomem * regs = vptr->mac_regs;
3076 int i;
3077 u8 __iomem *ptr = (u8 __iomem *)regs;
3078
3079 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3080 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3081 }
3082
3083 /* Just skip cr0 */
3084 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3085 /* Clear */
3086 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3087 /* Set */
3088 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3089 }
3090
3091 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3092 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3093 }
3094
3095 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3096 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3097 }
3098
3099 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3100 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3101 }
3102
3103}
3104
3105/**
3106 * wol_calc_crc - WOL CRC
3107 * @pattern: data pattern
3108 * @mask_pattern: mask
3109 *
3110 * Compute the wake on lan crc hashes for the packet header
3111 * we are interested in.
3112 */
3113
3114static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3115{
3116 u16 crc = 0xFFFF;
3117 u8 mask;
3118 int i, j;
3119
3120 for (i = 0; i < size; i++) {
3121 mask = mask_pattern[i];
3122
3123 /* Skip this loop if the mask equals to zero */
3124 if (mask == 0x00)
3125 continue;
3126
3127 for (j = 0; j < 8; j++) {
3128 if ((mask & 0x01) == 0) {
3129 mask >>= 1;
3130 continue;
3131 }
3132 mask >>= 1;
3133 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3134 }
3135 }
3136 /* Finally, invert the result once to get the correct data */
3137 crc = ~crc;
906d66df 3138 return bitrev32(crc) >> 16;
1da177e4
LT
3139}
3140
3141/**
3142 * velocity_set_wol - set up for wake on lan
3143 * @vptr: velocity to set WOL status on
3144 *
3145 * Set a card up for wake on lan either by unicast or by
3146 * ARP packet.
3147 *
3148 * FIXME: check static buffer is safe here
3149 */
3150
3151static int velocity_set_wol(struct velocity_info *vptr)
3152{
3153 struct mac_regs __iomem * regs = vptr->mac_regs;
3154 static u8 buf[256];
3155 int i;
3156
3157 static u32 mask_pattern[2][4] = {
3158 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3159 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3160 };
3161
3162 writew(0xFFFF, &regs->WOLCRClr);
3163 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3164 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3165
3166 /*
3167 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3168 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3169 */
3170
3171 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3172 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3173 }
3174
3175 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3176 struct arp_packet *arp = (struct arp_packet *) buf;
3177 u16 crc;
3178 memset(buf, 0, sizeof(struct arp_packet) + 7);
3179
3180 for (i = 0; i < 4; i++)
3181 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3182
3183 arp->type = htons(ETH_P_ARP);
3184 arp->ar_op = htons(1);
3185
3186 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3187
3188 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3189 (u8 *) & mask_pattern[0][0]);
3190
3191 writew(crc, &regs->PatternCRC[0]);
3192 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3193 }
3194
3195 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3196 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3197
3198 writew(0x0FFF, &regs->WOLSRClr);
3199
3200 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3201 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3202 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3203
3204 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3205 }
3206
3207 if (vptr->mii_status & VELOCITY_SPEED_1000)
3208 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3209
3210 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3211
3212 {
3213 u8 GCR;
3214 GCR = readb(&regs->CHIPGCR);
3215 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3216 writeb(GCR, &regs->CHIPGCR);
3217 }
3218
3219 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3220 /* Turn on SWPTAG just before entering power mode */
3221 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3222 /* Go to bed ..... */
3223 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3224
3225 return 0;
3226}
3227
3228static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3229{
3230 struct net_device *dev = pci_get_drvdata(pdev);
3231 struct velocity_info *vptr = netdev_priv(dev);
3232 unsigned long flags;
3233
3234 if(!netif_running(vptr->dev))
3235 return 0;
3236
3237 netif_device_detach(vptr->dev);
3238
3239 spin_lock_irqsave(&vptr->lock, flags);
3240 pci_save_state(pdev);
3241#ifdef ETHTOOL_GWOL
3242 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3243 velocity_get_ip(vptr);
3244 velocity_save_context(vptr, &vptr->context);
3245 velocity_shutdown(vptr);
3246 velocity_set_wol(vptr);
3247 pci_enable_wake(pdev, 3, 1);
3248 pci_set_power_state(pdev, PCI_D3hot);
3249 } else {
3250 velocity_save_context(vptr, &vptr->context);
3251 velocity_shutdown(vptr);
3252 pci_disable_device(pdev);
3253 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3254 }
3255#else
3256 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3257#endif
3258 spin_unlock_irqrestore(&vptr->lock, flags);
3259 return 0;
3260}
3261
3262static int velocity_resume(struct pci_dev *pdev)
3263{
3264 struct net_device *dev = pci_get_drvdata(pdev);
3265 struct velocity_info *vptr = netdev_priv(dev);
3266 unsigned long flags;
3267 int i;
3268
3269 if(!netif_running(vptr->dev))
3270 return 0;
3271
3272 pci_set_power_state(pdev, PCI_D0);
3273 pci_enable_wake(pdev, 0, 0);
3274 pci_restore_state(pdev);
3275
3276 mac_wol_reset(vptr->mac_regs);
3277
3278 spin_lock_irqsave(&vptr->lock, flags);
3279 velocity_restore_context(vptr, &vptr->context);
3280 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3281 mac_disable_int(vptr->mac_regs);
3282
3283 velocity_tx_srv(vptr, 0);
3284
3285 for (i = 0; i < vptr->num_txq; i++) {
3286 if (vptr->td_used[i]) {
3287 mac_tx_queue_wake(vptr->mac_regs, i);
3288 }
3289 }
3290
3291 mac_enable_int(vptr->mac_regs);
3292 spin_unlock_irqrestore(&vptr->lock, flags);
3293 netif_device_attach(vptr->dev);
3294
3295 return 0;
3296}
3297
ce9f7fe3
RD
3298#ifdef CONFIG_INET
3299
1da177e4
LT
3300static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3301{
3302 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3303
3304 if (ifa) {
3305 struct net_device *dev = ifa->ifa_dev->dev;
3306 struct velocity_info *vptr;
3307 unsigned long flags;
3308
3309 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3310 list_for_each_entry(vptr, &velocity_dev_list, list) {
3311 if (vptr->dev == dev) {
3312 velocity_get_ip(vptr);
3313 break;
3314 }
3315 }
3316 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3317 }
3318 return NOTIFY_DONE;
3319}
ce9f7fe3
RD
3320
3321#endif
1da177e4 3322#endif