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2e55cc72 DB |
1 | /* |
2 | * ASIX AX8817X based USB 2.0 Ethernet Devices | |
933a27d3 | 3 | * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> |
2e55cc72 | 4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> |
933a27d3 | 5 | * Copyright (C) 2006 James Painter <jamie.painter@iname.com> |
2e55cc72 DB |
6 | * Copyright (c) 2002-2003 TiVo Inc. |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | // #define DEBUG // error path messages, extra info | |
24 | // #define VERBOSE // more; success messages | |
25 | ||
2e55cc72 DB |
26 | #include <linux/module.h> |
27 | #include <linux/kmod.h> | |
2e55cc72 DB |
28 | #include <linux/init.h> |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/ethtool.h> | |
32 | #include <linux/workqueue.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/usb.h> | |
35 | #include <linux/crc32.h> | |
3692e94f | 36 | #include <linux/usb/usbnet.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
2e55cc72 | 38 | |
4ad1438f | 39 | #define DRIVER_VERSION "26-Sep-2011" |
83e1b918 | 40 | #define DRIVER_NAME "asix" |
933a27d3 | 41 | |
2e55cc72 DB |
42 | /* ASIX AX8817X based USB 2.0 Ethernet Devices */ |
43 | ||
44 | #define AX_CMD_SET_SW_MII 0x06 | |
45 | #define AX_CMD_READ_MII_REG 0x07 | |
46 | #define AX_CMD_WRITE_MII_REG 0x08 | |
47 | #define AX_CMD_SET_HW_MII 0x0a | |
48 | #define AX_CMD_READ_EEPROM 0x0b | |
49 | #define AX_CMD_WRITE_EEPROM 0x0c | |
50 | #define AX_CMD_WRITE_ENABLE 0x0d | |
51 | #define AX_CMD_WRITE_DISABLE 0x0e | |
933a27d3 | 52 | #define AX_CMD_READ_RX_CTL 0x0f |
2e55cc72 DB |
53 | #define AX_CMD_WRITE_RX_CTL 0x10 |
54 | #define AX_CMD_READ_IPG012 0x11 | |
55 | #define AX_CMD_WRITE_IPG0 0x12 | |
56 | #define AX_CMD_WRITE_IPG1 0x13 | |
933a27d3 | 57 | #define AX_CMD_READ_NODE_ID 0x13 |
7f29a3ba | 58 | #define AX_CMD_WRITE_NODE_ID 0x14 |
2e55cc72 DB |
59 | #define AX_CMD_WRITE_IPG2 0x14 |
60 | #define AX_CMD_WRITE_MULTI_FILTER 0x16 | |
933a27d3 | 61 | #define AX88172_CMD_READ_NODE_ID 0x17 |
2e55cc72 DB |
62 | #define AX_CMD_READ_PHY_ID 0x19 |
63 | #define AX_CMD_READ_MEDIUM_STATUS 0x1a | |
64 | #define AX_CMD_WRITE_MEDIUM_MODE 0x1b | |
65 | #define AX_CMD_READ_MONITOR_MODE 0x1c | |
66 | #define AX_CMD_WRITE_MONITOR_MODE 0x1d | |
933a27d3 | 67 | #define AX_CMD_READ_GPIOS 0x1e |
2e55cc72 DB |
68 | #define AX_CMD_WRITE_GPIOS 0x1f |
69 | #define AX_CMD_SW_RESET 0x20 | |
70 | #define AX_CMD_SW_PHY_STATUS 0x21 | |
71 | #define AX_CMD_SW_PHY_SELECT 0x22 | |
2e55cc72 DB |
72 | |
73 | #define AX_MONITOR_MODE 0x01 | |
74 | #define AX_MONITOR_LINK 0x02 | |
75 | #define AX_MONITOR_MAGIC 0x04 | |
76 | #define AX_MONITOR_HSFS 0x10 | |
77 | ||
78 | /* AX88172 Medium Status Register values */ | |
933a27d3 DH |
79 | #define AX88172_MEDIUM_FD 0x02 |
80 | #define AX88172_MEDIUM_TX 0x04 | |
81 | #define AX88172_MEDIUM_FC 0x10 | |
82 | #define AX88172_MEDIUM_DEFAULT \ | |
83 | ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) | |
2e55cc72 DB |
84 | |
85 | #define AX_MCAST_FILTER_SIZE 8 | |
86 | #define AX_MAX_MCAST 64 | |
87 | ||
2e55cc72 DB |
88 | #define AX_SWRESET_CLEAR 0x00 |
89 | #define AX_SWRESET_RR 0x01 | |
90 | #define AX_SWRESET_RT 0x02 | |
91 | #define AX_SWRESET_PRTE 0x04 | |
92 | #define AX_SWRESET_PRL 0x08 | |
93 | #define AX_SWRESET_BZ 0x10 | |
94 | #define AX_SWRESET_IPRL 0x20 | |
95 | #define AX_SWRESET_IPPD 0x40 | |
96 | ||
97 | #define AX88772_IPG0_DEFAULT 0x15 | |
98 | #define AX88772_IPG1_DEFAULT 0x0c | |
99 | #define AX88772_IPG2_DEFAULT 0x12 | |
100 | ||
933a27d3 DH |
101 | /* AX88772 & AX88178 Medium Mode Register */ |
102 | #define AX_MEDIUM_PF 0x0080 | |
103 | #define AX_MEDIUM_JFE 0x0040 | |
104 | #define AX_MEDIUM_TFC 0x0020 | |
105 | #define AX_MEDIUM_RFC 0x0010 | |
106 | #define AX_MEDIUM_ENCK 0x0008 | |
107 | #define AX_MEDIUM_AC 0x0004 | |
108 | #define AX_MEDIUM_FD 0x0002 | |
109 | #define AX_MEDIUM_GM 0x0001 | |
110 | #define AX_MEDIUM_SM 0x1000 | |
111 | #define AX_MEDIUM_SBP 0x0800 | |
112 | #define AX_MEDIUM_PS 0x0200 | |
113 | #define AX_MEDIUM_RE 0x0100 | |
114 | ||
115 | #define AX88178_MEDIUM_DEFAULT \ | |
116 | (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ | |
117 | AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ | |
83e1b918 | 118 | AX_MEDIUM_RE) |
2e55cc72 | 119 | |
933a27d3 DH |
120 | #define AX88772_MEDIUM_DEFAULT \ |
121 | (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ | |
122 | AX_MEDIUM_TFC | AX_MEDIUM_PS | \ | |
83e1b918 | 123 | AX_MEDIUM_AC | AX_MEDIUM_RE) |
933a27d3 DH |
124 | |
125 | /* AX88772 & AX88178 RX_CTL values */ | |
83e1b918 GG |
126 | #define AX_RX_CTL_SO 0x0080 |
127 | #define AX_RX_CTL_AP 0x0020 | |
128 | #define AX_RX_CTL_AM 0x0010 | |
129 | #define AX_RX_CTL_AB 0x0008 | |
130 | #define AX_RX_CTL_SEP 0x0004 | |
131 | #define AX_RX_CTL_AMALL 0x0002 | |
132 | #define AX_RX_CTL_PRO 0x0001 | |
133 | #define AX_RX_CTL_MFB_2048 0x0000 | |
134 | #define AX_RX_CTL_MFB_4096 0x0100 | |
135 | #define AX_RX_CTL_MFB_8192 0x0200 | |
136 | #define AX_RX_CTL_MFB_16384 0x0300 | |
137 | ||
138 | #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB) | |
933a27d3 DH |
139 | |
140 | /* GPIO 0 .. 2 toggles */ | |
141 | #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ | |
142 | #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ | |
143 | #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ | |
144 | #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ | |
145 | #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ | |
146 | #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ | |
147 | #define AX_GPIO_RESERVED 0x40 /* Reserved */ | |
148 | #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ | |
149 | ||
150 | #define AX_EEPROM_MAGIC 0xdeadbeef | |
151 | #define AX88172_EEPROM_LEN 0x40 | |
152 | #define AX88772_EEPROM_LEN 0xff | |
153 | ||
154 | #define PHY_MODE_MARVELL 0x0000 | |
155 | #define MII_MARVELL_LED_CTRL 0x0018 | |
156 | #define MII_MARVELL_STATUS 0x001b | |
157 | #define MII_MARVELL_CTRL 0x0014 | |
158 | ||
159 | #define MARVELL_LED_MANUAL 0x0019 | |
160 | ||
161 | #define MARVELL_STATUS_HWCFG 0x0004 | |
162 | ||
163 | #define MARVELL_CTRL_TXDELAY 0x0002 | |
164 | #define MARVELL_CTRL_RXDELAY 0x0080 | |
2e55cc72 | 165 | |
610d885d GG |
166 | #define PHY_MODE_RTL8211CL 0x0004 |
167 | ||
2e55cc72 | 168 | /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ |
48b1be6a | 169 | struct asix_data { |
2e55cc72 | 170 | u8 multi_filter[AX_MCAST_FILTER_SIZE]; |
7f29a3ba | 171 | u8 mac_addr[ETH_ALEN]; |
933a27d3 DH |
172 | u8 phymode; |
173 | u8 ledmode; | |
174 | u8 eeprom_len; | |
2e55cc72 DB |
175 | }; |
176 | ||
177 | struct ax88172_int_data { | |
51bf2976 | 178 | __le16 res1; |
2e55cc72 | 179 | u8 link; |
51bf2976 | 180 | __le16 res2; |
2e55cc72 | 181 | u8 status; |
51bf2976 | 182 | __le16 res3; |
ba2d3587 | 183 | } __packed; |
2e55cc72 | 184 | |
48b1be6a | 185 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
186 | u16 size, void *data) |
187 | { | |
51bf2976 AV |
188 | void *buf; |
189 | int err = -ENOMEM; | |
190 | ||
60b86755 JP |
191 | netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
192 | cmd, value, index, size); | |
51bf2976 AV |
193 | |
194 | buf = kmalloc(size, GFP_KERNEL); | |
195 | if (!buf) | |
196 | goto out; | |
197 | ||
198 | err = usb_control_msg( | |
2e55cc72 DB |
199 | dev->udev, |
200 | usb_rcvctrlpipe(dev->udev, 0), | |
201 | cmd, | |
202 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
203 | value, | |
204 | index, | |
51bf2976 | 205 | buf, |
2e55cc72 DB |
206 | size, |
207 | USB_CTRL_GET_TIMEOUT); | |
94d43363 | 208 | if (err == size) |
51bf2976 | 209 | memcpy(data, buf, size); |
94d43363 RD |
210 | else if (err >= 0) |
211 | err = -EINVAL; | |
51bf2976 AV |
212 | kfree(buf); |
213 | ||
214 | out: | |
215 | return err; | |
2e55cc72 DB |
216 | } |
217 | ||
48b1be6a | 218 | static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
219 | u16 size, void *data) |
220 | { | |
51bf2976 AV |
221 | void *buf = NULL; |
222 | int err = -ENOMEM; | |
223 | ||
60b86755 JP |
224 | netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
225 | cmd, value, index, size); | |
51bf2976 AV |
226 | |
227 | if (data) { | |
99bf2366 | 228 | buf = kmemdup(data, size, GFP_KERNEL); |
51bf2976 AV |
229 | if (!buf) |
230 | goto out; | |
51bf2976 AV |
231 | } |
232 | ||
233 | err = usb_control_msg( | |
2e55cc72 DB |
234 | dev->udev, |
235 | usb_sndctrlpipe(dev->udev, 0), | |
236 | cmd, | |
237 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
238 | value, | |
239 | index, | |
51bf2976 | 240 | buf, |
2e55cc72 DB |
241 | size, |
242 | USB_CTRL_SET_TIMEOUT); | |
51bf2976 AV |
243 | kfree(buf); |
244 | ||
245 | out: | |
246 | return err; | |
2e55cc72 DB |
247 | } |
248 | ||
7d12e780 | 249 | static void asix_async_cmd_callback(struct urb *urb) |
2e55cc72 DB |
250 | { |
251 | struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; | |
c94cb314 | 252 | int status = urb->status; |
2e55cc72 | 253 | |
c94cb314 | 254 | if (status < 0) |
48b1be6a | 255 | printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d", |
c94cb314 | 256 | status); |
2e55cc72 DB |
257 | |
258 | kfree(req); | |
259 | usb_free_urb(urb); | |
260 | } | |
261 | ||
933a27d3 DH |
262 | static void |
263 | asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, | |
264 | u16 size, void *data) | |
265 | { | |
266 | struct usb_ctrlrequest *req; | |
267 | int status; | |
268 | struct urb *urb; | |
269 | ||
60b86755 JP |
270 | netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
271 | cmd, value, index, size); | |
83e1b918 GG |
272 | |
273 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
274 | if (!urb) { | |
60b86755 | 275 | netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n"); |
933a27d3 DH |
276 | return; |
277 | } | |
278 | ||
83e1b918 GG |
279 | req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC); |
280 | if (!req) { | |
60b86755 | 281 | netdev_err(dev->net, "Failed to allocate memory for control request\n"); |
933a27d3 DH |
282 | usb_free_urb(urb); |
283 | return; | |
284 | } | |
285 | ||
286 | req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; | |
287 | req->bRequest = cmd; | |
9aa742ef ON |
288 | req->wValue = cpu_to_le16(value); |
289 | req->wIndex = cpu_to_le16(index); | |
290 | req->wLength = cpu_to_le16(size); | |
933a27d3 DH |
291 | |
292 | usb_fill_control_urb(urb, dev->udev, | |
293 | usb_sndctrlpipe(dev->udev, 0), | |
294 | (void *)req, data, size, | |
295 | asix_async_cmd_callback, req); | |
296 | ||
83e1b918 GG |
297 | status = usb_submit_urb(urb, GFP_ATOMIC); |
298 | if (status < 0) { | |
60b86755 JP |
299 | netdev_err(dev->net, "Error submitting the control message: status=%d\n", |
300 | status); | |
933a27d3 DH |
301 | kfree(req); |
302 | usb_free_urb(urb); | |
303 | } | |
304 | } | |
305 | ||
306 | static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
307 | { | |
308 | u8 *head; | |
309 | u32 header; | |
310 | char *packet; | |
311 | struct sk_buff *ax_skb; | |
312 | u16 size; | |
313 | ||
314 | head = (u8 *) skb->data; | |
315 | memcpy(&header, head, sizeof(header)); | |
316 | le32_to_cpus(&header); | |
317 | packet = head + sizeof(header); | |
318 | ||
319 | skb_pull(skb, 4); | |
320 | ||
321 | while (skb->len > 0) { | |
bca0beb9 | 322 | if ((header & 0x07ff) != ((~header >> 16) & 0x07ff)) |
60b86755 | 323 | netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n"); |
bc466e67 | 324 | |
933a27d3 | 325 | /* get the packet length */ |
bca0beb9 | 326 | size = (u16) (header & 0x000007ff); |
933a27d3 | 327 | |
3f78d1f2 | 328 | if ((skb->len) - ((size + 1) & 0xfffe) == 0) { |
f925b130 | 329 | u8 alignment = (unsigned long)skb->data & 0x3; |
3f78d1f2 NJ |
330 | if (alignment != 0x2) { |
331 | /* | |
332 | * not 16bit aligned so use the room provided by | |
333 | * the 32 bit header to align the data | |
334 | * | |
335 | * note we want 16bit alignment as MAC header is | |
336 | * 14bytes thus ip header will be aligned on | |
337 | * 32bit boundary so accessing ipheader elements | |
338 | * using a cast to struct ip header wont cause | |
339 | * an unaligned accesses. | |
340 | */ | |
341 | u8 realignment = (alignment + 2) & 0x3; | |
342 | memmove(skb->data - realignment, | |
343 | skb->data, | |
344 | size); | |
345 | skb->data -= realignment; | |
346 | skb_set_tail_pointer(skb, size); | |
347 | } | |
933a27d3 | 348 | return 2; |
3f78d1f2 NJ |
349 | } |
350 | ||
9227a46b | 351 | if (size > dev->net->mtu + ETH_HLEN) { |
60b86755 JP |
352 | netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n", |
353 | size); | |
933a27d3 DH |
354 | return 0; |
355 | } | |
356 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
357 | if (ax_skb) { | |
f925b130 | 358 | u8 alignment = (unsigned long)packet & 0x3; |
933a27d3 | 359 | ax_skb->len = size; |
3f78d1f2 NJ |
360 | |
361 | if (alignment != 0x2) { | |
362 | /* | |
363 | * not 16bit aligned use the room provided by | |
364 | * the 32 bit header to align the data | |
365 | */ | |
366 | u8 realignment = (alignment + 2) & 0x3; | |
367 | memmove(packet - realignment, packet, size); | |
368 | packet -= realignment; | |
369 | } | |
933a27d3 | 370 | ax_skb->data = packet; |
27a884dc | 371 | skb_set_tail_pointer(ax_skb, size); |
933a27d3 DH |
372 | usbnet_skb_return(dev, ax_skb); |
373 | } else { | |
374 | return 0; | |
375 | } | |
376 | ||
377 | skb_pull(skb, (size + 1) & 0xfffe); | |
378 | ||
379 | if (skb->len == 0) | |
380 | break; | |
381 | ||
382 | head = (u8 *) skb->data; | |
383 | memcpy(&header, head, sizeof(header)); | |
384 | le32_to_cpus(&header); | |
385 | packet = head + sizeof(header); | |
386 | skb_pull(skb, 4); | |
387 | } | |
388 | ||
389 | if (skb->len < 0) { | |
60b86755 JP |
390 | netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n", |
391 | skb->len); | |
933a27d3 DH |
392 | return 0; |
393 | } | |
394 | return 1; | |
395 | } | |
396 | ||
397 | static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, | |
398 | gfp_t flags) | |
399 | { | |
400 | int padlen; | |
401 | int headroom = skb_headroom(skb); | |
402 | int tailroom = skb_tailroom(skb); | |
403 | u32 packet_len; | |
404 | u32 padbytes = 0xffff0000; | |
405 | ||
406 | padlen = ((skb->len + 4) % 512) ? 0 : 4; | |
407 | ||
8e95a202 JP |
408 | if ((!skb_cloned(skb)) && |
409 | ((headroom + tailroom) >= (4 + padlen))) { | |
933a27d3 DH |
410 | if ((headroom < 4) || (tailroom < padlen)) { |
411 | skb->data = memmove(skb->head + 4, skb->data, skb->len); | |
27a884dc | 412 | skb_set_tail_pointer(skb, skb->len); |
933a27d3 DH |
413 | } |
414 | } else { | |
415 | struct sk_buff *skb2; | |
416 | skb2 = skb_copy_expand(skb, 4, padlen, flags); | |
417 | dev_kfree_skb_any(skb); | |
418 | skb = skb2; | |
419 | if (!skb) | |
420 | return NULL; | |
421 | } | |
422 | ||
423 | skb_push(skb, 4); | |
424 | packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); | |
57e4f041 | 425 | cpu_to_le32s(&packet_len); |
27d7ff46 | 426 | skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); |
933a27d3 DH |
427 | |
428 | if ((skb->len % 512) == 0) { | |
57e4f041 | 429 | cpu_to_le32s(&padbytes); |
27a884dc | 430 | memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); |
933a27d3 DH |
431 | skb_put(skb, sizeof(padbytes)); |
432 | } | |
433 | return skb; | |
434 | } | |
435 | ||
436 | static void asix_status(struct usbnet *dev, struct urb *urb) | |
437 | { | |
438 | struct ax88172_int_data *event; | |
439 | int link; | |
440 | ||
441 | if (urb->actual_length < 8) | |
442 | return; | |
443 | ||
444 | event = urb->transfer_buffer; | |
445 | link = event->link & 0x01; | |
446 | if (netif_carrier_ok(dev->net) != link) { | |
447 | if (link) { | |
448 | netif_carrier_on(dev->net); | |
449 | usbnet_defer_kevent (dev, EVENT_LINK_RESET ); | |
450 | } else | |
451 | netif_carrier_off(dev->net); | |
60b86755 | 452 | netdev_dbg(dev->net, "Link Status is: %d\n", link); |
933a27d3 DH |
453 | } |
454 | } | |
455 | ||
48b1be6a DH |
456 | static inline int asix_set_sw_mii(struct usbnet *dev) |
457 | { | |
458 | int ret; | |
459 | ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); | |
460 | if (ret < 0) | |
60b86755 | 461 | netdev_err(dev->net, "Failed to enable software MII access\n"); |
48b1be6a DH |
462 | return ret; |
463 | } | |
464 | ||
465 | static inline int asix_set_hw_mii(struct usbnet *dev) | |
466 | { | |
467 | int ret; | |
468 | ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); | |
469 | if (ret < 0) | |
60b86755 | 470 | netdev_err(dev->net, "Failed to enable hardware MII access\n"); |
48b1be6a DH |
471 | return ret; |
472 | } | |
473 | ||
933a27d3 | 474 | static inline int asix_get_phy_addr(struct usbnet *dev) |
48b1be6a | 475 | { |
51bf2976 AV |
476 | u8 buf[2]; |
477 | int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); | |
48b1be6a | 478 | |
60b86755 | 479 | netdev_dbg(dev->net, "asix_get_phy_addr()\n"); |
933a27d3 | 480 | |
51bf2976 | 481 | if (ret < 0) { |
60b86755 | 482 | netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret); |
51bf2976 | 483 | goto out; |
48b1be6a | 484 | } |
60b86755 JP |
485 | netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n", |
486 | *((__le16 *)buf)); | |
51bf2976 AV |
487 | ret = buf[1]; |
488 | ||
489 | out: | |
48b1be6a DH |
490 | return ret; |
491 | } | |
492 | ||
493 | static int asix_sw_reset(struct usbnet *dev, u8 flags) | |
494 | { | |
495 | int ret; | |
496 | ||
497 | ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); | |
498 | if (ret < 0) | |
60b86755 | 499 | netdev_err(dev->net, "Failed to send software reset: %02x\n", ret); |
933a27d3 DH |
500 | |
501 | return ret; | |
502 | } | |
48b1be6a | 503 | |
933a27d3 DH |
504 | static u16 asix_read_rx_ctl(struct usbnet *dev) |
505 | { | |
51bf2976 AV |
506 | __le16 v; |
507 | int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v); | |
933a27d3 | 508 | |
51bf2976 | 509 | if (ret < 0) { |
60b86755 | 510 | netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret); |
51bf2976 | 511 | goto out; |
933a27d3 | 512 | } |
51bf2976 AV |
513 | ret = le16_to_cpu(v); |
514 | out: | |
48b1be6a DH |
515 | return ret; |
516 | } | |
517 | ||
518 | static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) | |
519 | { | |
520 | int ret; | |
521 | ||
60b86755 | 522 | netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode); |
48b1be6a DH |
523 | ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); |
524 | if (ret < 0) | |
60b86755 JP |
525 | netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n", |
526 | mode, ret); | |
48b1be6a DH |
527 | |
528 | return ret; | |
529 | } | |
530 | ||
933a27d3 | 531 | static u16 asix_read_medium_status(struct usbnet *dev) |
2e55cc72 | 532 | { |
51bf2976 AV |
533 | __le16 v; |
534 | int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); | |
2e55cc72 | 535 | |
51bf2976 | 536 | if (ret < 0) { |
60b86755 JP |
537 | netdev_err(dev->net, "Error reading Medium Status register: %02x\n", |
538 | ret); | |
83e1b918 | 539 | return ret; /* TODO: callers not checking for error ret */ |
2e55cc72 | 540 | } |
83e1b918 GG |
541 | |
542 | return le16_to_cpu(v); | |
543 | ||
2e55cc72 DB |
544 | } |
545 | ||
933a27d3 | 546 | static int asix_write_medium_mode(struct usbnet *dev, u16 mode) |
2e55cc72 | 547 | { |
933a27d3 | 548 | int ret; |
2e55cc72 | 549 | |
60b86755 | 550 | netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode); |
933a27d3 DH |
551 | ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); |
552 | if (ret < 0) | |
60b86755 JP |
553 | netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n", |
554 | mode, ret); | |
2e55cc72 | 555 | |
933a27d3 DH |
556 | return ret; |
557 | } | |
2e55cc72 | 558 | |
933a27d3 DH |
559 | static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep) |
560 | { | |
561 | int ret; | |
2e55cc72 | 562 | |
60b86755 | 563 | netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value); |
933a27d3 DH |
564 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); |
565 | if (ret < 0) | |
60b86755 JP |
566 | netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n", |
567 | value, ret); | |
2e55cc72 | 568 | |
933a27d3 DH |
569 | if (sleep) |
570 | msleep(sleep); | |
571 | ||
572 | return ret; | |
2e55cc72 DB |
573 | } |
574 | ||
933a27d3 DH |
575 | /* |
576 | * AX88772 & AX88178 have a 16-bit RX_CTL value | |
577 | */ | |
48b1be6a | 578 | static void asix_set_multicast(struct net_device *net) |
2e55cc72 DB |
579 | { |
580 | struct usbnet *dev = netdev_priv(net); | |
48b1be6a | 581 | struct asix_data *data = (struct asix_data *)&dev->data; |
933a27d3 | 582 | u16 rx_ctl = AX_DEFAULT_RX_CTL; |
2e55cc72 DB |
583 | |
584 | if (net->flags & IFF_PROMISC) { | |
933a27d3 | 585 | rx_ctl |= AX_RX_CTL_PRO; |
8e95a202 | 586 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 587 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 588 | rx_ctl |= AX_RX_CTL_AMALL; |
4cd24eaf | 589 | } else if (netdev_mc_empty(net)) { |
2e55cc72 DB |
590 | /* just broadcast and directed */ |
591 | } else { | |
592 | /* We use the 20 byte dev->data | |
593 | * for our 8 byte filter buffer | |
594 | * to avoid allocating memory that | |
595 | * is tricky to free later */ | |
22bedad3 | 596 | struct netdev_hw_addr *ha; |
2e55cc72 | 597 | u32 crc_bits; |
2e55cc72 DB |
598 | |
599 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
600 | ||
601 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
602 | netdev_for_each_mc_addr(ha, net) { |
603 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
2e55cc72 DB |
604 | data->multi_filter[crc_bits >> 3] |= |
605 | 1 << (crc_bits & 7); | |
2e55cc72 DB |
606 | } |
607 | ||
48b1be6a | 608 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, |
2e55cc72 DB |
609 | AX_MCAST_FILTER_SIZE, data->multi_filter); |
610 | ||
933a27d3 | 611 | rx_ctl |= AX_RX_CTL_AM; |
2e55cc72 DB |
612 | } |
613 | ||
48b1be6a | 614 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); |
2e55cc72 DB |
615 | } |
616 | ||
48b1be6a | 617 | static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc) |
2e55cc72 DB |
618 | { |
619 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 620 | __le16 res; |
2e55cc72 | 621 | |
a9fc6338 | 622 | mutex_lock(&dev->phy_mutex); |
48b1be6a DH |
623 | asix_set_sw_mii(dev); |
624 | asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, | |
51bf2976 | 625 | (__u16)loc, 2, &res); |
48b1be6a | 626 | asix_set_hw_mii(dev); |
a9fc6338 | 627 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 | 628 | |
60b86755 JP |
629 | netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", |
630 | phy_id, loc, le16_to_cpu(res)); | |
2e55cc72 | 631 | |
51bf2976 | 632 | return le16_to_cpu(res); |
2e55cc72 DB |
633 | } |
634 | ||
635 | static void | |
48b1be6a | 636 | asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) |
2e55cc72 DB |
637 | { |
638 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 639 | __le16 res = cpu_to_le16(val); |
2e55cc72 | 640 | |
60b86755 JP |
641 | netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", |
642 | phy_id, loc, val); | |
a9fc6338 | 643 | mutex_lock(&dev->phy_mutex); |
48b1be6a | 644 | asix_set_sw_mii(dev); |
51bf2976 | 645 | asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); |
48b1be6a | 646 | asix_set_hw_mii(dev); |
a9fc6338 | 647 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 DB |
648 | } |
649 | ||
933a27d3 DH |
650 | /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ |
651 | static u32 asix_get_phyid(struct usbnet *dev) | |
2e55cc72 | 652 | { |
933a27d3 DH |
653 | int phy_reg; |
654 | u32 phy_id; | |
2e55cc72 | 655 | |
933a27d3 DH |
656 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); |
657 | if (phy_reg < 0) | |
658 | return 0; | |
2e55cc72 | 659 | |
933a27d3 | 660 | phy_id = (phy_reg & 0xffff) << 16; |
2e55cc72 | 661 | |
933a27d3 DH |
662 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); |
663 | if (phy_reg < 0) | |
664 | return 0; | |
665 | ||
666 | phy_id |= (phy_reg & 0xffff); | |
667 | ||
668 | return phy_id; | |
2e55cc72 DB |
669 | } |
670 | ||
671 | static void | |
48b1be6a | 672 | asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
673 | { |
674 | struct usbnet *dev = netdev_priv(net); | |
675 | u8 opt; | |
676 | ||
48b1be6a | 677 | if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) { |
2e55cc72 DB |
678 | wolinfo->supported = 0; |
679 | wolinfo->wolopts = 0; | |
680 | return; | |
681 | } | |
682 | wolinfo->supported = WAKE_PHY | WAKE_MAGIC; | |
683 | wolinfo->wolopts = 0; | |
2e55cc72 DB |
684 | } |
685 | ||
686 | static int | |
48b1be6a | 687 | asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
688 | { |
689 | struct usbnet *dev = netdev_priv(net); | |
690 | u8 opt = 0; | |
2e55cc72 DB |
691 | |
692 | if (wolinfo->wolopts & WAKE_PHY) | |
693 | opt |= AX_MONITOR_LINK; | |
694 | if (wolinfo->wolopts & WAKE_MAGIC) | |
695 | opt |= AX_MONITOR_MAGIC; | |
2e55cc72 | 696 | |
48b1be6a | 697 | if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, |
51bf2976 | 698 | opt, 0, 0, NULL) < 0) |
2e55cc72 DB |
699 | return -EINVAL; |
700 | ||
701 | return 0; | |
702 | } | |
703 | ||
48b1be6a | 704 | static int asix_get_eeprom_len(struct net_device *net) |
2e55cc72 | 705 | { |
933a27d3 DH |
706 | struct usbnet *dev = netdev_priv(net); |
707 | struct asix_data *data = (struct asix_data *)&dev->data; | |
708 | ||
709 | return data->eeprom_len; | |
2e55cc72 DB |
710 | } |
711 | ||
48b1be6a | 712 | static int asix_get_eeprom(struct net_device *net, |
2e55cc72 DB |
713 | struct ethtool_eeprom *eeprom, u8 *data) |
714 | { | |
715 | struct usbnet *dev = netdev_priv(net); | |
51bf2976 | 716 | __le16 *ebuf = (__le16 *)data; |
2e55cc72 DB |
717 | int i; |
718 | ||
719 | /* Crude hack to ensure that we don't overwrite memory | |
720 | * if an odd length is supplied | |
721 | */ | |
722 | if (eeprom->len % 2) | |
723 | return -EINVAL; | |
724 | ||
725 | eeprom->magic = AX_EEPROM_MAGIC; | |
726 | ||
727 | /* ax8817x returns 2 bytes from eeprom on read */ | |
728 | for (i=0; i < eeprom->len / 2; i++) { | |
48b1be6a | 729 | if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, |
2e55cc72 DB |
730 | eeprom->offset + i, 0, 2, &ebuf[i]) < 0) |
731 | return -EINVAL; | |
732 | } | |
733 | return 0; | |
734 | } | |
735 | ||
48b1be6a | 736 | static void asix_get_drvinfo (struct net_device *net, |
2e55cc72 DB |
737 | struct ethtool_drvinfo *info) |
738 | { | |
933a27d3 DH |
739 | struct usbnet *dev = netdev_priv(net); |
740 | struct asix_data *data = (struct asix_data *)&dev->data; | |
741 | ||
2e55cc72 DB |
742 | /* Inherit standard device info */ |
743 | usbnet_get_drvinfo(net, info); | |
83e1b918 | 744 | strncpy (info->driver, DRIVER_NAME, sizeof info->driver); |
933a27d3 DH |
745 | strncpy (info->version, DRIVER_VERSION, sizeof info->version); |
746 | info->eedump_len = data->eeprom_len; | |
2e55cc72 DB |
747 | } |
748 | ||
933a27d3 DH |
749 | static u32 asix_get_link(struct net_device *net) |
750 | { | |
751 | struct usbnet *dev = netdev_priv(net); | |
752 | ||
753 | return mii_link_ok(&dev->mii); | |
754 | } | |
755 | ||
756 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | |
757 | { | |
758 | struct usbnet *dev = netdev_priv(net); | |
759 | ||
760 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
761 | } | |
762 | ||
7f29a3ba JK |
763 | static int asix_set_mac_address(struct net_device *net, void *p) |
764 | { | |
765 | struct usbnet *dev = netdev_priv(net); | |
766 | struct asix_data *data = (struct asix_data *)&dev->data; | |
767 | struct sockaddr *addr = p; | |
768 | ||
769 | if (netif_running(net)) | |
770 | return -EBUSY; | |
771 | if (!is_valid_ether_addr(addr->sa_data)) | |
772 | return -EADDRNOTAVAIL; | |
773 | ||
774 | memcpy(net->dev_addr, addr->sa_data, ETH_ALEN); | |
775 | ||
776 | /* We use the 20 byte dev->data | |
777 | * for our 6 byte mac buffer | |
778 | * to avoid allocating memory that | |
779 | * is tricky to free later */ | |
780 | memcpy(data->mac_addr, addr->sa_data, ETH_ALEN); | |
781 | asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
782 | data->mac_addr); | |
783 | ||
784 | return 0; | |
785 | } | |
786 | ||
933a27d3 DH |
787 | /* We need to override some ethtool_ops so we require our |
788 | own structure so we don't interfere with other usbnet | |
789 | devices that may be connected at the same time. */ | |
0fc0b732 | 790 | static const struct ethtool_ops ax88172_ethtool_ops = { |
933a27d3 DH |
791 | .get_drvinfo = asix_get_drvinfo, |
792 | .get_link = asix_get_link, | |
933a27d3 | 793 | .get_msglevel = usbnet_get_msglevel, |
2e55cc72 | 794 | .set_msglevel = usbnet_set_msglevel, |
48b1be6a DH |
795 | .get_wol = asix_get_wol, |
796 | .set_wol = asix_set_wol, | |
797 | .get_eeprom_len = asix_get_eeprom_len, | |
798 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
799 | .get_settings = usbnet_get_settings, |
800 | .set_settings = usbnet_set_settings, | |
801 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
802 | }; |
803 | ||
933a27d3 | 804 | static void ax88172_set_multicast(struct net_device *net) |
2e55cc72 DB |
805 | { |
806 | struct usbnet *dev = netdev_priv(net); | |
933a27d3 DH |
807 | struct asix_data *data = (struct asix_data *)&dev->data; |
808 | u8 rx_ctl = 0x8c; | |
2e55cc72 | 809 | |
933a27d3 DH |
810 | if (net->flags & IFF_PROMISC) { |
811 | rx_ctl |= 0x01; | |
8e95a202 | 812 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 813 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 814 | rx_ctl |= 0x02; |
4cd24eaf | 815 | } else if (netdev_mc_empty(net)) { |
933a27d3 DH |
816 | /* just broadcast and directed */ |
817 | } else { | |
818 | /* We use the 20 byte dev->data | |
819 | * for our 8 byte filter buffer | |
820 | * to avoid allocating memory that | |
821 | * is tricky to free later */ | |
22bedad3 | 822 | struct netdev_hw_addr *ha; |
933a27d3 | 823 | u32 crc_bits; |
933a27d3 DH |
824 | |
825 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
826 | ||
827 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
828 | netdev_for_each_mc_addr(ha, net) { |
829 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
933a27d3 DH |
830 | data->multi_filter[crc_bits >> 3] |= |
831 | 1 << (crc_bits & 7); | |
933a27d3 DH |
832 | } |
833 | ||
834 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | |
835 | AX_MCAST_FILTER_SIZE, data->multi_filter); | |
836 | ||
837 | rx_ctl |= 0x10; | |
838 | } | |
839 | ||
840 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | |
841 | } | |
842 | ||
843 | static int ax88172_link_reset(struct usbnet *dev) | |
844 | { | |
845 | u8 mode; | |
8ae6daca | 846 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
847 | |
848 | mii_check_media(&dev->mii, 1, 1); | |
849 | mii_ethtool_gset(&dev->mii, &ecmd); | |
850 | mode = AX88172_MEDIUM_DEFAULT; | |
851 | ||
852 | if (ecmd.duplex != DUPLEX_FULL) | |
853 | mode |= ~AX88172_MEDIUM_FD; | |
854 | ||
8ae6daca DD |
855 | netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
856 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
857 | |
858 | asix_write_medium_mode(dev, mode); | |
859 | ||
860 | return 0; | |
2e55cc72 DB |
861 | } |
862 | ||
1703338c SH |
863 | static const struct net_device_ops ax88172_netdev_ops = { |
864 | .ndo_open = usbnet_open, | |
865 | .ndo_stop = usbnet_stop, | |
866 | .ndo_start_xmit = usbnet_start_xmit, | |
867 | .ndo_tx_timeout = usbnet_tx_timeout, | |
868 | .ndo_change_mtu = usbnet_change_mtu, | |
869 | .ndo_set_mac_address = eth_mac_addr, | |
870 | .ndo_validate_addr = eth_validate_addr, | |
871 | .ndo_do_ioctl = asix_ioctl, | |
afc4b13d | 872 | .ndo_set_rx_mode = ax88172_set_multicast, |
1703338c SH |
873 | }; |
874 | ||
48b1be6a | 875 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) |
2e55cc72 DB |
876 | { |
877 | int ret = 0; | |
51bf2976 | 878 | u8 buf[ETH_ALEN]; |
2e55cc72 DB |
879 | int i; |
880 | unsigned long gpio_bits = dev->driver_info->data; | |
933a27d3 DH |
881 | struct asix_data *data = (struct asix_data *)&dev->data; |
882 | ||
883 | data->eeprom_len = AX88172_EEPROM_LEN; | |
2e55cc72 DB |
884 | |
885 | usbnet_get_endpoints(dev,intf); | |
886 | ||
2e55cc72 DB |
887 | /* Toggle the GPIOs in a manufacturer/model specific way */ |
888 | for (i = 2; i >= 0; i--) { | |
83e1b918 GG |
889 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, |
890 | (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL); | |
891 | if (ret < 0) | |
51bf2976 | 892 | goto out; |
2e55cc72 DB |
893 | msleep(5); |
894 | } | |
895 | ||
83e1b918 GG |
896 | ret = asix_write_rx_ctl(dev, 0x80); |
897 | if (ret < 0) | |
51bf2976 | 898 | goto out; |
2e55cc72 DB |
899 | |
900 | /* Get the MAC address */ | |
83e1b918 GG |
901 | ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
902 | if (ret < 0) { | |
2e55cc72 | 903 | dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); |
51bf2976 | 904 | goto out; |
2e55cc72 DB |
905 | } |
906 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
907 | ||
2e55cc72 DB |
908 | /* Initialize MII structure */ |
909 | dev->mii.dev = dev->net; | |
48b1be6a DH |
910 | dev->mii.mdio_read = asix_mdio_read; |
911 | dev->mii.mdio_write = asix_mdio_write; | |
2e55cc72 DB |
912 | dev->mii.phy_id_mask = 0x3f; |
913 | dev->mii.reg_num_mask = 0x1f; | |
933a27d3 | 914 | dev->mii.phy_id = asix_get_phy_addr(dev); |
2e55cc72 | 915 | |
1703338c | 916 | dev->net->netdev_ops = &ax88172_netdev_ops; |
48b1be6a | 917 | dev->net->ethtool_ops = &ax88172_ethtool_ops; |
2e55cc72 | 918 | |
933a27d3 DH |
919 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
920 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
921 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); |
922 | mii_nway_restart(&dev->mii); | |
923 | ||
924 | return 0; | |
51bf2976 AV |
925 | |
926 | out: | |
2e55cc72 DB |
927 | return ret; |
928 | } | |
929 | ||
0fc0b732 | 930 | static const struct ethtool_ops ax88772_ethtool_ops = { |
48b1be6a | 931 | .get_drvinfo = asix_get_drvinfo, |
933a27d3 | 932 | .get_link = asix_get_link, |
2e55cc72 DB |
933 | .get_msglevel = usbnet_get_msglevel, |
934 | .set_msglevel = usbnet_set_msglevel, | |
48b1be6a DH |
935 | .get_wol = asix_get_wol, |
936 | .set_wol = asix_set_wol, | |
937 | .get_eeprom_len = asix_get_eeprom_len, | |
938 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
939 | .get_settings = usbnet_get_settings, |
940 | .set_settings = usbnet_set_settings, | |
941 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
942 | }; |
943 | ||
933a27d3 DH |
944 | static int ax88772_link_reset(struct usbnet *dev) |
945 | { | |
946 | u16 mode; | |
8ae6daca | 947 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
948 | |
949 | mii_check_media(&dev->mii, 1, 1); | |
950 | mii_ethtool_gset(&dev->mii, &ecmd); | |
951 | mode = AX88772_MEDIUM_DEFAULT; | |
952 | ||
8ae6daca | 953 | if (ethtool_cmd_speed(&ecmd) != SPEED_100) |
933a27d3 DH |
954 | mode &= ~AX_MEDIUM_PS; |
955 | ||
956 | if (ecmd.duplex != DUPLEX_FULL) | |
957 | mode &= ~AX_MEDIUM_FD; | |
958 | ||
8ae6daca DD |
959 | netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
960 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
961 | |
962 | asix_write_medium_mode(dev, mode); | |
963 | ||
964 | return 0; | |
965 | } | |
966 | ||
4ad1438f | 967 | static int ax88772_reset(struct usbnet *dev) |
2e55cc72 | 968 | { |
d0ffff8f | 969 | int ret, embd_phy; |
933a27d3 | 970 | u16 rx_ctl; |
2e55cc72 | 971 | |
83e1b918 GG |
972 | ret = asix_write_gpio(dev, |
973 | AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5); | |
974 | if (ret < 0) | |
51bf2976 | 975 | goto out; |
2e55cc72 | 976 | |
d0ffff8f | 977 | embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); |
4ad1438f | 978 | |
83e1b918 GG |
979 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); |
980 | if (ret < 0) { | |
2e55cc72 | 981 | dbg("Select PHY #1 failed: %d", ret); |
51bf2976 | 982 | goto out; |
2e55cc72 DB |
983 | } |
984 | ||
83e1b918 GG |
985 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); |
986 | if (ret < 0) | |
51bf2976 | 987 | goto out; |
2e55cc72 DB |
988 | |
989 | msleep(150); | |
83e1b918 GG |
990 | |
991 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
992 | if (ret < 0) | |
51bf2976 | 993 | goto out; |
2e55cc72 DB |
994 | |
995 | msleep(150); | |
4ad1438f | 996 | |
d0ffff8f | 997 | if (embd_phy) { |
83e1b918 GG |
998 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL); |
999 | if (ret < 0) | |
51bf2976 | 1000 | goto out; |
83e1b918 GG |
1001 | } else { |
1002 | ret = asix_sw_reset(dev, AX_SWRESET_PRTE); | |
1003 | if (ret < 0) | |
51bf2976 | 1004 | goto out; |
d0ffff8f | 1005 | } |
2e55cc72 DB |
1006 | |
1007 | msleep(150); | |
933a27d3 DH |
1008 | rx_ctl = asix_read_rx_ctl(dev); |
1009 | dbg("RX_CTL is 0x%04x after software reset", rx_ctl); | |
83e1b918 GG |
1010 | ret = asix_write_rx_ctl(dev, 0x0000); |
1011 | if (ret < 0) | |
51bf2976 | 1012 | goto out; |
2e55cc72 | 1013 | |
933a27d3 DH |
1014 | rx_ctl = asix_read_rx_ctl(dev); |
1015 | dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl); | |
1016 | ||
83e1b918 GG |
1017 | ret = asix_sw_reset(dev, AX_SWRESET_PRL); |
1018 | if (ret < 0) | |
51bf2976 | 1019 | goto out; |
2e55cc72 | 1020 | |
2e55cc72 | 1021 | msleep(150); |
48b1be6a | 1022 | |
83e1b918 GG |
1023 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL); |
1024 | if (ret < 0) | |
51bf2976 | 1025 | goto out; |
2e55cc72 | 1026 | |
48b1be6a | 1027 | msleep(150); |
2e55cc72 | 1028 | |
933a27d3 DH |
1029 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
1030 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
1031 | ADVERTISE_ALL | ADVERTISE_CSMA); |
1032 | mii_nway_restart(&dev->mii); | |
1033 | ||
83e1b918 GG |
1034 | ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT); |
1035 | if (ret < 0) | |
51bf2976 | 1036 | goto out; |
2e55cc72 | 1037 | |
83e1b918 | 1038 | ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, |
2e55cc72 | 1039 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, |
83e1b918 GG |
1040 | AX88772_IPG2_DEFAULT, 0, NULL); |
1041 | if (ret < 0) { | |
2e55cc72 | 1042 | dbg("Write IPG,IPG1,IPG2 failed: %d", ret); |
51bf2976 | 1043 | goto out; |
2e55cc72 | 1044 | } |
2e55cc72 DB |
1045 | |
1046 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ | |
83e1b918 GG |
1047 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1048 | if (ret < 0) | |
51bf2976 | 1049 | goto out; |
2e55cc72 | 1050 | |
933a27d3 DH |
1051 | rx_ctl = asix_read_rx_ctl(dev); |
1052 | dbg("RX_CTL is 0x%04x after all initializations", rx_ctl); | |
1053 | ||
1054 | rx_ctl = asix_read_medium_status(dev); | |
1055 | dbg("Medium Status is 0x%04x after all initializations", rx_ctl); | |
1056 | ||
4ad1438f GG |
1057 | return 0; |
1058 | ||
1059 | out: | |
1060 | return ret; | |
1061 | ||
1062 | } | |
1063 | ||
1064 | static const struct net_device_ops ax88772_netdev_ops = { | |
1065 | .ndo_open = usbnet_open, | |
1066 | .ndo_stop = usbnet_stop, | |
1067 | .ndo_start_xmit = usbnet_start_xmit, | |
1068 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1069 | .ndo_change_mtu = usbnet_change_mtu, | |
1070 | .ndo_set_mac_address = asix_set_mac_address, | |
1071 | .ndo_validate_addr = eth_validate_addr, | |
1072 | .ndo_do_ioctl = asix_ioctl, | |
1073 | .ndo_set_rx_mode = asix_set_multicast, | |
1074 | }; | |
1075 | ||
1076 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |
1077 | { | |
1078 | int ret; | |
1079 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1080 | u8 buf[ETH_ALEN]; | |
1081 | u32 phyid; | |
1082 | ||
1083 | data->eeprom_len = AX88772_EEPROM_LEN; | |
1084 | ||
1085 | usbnet_get_endpoints(dev,intf); | |
1086 | ||
1087 | /* Get the MAC address */ | |
83e1b918 GG |
1088 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1089 | if (ret < 0) { | |
4ad1438f | 1090 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1091 | return ret; |
4ad1438f GG |
1092 | } |
1093 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
1094 | ||
1095 | /* Initialize MII structure */ | |
1096 | dev->mii.dev = dev->net; | |
1097 | dev->mii.mdio_read = asix_mdio_read; | |
1098 | dev->mii.mdio_write = asix_mdio_write; | |
1099 | dev->mii.phy_id_mask = 0x1f; | |
1100 | dev->mii.reg_num_mask = 0x1f; | |
1101 | dev->mii.phy_id = asix_get_phy_addr(dev); | |
1102 | ||
1103 | phyid = asix_get_phyid(dev); | |
1104 | dbg("PHYID=0x%08x", phyid); | |
1105 | ||
1106 | dev->net->netdev_ops = &ax88772_netdev_ops; | |
1107 | dev->net->ethtool_ops = &ax88772_ethtool_ops; | |
1108 | ||
83e1b918 GG |
1109 | ret = ax88772_reset(dev); |
1110 | if (ret < 0) | |
1111 | return ret; | |
4ad1438f | 1112 | |
2e55cc72 DB |
1113 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ |
1114 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1115 | /* hard_mtu is still the default - the device does not support | |
1116 | jumbo eth frames */ | |
1117 | dev->rx_urb_size = 2048; | |
1118 | } | |
83e1b918 | 1119 | |
2e55cc72 | 1120 | return 0; |
2e55cc72 DB |
1121 | } |
1122 | ||
933a27d3 DH |
1123 | static struct ethtool_ops ax88178_ethtool_ops = { |
1124 | .get_drvinfo = asix_get_drvinfo, | |
1125 | .get_link = asix_get_link, | |
933a27d3 DH |
1126 | .get_msglevel = usbnet_get_msglevel, |
1127 | .set_msglevel = usbnet_set_msglevel, | |
1128 | .get_wol = asix_get_wol, | |
1129 | .set_wol = asix_set_wol, | |
1130 | .get_eeprom_len = asix_get_eeprom_len, | |
1131 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
1132 | .get_settings = usbnet_get_settings, |
1133 | .set_settings = usbnet_set_settings, | |
1134 | .nway_reset = usbnet_nway_reset, | |
933a27d3 DH |
1135 | }; |
1136 | ||
1137 | static int marvell_phy_init(struct usbnet *dev) | |
2e55cc72 | 1138 | { |
933a27d3 DH |
1139 | struct asix_data *data = (struct asix_data *)&dev->data; |
1140 | u16 reg; | |
2e55cc72 | 1141 | |
60b86755 | 1142 | netdev_dbg(dev->net, "marvell_phy_init()\n"); |
2e55cc72 | 1143 | |
933a27d3 | 1144 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); |
60b86755 | 1145 | netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); |
2e55cc72 | 1146 | |
933a27d3 DH |
1147 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, |
1148 | MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); | |
2e55cc72 | 1149 | |
933a27d3 DH |
1150 | if (data->ledmode) { |
1151 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, | |
1152 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1153 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); |
2e55cc72 | 1154 | |
933a27d3 DH |
1155 | reg &= 0xf8ff; |
1156 | reg |= (1 + 0x0100); | |
1157 | asix_mdio_write(dev->net, dev->mii.phy_id, | |
1158 | MII_MARVELL_LED_CTRL, reg); | |
2e55cc72 | 1159 | |
933a27d3 DH |
1160 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
1161 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1162 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); |
933a27d3 DH |
1163 | reg &= 0xfc0f; |
1164 | } | |
2e55cc72 | 1165 | |
933a27d3 DH |
1166 | return 0; |
1167 | } | |
1168 | ||
610d885d GG |
1169 | static int rtl8211cl_phy_init(struct usbnet *dev) |
1170 | { | |
1171 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1172 | ||
1173 | netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); | |
1174 | ||
1175 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); | |
1176 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); | |
1177 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, | |
1178 | asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); | |
1179 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1180 | ||
1181 | if (data->ledmode == 12) { | |
1182 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); | |
1183 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); | |
1184 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1185 | } | |
1186 | ||
1187 | return 0; | |
1188 | } | |
1189 | ||
933a27d3 DH |
1190 | static int marvell_led_status(struct usbnet *dev, u16 speed) |
1191 | { | |
1192 | u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); | |
1193 | ||
60b86755 | 1194 | netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); |
933a27d3 DH |
1195 | |
1196 | /* Clear out the center LED bits - 0x03F0 */ | |
1197 | reg &= 0xfc0f; | |
1198 | ||
1199 | switch (speed) { | |
1200 | case SPEED_1000: | |
1201 | reg |= 0x03e0; | |
1202 | break; | |
1203 | case SPEED_100: | |
1204 | reg |= 0x03b0; | |
1205 | break; | |
1206 | default: | |
1207 | reg |= 0x02f0; | |
2e55cc72 DB |
1208 | } |
1209 | ||
60b86755 | 1210 | netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); |
933a27d3 DH |
1211 | asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); |
1212 | ||
1213 | return 0; | |
1214 | } | |
1215 | ||
610d885d GG |
1216 | static int ax88178_reset(struct usbnet *dev) |
1217 | { | |
1218 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1219 | int ret; | |
1220 | __le16 eeprom; | |
1221 | u8 status; | |
1222 | int gpio0 = 0; | |
1223 | ||
1224 | asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); | |
1225 | dbg("GPIO Status: 0x%04x", status); | |
1226 | ||
1227 | asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); | |
1228 | asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); | |
1229 | asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); | |
1230 | ||
1231 | dbg("EEPROM index 0x17 is 0x%04x", eeprom); | |
1232 | ||
1233 | if (eeprom == cpu_to_le16(0xffff)) { | |
1234 | data->phymode = PHY_MODE_MARVELL; | |
1235 | data->ledmode = 0; | |
1236 | gpio0 = 1; | |
1237 | } else { | |
1238 | data->phymode = le16_to_cpu(eeprom) & 7; | |
1239 | data->ledmode = le16_to_cpu(eeprom) >> 8; | |
1240 | gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; | |
1241 | } | |
1242 | dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode); | |
1243 | ||
1244 | asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); | |
1245 | if ((le16_to_cpu(eeprom) >> 8) != 1) { | |
1246 | asix_write_gpio(dev, 0x003c, 30); | |
1247 | asix_write_gpio(dev, 0x001c, 300); | |
1248 | asix_write_gpio(dev, 0x003c, 30); | |
1249 | } else { | |
1250 | dbg("gpio phymode == 1 path"); | |
1251 | asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); | |
1252 | asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); | |
1253 | } | |
1254 | ||
1255 | asix_sw_reset(dev, 0); | |
1256 | msleep(150); | |
1257 | ||
1258 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); | |
1259 | msleep(150); | |
1260 | ||
1261 | asix_write_rx_ctl(dev, 0); | |
1262 | ||
1263 | if (data->phymode == PHY_MODE_MARVELL) { | |
1264 | marvell_phy_init(dev); | |
1265 | msleep(60); | |
1266 | } else if (data->phymode == PHY_MODE_RTL8211CL) | |
1267 | rtl8211cl_phy_init(dev); | |
1268 | ||
1269 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, | |
1270 | BMCR_RESET | BMCR_ANENABLE); | |
1271 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
1272 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | |
1273 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, | |
1274 | ADVERTISE_1000FULL); | |
1275 | ||
1276 | mii_nway_restart(&dev->mii); | |
1277 | ||
83e1b918 GG |
1278 | ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT); |
1279 | if (ret < 0) | |
1280 | return ret; | |
610d885d | 1281 | |
83e1b918 GG |
1282 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1283 | if (ret < 0) | |
1284 | return ret; | |
610d885d GG |
1285 | |
1286 | return 0; | |
610d885d GG |
1287 | } |
1288 | ||
933a27d3 DH |
1289 | static int ax88178_link_reset(struct usbnet *dev) |
1290 | { | |
1291 | u16 mode; | |
8ae6daca | 1292 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 | 1293 | struct asix_data *data = (struct asix_data *)&dev->data; |
8ae6daca | 1294 | u32 speed; |
933a27d3 | 1295 | |
60b86755 | 1296 | netdev_dbg(dev->net, "ax88178_link_reset()\n"); |
933a27d3 DH |
1297 | |
1298 | mii_check_media(&dev->mii, 1, 1); | |
1299 | mii_ethtool_gset(&dev->mii, &ecmd); | |
1300 | mode = AX88178_MEDIUM_DEFAULT; | |
8ae6daca | 1301 | speed = ethtool_cmd_speed(&ecmd); |
933a27d3 | 1302 | |
8ae6daca | 1303 | if (speed == SPEED_1000) |
a7f75c0c | 1304 | mode |= AX_MEDIUM_GM; |
8ae6daca | 1305 | else if (speed == SPEED_100) |
933a27d3 DH |
1306 | mode |= AX_MEDIUM_PS; |
1307 | else | |
1308 | mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); | |
1309 | ||
a7f75c0c PK |
1310 | mode |= AX_MEDIUM_ENCK; |
1311 | ||
933a27d3 DH |
1312 | if (ecmd.duplex == DUPLEX_FULL) |
1313 | mode |= AX_MEDIUM_FD; | |
1314 | else | |
1315 | mode &= ~AX_MEDIUM_FD; | |
1316 | ||
8ae6daca DD |
1317 | netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
1318 | speed, ecmd.duplex, mode); | |
933a27d3 DH |
1319 | |
1320 | asix_write_medium_mode(dev, mode); | |
1321 | ||
1322 | if (data->phymode == PHY_MODE_MARVELL && data->ledmode) | |
8ae6daca | 1323 | marvell_led_status(dev, speed); |
933a27d3 DH |
1324 | |
1325 | return 0; | |
1326 | } | |
1327 | ||
1328 | static void ax88178_set_mfb(struct usbnet *dev) | |
1329 | { | |
1330 | u16 mfb = AX_RX_CTL_MFB_16384; | |
1331 | u16 rxctl; | |
1332 | u16 medium; | |
1333 | int old_rx_urb_size = dev->rx_urb_size; | |
1334 | ||
1335 | if (dev->hard_mtu < 2048) { | |
1336 | dev->rx_urb_size = 2048; | |
1337 | mfb = AX_RX_CTL_MFB_2048; | |
1338 | } else if (dev->hard_mtu < 4096) { | |
1339 | dev->rx_urb_size = 4096; | |
1340 | mfb = AX_RX_CTL_MFB_4096; | |
1341 | } else if (dev->hard_mtu < 8192) { | |
1342 | dev->rx_urb_size = 8192; | |
1343 | mfb = AX_RX_CTL_MFB_8192; | |
1344 | } else if (dev->hard_mtu < 16384) { | |
1345 | dev->rx_urb_size = 16384; | |
1346 | mfb = AX_RX_CTL_MFB_16384; | |
2e55cc72 | 1347 | } |
933a27d3 DH |
1348 | |
1349 | rxctl = asix_read_rx_ctl(dev); | |
1350 | asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); | |
1351 | ||
1352 | medium = asix_read_medium_status(dev); | |
1353 | if (dev->net->mtu > 1500) | |
1354 | medium |= AX_MEDIUM_JFE; | |
1355 | else | |
1356 | medium &= ~AX_MEDIUM_JFE; | |
1357 | asix_write_medium_mode(dev, medium); | |
1358 | ||
1359 | if (dev->rx_urb_size > old_rx_urb_size) | |
1360 | usbnet_unlink_rx_urbs(dev); | |
2e55cc72 DB |
1361 | } |
1362 | ||
933a27d3 | 1363 | static int ax88178_change_mtu(struct net_device *net, int new_mtu) |
2e55cc72 | 1364 | { |
933a27d3 DH |
1365 | struct usbnet *dev = netdev_priv(net); |
1366 | int ll_mtu = new_mtu + net->hard_header_len + 4; | |
2e55cc72 | 1367 | |
60b86755 | 1368 | netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); |
2e55cc72 | 1369 | |
933a27d3 DH |
1370 | if (new_mtu <= 0 || ll_mtu > 16384) |
1371 | return -EINVAL; | |
1372 | ||
1373 | if ((ll_mtu % dev->maxpacket) == 0) | |
1374 | return -EDOM; | |
1375 | ||
1376 | net->mtu = new_mtu; | |
1377 | dev->hard_mtu = net->mtu + net->hard_header_len; | |
1378 | ax88178_set_mfb(dev); | |
1379 | ||
1380 | return 0; | |
1381 | } | |
1382 | ||
1703338c SH |
1383 | static const struct net_device_ops ax88178_netdev_ops = { |
1384 | .ndo_open = usbnet_open, | |
1385 | .ndo_stop = usbnet_stop, | |
1386 | .ndo_start_xmit = usbnet_start_xmit, | |
1387 | .ndo_tx_timeout = usbnet_tx_timeout, | |
7f29a3ba | 1388 | .ndo_set_mac_address = asix_set_mac_address, |
1703338c | 1389 | .ndo_validate_addr = eth_validate_addr, |
afc4b13d | 1390 | .ndo_set_rx_mode = asix_set_multicast, |
1703338c SH |
1391 | .ndo_do_ioctl = asix_ioctl, |
1392 | .ndo_change_mtu = ax88178_change_mtu, | |
1393 | }; | |
1394 | ||
933a27d3 DH |
1395 | static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) |
1396 | { | |
933a27d3 | 1397 | int ret; |
51bf2976 | 1398 | u8 buf[ETH_ALEN]; |
933a27d3 | 1399 | u32 phyid; |
79de9efd GG |
1400 | struct asix_data *data = (struct asix_data *)&dev->data; |
1401 | ||
1402 | data->eeprom_len = AX88772_EEPROM_LEN; | |
933a27d3 DH |
1403 | |
1404 | usbnet_get_endpoints(dev,intf); | |
1405 | ||
933a27d3 | 1406 | /* Get the MAC address */ |
83e1b918 GG |
1407 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1408 | if (ret < 0) { | |
933a27d3 | 1409 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1410 | return ret; |
2e55cc72 | 1411 | } |
933a27d3 | 1412 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); |
2e55cc72 | 1413 | |
933a27d3 DH |
1414 | /* Initialize MII structure */ |
1415 | dev->mii.dev = dev->net; | |
1416 | dev->mii.mdio_read = asix_mdio_read; | |
1417 | dev->mii.mdio_write = asix_mdio_write; | |
1418 | dev->mii.phy_id_mask = 0x1f; | |
1419 | dev->mii.reg_num_mask = 0xff; | |
1420 | dev->mii.supports_gmii = 1; | |
933a27d3 | 1421 | dev->mii.phy_id = asix_get_phy_addr(dev); |
1703338c SH |
1422 | |
1423 | dev->net->netdev_ops = &ax88178_netdev_ops; | |
933a27d3 | 1424 | dev->net->ethtool_ops = &ax88178_ethtool_ops; |
2e55cc72 | 1425 | |
933a27d3 DH |
1426 | phyid = asix_get_phyid(dev); |
1427 | dbg("PHYID=0x%08x", phyid); | |
2e55cc72 | 1428 | |
610d885d GG |
1429 | ret = ax88178_reset(dev); |
1430 | if (ret < 0) | |
83e1b918 | 1431 | return ret; |
933a27d3 DH |
1432 | |
1433 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | |
1434 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1435 | /* hard_mtu is still the default - the device does not support | |
1436 | jumbo eth frames */ | |
1437 | dev->rx_urb_size = 2048; | |
1438 | } | |
933a27d3 | 1439 | |
83e1b918 | 1440 | return 0; |
2e55cc72 DB |
1441 | } |
1442 | ||
1443 | static const struct driver_info ax8817x_info = { | |
1444 | .description = "ASIX AX8817x USB 2.0 Ethernet", | |
48b1be6a DH |
1445 | .bind = ax88172_bind, |
1446 | .status = asix_status, | |
2e55cc72 DB |
1447 | .link_reset = ax88172_link_reset, |
1448 | .reset = ax88172_link_reset, | |
37e8273c | 1449 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1450 | .data = 0x00130103, |
1451 | }; | |
1452 | ||
1453 | static const struct driver_info dlink_dub_e100_info = { | |
1454 | .description = "DLink DUB-E100 USB Ethernet", | |
48b1be6a DH |
1455 | .bind = ax88172_bind, |
1456 | .status = asix_status, | |
2e55cc72 DB |
1457 | .link_reset = ax88172_link_reset, |
1458 | .reset = ax88172_link_reset, | |
37e8273c | 1459 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1460 | .data = 0x009f9d9f, |
1461 | }; | |
1462 | ||
1463 | static const struct driver_info netgear_fa120_info = { | |
1464 | .description = "Netgear FA-120 USB Ethernet", | |
48b1be6a DH |
1465 | .bind = ax88172_bind, |
1466 | .status = asix_status, | |
2e55cc72 DB |
1467 | .link_reset = ax88172_link_reset, |
1468 | .reset = ax88172_link_reset, | |
37e8273c | 1469 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1470 | .data = 0x00130103, |
1471 | }; | |
1472 | ||
1473 | static const struct driver_info hawking_uf200_info = { | |
1474 | .description = "Hawking UF200 USB Ethernet", | |
48b1be6a DH |
1475 | .bind = ax88172_bind, |
1476 | .status = asix_status, | |
2e55cc72 DB |
1477 | .link_reset = ax88172_link_reset, |
1478 | .reset = ax88172_link_reset, | |
37e8273c | 1479 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1480 | .data = 0x001f1d1f, |
1481 | }; | |
1482 | ||
1483 | static const struct driver_info ax88772_info = { | |
1484 | .description = "ASIX AX88772 USB 2.0 Ethernet", | |
1485 | .bind = ax88772_bind, | |
48b1be6a | 1486 | .status = asix_status, |
2e55cc72 | 1487 | .link_reset = ax88772_link_reset, |
4ad1438f | 1488 | .reset = ax88772_reset, |
37e8273c | 1489 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
933a27d3 DH |
1490 | .rx_fixup = asix_rx_fixup, |
1491 | .tx_fixup = asix_tx_fixup, | |
1492 | }; | |
1493 | ||
1494 | static const struct driver_info ax88178_info = { | |
1495 | .description = "ASIX AX88178 USB 2.0 Ethernet", | |
1496 | .bind = ax88178_bind, | |
1497 | .status = asix_status, | |
1498 | .link_reset = ax88178_link_reset, | |
610d885d | 1499 | .reset = ax88178_reset, |
37e8273c | 1500 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
933a27d3 DH |
1501 | .rx_fixup = asix_rx_fixup, |
1502 | .tx_fixup = asix_tx_fixup, | |
2e55cc72 DB |
1503 | }; |
1504 | ||
1505 | static const struct usb_device_id products [] = { | |
1506 | { | |
1507 | // Linksys USB200M | |
1508 | USB_DEVICE (0x077b, 0x2226), | |
1509 | .driver_info = (unsigned long) &ax8817x_info, | |
1510 | }, { | |
1511 | // Netgear FA120 | |
1512 | USB_DEVICE (0x0846, 0x1040), | |
1513 | .driver_info = (unsigned long) &netgear_fa120_info, | |
1514 | }, { | |
1515 | // DLink DUB-E100 | |
1516 | USB_DEVICE (0x2001, 0x1a00), | |
1517 | .driver_info = (unsigned long) &dlink_dub_e100_info, | |
1518 | }, { | |
1519 | // Intellinet, ST Lab USB Ethernet | |
1520 | USB_DEVICE (0x0b95, 0x1720), | |
1521 | .driver_info = (unsigned long) &ax8817x_info, | |
1522 | }, { | |
1523 | // Hawking UF200, TrendNet TU2-ET100 | |
1524 | USB_DEVICE (0x07b8, 0x420a), | |
1525 | .driver_info = (unsigned long) &hawking_uf200_info, | |
1526 | }, { | |
39c4b38c DH |
1527 | // Billionton Systems, USB2AR |
1528 | USB_DEVICE (0x08dd, 0x90ff), | |
1529 | .driver_info = (unsigned long) &ax8817x_info, | |
2e55cc72 DB |
1530 | }, { |
1531 | // ATEN UC210T | |
1532 | USB_DEVICE (0x0557, 0x2009), | |
1533 | .driver_info = (unsigned long) &ax8817x_info, | |
1534 | }, { | |
1535 | // Buffalo LUA-U2-KTX | |
1536 | USB_DEVICE (0x0411, 0x003d), | |
1537 | .driver_info = (unsigned long) &ax8817x_info, | |
ac7b77f1 MD |
1538 | }, { |
1539 | // Buffalo LUA-U2-GT 10/100/1000 | |
1540 | USB_DEVICE (0x0411, 0x006e), | |
1541 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
1542 | }, { |
1543 | // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" | |
1544 | USB_DEVICE (0x6189, 0x182d), | |
1545 | .driver_info = (unsigned long) &ax8817x_info, | |
1546 | }, { | |
1547 | // corega FEther USB2-TX | |
1548 | USB_DEVICE (0x07aa, 0x0017), | |
1549 | .driver_info = (unsigned long) &ax8817x_info, | |
1550 | }, { | |
1551 | // Surecom EP-1427X-2 | |
1552 | USB_DEVICE (0x1189, 0x0893), | |
1553 | .driver_info = (unsigned long) &ax8817x_info, | |
1554 | }, { | |
1555 | // goodway corp usb gwusb2e | |
1556 | USB_DEVICE (0x1631, 0x6200), | |
1557 | .driver_info = (unsigned long) &ax8817x_info, | |
39c4b38c DH |
1558 | }, { |
1559 | // JVC MP-PRX1 Port Replicator | |
1560 | USB_DEVICE (0x04f1, 0x3008), | |
1561 | .driver_info = (unsigned long) &ax8817x_info, | |
30885909 MV |
1562 | }, { |
1563 | // ASIX AX88772B 10/100 | |
1564 | USB_DEVICE (0x0b95, 0x772b), | |
1565 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1566 | }, { |
1567 | // ASIX AX88772 10/100 | |
39c4b38c DH |
1568 | USB_DEVICE (0x0b95, 0x7720), |
1569 | .driver_info = (unsigned long) &ax88772_info, | |
7327413c EW |
1570 | }, { |
1571 | // ASIX AX88178 10/100/1000 | |
1572 | USB_DEVICE (0x0b95, 0x1780), | |
933a27d3 | 1573 | .driver_info = (unsigned long) &ax88178_info, |
f4680d3d AE |
1574 | }, { |
1575 | // Logitec LAN-GTJ/U2A | |
1576 | USB_DEVICE (0x0789, 0x0160), | |
1577 | .driver_info = (unsigned long) &ax88178_info, | |
5e0f76c6 DH |
1578 | }, { |
1579 | // Linksys USB200M Rev 2 | |
1580 | USB_DEVICE (0x13b1, 0x0018), | |
1581 | .driver_info = (unsigned long) &ax88772_info, | |
5732ce84 DH |
1582 | }, { |
1583 | // 0Q0 cable ethernet | |
1584 | USB_DEVICE (0x1557, 0x7720), | |
1585 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1586 | }, { |
1587 | // DLink DUB-E100 H/W Ver B1 | |
1588 | USB_DEVICE (0x07d1, 0x3c05), | |
1589 | .driver_info = (unsigned long) &ax88772_info, | |
b923e7fc DH |
1590 | }, { |
1591 | // DLink DUB-E100 H/W Ver B1 Alternate | |
1592 | USB_DEVICE (0x2001, 0x3c05), | |
1593 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1594 | }, { |
1595 | // Linksys USB1000 | |
1596 | USB_DEVICE (0x1737, 0x0039), | |
1597 | .driver_info = (unsigned long) &ax88178_info, | |
b29cf31d YH |
1598 | }, { |
1599 | // IO-DATA ETG-US2 | |
1600 | USB_DEVICE (0x04bb, 0x0930), | |
1601 | .driver_info = (unsigned long) &ax88178_info, | |
2ed22bc2 DH |
1602 | }, { |
1603 | // Belkin F5D5055 | |
1604 | USB_DEVICE(0x050d, 0x5055), | |
1605 | .driver_info = (unsigned long) &ax88178_info, | |
3d60efb5 AN |
1606 | }, { |
1607 | // Apple USB Ethernet Adapter | |
1608 | USB_DEVICE(0x05ac, 0x1402), | |
1609 | .driver_info = (unsigned long) &ax88772_info, | |
ccf95402 JC |
1610 | }, { |
1611 | // Cables-to-Go USB Ethernet Adapter | |
1612 | USB_DEVICE(0x0b95, 0x772a), | |
1613 | .driver_info = (unsigned long) &ax88772_info, | |
fef7cc08 GKH |
1614 | }, { |
1615 | // ABOCOM for pci | |
1616 | USB_DEVICE(0x14ea, 0xab11), | |
1617 | .driver_info = (unsigned long) &ax88178_info, | |
1618 | }, { | |
1619 | // ASIX 88772a | |
1620 | USB_DEVICE(0x0db0, 0xa877), | |
1621 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1622 | }, |
1623 | { }, // END | |
1624 | }; | |
1625 | MODULE_DEVICE_TABLE(usb, products); | |
1626 | ||
1627 | static struct usb_driver asix_driver = { | |
83e1b918 | 1628 | .name = DRIVER_NAME, |
2e55cc72 DB |
1629 | .id_table = products, |
1630 | .probe = usbnet_probe, | |
1631 | .suspend = usbnet_suspend, | |
1632 | .resume = usbnet_resume, | |
1633 | .disconnect = usbnet_disconnect, | |
a11a6544 | 1634 | .supports_autosuspend = 1, |
2e55cc72 DB |
1635 | }; |
1636 | ||
1637 | static int __init asix_init(void) | |
1638 | { | |
1639 | return usb_register(&asix_driver); | |
1640 | } | |
1641 | module_init(asix_init); | |
1642 | ||
1643 | static void __exit asix_exit(void) | |
1644 | { | |
1645 | usb_deregister(&asix_driver); | |
1646 | } | |
1647 | module_exit(asix_exit); | |
1648 | ||
1649 | MODULE_AUTHOR("David Hollis"); | |
4ad1438f | 1650 | MODULE_VERSION(DRIVER_VERSION); |
2e55cc72 DB |
1651 | MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices"); |
1652 | MODULE_LICENSE("GPL"); | |
1653 |