PCI: Change all drivers to use pci_device->revision
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
6aa20a22 36 *
1da177e4
LT
37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 40 * Patch from Tigran Aivazian.
1da177e4
LT
41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
6aa20a22
JG
43 * but I'm looking into that.
44 *
1da177e4
LT
45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
6aa20a22 47 * - We now allow higher priority timers to
1da177e4
LT
48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 53 * - Removed call to pci_present().
1da177e4 54 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 55 * - Added __init and __initdata to reduce resisdent
1da177e4
LT
56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
6aa20a22
JG
61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
1da177e4
LT
63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 77 * tested it though, as the kernel support is currently
1da177e4
LT
78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
6aa20a22 81 * - There is now a TLAN website up at
1da177e4
LT
82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
6aa20a22
JG
95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
1da177e4 97 * return value of request_region() instead.
6aa20a22 98 *
1da177e4
LT
99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
6aa20a22
JG
107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
1da177e4
LT
109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 112 * hardware probe is done with kernel API and
1da177e4
LT
113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
6aa20a22
JG
115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
1da177e4 117 * - Added transmit timeout handling.
6aa20a22
JG
118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
1da177e4
LT
120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
6aa20a22 125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT
126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 145 * - Added support for speed/duplex selection with
1da177e4
LT
146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
1e7f0bd8 174#include <linux/dma-mapping.h>
1da177e4
LT
175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
15efa9bb
SH
197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT
203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
15efa9bb
SH
214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT
216
217static int bbuf;
15efa9bb
SH
218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
1da177e4
LT
221static u8 *TLanPadBuffer;
222static dma_addr_t TLanPadBufferDMA;
223static char TLanSignature[] = "TLAN";
224static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
225static int tlan_have_pci;
226static int tlan_have_eisa;
227
228static const char *media[] = {
6aa20a22 229 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT
230 "100baseTx-FD", "100baseT4", NULL
231};
232
233static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237} board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
6aa20a22 252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT
253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
6aa20a22 285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT
286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 292static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT
293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298static void TLan_tx_timeout( struct net_device *dev);
c4028958 299static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT
300static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
301
302static u32 TLan_HandleInvalid( struct net_device *, u16 );
303static u32 TLan_HandleTxEOF( struct net_device *, u16 );
304static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
305static u32 TLan_HandleRxEOF( struct net_device *, u16 );
306static u32 TLan_HandleDummy( struct net_device *, u16 );
307static u32 TLan_HandleTxEOC( struct net_device *, u16 );
308static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
309static u32 TLan_HandleRxEOC( struct net_device *, u16 );
310
311static void TLan_Timer( unsigned long );
312
313static void TLan_ResetLists( struct net_device * );
314static void TLan_FreeLists( struct net_device * );
315static void TLan_PrintDio( u16 );
316static void TLan_PrintList( TLanList *, char *, int );
317static void TLan_ReadAndClearStats( struct net_device *, int );
318static void TLan_ResetAdapter( struct net_device * );
319static void TLan_FinishReset( struct net_device * );
320static void TLan_SetMac( struct net_device *, int areg, char *mac );
321
322static void TLan_PhyPrint( struct net_device * );
323static void TLan_PhyDetect( struct net_device * );
324static void TLan_PhyPowerDown( struct net_device * );
325static void TLan_PhyPowerUp( struct net_device * );
326static void TLan_PhyReset( struct net_device * );
327static void TLan_PhyStartLink( struct net_device * );
328static void TLan_PhyFinishAutoNeg( struct net_device * );
329#ifdef MONITOR
330static void TLan_PhyMonitor( struct net_device * );
331#endif
332
333/*
334static int TLan_PhyNop( struct net_device * );
335static int TLan_PhyInternalCheck( struct net_device * );
336static int TLan_PhyInternalService( struct net_device * );
337static int TLan_PhyDp83840aCheck( struct net_device * );
338*/
339
340static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
341static void TLan_MiiSendData( u16, u32, unsigned );
342static void TLan_MiiSync( u16 );
343static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
344
345static void TLan_EeSendStart( u16 );
346static int TLan_EeSendByte( u16, u8, int );
347static void TLan_EeReceiveByte( u16, u8 *, int );
348static int TLan_EeReadByte( struct net_device *, u8, u8 * );
349
350
6aa20a22 351static void
1da177e4
LT
352TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
353{
354 unsigned long addr = (unsigned long)skb;
355 tag->buffer[9].address = (u32)addr;
356 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
357 addr >>= 1;
358 tag->buffer[8].address = (u32)addr;
359}
360
361static struct sk_buff *
362TLan_GetSKB( struct tlan_list_tag *tag)
363{
364 unsigned long addr = tag->buffer[8].address;
365 addr <<= 31;
366 addr <<= 1;
367 addr |= tag->buffer[9].address;
368 return (struct sk_buff *) addr;
369}
370
371
372static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
373 TLan_HandleInvalid,
374 TLan_HandleTxEOF,
375 TLan_HandleStatOverflow,
376 TLan_HandleRxEOF,
377 TLan_HandleDummy,
378 TLan_HandleTxEOC,
379 TLan_HandleStatusCheck,
380 TLan_HandleRxEOC
381};
382
383static inline void
384TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
385{
386 TLanPrivateInfo *priv = netdev_priv(dev);
387 unsigned long flags = 0;
6aa20a22 388
1da177e4
LT
389 if (!in_irq())
390 spin_lock_irqsave(&priv->lock, flags);
391 if ( priv->timer.function != NULL &&
6aa20a22 392 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT
393 if (!in_irq())
394 spin_unlock_irqrestore(&priv->lock, flags);
395 return;
396 }
397 priv->timer.function = &TLan_Timer;
398 if (!in_irq())
399 spin_unlock_irqrestore(&priv->lock, flags);
400
401 priv->timer.data = (unsigned long) dev;
402 priv->timerSetAt = jiffies;
403 priv->timerType = type;
404 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 405
1da177e4
LT
406} /* TLan_SetTimer */
407
408
409/*****************************************************************************
410******************************************************************************
411
412 ThunderLAN Driver Primary Functions
413
414 These functions are more or less common to all Linux network drivers.
415
416******************************************************************************
417*****************************************************************************/
418
419
420
421
422
423 /***************************************************************
424 * tlan_remove_one
425 *
426 * Returns:
427 * Nothing
428 * Parms:
429 * None
430 *
431 * Goes through the TLanDevices list and frees the device
432 * structs and memory associated with each device (lists
433 * and buffers). It also ureserves the IO port regions
434 * associated with this device.
435 *
436 **************************************************************/
437
438
439static void __devexit tlan_remove_one( struct pci_dev *pdev)
440{
441 struct net_device *dev = pci_get_drvdata( pdev );
442 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 443
1da177e4
LT
444 unregister_netdev( dev );
445
446 if ( priv->dmaStorage ) {
447 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
448 }
449
450#ifdef CONFIG_PCI
451 pci_release_regions(pdev);
452#endif
6aa20a22 453
1da177e4 454 free_netdev( dev );
6aa20a22 455
1da177e4 456 pci_set_drvdata( pdev, NULL );
6aa20a22 457}
1da177e4
LT
458
459static struct pci_driver tlan_driver = {
460 .name = "tlan",
461 .id_table = tlan_pci_tbl,
462 .probe = tlan_init_one,
6aa20a22 463 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT
464};
465
466static int __init tlan_probe(void)
467{
468 static int pad_allocated;
6aa20a22 469
1da177e4 470 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 471
1da177e4
LT
472 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
473
474 if (TLanPadBuffer == NULL) {
475 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
476 return -ENOMEM;
477 }
478
479 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
480 pad_allocated = 1;
481
482 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 483
1da177e4
LT
484 /* Use new style PCI probing. Now the kernel will
485 do most of this for us */
486 pci_register_driver(&tlan_driver);
487
488 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
489 TLan_EisaProbe();
6aa20a22
JG
490
491 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT
492 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
493 tlan_have_pci, tlan_have_eisa);
494
495 if (TLanDevicesInstalled == 0) {
496 pci_unregister_driver(&tlan_driver);
497 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
498 return -ENODEV;
499 }
500 return 0;
501}
6aa20a22 502
1da177e4
LT
503
504static int __devinit tlan_init_one( struct pci_dev *pdev,
505 const struct pci_device_id *ent)
506{
507 return TLan_probe1( pdev, -1, -1, 0, ent);
508}
509
510
511/*
512 ***************************************************************
513 * tlan_probe1
514 *
515 * Returns:
516 * 0 on success, error code on error
6aa20a22 517 * Parms:
1da177e4
LT
518 * none
519 *
520 * The name is lower case to fit in with all the rest of
6aa20a22 521 * the netcard_probe names. This function looks for
1da177e4
LT
522 * another TLan based adapter, setting it up with the
523 * allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function
526 * is also used by modules.
527 *
528 **************************************************************/
529
6aa20a22 530static int __devinit TLan_probe1(struct pci_dev *pdev,
1da177e4
LT
531 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
532{
533
534 struct net_device *dev;
535 TLanPrivateInfo *priv;
1da177e4
LT
536 u16 device_id;
537 int reg, rc = -ENODEV;
538
ad9f6713 539#ifdef CONFIG_PCI
1da177e4
LT
540 if (pdev) {
541 rc = pci_enable_device(pdev);
542 if (rc)
543 return rc;
544
545 rc = pci_request_regions(pdev, TLanSignature);
546 if (rc) {
547 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
548 goto err_out;
549 }
550 }
ad9f6713 551#endif /* CONFIG_PCI */
1da177e4
LT
552
553 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
554 if (dev == NULL) {
555 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
556 rc = -ENOMEM;
557 goto err_out_regions;
558 }
559 SET_MODULE_OWNER(dev);
560 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 561
1da177e4
LT
562 priv = netdev_priv(dev);
563
564 priv->pciDev = pdev;
c4028958 565 priv->dev = dev;
6aa20a22 566
1da177e4
LT
567 /* Is this a PCI device? */
568 if (pdev) {
569 u32 pci_io_base = 0;
570
571 priv->adapter = &board_info[ent->driver_data];
572
1e7f0bd8 573 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT
574 if (rc) {
575 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
576 goto err_out_free_dev;
577 }
578
1da177e4
LT
579 for ( reg= 0; reg <= 5; reg ++ ) {
580 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
581 pci_io_base = pci_resource_start(pdev, reg);
582 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
583 pci_io_base);
584 break;
585 }
586 }
587 if (!pci_io_base) {
588 printk(KERN_ERR "TLAN: No IO mappings available\n");
589 rc = -EIO;
590 goto err_out_free_dev;
591 }
6aa20a22 592
1da177e4
LT
593 dev->base_addr = pci_io_base;
594 dev->irq = pdev->irq;
44c10138 595 priv->adapterRev = pdev->revision;
1da177e4
LT
596 pci_set_master(pdev);
597 pci_set_drvdata(pdev, dev);
598
599 } else { /* EISA card */
600 /* This is a hack. We need to know which board structure
601 * is suited for this adapter */
602 device_id = inw(ioaddr + EISA_ID2);
603 priv->is_eisa = 1;
604 if (device_id == 0x20F1) {
605 priv->adapter = &board_info[13]; /* NetFlex-3/E */
606 priv->adapterRev = 23; /* TLAN 2.3 */
607 } else {
608 priv->adapter = &board_info[14];
609 priv->adapterRev = 10; /* TLAN 1.0 */
610 }
611 dev->base_addr = ioaddr;
612 dev->irq = irq;
613 }
614
615 /* Kernel parameters */
616 if (dev->mem_start) {
617 priv->aui = dev->mem_start & 0x01;
618 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
619 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
6aa20a22 620
1da177e4
LT
621 if (priv->speed == 0x1) {
622 priv->speed = TLAN_SPEED_10;
623 } else if (priv->speed == 0x2) {
624 priv->speed = TLAN_SPEED_100;
625 }
626 debug = priv->debug = dev->mem_end;
627 } else {
628 priv->aui = aui[boards_found];
629 priv->speed = speed[boards_found];
630 priv->duplex = duplex[boards_found];
631 priv->debug = debug;
632 }
6aa20a22 633
1da177e4
LT
634 /* This will be used when we get an adapter error from
635 * within our irq handler */
c4028958 636 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT
637
638 spin_lock_init(&priv->lock);
6aa20a22 639
1da177e4
LT
640 rc = TLan_Init(dev);
641 if (rc) {
642 printk(KERN_ERR "TLAN: Could not set up device.\n");
643 goto err_out_free_dev;
644 }
645
646 rc = register_netdev(dev);
647 if (rc) {
648 printk(KERN_ERR "TLAN: Could not register device.\n");
649 goto err_out_uninit;
650 }
651
6aa20a22 652
1da177e4
LT
653 TLanDevicesInstalled++;
654 boards_found++;
6aa20a22 655
1da177e4
LT
656 /* pdev is NULL if this is an EISA device */
657 if (pdev)
658 tlan_have_pci++;
659 else {
660 priv->nextDevice = TLan_Eisa_Devices;
661 TLan_Eisa_Devices = dev;
662 tlan_have_eisa++;
663 }
6aa20a22 664
1da177e4
LT
665 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
666 dev->name,
667 (int) dev->irq,
668 (int) dev->base_addr,
669 priv->adapter->deviceLabel,
670 priv->adapterRev);
671 return 0;
672
673err_out_uninit:
674 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
675 priv->dmaStorageDMA );
676err_out_free_dev:
677 free_netdev(dev);
678err_out_regions:
679#ifdef CONFIG_PCI
680 if (pdev)
681 pci_release_regions(pdev);
682#endif
683err_out:
684 if (pdev)
685 pci_disable_device(pdev);
686 return rc;
687}
688
689
690static void TLan_Eisa_Cleanup(void)
691{
692 struct net_device *dev;
693 TLanPrivateInfo *priv;
6aa20a22 694
1da177e4
LT
695 while( tlan_have_eisa ) {
696 dev = TLan_Eisa_Devices;
697 priv = netdev_priv(dev);
698 if (priv->dmaStorage) {
699 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
700 }
701 release_region( dev->base_addr, 0x10);
702 unregister_netdev( dev );
703 TLan_Eisa_Devices = priv->nextDevice;
704 free_netdev( dev );
705 tlan_have_eisa--;
706 }
707}
6aa20a22
JG
708
709
1da177e4
LT
710static void __exit tlan_exit(void)
711{
712 pci_unregister_driver(&tlan_driver);
713
714 if (tlan_have_eisa)
715 TLan_Eisa_Cleanup();
716
717 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
718
719}
720
721
722/* Module loading/unloading */
723module_init(tlan_probe);
724module_exit(tlan_exit);
725
726
727
728 /**************************************************************
729 * TLan_EisaProbe
730 *
731 * Returns: 0 on success, 1 otherwise
732 *
733 * Parms: None
734 *
735 *
6aa20a22
JG
736 * This functions probes for EISA devices and calls
737 * TLan_probe1 when one is found.
1da177e4
LT
738 *
739 *************************************************************/
740
6aa20a22 741static void __init TLan_EisaProbe (void)
1da177e4
LT
742{
743 long ioaddr;
744 int rc = -ENODEV;
745 int irq;
746 u16 device_id;
747
6aa20a22 748 if (!EISA_bus) {
1da177e4
LT
749 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
750 return;
751 }
6aa20a22 752
1da177e4
LT
753 /* Loop through all slots of the EISA bus */
754 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22
JG
755
756 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
1da177e4
LT
757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
758
759
760 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
761 (int) ioaddr);
6aa20a22 762 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT
763 goto out;
764
6aa20a22 765 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT
766 release_region(ioaddr, 0x10);
767 goto out;
768 }
6aa20a22 769
1da177e4 770 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 771 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT
772 release_region (ioaddr, 0x10);
773 goto out;
774 }
6aa20a22 775
1da177e4
LT
776 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
777 release_region (ioaddr, 0x10);
778 goto out2;
779 }
6aa20a22
JG
780
781 if (debug == 0x10)
1da177e4
LT
782 printk("Found one\n");
783
784
785 /* Get irq from board */
786 switch (inb(ioaddr + 0xCC0)) {
787 case(0x10):
788 irq=5;
789 break;
790 case(0x20):
791 irq=9;
792 break;
793 case(0x40):
794 irq=10;
795 break;
796 case(0x80):
797 irq=11;
798 break;
799 default:
800 goto out;
6aa20a22
JG
801 }
802
803
1da177e4
LT
804 /* Setup the newly found eisa adapter */
805 rc = TLan_probe1( NULL, ioaddr, irq,
806 12, NULL);
807 continue;
6aa20a22 808
1da177e4
LT
809 out:
810 if (debug == 0x10)
811 printk("None found\n");
812 continue;
813
814 out2: if (debug == 0x10)
815 printk("Card found but it is not enabled, skipping\n");
816 continue;
6aa20a22 817
1da177e4
LT
818 }
819
820} /* TLan_EisaProbe */
821
822#ifdef CONFIG_NET_POLL_CONTROLLER
823static void TLan_Poll(struct net_device *dev)
824{
825 disable_irq(dev->irq);
7d12e780 826 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT
827 enable_irq(dev->irq);
828}
829#endif
830
6aa20a22 831
1da177e4
LT
832
833
834 /***************************************************************
835 * TLan_Init
836 *
837 * Returns:
838 * 0 on success, error code otherwise.
839 * Parms:
840 * dev The structure of the device to be
841 * init'ed.
842 *
843 * This function completes the initialization of the
844 * device structure and driver. It reserves the IO
845 * addresses, allocates memory for the lists and bounce
846 * buffers, retrieves the MAC address from the eeprom
847 * and assignes the device's methods.
6aa20a22 848 *
1da177e4
LT
849 **************************************************************/
850
851static int TLan_Init( struct net_device *dev )
852{
853 int dma_size;
854 int err;
855 int i;
856 TLanPrivateInfo *priv;
857
858 priv = netdev_priv(dev);
6aa20a22 859
1da177e4
LT
860 if ( bbuf ) {
861 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
862 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
863 } else {
864 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
865 * ( sizeof(TLanList) );
866 }
867 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
868 priv->dmaSize = dma_size;
6aa20a22 869
1da177e4
LT
870 if ( priv->dmaStorage == NULL ) {
871 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
872 dev->name );
873 return -ENOMEM;
874 }
875 memset( priv->dmaStorage, 0, dma_size );
6aa20a22 876 priv->rxList = (TLanList *)
1da177e4
LT
877 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
878 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
879 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
880 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
881 if ( bbuf ) {
882 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
883 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
884 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
885 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
886 }
887
888 err = 0;
889 for ( i = 0; i < 6 ; i++ )
890 err |= TLan_EeReadByte( dev,
891 (u8) priv->adapter->addrOfs + i,
892 (u8 *) &dev->dev_addr[i] );
893 if ( err ) {
894 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
895 dev->name,
896 err );
897 }
898 dev->addr_len = 6;
899
900 netif_carrier_off(dev);
901
902 /* Device methods */
903 dev->open = &TLan_Open;
904 dev->hard_start_xmit = &TLan_StartTx;
905 dev->stop = &TLan_Close;
906 dev->get_stats = &TLan_GetStats;
907 dev->set_multicast_list = &TLan_SetMulticastList;
908 dev->do_ioctl = &TLan_ioctl;
909#ifdef CONFIG_NET_POLL_CONTROLLER
910 dev->poll_controller = &TLan_Poll;
911#endif
912 dev->tx_timeout = &TLan_tx_timeout;
913 dev->watchdog_timeo = TX_TIMEOUT;
914
915 return 0;
916
917} /* TLan_Init */
918
919
920
921
922 /***************************************************************
923 * TLan_Open
924 *
925 * Returns:
926 * 0 on success, error code otherwise.
927 * Parms:
928 * dev Structure of device to be opened.
929 *
930 * This routine puts the driver and TLAN adapter in a
931 * state where it is ready to send and receive packets.
932 * It allocates the IRQ, resets and brings the adapter
933 * out of reset, and allows interrupts. It also delays
934 * the startup for autonegotiation or sends a Rx GO
935 * command to the adapter, as appropriate.
936 *
937 **************************************************************/
938
939static int TLan_Open( struct net_device *dev )
940{
941 TLanPrivateInfo *priv = netdev_priv(dev);
942 int err;
6aa20a22 943
1da177e4 944 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
1fb9df5d 945 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
6aa20a22 946
1da177e4
LT
947 if ( err ) {
948 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
949 return err;
950 }
6aa20a22 951
1da177e4
LT
952 init_timer(&priv->timer);
953 netif_start_queue(dev);
6aa20a22 954
1da177e4
LT
955 /* NOTE: It might not be necessary to read the stats before a
956 reset if you don't care what the values are.
957 */
958 TLan_ResetLists( dev );
959 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
960 TLan_ResetAdapter( dev );
961
962 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
963
964 return 0;
965
966} /* TLan_Open */
967
968
969
970 /**************************************************************
971 * TLan_ioctl
6aa20a22 972 *
1da177e4
LT
973 * Returns:
974 * 0 on success, error code otherwise
975 * Params:
976 * dev structure of device to receive ioctl.
6aa20a22 977 *
1da177e4
LT
978 * rq ifreq structure to hold userspace data.
979 *
980 * cmd ioctl command.
981 *
982 *
983 *************************************************************/
984
985static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
986{
987 TLanPrivateInfo *priv = netdev_priv(dev);
988 struct mii_ioctl_data *data = if_mii(rq);
989 u32 phy = priv->phy[priv->phyNum];
6aa20a22 990
1da177e4
LT
991 if (!priv->phyOnline)
992 return -EAGAIN;
993
994 switch(cmd) {
995 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
996 data->phy_id = phy;
997
998
999 case SIOCGMIIREG: /* Read MII PHY register. */
1000 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1001 return 0;
6aa20a22 1002
1da177e4
LT
1003
1004 case SIOCSMIIREG: /* Write MII PHY register. */
1005 if (!capable(CAP_NET_ADMIN))
1006 return -EPERM;
1007 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1008 return 0;
1009 default:
1010 return -EOPNOTSUPP;
1011 }
1012} /* tlan_ioctl */
1013
1014
1015 /***************************************************************
1016 * TLan_tx_timeout
1017 *
1018 * Returns: nothing
1019 *
1020 * Params:
6aa20a22 1021 * dev structure of device which timed out
1da177e4
LT
1022 * during transmit.
1023 *
1024 **************************************************************/
1025
1026static void TLan_tx_timeout(struct net_device *dev)
1027{
6aa20a22 1028
1da177e4 1029 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1030
1da177e4
LT
1031 /* Ok so we timed out, lets see what we can do about it...*/
1032 TLan_FreeLists( dev );
6aa20a22 1033 TLan_ResetLists( dev );
1da177e4
LT
1034 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1035 TLan_ResetAdapter( dev );
1036 dev->trans_start = jiffies;
6aa20a22 1037 netif_wake_queue( dev );
1da177e4
LT
1038
1039}
6aa20a22 1040
1da177e4 1041
c4028958
DH
1042 /***************************************************************
1043 * TLan_tx_timeout_work
1044 *
1045 * Returns: nothing
1046 *
1047 * Params:
1048 * work work item of device which timed out
1049 *
1050 **************************************************************/
1051
1052static void TLan_tx_timeout_work(struct work_struct *work)
1053{
1054 TLanPrivateInfo *priv =
1055 container_of(work, TLanPrivateInfo, tlan_tqueue);
1056
1057 TLan_tx_timeout(priv->dev);
1058}
1059
1060
1da177e4
LT
1061
1062 /***************************************************************
1063 * TLan_StartTx
6aa20a22 1064 *
1da177e4
LT
1065 * Returns:
1066 * 0 on success, non-zero on failure.
1067 * Parms:
1068 * skb A pointer to the sk_buff containing the
1069 * frame to be sent.
1070 * dev The device to send the data on.
1071 *
1072 * This function adds a frame to the Tx list to be sent
1073 * ASAP. First it verifies that the adapter is ready and
1074 * there is room in the queue. Then it sets up the next
1075 * available list, copies the frame to the corresponding
1076 * buffer. If the adapter Tx channel is idle, it gives
1077 * the adapter a Tx Go command on the list, otherwise it
1078 * sets the forward address of the previous list to point
1079 * to this one. Then it frees the sk_buff.
1080 *
1081 **************************************************************/
1082
1083static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1084{
1085 TLanPrivateInfo *priv = netdev_priv(dev);
1086 TLanList *tail_list;
1087 dma_addr_t tail_list_phys;
1088 u8 *tail_buffer;
1089 int pad;
1090 unsigned long flags;
1091
1092 if ( ! priv->phyOnline ) {
1093 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1094 dev_kfree_skb_any(skb);
1095 return 0;
1096 }
1097
1098 tail_list = priv->txList + priv->txTail;
1099 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1100
1da177e4
LT
1101 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1102 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1103 netif_stop_queue(dev);
1104 priv->txBusyCount++;
1105 return 1;
1106 }
1107
1108 tail_list->forward = 0;
1109
1110 if ( bbuf ) {
1111 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
d626f62b 1112 skb_copy_from_linear_data(skb, tail_buffer, skb->len);
1da177e4
LT
1113 } else {
1114 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1115 TLan_StoreSKB(tail_list, skb);
1116 }
1117
1118 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1119
1120 if ( pad > 0 ) {
1121 tail_list->frameSize = (u16) skb->len + pad;
1122 tail_list->buffer[0].count = (u32) skb->len;
1123 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1124 tail_list->buffer[1].address = TLanPadBufferDMA;
1125 } else {
1126 tail_list->frameSize = (u16) skb->len;
1127 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1128 tail_list->buffer[1].count = 0;
1129 tail_list->buffer[1].address = 0;
1130 }
1131
1132 spin_lock_irqsave(&priv->lock, flags);
1133 tail_list->cStat = TLAN_CSTAT_READY;
1134 if ( ! priv->txInProgress ) {
1135 priv->txInProgress = 1;
1136 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1137 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1138 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1139 } else {
1140 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1141 if ( priv->txTail == 0 ) {
1142 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1143 } else {
1144 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1145 }
1146 }
1147 spin_unlock_irqrestore(&priv->lock, flags);
1148
1149 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1150
1151 if ( bbuf )
1152 dev_kfree_skb_any(skb);
6aa20a22 1153
1da177e4
LT
1154 dev->trans_start = jiffies;
1155 return 0;
1156
1157} /* TLan_StartTx */
1158
1159
1160
1161
1162 /***************************************************************
1163 * TLan_HandleInterrupt
6aa20a22
JG
1164 *
1165 * Returns:
1da177e4
LT
1166 * Nothing
1167 * Parms:
1168 * irq The line on which the interrupt
1169 * occurred.
1170 * dev_id A pointer to the device assigned to
1171 * this irq line.
1da177e4
LT
1172 *
1173 * This function handles an interrupt generated by its
1174 * assigned TLAN adapter. The function deactivates
1175 * interrupts on its adapter, records the type of
1176 * interrupt, executes the appropriate subhandler, and
1177 * acknowdges the interrupt to the adapter (thus
1178 * re-enabling adapter interrupts.
1179 *
1180 **************************************************************/
1181
7d12e780 1182static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4
LT
1183{
1184 u32 ack;
1185 struct net_device *dev;
1186 u32 host_cmd;
1187 u16 host_int;
1188 int type;
1189 TLanPrivateInfo *priv;
1190
1191 dev = dev_id;
1192 priv = netdev_priv(dev);
1193
1194 spin_lock(&priv->lock);
1195
1196 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1197 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1198
1199 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1200
1201 ack = TLanIntVector[type]( dev, host_int );
1202
1203 if ( ack ) {
1204 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1205 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1206 }
1207
1208 spin_unlock(&priv->lock);
1209
1210 return IRQ_HANDLED;
1211} /* TLan_HandleInterrupts */
1212
1213
1214
1215
1216 /***************************************************************
1217 * TLan_Close
6aa20a22 1218 *
1da177e4
LT
1219 * Returns:
1220 * An error code.
1221 * Parms:
1222 * dev The device structure of the device to
1223 * close.
1224 *
1225 * This function shuts down the adapter. It records any
1226 * stats, puts the adapter into reset state, deactivates
1227 * its time as needed, and frees the irq it is using.
1228 *
1229 **************************************************************/
1230
1231static int TLan_Close(struct net_device *dev)
1232{
1233 TLanPrivateInfo *priv = netdev_priv(dev);
1234
1235 netif_stop_queue(dev);
1236 priv->neg_be_verbose = 0;
1237
1238 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1239 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1240 if ( priv->timer.function != NULL ) {
1241 del_timer_sync( &priv->timer );
1242 priv->timer.function = NULL;
1243 }
6aa20a22 1244
1da177e4
LT
1245 free_irq( dev->irq, dev );
1246 TLan_FreeLists( dev );
1247 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1248
1249 return 0;
1250
1251} /* TLan_Close */
1252
1253
1254
1255
1256 /***************************************************************
1257 * TLan_GetStats
6aa20a22 1258 *
1da177e4
LT
1259 * Returns:
1260 * A pointer to the device's statistics structure.
1261 * Parms:
1262 * dev The device structure to return the
1263 * stats for.
1264 *
1265 * This function updates the devices statistics by reading
1266 * the TLAN chip's onboard registers. Then it returns the
1267 * address of the statistics structure.
1268 *
1269 **************************************************************/
1270
1271static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1272{
1273 TLanPrivateInfo *priv = netdev_priv(dev);
1274 int i;
1275
1276 /* Should only read stats if open ? */
1277 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1278
1279 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1280 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1281 if ( debug & TLAN_DEBUG_GNRL ) {
1282 TLan_PrintDio( dev->base_addr );
6aa20a22 1283 TLan_PhyPrint( dev );
1da177e4
LT
1284 }
1285 if ( debug & TLAN_DEBUG_LIST ) {
1286 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1287 TLan_PrintList( priv->rxList + i, "RX", i );
1288 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1289 TLan_PrintList( priv->txList + i, "TX", i );
1290 }
6aa20a22 1291
1da177e4
LT
1292 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1293
1294} /* TLan_GetStats */
1295
1296
1297
1298
1299 /***************************************************************
1300 * TLan_SetMulticastList
6aa20a22 1301 *
1da177e4
LT
1302 * Returns:
1303 * Nothing
1304 * Parms:
1305 * dev The device structure to set the
1306 * multicast list for.
1307 *
1308 * This function sets the TLAN adaptor to various receive
1309 * modes. If the IFF_PROMISC flag is set, promiscuous
1310 * mode is acitviated. Otherwise, promiscuous mode is
1311 * turned off. If the IFF_ALLMULTI flag is set, then
1312 * the hash table is set to receive all group addresses.
1313 * Otherwise, the first three multicast addresses are
1314 * stored in AREG_1-3, and the rest are selected via the
1315 * hash table, as necessary.
1316 *
1317 **************************************************************/
1318
1319static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1320{
1da177e4
LT
1321 struct dev_mc_list *dmi = dev->mc_list;
1322 u32 hash1 = 0;
1323 u32 hash2 = 0;
1324 int i;
1325 u32 offset;
1326 u8 tmp;
1327
1328 if ( dev->flags & IFF_PROMISC ) {
1329 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1330 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1331 } else {
1332 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1333 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1334 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1335 for ( i = 0; i < 3; i++ )
1da177e4
LT
1336 TLan_SetMac( dev, i + 1, NULL );
1337 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1338 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1339 } else {
1340 for ( i = 0; i < dev->mc_count; i++ ) {
1341 if ( i < 3 ) {
1342 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1343 } else {
1344 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1345 if ( offset < 32 )
1da177e4
LT
1346 hash1 |= ( 1 << offset );
1347 else
1348 hash2 |= ( 1 << ( offset - 32 ) );
1349 }
1350 dmi = dmi->next;
1351 }
6aa20a22 1352 for ( ; i < 3; i++ )
1da177e4
LT
1353 TLan_SetMac( dev, i + 1, NULL );
1354 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1355 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1356 }
1357 }
1358
1359} /* TLan_SetMulticastList */
1360
1361
1362
1363/*****************************************************************************
1364******************************************************************************
1365
1366 ThunderLAN Driver Interrupt Vectors and Table
1367
1368 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1369 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1370 generated by TLAN based adapters.
1da177e4
LT
1371
1372******************************************************************************
1373*****************************************************************************/
1374
1375
1376 /***************************************************************
1377 * TLan_HandleInvalid
1378 *
1379 * Returns:
1380 * 0
1381 * Parms:
1382 * dev Device assigned the IRQ that was
1383 * raised.
1384 * host_int The contents of the HOST_INT
1385 * port.
1386 *
1387 * This function handles invalid interrupts. This should
1388 * never happen unless some other adapter is trying to use
1389 * the IRQ line assigned to the device.
1390 *
1391 **************************************************************/
1392
1393u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1394{
1395 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1396 return 0;
1397
1398} /* TLan_HandleInvalid */
1399
1400
1401
1402
1403 /***************************************************************
1404 * TLan_HandleTxEOF
1405 *
1406 * Returns:
1407 * 1
1408 * Parms:
1409 * dev Device assigned the IRQ that was
1410 * raised.
1411 * host_int The contents of the HOST_INT
1412 * port.
1413 *
1414 * This function handles Tx EOF interrupts which are raised
1415 * by the adapter when it has completed sending the
1416 * contents of a buffer. If detemines which list/buffer
1417 * was completed and resets it. If the buffer was the last
1418 * in the channel (EOC), then the function checks to see if
1419 * another buffer is ready to send, and if so, sends a Tx
1420 * Go command. Finally, the driver activates/continues the
1421 * activity LED.
1422 *
1423 **************************************************************/
1424
1425u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1426{
1427 TLanPrivateInfo *priv = netdev_priv(dev);
1428 int eoc = 0;
1429 TLanList *head_list;
1430 dma_addr_t head_list_phys;
1431 u32 ack = 0;
1432 u16 tmpCStat;
6aa20a22 1433
1da177e4
LT
1434 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1435 head_list = priv->txList + priv->txHead;
1436
1437 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1438 ack++;
1439 if ( ! bbuf ) {
1440 struct sk_buff *skb = TLan_GetSKB(head_list);
1441 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1442 dev_kfree_skb_any(skb);
1443 head_list->buffer[8].address = 0;
1444 head_list->buffer[9].address = 0;
1445 }
6aa20a22 1446
1da177e4
LT
1447 if ( tmpCStat & TLAN_CSTAT_EOC )
1448 eoc = 1;
6aa20a22 1449
1da177e4
LT
1450 priv->stats.tx_bytes += head_list->frameSize;
1451
1452 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG
1453 netif_start_queue(dev);
1454 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT
1455 head_list = priv->txList + priv->txHead;
1456 }
1457
1458 if (!ack)
1459 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1460
1da177e4
LT
1461 if ( eoc ) {
1462 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1463 head_list = priv->txList + priv->txHead;
1464 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1465 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1466 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1467 ack |= TLAN_HC_GO;
1468 } else {
1469 priv->txInProgress = 0;
1470 }
1471 }
6aa20a22 1472
1da177e4
LT
1473 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1474 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1475 if ( priv->timer.function == NULL ) {
1476 priv->timer.function = &TLan_Timer;
1477 priv->timer.data = (unsigned long) dev;
1478 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1479 priv->timerSetAt = jiffies;
1480 priv->timerType = TLAN_TIMER_ACTIVITY;
1481 add_timer(&priv->timer);
1482 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1483 priv->timerSetAt = jiffies;
1484 }
1485 }
1486
1487 return ack;
1488
1489} /* TLan_HandleTxEOF */
1490
1491
1492
1493
1494 /***************************************************************
1495 * TLan_HandleStatOverflow
1496 *
1497 * Returns:
1498 * 1
1499 * Parms:
1500 * dev Device assigned the IRQ that was
1501 * raised.
1502 * host_int The contents of the HOST_INT
1503 * port.
1504 *
1505 * This function handles the Statistics Overflow interrupt
1506 * which means that one or more of the TLAN statistics
1507 * registers has reached 1/2 capacity and needs to be read.
1508 *
1509 **************************************************************/
1510
1511u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1512{
1513 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1514
1515 return 1;
1516
1517} /* TLan_HandleStatOverflow */
1518
1519
1520
1521
1522 /***************************************************************
1523 * TLan_HandleRxEOF
1524 *
1525 * Returns:
1526 * 1
1527 * Parms:
1528 * dev Device assigned the IRQ that was
1529 * raised.
1530 * host_int The contents of the HOST_INT
1531 * port.
1532 *
1533 * This function handles the Rx EOF interrupt which
1534 * indicates a frame has been received by the adapter from
1535 * the net and the frame has been transferred to memory.
1536 * The function determines the bounce buffer the frame has
1537 * been loaded into, creates a new sk_buff big enough to
1538 * hold the frame, and sends it to protocol stack. It
1539 * then resets the used buffer and appends it to the end
1540 * of the list. If the frame was the last in the Rx
1541 * channel (EOC), the function restarts the receive channel
1542 * by sending an Rx Go command to the adapter. Then it
1543 * activates/continues the activity LED.
1544 *
1545 **************************************************************/
1546
1547u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1548{
1549 TLanPrivateInfo *priv = netdev_priv(dev);
1550 u32 ack = 0;
1551 int eoc = 0;
1552 u8 *head_buffer;
1553 TLanList *head_list;
1554 struct sk_buff *skb;
1555 TLanList *tail_list;
1556 void *t;
1557 u32 frameSize;
1558 u16 tmpCStat;
1559 dma_addr_t head_list_phys;
1560
1561 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1562 head_list = priv->rxList + priv->rxHead;
1563 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1564
1da177e4
LT
1565 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1566 frameSize = head_list->frameSize;
1567 ack++;
1568 if (tmpCStat & TLAN_CSTAT_EOC)
1569 eoc = 1;
6aa20a22 1570
1da177e4
LT
1571 if (bbuf) {
1572 skb = dev_alloc_skb(frameSize + 7);
1573 if (skb == NULL)
1574 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1575 else {
1576 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1da177e4
LT
1577 skb_reserve(skb, 2);
1578 t = (void *) skb_put(skb, frameSize);
6aa20a22 1579
1da177e4
LT
1580 priv->stats.rx_bytes += head_list->frameSize;
1581
1582 memcpy( t, head_buffer, frameSize );
1583 skb->protocol = eth_type_trans( skb, dev );
1584 netif_rx( skb );
1585 }
1586 } else {
1587 struct sk_buff *new_skb;
6aa20a22 1588
1da177e4
LT
1589 /*
1590 * I changed the algorithm here. What we now do
1591 * is allocate the new frame. If this fails we
1592 * simply recycle the frame.
1593 */
6aa20a22 1594
1da177e4 1595 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
6aa20a22 1596
1da177e4
LT
1597 if ( new_skb != NULL ) {
1598 skb = TLan_GetSKB(head_list);
1599 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1600 skb_trim( skb, frameSize );
1601
1602 priv->stats.rx_bytes += frameSize;
1603
1604 skb->protocol = eth_type_trans( skb, dev );
1605 netif_rx( skb );
6aa20a22 1606
1da177e4
LT
1607 skb_reserve( new_skb, 2 );
1608 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1609 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1610 head_list->buffer[8].address = (u32) t;
1611 TLan_StoreSKB(head_list, new_skb);
6aa20a22 1612 } else
1da177e4
LT
1613 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1614 }
1615
1616 head_list->forward = 0;
1617 head_list->cStat = 0;
1618 tail_list = priv->rxList + priv->rxTail;
1619 tail_list->forward = head_list_phys;
1620
1621 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1622 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1623 head_list = priv->rxList + priv->rxHead;
1624 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1625 }
1626
1627 if (!ack)
1628 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT
1629
1630
1631
6aa20a22
JG
1632
1633 if ( eoc ) {
1da177e4
LT
1634 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1635 head_list = priv->rxList + priv->rxHead;
1636 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1637 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1638 ack |= TLAN_HC_GO | TLAN_HC_RT;
1639 priv->rxEocCount++;
1640 }
1641
1642 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1643 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1644 if ( priv->timer.function == NULL ) {
1645 priv->timer.function = &TLan_Timer;
1646 priv->timer.data = (unsigned long) dev;
1647 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1648 priv->timerSetAt = jiffies;
1649 priv->timerType = TLAN_TIMER_ACTIVITY;
1650 add_timer(&priv->timer);
1651 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1652 priv->timerSetAt = jiffies;
1653 }
1654 }
1655
1656 dev->last_rx = jiffies;
6aa20a22 1657
1da177e4
LT
1658 return ack;
1659
1660} /* TLan_HandleRxEOF */
1661
1662
1663
1664
1665 /***************************************************************
1666 * TLan_HandleDummy
1667 *
1668 * Returns:
1669 * 1
1670 * Parms:
1671 * dev Device assigned the IRQ that was
1672 * raised.
1673 * host_int The contents of the HOST_INT
1674 * port.
1675 *
1676 * This function handles the Dummy interrupt, which is
1677 * raised whenever a test interrupt is generated by setting
1678 * the Req_Int bit of HOST_CMD to 1.
1679 *
1680 **************************************************************/
1681
1682u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1683{
1684 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1685 return 1;
1686
1687} /* TLan_HandleDummy */
1688
1689
1690
1691
1692 /***************************************************************
1693 * TLan_HandleTxEOC
1694 *
1695 * Returns:
1696 * 1
1697 * Parms:
1698 * dev Device assigned the IRQ that was
1699 * raised.
1700 * host_int The contents of the HOST_INT
1701 * port.
1702 *
1703 * This driver is structured to determine EOC occurrences by
1704 * reading the CSTAT member of the list structure. Tx EOC
1705 * interrupts are disabled via the DIO INTDIS register.
1706 * However, TLAN chips before revision 3.0 didn't have this
1707 * functionality, so process EOC events if this is the
1708 * case.
1709 *
1710 **************************************************************/
1711
1712u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1713{
1714 TLanPrivateInfo *priv = netdev_priv(dev);
1715 TLanList *head_list;
1716 dma_addr_t head_list_phys;
1717 u32 ack = 1;
6aa20a22 1718
1da177e4
LT
1719 host_int = 0;
1720 if ( priv->tlanRev < 0x30 ) {
1721 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1722 head_list = priv->txList + priv->txHead;
1723 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1724 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1725 netif_stop_queue(dev);
1726 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1727 ack |= TLAN_HC_GO;
1728 } else {
1729 priv->txInProgress = 0;
1730 }
1731 }
1732
1733 return ack;
1734
1735} /* TLan_HandleTxEOC */
1736
1737
1738
1739
1740 /***************************************************************
1741 * TLan_HandleStatusCheck
1742 *
1743 * Returns:
1744 * 0 if Adapter check, 1 if Network Status check.
1745 * Parms:
1746 * dev Device assigned the IRQ that was
1747 * raised.
1748 * host_int The contents of the HOST_INT
1749 * port.
1750 *
1751 * This function handles Adapter Check/Network Status
1752 * interrupts generated by the adapter. It checks the
1753 * vector in the HOST_INT register to determine if it is
1754 * an Adapter Check interrupt. If so, it resets the
1755 * adapter. Otherwise it clears the status registers
1756 * and services the PHY.
1757 *
1758 **************************************************************/
1759
1760u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1761{
1da177e4
LT
1762 TLanPrivateInfo *priv = netdev_priv(dev);
1763 u32 ack;
1764 u32 error;
1765 u8 net_sts;
1766 u32 phy;
1767 u16 tlphy_ctl;
1768 u16 tlphy_sts;
6aa20a22 1769
1da177e4
LT
1770 ack = 1;
1771 if ( host_int & TLAN_HI_IV_MASK ) {
1772 netif_stop_queue( dev );
1773 error = inl( dev->base_addr + TLAN_CH_PARM );
1774 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1775 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1776 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1777
1778 schedule_work(&priv->tlan_tqueue);
1779
1780 netif_wake_queue(dev);
1781 ack = 0;
1782 } else {
1783 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1784 phy = priv->phy[priv->phyNum];
1785
1786 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1787 if ( net_sts ) {
1788 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1789 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1790 }
1791 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1792 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1793 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1794 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1795 tlphy_ctl |= TLAN_TC_SWAPOL;
1796 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1797 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1798 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1799 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1800 }
1801
1802 if (debug) {
6aa20a22 1803 TLan_PhyPrint( dev );
1da177e4
LT
1804 }
1805 }
1806 }
1807
1808 return ack;
1809
1810} /* TLan_HandleStatusCheck */
1811
1812
1813
1814
1815 /***************************************************************
1816 * TLan_HandleRxEOC
1817 *
1818 * Returns:
1819 * 1
1820 * Parms:
1821 * dev Device assigned the IRQ that was
1822 * raised.
1823 * host_int The contents of the HOST_INT
1824 * port.
1825 *
1826 * This driver is structured to determine EOC occurrences by
1827 * reading the CSTAT member of the list structure. Rx EOC
1828 * interrupts are disabled via the DIO INTDIS register.
1829 * However, TLAN chips before revision 3.0 didn't have this
1830 * CSTAT member or a INTDIS register, so if this chip is
1831 * pre-3.0, process EOC interrupts normally.
1832 *
1833 **************************************************************/
1834
1835u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1836{
1837 TLanPrivateInfo *priv = netdev_priv(dev);
1838 dma_addr_t head_list_phys;
1839 u32 ack = 1;
1840
1841 if ( priv->tlanRev < 0x30 ) {
1842 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1843 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1844 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1845 ack |= TLAN_HC_GO | TLAN_HC_RT;
1846 priv->rxEocCount++;
1847 }
1848
1849 return ack;
1850
1851} /* TLan_HandleRxEOC */
1852
1853
1854
1855
1856/*****************************************************************************
1857******************************************************************************
1858
1859 ThunderLAN Driver Timer Function
1860
1861******************************************************************************
1862*****************************************************************************/
1863
1864
1865 /***************************************************************
1866 * TLan_Timer
1867 *
1868 * Returns:
1869 * Nothing
1870 * Parms:
1871 * data A value given to add timer when
1872 * add_timer was called.
1873 *
1874 * This function handles timed functionality for the
1875 * TLAN driver. The two current timer uses are for
1876 * delaying for autonegotionation and driving the ACT LED.
1877 * - Autonegotiation requires being allowed about
1878 * 2 1/2 seconds before attempting to transmit a
1879 * packet. It would be a very bad thing to hang
1880 * the kernel this long, so the driver doesn't
1881 * allow transmission 'til after this time, for
1882 * certain PHYs. It would be much nicer if all
1883 * PHYs were interrupt-capable like the internal
1884 * PHY.
1885 * - The ACT LED, which shows adapter activity, is
1886 * driven by the driver, and so must be left on
1887 * for a short period to power up the LED so it
1888 * can be seen. This delay can be changed by
1889 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1890 * if desired. 100 ms produces a slightly
1891 * sluggish response.
1892 *
1893 **************************************************************/
1894
1895void TLan_Timer( unsigned long data )
1896{
1897 struct net_device *dev = (struct net_device *) data;
1898 TLanPrivateInfo *priv = netdev_priv(dev);
1899 u32 elapsed;
1900 unsigned long flags = 0;
1901
1902 priv->timer.function = NULL;
1903
1904 switch ( priv->timerType ) {
6aa20a22 1905#ifdef MONITOR
1da177e4
LT
1906 case TLAN_TIMER_LINK_BEAT:
1907 TLan_PhyMonitor( dev );
1908 break;
1909#endif
1910 case TLAN_TIMER_PHY_PDOWN:
1911 TLan_PhyPowerDown( dev );
1912 break;
1913 case TLAN_TIMER_PHY_PUP:
1914 TLan_PhyPowerUp( dev );
1915 break;
1916 case TLAN_TIMER_PHY_RESET:
1917 TLan_PhyReset( dev );
1918 break;
1919 case TLAN_TIMER_PHY_START_LINK:
1920 TLan_PhyStartLink( dev );
1921 break;
1922 case TLAN_TIMER_PHY_FINISH_AN:
1923 TLan_PhyFinishAutoNeg( dev );
1924 break;
1925 case TLAN_TIMER_FINISH_RESET:
1926 TLan_FinishReset( dev );
1927 break;
1928 case TLAN_TIMER_ACTIVITY:
1929 spin_lock_irqsave(&priv->lock, flags);
1930 if ( priv->timer.function == NULL ) {
1931 elapsed = jiffies - priv->timerSetAt;
1932 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1933 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1934 } else {
1935 priv->timer.function = &TLan_Timer;
1936 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1937 spin_unlock_irqrestore(&priv->lock, flags);
1938 add_timer( &priv->timer );
1939 break;
1940 }
1941 }
1942 spin_unlock_irqrestore(&priv->lock, flags);
1943 break;
1944 default:
1945 break;
1946 }
1947
1948} /* TLan_Timer */
1949
1950
1951
1952
1953/*****************************************************************************
1954******************************************************************************
1955
1956 ThunderLAN Driver Adapter Related Routines
1957
1958******************************************************************************
1959*****************************************************************************/
1960
1961
1962 /***************************************************************
1963 * TLan_ResetLists
6aa20a22 1964 *
1da177e4
LT
1965 * Returns:
1966 * Nothing
1967 * Parms:
1968 * dev The device structure with the list
1969 * stuctures to be reset.
1970 *
1971 * This routine sets the variables associated with managing
1972 * the TLAN lists to their initial values.
1973 *
1974 **************************************************************/
1975
1976void TLan_ResetLists( struct net_device *dev )
1977{
1978 TLanPrivateInfo *priv = netdev_priv(dev);
1979 int i;
1980 TLanList *list;
1981 dma_addr_t list_phys;
1982 struct sk_buff *skb;
1983 void *t = NULL;
1984
1985 priv->txHead = 0;
1986 priv->txTail = 0;
1987 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1988 list = priv->txList + i;
1989 list->cStat = TLAN_CSTAT_UNUSED;
1990 if ( bbuf ) {
1991 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1992 } else {
1993 list->buffer[0].address = 0;
1994 }
1995 list->buffer[2].count = 0;
1996 list->buffer[2].address = 0;
1997 list->buffer[8].address = 0;
1998 list->buffer[9].address = 0;
1999 }
2000
2001 priv->rxHead = 0;
2002 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
2003 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2004 list = priv->rxList + i;
2005 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
2006 list->cStat = TLAN_CSTAT_READY;
2007 list->frameSize = TLAN_MAX_FRAME_SIZE;
2008 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
2009 if ( bbuf ) {
2010 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
2011 } else {
2012 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
2013 if ( skb == NULL ) {
2014 printk( "TLAN: Couldn't allocate memory for received data.\n" );
2015 /* If this ever happened it would be a problem */
2016 } else {
2017 skb->dev = dev;
2018 skb_reserve( skb, 2 );
2019 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2020 }
2021 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2022 list->buffer[8].address = (u32) t;
2023 TLan_StoreSKB(list, skb);
2024 }
2025 list->buffer[1].count = 0;
2026 list->buffer[1].address = 0;
2027 if ( i < TLAN_NUM_RX_LISTS - 1 )
2028 list->forward = list_phys + sizeof(TLanList);
2029 else
2030 list->forward = 0;
2031 }
2032
2033} /* TLan_ResetLists */
2034
2035
2036void TLan_FreeLists( struct net_device *dev )
2037{
2038 TLanPrivateInfo *priv = netdev_priv(dev);
2039 int i;
2040 TLanList *list;
2041 struct sk_buff *skb;
2042
2043 if ( ! bbuf ) {
2044 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2045 list = priv->txList + i;
2046 skb = TLan_GetSKB(list);
2047 if ( skb ) {
2048 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2049 dev_kfree_skb_any( skb );
2050 list->buffer[8].address = 0;
2051 list->buffer[9].address = 0;
2052 }
2053 }
2054
2055 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2056 list = priv->rxList + i;
2057 skb = TLan_GetSKB(list);
2058 if ( skb ) {
2059 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2060 dev_kfree_skb_any( skb );
2061 list->buffer[8].address = 0;
2062 list->buffer[9].address = 0;
2063 }
2064 }
2065 }
2066} /* TLan_FreeLists */
2067
2068
2069
2070
2071 /***************************************************************
2072 * TLan_PrintDio
6aa20a22 2073 *
1da177e4
LT
2074 * Returns:
2075 * Nothing
2076 * Parms:
2077 * io_base Base IO port of the device of
2078 * which to print DIO registers.
2079 *
2080 * This function prints out all the internal (DIO)
2081 * registers of a TLAN chip.
2082 *
2083 **************************************************************/
2084
2085void TLan_PrintDio( u16 io_base )
2086{
2087 u32 data0, data1;
2088 int i;
2089
2090 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2091 printk( "TLAN: Off. +0 +4\n" );
2092 for ( i = 0; i < 0x4C; i+= 8 ) {
2093 data0 = TLan_DioRead32( io_base, i );
2094 data1 = TLan_DioRead32( io_base, i + 0x4 );
2095 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2096 }
2097
2098} /* TLan_PrintDio */
2099
2100
2101
2102
2103 /***************************************************************
2104 * TLan_PrintList
6aa20a22 2105 *
1da177e4
LT
2106 * Returns:
2107 * Nothing
2108 * Parms:
2109 * list A pointer to the TLanList structure to
2110 * be printed.
2111 * type A string to designate type of list,
2112 * "Rx" or "Tx".
2113 * num The index of the list.
2114 *
2115 * This function prints out the contents of the list
2116 * pointed to by the list parameter.
2117 *
2118 **************************************************************/
2119
2120void TLan_PrintList( TLanList *list, char *type, int num)
2121{
2122 int i;
2123
2124 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2125 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2126 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2127 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2128 /* for ( i = 0; i < 10; i++ ) { */
2129 for ( i = 0; i < 2; i++ ) {
2130 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2131 }
2132
2133} /* TLan_PrintList */
2134
2135
2136
2137
2138 /***************************************************************
2139 * TLan_ReadAndClearStats
2140 *
2141 * Returns:
2142 * Nothing
2143 * Parms:
2144 * dev Pointer to device structure of adapter
2145 * to which to read stats.
6aa20a22 2146 * record Flag indicating whether to add
1da177e4
LT
2147 *
2148 * This functions reads all the internal status registers
2149 * of the TLAN chip, which clears them as a side effect.
2150 * It then either adds the values to the device's status
2151 * struct, or discards them, depending on whether record
2152 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2153 *
2154 **************************************************************/
2155
2156void TLan_ReadAndClearStats( struct net_device *dev, int record )
2157{
2158 TLanPrivateInfo *priv = netdev_priv(dev);
2159 u32 tx_good, tx_under;
2160 u32 rx_good, rx_over;
2161 u32 def_tx, crc, code;
2162 u32 multi_col, single_col;
2163 u32 excess_col, late_col, loss;
2164
2165 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2166 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2167 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2168 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2169 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2170
2171 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2172 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2173 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2174 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2175 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2176
1da177e4
LT
2177 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2178 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2179 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2180 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2181 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2182
1da177e4
LT
2183 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2184 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2185 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2186 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2187 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2188
2189 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2190 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2191 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2192 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2193
2194 if ( record ) {
2195 priv->stats.rx_packets += rx_good;
2196 priv->stats.rx_errors += rx_over + crc + code;
2197 priv->stats.tx_packets += tx_good;
2198 priv->stats.tx_errors += tx_under + loss;
2199 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2200
2201 priv->stats.rx_over_errors += rx_over;
2202 priv->stats.rx_crc_errors += crc;
2203 priv->stats.rx_frame_errors += code;
2204
2205 priv->stats.tx_aborted_errors += tx_under;
2206 priv->stats.tx_carrier_errors += loss;
2207 }
6aa20a22 2208
1da177e4
LT
2209} /* TLan_ReadAndClearStats */
2210
2211
2212
2213
2214 /***************************************************************
2215 * TLan_Reset
2216 *
2217 * Returns:
2218 * 0
2219 * Parms:
2220 * dev Pointer to device structure of adapter
2221 * to be reset.
2222 *
2223 * This function resets the adapter and it's physical
2224 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2225 * Programmer's Guide" for details. The routine tries to
2226 * implement what is detailed there, though adjustments
2227 * have been made.
2228 *
2229 **************************************************************/
2230
2231void
2232TLan_ResetAdapter( struct net_device *dev )
2233{
2234 TLanPrivateInfo *priv = netdev_priv(dev);
2235 int i;
2236 u32 addr;
2237 u32 data;
2238 u8 data8;
2239
2240 priv->tlanFullDuplex = FALSE;
2241 priv->phyOnline=0;
2242 netif_carrier_off(dev);
2243
2244/* 1. Assert reset bit. */
2245
2246 data = inl(dev->base_addr + TLAN_HOST_CMD);
2247 data |= TLAN_HC_AD_RST;
2248 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2249
1da177e4
LT
2250 udelay(1000);
2251
2252/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2253
2254 data = inl(dev->base_addr + TLAN_HOST_CMD);
2255 data |= TLAN_HC_INT_OFF;
2256 outl(data, dev->base_addr + TLAN_HOST_CMD);
2257
2258/* 3. Clear AREGs and HASHs. */
2259
2260 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2261 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2262 }
2263
2264/* 4. Setup NetConfig register. */
2265
2266 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2267 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2268
2269/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2270
2271 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2272 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2273
2274/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2275
2276 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2277 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2278 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2279
2280/* 7. Setup the remaining registers. */
2281
2282 if ( priv->tlanRev >= 0x30 ) {
2283 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2284 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2285 }
2286 TLan_PhyDetect( dev );
2287 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2288
1da177e4
LT
2289 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2290 data |= TLAN_NET_CFG_BIT;
2291 if ( priv->aui == 1 ) {
2292 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2293 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2294 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2295 priv->tlanFullDuplex = TRUE;
2296 } else {
2297 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2298 }
2299 }
2300
2301 if ( priv->phyNum == 0 ) {
2302 data |= TLAN_NET_CFG_PHY_EN;
2303 }
2304 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2305
2306 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2307 TLan_FinishReset( dev );
2308 } else {
2309 TLan_PhyPowerDown( dev );
2310 }
2311
2312} /* TLan_ResetAdapter */
2313
2314
2315
2316
2317void
2318TLan_FinishReset( struct net_device *dev )
2319{
2320 TLanPrivateInfo *priv = netdev_priv(dev);
2321 u8 data;
2322 u32 phy;
2323 u8 sio;
2324 u16 status;
2325 u16 partner;
2326 u16 tlphy_ctl;
2327 u16 tlphy_par;
2328 u16 tlphy_id1, tlphy_id2;
2329 int i;
2330
2331 phy = priv->phy[priv->phyNum];
2332
2333 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2334 if ( priv->tlanFullDuplex ) {
2335 data |= TLAN_NET_CMD_DUPLEX;
2336 }
2337 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2338 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2339 if ( priv->phyNum == 0 ) {
6aa20a22 2340 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT
2341 }
2342 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2343 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2344 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2345 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2346
1da177e4
LT
2347 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2348 status = MII_GS_LINK;
2349 printk( "TLAN: %s: Link forced.\n", dev->name );
2350 } else {
2351 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2352 udelay( 1000 );
2353 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
6aa20a22 2354 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT
2355 (tlphy_id1 == NAT_SEM_ID1) &&
2356 (tlphy_id2 == NAT_SEM_ID2) ) {
2357 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2358 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2359
1da177e4
LT
2360 printk( "TLAN: %s: Link active with ", dev->name );
2361 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2362 printk( "forced 10%sMbps %s-Duplex\n",
1da177e4
LT
2363 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2364 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2365 } else {
2366 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2367 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2368 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2369 printk("TLAN: Partner capability: ");
2370 for (i = 5; i <= 10; i++)
2371 if (partner & (1<<i))
2372 printk("%s",media[i-5]);
2373 printk("\n");
2374 }
2375
2376 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2377#ifdef MONITOR
1da177e4
LT
2378 /* We have link beat..for now anyway */
2379 priv->link = 1;
2380 /*Enabling link beat monitoring */
2381 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2382#endif
1da177e4
LT
2383 } else if (status & MII_GS_LINK) {
2384 printk( "TLAN: %s: Link active\n", dev->name );
2385 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2386 }
2387 }
2388
2389 if ( priv->phyNum == 0 ) {
2390 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2391 tlphy_ctl |= TLAN_TC_INTEN;
2392 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2393 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2394 sio |= TLAN_NET_SIO_MINTEN;
2395 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2396 }
2397
2398 if ( status & MII_GS_LINK ) {
2399 TLan_SetMac( dev, 0, dev->dev_addr );
2400 priv->phyOnline = 1;
2401 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2402 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2403 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2404 }
2405 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2406 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2407 netif_carrier_on(dev);
2408 } else {
2409 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2410 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2411 return;
2412 }
562faf46 2413 TLan_SetMulticastList(dev);
1da177e4
LT
2414
2415} /* TLan_FinishReset */
2416
2417
2418
2419
2420 /***************************************************************
2421 * TLan_SetMac
2422 *
2423 * Returns:
2424 * Nothing
2425 * Parms:
2426 * dev Pointer to device structure of adapter
2427 * on which to change the AREG.
2428 * areg The AREG to set the address in (0 - 3).
2429 * mac A pointer to an array of chars. Each
2430 * element stores one byte of the address.
2431 * IE, it isn't in ascii.
2432 *
2433 * This function transfers a MAC address to one of the
2434 * TLAN AREGs (address registers). The TLAN chip locks
2435 * the register on writing to offset 0 and unlocks the
2436 * register after writing to offset 5. If NULL is passed
2437 * in mac, then the AREG is filled with 0's.
2438 *
2439 **************************************************************/
2440
2441void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2442{
2443 int i;
6aa20a22 2444
1da177e4
LT
2445 areg *= 6;
2446
2447 if ( mac != NULL ) {
2448 for ( i = 0; i < 6; i++ )
2449 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2450 } else {
2451 for ( i = 0; i < 6; i++ )
2452 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2453 }
2454
2455} /* TLan_SetMac */
2456
2457
2458
2459
2460/*****************************************************************************
2461******************************************************************************
2462
2463 ThunderLAN Driver PHY Layer Routines
2464
2465******************************************************************************
2466*****************************************************************************/
2467
2468
2469
2470 /*********************************************************************
2471 * TLan_PhyPrint
2472 *
2473 * Returns:
2474 * Nothing
2475 * Parms:
2476 * dev A pointer to the device structure of the
2477 * TLAN device having the PHYs to be detailed.
6aa20a22 2478 *
1da177e4
LT
2479 * This function prints the registers a PHY (aka transceiver).
2480 *
2481 ********************************************************************/
2482
2483void TLan_PhyPrint( struct net_device *dev )
2484{
2485 TLanPrivateInfo *priv = netdev_priv(dev);
2486 u16 i, data0, data1, data2, data3, phy;
2487
2488 phy = priv->phy[priv->phyNum];
2489
2490 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2491 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2492 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2493 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2494 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2495 for ( i = 0; i < 0x20; i+= 4 ) {
2496 printk( "TLAN: 0x%02x", i );
2497 TLan_MiiReadReg( dev, phy, i, &data0 );
2498 printk( " 0x%04hx", data0 );
2499 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2500 printk( " 0x%04hx", data1 );
2501 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2502 printk( " 0x%04hx", data2 );
2503 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2504 printk( " 0x%04hx\n", data3 );
2505 }
2506 } else {
2507 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2508 }
2509
2510} /* TLan_PhyPrint */
2511
2512
2513
2514
2515 /*********************************************************************
2516 * TLan_PhyDetect
2517 *
2518 * Returns:
2519 * Nothing
2520 * Parms:
2521 * dev A pointer to the device structure of the adapter
2522 * for which the PHY needs determined.
2523 *
2524 * So far I've found that adapters which have external PHYs
2525 * may also use the internal PHY for part of the functionality.
2526 * (eg, AUI/Thinnet). This function finds out if this TLAN
2527 * chip has an internal PHY, and then finds the first external
2528 * PHY (starting from address 0) if it exists).
2529 *
2530 ********************************************************************/
2531
2532void TLan_PhyDetect( struct net_device *dev )
2533{
2534 TLanPrivateInfo *priv = netdev_priv(dev);
2535 u16 control;
2536 u16 hi;
2537 u16 lo;
2538 u32 phy;
2539
2540 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2541 priv->phyNum = 0xFFFF;
2542 return;
2543 }
2544
2545 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2546
1da177e4
LT
2547 if ( hi != 0xFFFF ) {
2548 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2549 } else {
2550 priv->phy[0] = TLAN_PHY_NONE;
2551 }
2552
2553 priv->phy[1] = TLAN_PHY_NONE;
2554 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2555 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2556 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2557 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2558 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2559 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2560 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2561 priv->phy[1] = phy;
2562 }
2563 }
2564 }
2565
2566 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2567 priv->phyNum = 1;
2568 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2569 priv->phyNum = 0;
2570 } else {
2571 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2572 }
2573
2574} /* TLan_PhyDetect */
2575
2576
2577
2578
2579void TLan_PhyPowerDown( struct net_device *dev )
2580{
2581 TLanPrivateInfo *priv = netdev_priv(dev);
2582 u16 value;
2583
2584 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2585 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2586 TLan_MiiSync( dev->base_addr );
2587 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2588 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2589 TLan_MiiSync( dev->base_addr );
2590 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2591 }
2592
2593 /* Wait for 50 ms and powerup
2594 * This is abitrary. It is intended to make sure the
2595 * transceiver settles.
2596 */
2597 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2598
2599} /* TLan_PhyPowerDown */
2600
2601
2602
2603
2604void TLan_PhyPowerUp( struct net_device *dev )
2605{
2606 TLanPrivateInfo *priv = netdev_priv(dev);
2607 u16 value;
2608
2609 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2610 TLan_MiiSync( dev->base_addr );
2611 value = MII_GC_LOOPBK;
2612 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2613 TLan_MiiSync(dev->base_addr);
2614 /* Wait for 500 ms and reset the
2615 * transceiver. The TLAN docs say both 50 ms and
2616 * 500 ms, so do the longer, just in case.
2617 */
2618 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2619
2620} /* TLan_PhyPowerUp */
2621
2622
2623
2624
2625void TLan_PhyReset( struct net_device *dev )
2626{
2627 TLanPrivateInfo *priv = netdev_priv(dev);
2628 u16 phy;
2629 u16 value;
2630
2631 phy = priv->phy[priv->phyNum];
2632
2633 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2634 TLan_MiiSync( dev->base_addr );
2635 value = MII_GC_LOOPBK | MII_GC_RESET;
2636 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2637 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2638 while ( value & MII_GC_RESET ) {
2639 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2640 }
2641
2642 /* Wait for 500 ms and initialize.
2643 * I don't remember why I wait this long.
2644 * I've changed this to 50ms, as it seems long enough.
2645 */
2646 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2647
2648} /* TLan_PhyReset */
2649
2650
2651
2652
2653void TLan_PhyStartLink( struct net_device *dev )
2654{
2655 TLanPrivateInfo *priv = netdev_priv(dev);
2656 u16 ability;
2657 u16 control;
2658 u16 data;
2659 u16 phy;
2660 u16 status;
2661 u16 tctl;
2662
2663 phy = priv->phy[priv->phyNum];
2664 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2665 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2666 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2667
6aa20a22 2668 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT
2669 ( ! priv->aui ) ) {
2670 ability = status >> 11;
6aa20a22 2671 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT
2672 priv->duplex == TLAN_DUPLEX_HALF) {
2673 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2674 } else if ( priv->speed == TLAN_SPEED_10 &&
2675 priv->duplex == TLAN_DUPLEX_FULL) {
2676 priv->tlanFullDuplex = TRUE;
2677 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2678 } else if ( priv->speed == TLAN_SPEED_100 &&
2679 priv->duplex == TLAN_DUPLEX_HALF) {
2680 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2681 } else if ( priv->speed == TLAN_SPEED_100 &&
2682 priv->duplex == TLAN_DUPLEX_FULL) {
2683 priv->tlanFullDuplex = TRUE;
2684 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2685 } else {
6aa20a22 2686
1da177e4
LT
2687 /* Set Auto-Neg advertisement */
2688 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2689 /* Enablee Auto-Neg */
2690 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2691 /* Restart Auto-Neg */
2692 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2693 /* Wait for 4 sec for autonegotiation
2694 * to complete. The max spec time is less than this
2695 * but the card need additional time to start AN.
2696 * .5 sec should be plenty extra.
2697 */
2698 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2699 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2700 return;
2701 }
6aa20a22
JG
2702
2703 }
2704
1da177e4
LT
2705 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2706 priv->phyNum = 0;
2707 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2708 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2709 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2710 return;
2711 } else if ( priv->phyNum == 0 ) {
2712 control = 0;
2713 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2714 if ( priv->aui ) {
2715 tctl |= TLAN_TC_AUISEL;
6aa20a22 2716 } else {
1da177e4
LT
2717 tctl &= ~TLAN_TC_AUISEL;
2718 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2719 control |= MII_GC_DUPLEX;
2720 priv->tlanFullDuplex = TRUE;
2721 }
2722 if ( priv->speed == TLAN_SPEED_100 ) {
2723 control |= MII_GC_SPEEDSEL;
2724 }
2725 }
2726 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2727 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2728 }
2729
2730 /* Wait for 2 sec to give the transceiver time
2731 * to establish link.
2732 */
2733 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2734
2735} /* TLan_PhyStartLink */
2736
2737
2738
2739
2740void TLan_PhyFinishAutoNeg( struct net_device *dev )
2741{
2742 TLanPrivateInfo *priv = netdev_priv(dev);
2743 u16 an_adv;
2744 u16 an_lpa;
2745 u16 data;
2746 u16 mode;
2747 u16 phy;
2748 u16 status;
6aa20a22 2749
1da177e4
LT
2750 phy = priv->phy[priv->phyNum];
2751
2752 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2753 udelay( 1000 );
2754 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2755
2756 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2757 /* Wait for 8 sec to give the process
2758 * more time. Perhaps we should fail after a while.
2759 */
2760 if (!priv->neg_be_verbose++) {
2761 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2762 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2763 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2764 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2765 }
2766 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2767 return;
2768 }
2769
2770 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2771 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2772 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2773 mode = an_adv & an_lpa & 0x03E0;
2774 if ( mode & 0x0100 ) {
2775 priv->tlanFullDuplex = TRUE;
2776 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2777 priv->tlanFullDuplex = TRUE;
2778 }
2779
2780 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2781 priv->phyNum = 0;
2782 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2783 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2784 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2785 return;
2786 }
2787
2788 if ( priv->phyNum == 0 ) {
2789 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2790 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2791 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2792 } else {
2793 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2794 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2795 }
2796 }
2797
2798 /* Wait for 100 ms. No reason in partiticular.
2799 */
2800 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2801
1da177e4
LT
2802} /* TLan_PhyFinishAutoNeg */
2803
2804#ifdef MONITOR
2805
2806 /*********************************************************************
2807 *
2808 * TLan_phyMonitor
2809 *
6aa20a22 2810 * Returns:
1da177e4
LT
2811 * None
2812 *
2813 * Params:
2814 * dev The device structure of this device.
2815 *
6aa20a22 2816 *
1da177e4
LT
2817 * This function monitors PHY condition by reading the status
2818 * register via the MII bus. This can be used to give info
2819 * about link changes (up/down), and possible switch to alternate
2820 * media.
2821 *
2822 * ******************************************************************/
2823
2824void TLan_PhyMonitor( struct net_device *dev )
2825{
2826 TLanPrivateInfo *priv = netdev_priv(dev);
2827 u16 phy;
2828 u16 phy_status;
2829
2830 phy = priv->phy[priv->phyNum];
2831
2832 /* Get PHY status register */
2833 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2834
2835 /* Check if link has been lost */
6aa20a22 2836 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT
2837 if (priv->link) {
2838 priv->link = 0;
2839 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2840 netif_carrier_off(dev);
1da177e4
LT
2841 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2842 return;
2843 }
2844 }
2845
2846 /* Link restablished? */
2847 if ((phy_status & MII_GS_LINK) && !priv->link) {
2848 priv->link = 1;
2849 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2850 netif_carrier_on(dev);
1da177e4
LT
2851 }
2852
2853 /* Setup a new monitor */
2854 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2855}
1da177e4
LT
2856
2857#endif /* MONITOR */
2858
2859
2860/*****************************************************************************
2861******************************************************************************
2862
2863 ThunderLAN Driver MII Routines
2864
2865 These routines are based on the information in Chap. 2 of the
2866 "ThunderLAN Programmer's Guide", pp. 15-24.
2867
2868******************************************************************************
2869*****************************************************************************/
2870
2871
2872 /***************************************************************
2873 * TLan_MiiReadReg
2874 *
2875 * Returns:
2876 * 0 if ack received ok
2877 * 1 otherwise.
2878 *
2879 * Parms:
2880 * dev The device structure containing
2881 * The io address and interrupt count
2882 * for this device.
2883 * phy The address of the PHY to be queried.
2884 * reg The register whose contents are to be
4a4efbde 2885 * retrieved.
1da177e4
LT
2886 * val A pointer to a variable to store the
2887 * retrieved value.
2888 *
4a4efbde 2889 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT
2890 * of a given register on a PHY. It sends the appropriate info
2891 * and then reads the 16-bit register value from the MII bus via
2892 * the TLAN SIO register.
2893 *
2894 **************************************************************/
2895
2896int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2897{
2898 u8 nack;
2899 u16 sio, tmp;
2900 u32 i;
2901 int err;
2902 int minten;
2903 TLanPrivateInfo *priv = netdev_priv(dev);
2904 unsigned long flags = 0;
2905
2906 err = FALSE;
2907 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2908 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2909
1da177e4
LT
2910 if (!in_irq())
2911 spin_lock_irqsave(&priv->lock, flags);
2912
2913 TLan_MiiSync(dev->base_addr);
2914
2915 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2916 if ( minten )
2917 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2918
2919 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2920 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2921 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2922 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2923
2924
2925 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2926
2927 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2928 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2929 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2930
2931 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2932 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2933 if (nack) { /* No ACK, so fake it */
2934 for (i = 0; i < 16; i++) {
2935 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2936 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2937 }
2938 tmp = 0xffff;
2939 err = TRUE;
2940 } else { /* ACK, so read data */
2941 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2942 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2943 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2944 tmp |= i;
2945 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2946 }
2947 }
2948
2949
2950 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2951 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2952
2953 if ( minten )
2954 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2955
2956 *val = tmp;
6aa20a22 2957
1da177e4
LT
2958 if (!in_irq())
2959 spin_unlock_irqrestore(&priv->lock, flags);
2960
2961 return err;
2962
2963} /* TLan_MiiReadReg */
2964
2965
2966
2967
2968 /***************************************************************
2969 * TLan_MiiSendData
2970 *
2971 * Returns:
2972 * Nothing
2973 * Parms:
2974 * base_port The base IO port of the adapter in
2975 * question.
2976 * dev The address of the PHY to be queried.
2977 * data The value to be placed on the MII bus.
2978 * num_bits The number of bits in data that are to
2979 * be placed on the MII bus.
2980 *
2981 * This function sends on sequence of bits on the MII
2982 * configuration bus.
2983 *
2984 **************************************************************/
2985
2986void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2987{
2988 u16 sio;
2989 u32 i;
2990
2991 if ( num_bits == 0 )
2992 return;
2993
2994 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2995 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2996 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2997
2998 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2999 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3000 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3001 if ( data & i )
3002 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
3003 else
3004 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
3005 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3006 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3007 }
3008
3009} /* TLan_MiiSendData */
3010
3011
3012
3013
3014 /***************************************************************
3015 * TLan_MiiSync
3016 *
3017 * Returns:
3018 * Nothing
3019 * Parms:
3020 * base_port The base IO port of the adapter in
3021 * question.
3022 *
3023 * This functions syncs all PHYs in terms of the MII configuration
3024 * bus.
3025 *
3026 **************************************************************/
3027
3028void TLan_MiiSync( u16 base_port )
3029{
3030 int i;
3031 u16 sio;
3032
3033 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3034 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3035
3036 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3037 for ( i = 0; i < 32; i++ ) {
3038 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3039 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3040 }
3041
3042} /* TLan_MiiSync */
3043
3044
3045
3046
3047 /***************************************************************
3048 * TLan_MiiWriteReg
3049 *
3050 * Returns:
3051 * Nothing
3052 * Parms:
3053 * dev The device structure for the device
3054 * to write to.
3055 * phy The address of the PHY to be written to.
3056 * reg The register whose contents are to be
3057 * written.
3058 * val The value to be written to the register.
3059 *
3060 * This function uses the TLAN's MII bus to write the contents of a
3061 * given register on a PHY. It sends the appropriate info and then
3062 * writes the 16-bit register value from the MII configuration bus
3063 * via the TLAN SIO register.
3064 *
3065 **************************************************************/
3066
3067void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3068{
3069 u16 sio;
3070 int minten;
3071 unsigned long flags = 0;
3072 TLanPrivateInfo *priv = netdev_priv(dev);
3073
3074 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3075 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3076
1da177e4
LT
3077 if (!in_irq())
3078 spin_lock_irqsave(&priv->lock, flags);
3079
3080 TLan_MiiSync( dev->base_addr );
3081
3082 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3083 if ( minten )
3084 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3085
3086 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3087 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3088 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3089 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3090
3091 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3092 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3093
3094 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3095 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3096
3097 if ( minten )
3098 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3099
1da177e4
LT
3100 if (!in_irq())
3101 spin_unlock_irqrestore(&priv->lock, flags);
3102
3103} /* TLan_MiiWriteReg */
3104
3105
3106
3107
3108/*****************************************************************************
3109******************************************************************************
3110
3111 ThunderLAN Driver Eeprom routines
3112
3113 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3114 EEPROM. These functions are based on information in Microchip's
3115 data sheet. I don't know how well this functions will work with
3116 other EEPROMs.
3117
3118******************************************************************************
3119*****************************************************************************/
3120
3121
3122 /***************************************************************
3123 * TLan_EeSendStart
3124 *
3125 * Returns:
3126 * Nothing
6aa20a22 3127 * Parms:
1da177e4
LT
3128 * io_base The IO port base address for the
3129 * TLAN device with the EEPROM to
3130 * use.
3131 *
3132 * This function sends a start cycle to an EEPROM attached
3133 * to a TLAN chip.
3134 *
3135 **************************************************************/
3136
3137void TLan_EeSendStart( u16 io_base )
3138{
3139 u16 sio;
3140
3141 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3142 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3143
3144 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3145 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3146 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3147 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3148 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3149
3150} /* TLan_EeSendStart */
3151
3152
3153
3154
3155 /***************************************************************
3156 * TLan_EeSendByte
3157 *
3158 * Returns:
3159 * If the correct ack was received, 0, otherwise 1
3160 * Parms: io_base The IO port base address for the
3161 * TLAN device with the EEPROM to
3162 * use.
3163 * data The 8 bits of information to
3164 * send to the EEPROM.
3165 * stop If TLAN_EEPROM_STOP is passed, a
3166 * stop cycle is sent after the
3167 * byte is sent after the ack is
3168 * read.
3169 *
3170 * This function sends a byte on the serial EEPROM line,
3171 * driving the clock to send each bit. The function then
3172 * reverses transmission direction and reads an acknowledge
3173 * bit.
3174 *
3175 **************************************************************/
3176
3177int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3178{
3179 int err;
3180 u8 place;
3181 u16 sio;
3182
3183 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3184 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3185
3186 /* Assume clock is low, tx is enabled; */
3187 for ( place = 0x80; place != 0; place >>= 1 ) {
3188 if ( place & data )
3189 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3190 else
3191 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3192 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3193 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3194 }
3195 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3196 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3197 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3198 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3199 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3200
3201 if ( ( ! err ) && stop ) {
3202 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3203 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3204 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3205 }
3206
3207 return ( err );
3208
3209} /* TLan_EeSendByte */
3210
3211
3212
3213
3214 /***************************************************************
3215 * TLan_EeReceiveByte
3216 *
3217 * Returns:
3218 * Nothing
3219 * Parms:
3220 * io_base The IO port base address for the
3221 * TLAN device with the EEPROM to
3222 * use.
3223 * data An address to a char to hold the
3224 * data sent from the EEPROM.
3225 * stop If TLAN_EEPROM_STOP is passed, a
3226 * stop cycle is sent after the
3227 * byte is received, and no ack is
3228 * sent.
3229 *
3230 * This function receives 8 bits of data from the EEPROM
3231 * over the serial link. It then sends and ack bit, or no
3232 * ack and a stop bit. This function is used to retrieve
3233 * data after the address of a byte in the EEPROM has been
3234 * sent.
3235 *
3236 **************************************************************/
3237
3238void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3239{
3240 u8 place;
3241 u16 sio;
3242
3243 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3244 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3245 *data = 0;
3246
3247 /* Assume clock is low, tx is enabled; */
3248 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3249 for ( place = 0x80; place; place >>= 1 ) {
3250 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3251 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3252 *data |= place;
3253 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3254 }
3255
3256 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3257 if ( ! stop ) {
3258 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3259 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3260 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3261 } else {
3262 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3263 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3264 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3265 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3266 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3267 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3268 }
3269
3270} /* TLan_EeReceiveByte */
3271
3272
3273
3274
3275 /***************************************************************
3276 * TLan_EeReadByte
3277 *
3278 * Returns:
3279 * No error = 0, else, the stage at which the error
3280 * occurred.
3281 * Parms:
3282 * io_base The IO port base address for the
3283 * TLAN device with the EEPROM to
3284 * use.
3285 * ee_addr The address of the byte in the
3286 * EEPROM whose contents are to be
3287 * retrieved.
3288 * data An address to a char to hold the
3289 * data obtained from the EEPROM.
3290 *
3291 * This function reads a byte of information from an byte
3292 * cell in the EEPROM.
3293 *
3294 **************************************************************/
3295
3296int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3297{
3298 int err;
3299 TLanPrivateInfo *priv = netdev_priv(dev);
3300 unsigned long flags = 0;
3301 int ret=0;
3302
3303 spin_lock_irqsave(&priv->lock, flags);
3304
3305 TLan_EeSendStart( dev->base_addr );
3306 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3307 if (err)
3308 {
3309 ret=1;
3310 goto fail;
3311 }
3312 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3313 if (err)
3314 {
3315 ret=2;
3316 goto fail;
3317 }
3318 TLan_EeSendStart( dev->base_addr );
3319 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3320 if (err)
3321 {
3322 ret=3;
3323 goto fail;
3324 }
3325 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3326fail:
3327 spin_unlock_irqrestore(&priv->lock, flags);
3328
3329 return ret;
3330
3331} /* TLan_EeReadByte */
3332
3333
3334