drivers/net: Kill now superfluous ->last_rx stores.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / sis900.c
CommitLineData
1da177e4 1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
6aa20a22 2 Copyright 1999 Silicon Integrated System Corporation
d269a69f 3 Revision: 1.08.10 Apr. 2 2006
6aa20a22 4
1da177e4 5 Modified from the driver which is originally written by Donald Becker.
6aa20a22 6
1da177e4
LT
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
6aa20a22 11
1da177e4
LT
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
d269a69f 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
ea37ccea 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
d269a69f 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
1da177e4
LT
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
6aa20a22 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
1da177e4
LT
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/string.h>
56#include <linux/timer.h>
57#include <linux/errno.h>
58#include <linux/ioport.h>
59#include <linux/slab.h>
60#include <linux/interrupt.h>
61#include <linux/pci.h>
62#include <linux/netdevice.h>
63#include <linux/init.h>
64#include <linux/mii.h>
65#include <linux/etherdevice.h>
66#include <linux/skbuff.h>
67#include <linux/delay.h>
68#include <linux/ethtool.h>
69#include <linux/crc32.h>
70#include <linux/bitops.h>
12b279f9 71#include <linux/dma-mapping.h>
1da177e4
LT
72
73#include <asm/processor.h> /* Processor type for cache alignment. */
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/uaccess.h> /* User space memory access functions */
77
78#include "sis900.h"
79
80#define SIS900_MODULE_NAME "sis900"
d269a69f 81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
1da177e4
LT
82
83static char version[] __devinitdata =
84KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86static int max_interrupt_work = 40;
87static int multicast_filter_limit = 128;
88
89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91#define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97/* Time in jiffies before concluding the transmitter is hung. */
98#define TX_TIMEOUT (4*HZ)
1da177e4
LT
99
100enum {
101 SIS_900 = 0,
102 SIS_7016
103};
f71e1309 104static const char * card_names[] = {
1da177e4
LT
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107};
108static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114};
115MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
f71e1309 119static const struct mii_chip_info {
1da177e4
LT
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124#define HOME 0x0001
125#define LAN 0x0002
126#define MIX 0x0003
127#define UNKNOWN 0x0
128} mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
d8e95e52 131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
1da177e4 132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
494aced2 133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
1da177e4
LT
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
80a8003f 137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
1da177e4
LT
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
143};
144
145struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
152};
153
154typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158} BufferDesc;
159
160struct sis900_private {
1da177e4
LT
161 struct pci_dev * pci_dev;
162
163 spinlock_t lock;
164
165 struct mii_phy * mii;
166 struct mii_phy * first_mii; /* record the first mii structure */
167 unsigned int cur_phy;
da369b01 168 struct mii_if_info mii_info;
1da177e4
LT
169
170 struct timer_list timer; /* Link status detection timer. */
171 u8 autong_complete; /* 1: auto-negotiate complete */
172
173 u32 msg_enable;
174
175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176 unsigned int cur_tx, dirty_tx;
177
178 /* The saved address of a sent/receive-in-place packet buffer */
179 struct sk_buff *tx_skbuff[NUM_TX_DESC];
180 struct sk_buff *rx_skbuff[NUM_RX_DESC];
181 BufferDesc *tx_ring;
182 BufferDesc *rx_ring;
183
184 dma_addr_t tx_ring_dma;
185 dma_addr_t rx_ring_dma;
186
187 unsigned int tx_full; /* The Tx queue is full. */
188 u8 host_bridge_rev;
189 u8 chipset_rev;
190};
191
192MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194MODULE_LICENSE("GPL");
195
196module_param(multicast_filter_limit, int, 0444);
197module_param(max_interrupt_work, int, 0444);
198module_param(sis900_debug, int, 0444);
199MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
202
203#ifdef CONFIG_NET_POLL_CONTROLLER
204static void sis900_poll(struct net_device *dev);
205#endif
206static int sis900_open(struct net_device *net_dev);
207static int sis900_mii_probe (struct net_device * net_dev);
208static void sis900_init_rxfilter (struct net_device * net_dev);
209static u16 read_eeprom(long ioaddr, int location);
da369b01 210static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT
211static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212static void sis900_timer(unsigned long data);
213static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214static void sis900_tx_timeout(struct net_device *net_dev);
215static void sis900_init_tx_ring(struct net_device *net_dev);
216static void sis900_init_rx_ring(struct net_device *net_dev);
217static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218static int sis900_rx(struct net_device *net_dev);
219static void sis900_finish_xmit (struct net_device *net_dev);
7d12e780 220static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
1da177e4
LT
221static int sis900_close(struct net_device *net_dev);
222static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
1da177e4
LT
223static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
224static void set_rx_mode(struct net_device *net_dev);
225static void sis900_reset(struct net_device *net_dev);
226static void sis630_set_eq(struct net_device *net_dev, u8 revision);
227static int sis900_set_config(struct net_device *dev, struct ifmap *map);
228static u16 sis900_default_phy(struct net_device * net_dev);
229static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
230static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
231static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
232static void sis900_set_mode (long ioaddr, int speed, int duplex);
7282d491 233static const struct ethtool_ops sis900_ethtool_ops;
1da177e4
LT
234
235/**
236 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
237 * @pci_dev: the sis900 pci device
6aa20a22 238 * @net_dev: the net device to get address for
1da177e4
LT
239 *
240 * Older SiS900 and friends, use EEPROM to store MAC address.
241 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
242 */
243
244static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
245{
246 long ioaddr = pci_resource_start(pci_dev, 0);
247 u16 signature;
248 int i;
249
250 /* check to see if we have sane EEPROM */
6aa20a22 251 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
1da177e4 252 if (signature == 0xffff || signature == 0x0000) {
6aa20a22 253 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
1da177e4
LT
254 pci_name(pci_dev), signature);
255 return 0;
256 }
257
258 /* get MAC address from EEPROM */
259 for (i = 0; i < 3; i++)
260 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
261
262 return 1;
263}
264
265/**
266 * sis630e_get_mac_addr - Get MAC address for SiS630E model
267 * @pci_dev: the sis900 pci device
6aa20a22 268 * @net_dev: the net device to get address for
1da177e4
LT
269 *
270 * SiS630E model, use APC CMOS RAM to store MAC address.
271 * APC CMOS RAM is accessed through ISA bridge.
272 * MAC address is read into @net_dev->dev_addr.
273 */
274
275static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
276 struct net_device *net_dev)
277{
278 struct pci_dev *isa_bridge = NULL;
279 u8 reg;
280 int i;
281
282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
283 if (!isa_bridge)
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
285 if (!isa_bridge) {
286 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
287 pci_name(pci_dev));
288 return 0;
289 }
290 pci_read_config_byte(isa_bridge, 0x48, &reg);
291 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
292
293 for (i = 0; i < 6; i++) {
294 outb(0x09 + i, 0x70);
6aa20a22 295 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
1da177e4
LT
296 }
297 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
298 pci_dev_put(isa_bridge);
299
300 return 1;
301}
302
303
304/**
305 * sis635_get_mac_addr - Get MAC address for SIS635 model
306 * @pci_dev: the sis900 pci device
6aa20a22 307 * @net_dev: the net device to get address for
1da177e4
LT
308 *
309 * SiS635 model, set MAC Reload Bit to load Mac address from APC
6aa20a22 310 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
1da177e4
LT
311 * @net_dev->dev_addr.
312 */
313
314static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
315 struct net_device *net_dev)
316{
317 long ioaddr = net_dev->base_addr;
318 u32 rfcrSave;
319 u32 i;
320
321 rfcrSave = inl(rfcr + ioaddr);
322
323 outl(rfcrSave | RELOAD, ioaddr + cr);
324 outl(0, ioaddr + cr);
325
326 /* disable packet filtering before setting filter */
327 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
328
329 /* load MAC addr to filter data register */
330 for (i = 0 ; i < 3 ; i++) {
331 outl((i << RFADDR_shift), ioaddr + rfcr);
332 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
333 }
334
335 /* enable packet filtering */
336 outl(rfcrSave | RFEN, rfcr + ioaddr);
337
338 return 1;
339}
340
341/**
342 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
343 * @pci_dev: the sis900 pci device
6aa20a22 344 * @net_dev: the net device to get address for
1da177e4 345 *
6aa20a22 346 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
1da177e4 347 * is shared by
6aa20a22
JG
348 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
349 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
1da177e4 350 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
6aa20a22
JG
351 * EEDONE signal to refuse EEPROM access by LAN.
352 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
353 * The signature field in SiS962 or SiS963 spec is meaningless.
1da177e4
LT
354 * MAC address is read into @net_dev->dev_addr.
355 */
356
357static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
358 struct net_device *net_dev)
359{
360 long ioaddr = net_dev->base_addr;
361 long ee_addr = ioaddr + mear;
362 u32 waittime = 0;
363 int i;
6aa20a22 364
1da177e4
LT
365 outl(EEREQ, ee_addr);
366 while(waittime < 2000) {
367 if(inl(ee_addr) & EEGNT) {
368
369 /* get MAC address from EEPROM */
370 for (i = 0; i < 3; i++)
371 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
372
373 outl(EEDONE, ee_addr);
374 return 1;
375 } else {
6aa20a22 376 udelay(1);
1da177e4
LT
377 waittime ++;
378 }
379 }
380 outl(EEDONE, ee_addr);
381 return 0;
382}
383
384/**
385 * sis900_probe - Probe for sis900 device
386 * @pci_dev: the sis900 pci device
387 * @pci_id: the pci device ID
388 *
389 * Check and probe sis900 net device for @pci_dev.
6aa20a22 390 * Get mac address according to the chip revision,
1da177e4
LT
391 * and assign SiS900-specific entries in the device structure.
392 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
393 */
394
395static int __devinit sis900_probe(struct pci_dev *pci_dev,
396 const struct pci_device_id *pci_id)
397{
398 struct sis900_private *sis_priv;
399 struct net_device *net_dev;
400 struct pci_dev *dev;
401 dma_addr_t ring_dma;
402 void *ring_space;
403 long ioaddr;
404 int i, ret;
f71e1309 405 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT
406 const char *dev_name = pci_name(pci_dev);
407
408/* when built into the kernel, we only print version if device is found */
409#ifndef MODULE
410 static int printed_version;
411 if (!printed_version++)
412 printk(version);
413#endif
414
415 /* setup various bits in PCI command register */
416 ret = pci_enable_device(pci_dev);
417 if(ret) return ret;
6aa20a22 418
12b279f9 419 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
1da177e4 420 if(i){
2450022a 421 printk(KERN_ERR "sis900.c: architecture does not support "
1da177e4
LT
422 "32bit PCI busmaster DMA\n");
423 return i;
424 }
6aa20a22 425
1da177e4 426 pci_set_master(pci_dev);
6aa20a22 427
1da177e4
LT
428 net_dev = alloc_etherdev(sizeof(struct sis900_private));
429 if (!net_dev)
430 return -ENOMEM;
1da177e4
LT
431 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
432
433 /* We do a request_region() to register /proc/ioports info. */
6aa20a22 434 ioaddr = pci_resource_start(pci_dev, 0);
1da177e4
LT
435 ret = pci_request_regions(pci_dev, "sis900");
436 if (ret)
437 goto err_out;
438
439 sis_priv = net_dev->priv;
440 net_dev->base_addr = ioaddr;
441 net_dev->irq = pci_dev->irq;
442 sis_priv->pci_dev = pci_dev;
443 spin_lock_init(&sis_priv->lock);
444
445 pci_set_drvdata(pci_dev, net_dev);
446
447 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
448 if (!ring_space) {
449 ret = -ENOMEM;
450 goto err_out_cleardev;
451 }
452 sis_priv->tx_ring = (BufferDesc *)ring_space;
453 sis_priv->tx_ring_dma = ring_dma;
454
455 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
456 if (!ring_space) {
457 ret = -ENOMEM;
458 goto err_unmap_tx;
459 }
460 sis_priv->rx_ring = (BufferDesc *)ring_space;
461 sis_priv->rx_ring_dma = ring_dma;
6aa20a22 462
1da177e4
LT
463 /* The SiS900-specific entries in the device structure. */
464 net_dev->open = &sis900_open;
465 net_dev->hard_start_xmit = &sis900_start_xmit;
466 net_dev->stop = &sis900_close;
1da177e4
LT
467 net_dev->set_config = &sis900_set_config;
468 net_dev->set_multicast_list = &set_rx_mode;
469 net_dev->do_ioctl = &mii_ioctl;
470 net_dev->tx_timeout = sis900_tx_timeout;
471 net_dev->watchdog_timeo = TX_TIMEOUT;
472 net_dev->ethtool_ops = &sis900_ethtool_ops;
473
474#ifdef CONFIG_NET_POLL_CONTROLLER
475 net_dev->poll_controller = &sis900_poll;
476#endif
477
478 if (sis900_debug > 0)
479 sis_priv->msg_enable = sis900_debug;
480 else
481 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV
482
483 sis_priv->mii_info.dev = net_dev;
484 sis_priv->mii_info.mdio_read = mdio_read;
485 sis_priv->mii_info.mdio_write = mdio_write;
486 sis_priv->mii_info.phy_id_mask = 0x1f;
487 sis_priv->mii_info.reg_num_mask = 0x1f;
488
1da177e4
LT
489 /* Get Mac address according to the chip revision */
490 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
491 if(netif_msg_probe(sis_priv))
492 printk(KERN_DEBUG "%s: detected revision %2.2x, "
493 "trying to get MAC address...\n",
494 dev_name, sis_priv->chipset_rev);
6aa20a22 495
1da177e4
LT
496 ret = 0;
497 if (sis_priv->chipset_rev == SIS630E_900_REV)
498 ret = sis630e_get_mac_addr(pci_dev, net_dev);
499 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
500 ret = sis635_get_mac_addr(pci_dev, net_dev);
501 else if (sis_priv->chipset_rev == SIS96x_900_REV)
502 ret = sis96x_get_mac_addr(pci_dev, net_dev);
503 else
504 ret = sis900_get_mac_addr(pci_dev, net_dev);
505
506 if (ret == 0) {
507 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
508 ret = -ENODEV;
509 goto err_unmap_rx;
510 }
6aa20a22 511
1da177e4
LT
512 /* 630ET : set the mii access mode as software-mode */
513 if (sis_priv->chipset_rev == SIS630ET_900_REV)
514 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
515
516 /* probe for mii transceiver */
517 if (sis900_mii_probe(net_dev) == 0) {
518 printk(KERN_WARNING "%s: Error probing MII device.\n",
519 dev_name);
520 ret = -ENODEV;
521 goto err_unmap_rx;
522 }
523
524 /* save our host bridge revision */
525 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
526 if (dev) {
527 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
528 pci_dev_put(dev);
529 }
530
531 ret = register_netdev(net_dev);
532 if (ret)
533 goto err_unmap_rx;
534
535 /* print some information about our NIC */
e174961c 536 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",
0795af57 537 net_dev->name, card_name, ioaddr, net_dev->irq,
e174961c 538 net_dev->dev_addr);
1da177e4 539
ea37ccea 540 /* Detect Wake on Lan support */
7bef4b39 541 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV
542 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
543 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
544
1da177e4
LT
545 return 0;
546
547 err_unmap_rx:
548 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
549 sis_priv->rx_ring_dma);
550 err_unmap_tx:
551 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
552 sis_priv->tx_ring_dma);
553 err_out_cleardev:
554 pci_set_drvdata(pci_dev, NULL);
555 pci_release_regions(pci_dev);
556 err_out:
557 free_netdev(net_dev);
558 return ret;
559}
560
561/**
562 * sis900_mii_probe - Probe MII PHY for sis900
563 * @net_dev: the net device to probe for
6aa20a22 564 *
1da177e4
LT
565 * Search for total of 32 possible mii phy addresses.
566 * Identify and set current phy if found one,
567 * return error if it failed to found.
568 */
569
4e50a8e3 570static int __devinit sis900_mii_probe(struct net_device * net_dev)
1da177e4
LT
571{
572 struct sis900_private * sis_priv = net_dev->priv;
573 const char *dev_name = pci_name(sis_priv->pci_dev);
574 u16 poll_bit = MII_STAT_LINK, status = 0;
575 unsigned long timeout = jiffies + 5 * HZ;
576 int phy_addr;
577
578 sis_priv->mii = NULL;
579
580 /* search for total of 32 possible mii phy addresses */
6aa20a22 581 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
1da177e4
LT
582 struct mii_phy * mii_phy = NULL;
583 u16 mii_status;
584 int i;
585
586 mii_phy = NULL;
587 for(i = 0; i < 2; i++)
588 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
589
590 if (mii_status == 0xffff || mii_status == 0x0000) {
591 if (netif_msg_probe(sis_priv))
592 printk(KERN_DEBUG "%s: MII at address %d"
593 " not accessible\n",
594 dev_name, phy_addr);
595 continue;
596 }
6aa20a22 597
1da177e4
LT
598 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
599 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
600 mii_phy = sis_priv->first_mii;
601 while (mii_phy) {
602 struct mii_phy *phy;
603 phy = mii_phy;
604 mii_phy = mii_phy->next;
605 kfree(phy);
606 }
607 return 0;
608 }
6aa20a22 609
1da177e4 610 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
6aa20a22 611 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
1da177e4
LT
612 mii_phy->phy_addr = phy_addr;
613 mii_phy->status = mii_status;
614 mii_phy->next = sis_priv->mii;
615 sis_priv->mii = mii_phy;
616 sis_priv->first_mii = mii_phy;
617
618 for (i = 0; mii_chip_table[i].phy_id1; i++)
619 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
620 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
621 mii_phy->phy_types = mii_chip_table[i].phy_types;
622 if (mii_chip_table[i].phy_types == MIX)
623 mii_phy->phy_types =
624 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
625 printk(KERN_INFO "%s: %s transceiver found "
626 "at address %d.\n",
627 dev_name,
628 mii_chip_table[i].name,
629 phy_addr);
630 break;
631 }
6aa20a22 632
1da177e4
LT
633 if( !mii_chip_table[i].phy_id1 ) {
634 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
635 dev_name, phy_addr);
636 mii_phy->phy_types = UNKNOWN;
637 }
638 }
6aa20a22 639
1da177e4
LT
640 if (sis_priv->mii == NULL) {
641 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
642 return 0;
643 }
644
645 /* select default PHY for mac */
646 sis_priv->mii = NULL;
647 sis900_default_phy( net_dev );
648
649 /* Reset phy if default phy is internal sis900 */
650 if ((sis_priv->mii->phy_id0 == 0x001D) &&
651 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
652 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 653
1da177e4
LT
654 /* workaround for ICS1893 PHY */
655 if ((sis_priv->mii->phy_id0 == 0x0015) &&
656 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
657 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
658
659 if(status & MII_STAT_LINK){
660 while (poll_bit) {
661 yield();
662
663 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
664 if (time_after_eq(jiffies, timeout)) {
665 printk(KERN_WARNING "%s: reset phy and link down now\n",
666 dev_name);
667 return -ETIME;
668 }
669 }
670 }
671
672 if (sis_priv->chipset_rev == SIS630E_900_REV) {
673 /* SiS 630E has some bugs on default value of PHY registers */
674 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
675 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
676 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
677 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
6aa20a22 678 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
1da177e4
LT
679 }
680
681 if (sis_priv->mii->status & MII_STAT_LINK)
682 netif_carrier_on(net_dev);
683 else
684 netif_carrier_off(net_dev);
685
686 return 1;
687}
688
689/**
690 * sis900_default_phy - Select default PHY for sis900 mac.
691 * @net_dev: the net device to probe for
692 *
693 * Select first detected PHY with link as default.
694 * If no one is link on, select PHY whose types is HOME as default.
695 * If HOME doesn't exist, select LAN.
696 */
697
698static u16 sis900_default_phy(struct net_device * net_dev)
699{
700 struct sis900_private * sis_priv = net_dev->priv;
6aa20a22 701 struct mii_phy *phy = NULL, *phy_home = NULL,
1da177e4
LT
702 *default_phy = NULL, *phy_lan = NULL;
703 u16 status;
704
705 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
706 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
707 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
708
709 /* Link ON & Not select default PHY & not ghost PHY */
710 if ((status & MII_STAT_LINK) && !default_phy &&
711 (phy->phy_types != UNKNOWN))
712 default_phy = phy;
713 else {
714 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
715 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
716 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
717 if (phy->phy_types == HOME)
718 phy_home = phy;
719 else if(phy->phy_types == LAN)
720 phy_lan = phy;
721 }
722 }
723
724 if (!default_phy && phy_home)
725 default_phy = phy_home;
726 else if (!default_phy && phy_lan)
727 default_phy = phy_lan;
728 else if (!default_phy)
729 default_phy = sis_priv->first_mii;
730
731 if (sis_priv->mii != default_phy) {
732 sis_priv->mii = default_phy;
733 sis_priv->cur_phy = default_phy->phy_addr;
734 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
735 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
736 }
6aa20a22 737
da369b01
DV
738 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
739
1da177e4
LT
740 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
741 status &= (~MII_CNTL_ISOLATE);
742
6aa20a22 743 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
1da177e4
LT
744 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
745 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
746
6aa20a22 747 return status;
1da177e4
LT
748}
749
750
751/**
752 * sis900_set_capability - set the media capability of network adapter.
753 * @net_dev : the net device to probe for
754 * @phy : default PHY
755 *
756 * Set the media capability of network adapter according to
757 * mii status register. It's necessary before auto-negotiate.
758 */
6aa20a22 759
1da177e4
LT
760static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
761{
762 u16 cap;
763 u16 status;
6aa20a22 764
1da177e4
LT
765 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
766 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
6aa20a22 767
1da177e4
LT
768 cap = MII_NWAY_CSMA_CD |
769 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
770 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
771 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
772 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
773
774 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
775}
776
777
778/* Delay between EEPROM clock transitions. */
779#define eeprom_delay() inl(ee_addr)
780
781/**
782 * read_eeprom - Read Serial EEPROM
783 * @ioaddr: base i/o address
784 * @location: the EEPROM location to read
785 *
786 * Read Serial EEPROM through EEPROM Access Register.
787 * Note that location is in word (16 bits) unit
788 */
789
790static u16 __devinit read_eeprom(long ioaddr, int location)
791{
792 int i;
793 u16 retval = 0;
794 long ee_addr = ioaddr + mear;
795 u32 read_cmd = location | EEread;
796
797 outl(0, ee_addr);
798 eeprom_delay();
799 outl(EECS, ee_addr);
800 eeprom_delay();
801
802 /* Shift the read command (9) bits out. */
803 for (i = 8; i >= 0; i--) {
804 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
805 outl(dataval, ee_addr);
806 eeprom_delay();
807 outl(dataval | EECLK, ee_addr);
808 eeprom_delay();
809 }
810 outl(EECS, ee_addr);
811 eeprom_delay();
812
813 /* read the 16-bits data in */
814 for (i = 16; i > 0; i--) {
815 outl(EECS, ee_addr);
816 eeprom_delay();
817 outl(EECS | EECLK, ee_addr);
818 eeprom_delay();
819 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
820 eeprom_delay();
821 }
822
823 /* Terminate the EEPROM access. */
824 outl(0, ee_addr);
825 eeprom_delay();
826
827 return (retval);
828}
829
830/* Read and write the MII management registers using software-generated
831 serial MDIO protocol. Note that the command bits and data bits are
832 send out separately */
833#define mdio_delay() inl(mdio_addr)
834
835static void mdio_idle(long mdio_addr)
836{
837 outl(MDIO | MDDIR, mdio_addr);
838 mdio_delay();
839 outl(MDIO | MDDIR | MDC, mdio_addr);
840}
841
842/* Syncronize the MII management interface by shifting 32 one bits out. */
843static void mdio_reset(long mdio_addr)
844{
845 int i;
846
847 for (i = 31; i >= 0; i--) {
848 outl(MDDIR | MDIO, mdio_addr);
849 mdio_delay();
850 outl(MDDIR | MDIO | MDC, mdio_addr);
851 mdio_delay();
852 }
853 return;
854}
855
856/**
857 * mdio_read - read MII PHY register
858 * @net_dev: the net device to read
859 * @phy_id: the phy address to read
860 * @location: the phy regiester id to read
861 *
862 * Read MII registers through MDIO and MDC
863 * using MDIO management frame structure and protocol(defined by ISO/IEC).
864 * Please see SiS7014 or ICS spec
865 */
866
da369b01 867static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT
868{
869 long mdio_addr = net_dev->base_addr + mear;
870 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
871 u16 retval = 0;
872 int i;
873
874 mdio_reset(mdio_addr);
875 mdio_idle(mdio_addr);
876
877 for (i = 15; i >= 0; i--) {
878 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
879 outl(dataval, mdio_addr);
880 mdio_delay();
881 outl(dataval | MDC, mdio_addr);
882 mdio_delay();
883 }
884
885 /* Read the 16 data bits. */
886 for (i = 16; i > 0; i--) {
887 outl(0, mdio_addr);
888 mdio_delay();
889 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
890 outl(MDC, mdio_addr);
891 mdio_delay();
892 }
893 outl(0x00, mdio_addr);
894
895 return retval;
896}
897
898/**
899 * mdio_write - write MII PHY register
900 * @net_dev: the net device to write
901 * @phy_id: the phy address to write
902 * @location: the phy regiester id to write
903 * @value: the register value to write with
904 *
905 * Write MII registers with @value through MDIO and MDC
906 * using MDIO management frame structure and protocol(defined by ISO/IEC)
907 * please see SiS7014 or ICS spec
908 */
909
910static void mdio_write(struct net_device *net_dev, int phy_id, int location,
911 int value)
912{
913 long mdio_addr = net_dev->base_addr + mear;
914 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
915 int i;
916
917 mdio_reset(mdio_addr);
918 mdio_idle(mdio_addr);
919
920 /* Shift the command bits out. */
921 for (i = 15; i >= 0; i--) {
922 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
923 outb(dataval, mdio_addr);
924 mdio_delay();
925 outb(dataval | MDC, mdio_addr);
926 mdio_delay();
927 }
928 mdio_delay();
929
930 /* Shift the value bits out. */
931 for (i = 15; i >= 0; i--) {
932 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
933 outl(dataval, mdio_addr);
934 mdio_delay();
935 outl(dataval | MDC, mdio_addr);
936 mdio_delay();
937 }
938 mdio_delay();
939
940 /* Clear out extra bits. */
941 for (i = 2; i > 0; i--) {
942 outb(0, mdio_addr);
943 mdio_delay();
944 outb(MDC, mdio_addr);
945 mdio_delay();
946 }
947 outl(0x00, mdio_addr);
948
949 return;
950}
951
952
953/**
954 * sis900_reset_phy - reset sis900 mii phy.
955 * @net_dev: the net device to write
956 * @phy_addr: default phy address
957 *
958 * Some specific phy can't work properly without reset.
959 * This function will be called during initialization and
960 * link status change from ON to DOWN.
961 */
962
963static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
964{
f3be9742 965 int i;
1da177e4
LT
966 u16 status;
967
f3be9742 968 for (i = 0; i < 2; i++)
1da177e4
LT
969 status = mdio_read(net_dev, phy_addr, MII_STATUS);
970
971 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
6aa20a22 972
1da177e4
LT
973 return status;
974}
975
976#ifdef CONFIG_NET_POLL_CONTROLLER
977/*
978 * Polling 'interrupt' - used by things like netconsole to send skbs
979 * without having to re-enable interrupts. It's not called while
980 * the interrupt routine is executing.
981*/
982static void sis900_poll(struct net_device *dev)
983{
984 disable_irq(dev->irq);
7d12e780 985 sis900_interrupt(dev->irq, dev);
1da177e4
LT
986 enable_irq(dev->irq);
987}
988#endif
989
990/**
991 * sis900_open - open sis900 device
992 * @net_dev: the net device to open
993 *
994 * Do some initialization and start net interface.
995 * enable interrupts and set sis900 timer.
996 */
997
998static int
999sis900_open(struct net_device *net_dev)
1000{
1001 struct sis900_private *sis_priv = net_dev->priv;
1002 long ioaddr = net_dev->base_addr;
1003 int ret;
1004
1005 /* Soft reset the chip. */
1006 sis900_reset(net_dev);
1007
1008 /* Equalizer workaround Rule */
1009 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1010
1fb9df5d 1011 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1da177e4
LT
1012 net_dev->name, net_dev);
1013 if (ret)
1014 return ret;
1015
1016 sis900_init_rxfilter(net_dev);
1017
1018 sis900_init_tx_ring(net_dev);
1019 sis900_init_rx_ring(net_dev);
1020
1021 set_rx_mode(net_dev);
1022
1023 netif_start_queue(net_dev);
1024
1025 /* Workaround for EDB */
1026 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1027
1028 /* Enable all known interrupts by setting the interrupt mask. */
1029 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1030 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1031 outl(IE, ioaddr + ier);
1032
1033 sis900_check_mode(net_dev, sis_priv->mii);
1034
1035 /* Set the timer to switch to check for link beat and perhaps switch
1036 to an alternate media type. */
1037 init_timer(&sis_priv->timer);
1038 sis_priv->timer.expires = jiffies + HZ;
1039 sis_priv->timer.data = (unsigned long)net_dev;
1040 sis_priv->timer.function = &sis900_timer;
1041 add_timer(&sis_priv->timer);
1042
1043 return 0;
1044}
1045
1046/**
1047 * sis900_init_rxfilter - Initialize the Rx filter
1048 * @net_dev: the net device to initialize for
1049 *
1050 * Set receive filter address to our MAC address
1051 * and enable packet filtering.
1052 */
1053
1054static void
1055sis900_init_rxfilter (struct net_device * net_dev)
1056{
1057 struct sis900_private *sis_priv = net_dev->priv;
1058 long ioaddr = net_dev->base_addr;
1059 u32 rfcrSave;
1060 u32 i;
1061
1062 rfcrSave = inl(rfcr + ioaddr);
1063
1064 /* disable packet filtering before setting filter */
1065 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1066
1067 /* load MAC addr to filter data register */
1068 for (i = 0 ; i < 3 ; i++) {
1069 u32 w;
1070
1071 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1072 outl((i << RFADDR_shift), ioaddr + rfcr);
1073 outl(w, ioaddr + rfdr);
1074
1075 if (netif_msg_hw(sis_priv)) {
1076 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1077 net_dev->name, i, inl(ioaddr + rfdr));
1078 }
1079 }
1080
1081 /* enable packet filtering */
1082 outl(rfcrSave | RFEN, rfcr + ioaddr);
1083}
1084
1085/**
1086 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1087 * @net_dev: the net device to initialize for
1088 *
6aa20a22 1089 * Initialize the Tx descriptor ring,
1da177e4
LT
1090 */
1091
1092static void
1093sis900_init_tx_ring(struct net_device *net_dev)
1094{
1095 struct sis900_private *sis_priv = net_dev->priv;
1096 long ioaddr = net_dev->base_addr;
1097 int i;
1098
1099 sis_priv->tx_full = 0;
1100 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1101
1102 for (i = 0; i < NUM_TX_DESC; i++) {
1103 sis_priv->tx_skbuff[i] = NULL;
1104
1105 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1106 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1107 sis_priv->tx_ring[i].cmdsts = 0;
1108 sis_priv->tx_ring[i].bufptr = 0;
1109 }
1110
1111 /* load Transmit Descriptor Register */
1112 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1113 if (netif_msg_hw(sis_priv))
1114 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1115 net_dev->name, inl(ioaddr + txdp));
1116}
1117
1118/**
1119 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1120 * @net_dev: the net device to initialize for
1121 *
6aa20a22 1122 * Initialize the Rx descriptor ring,
1da177e4
LT
1123 * and pre-allocate recevie buffers (socket buffer)
1124 */
1125
6aa20a22 1126static void
1da177e4
LT
1127sis900_init_rx_ring(struct net_device *net_dev)
1128{
1129 struct sis900_private *sis_priv = net_dev->priv;
1130 long ioaddr = net_dev->base_addr;
1131 int i;
1132
1133 sis_priv->cur_rx = 0;
1134 sis_priv->dirty_rx = 0;
1135
1136 /* init RX descriptor */
1137 for (i = 0; i < NUM_RX_DESC; i++) {
1138 sis_priv->rx_skbuff[i] = NULL;
1139
1140 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1141 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1142 sis_priv->rx_ring[i].cmdsts = 0;
1143 sis_priv->rx_ring[i].bufptr = 0;
1144 }
1145
1146 /* allocate sock buffers */
1147 for (i = 0; i < NUM_RX_DESC; i++) {
1148 struct sk_buff *skb;
1149
1150 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1151 /* not enough memory for skbuff, this makes a "hole"
1152 on the buffer ring, it is not clear how the
1153 hardware will react to this kind of degenerated
1154 buffer */
1155 break;
1156 }
1da177e4
LT
1157 sis_priv->rx_skbuff[i] = skb;
1158 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1159 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1160 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1161 }
1162 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1163
1164 /* load Receive Descriptor Register */
1165 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1166 if (netif_msg_hw(sis_priv))
1167 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1168 net_dev->name, inl(ioaddr + rxdp));
1169}
1170
1171/**
1172 * sis630_set_eq - set phy equalizer value for 630 LAN
1173 * @net_dev: the net device to set equalizer value
1174 * @revision: 630 LAN revision number
1175 *
1176 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1177 * PHY register 14h(Test)
1178 * Bit 14: 0 -- Automatically dectect (default)
1179 * 1 -- Manually set Equalizer filter
1180 * Bit 13: 0 -- (Default)
1181 * 1 -- Speed up convergence of equalizer setting
1182 * Bit 9 : 0 -- (Default)
1183 * 1 -- Disable Baseline Wander
1184 * Bit 3~7 -- Equalizer filter setting
1185 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1186 * Then calculate equalizer value
1187 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1188 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1189 * Calculate Equalizer value:
1190 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1191 * When the equalizer is stable, this value is not a fixed value. It will be within
1192 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1193 * 0 <= max <= 4 --> set equalizer to max
1194 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1195 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1196 */
1197
1198static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1199{
1200 struct sis900_private *sis_priv = net_dev->priv;
1201 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1202 int i, maxcount=10;
1203
1204 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1205 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1206 return;
1207
1208 if (netif_carrier_ok(net_dev)) {
1209 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1210 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1211 (0x2200 | reg14h) & 0xBFFF);
1212 for (i=0; i < maxcount; i++) {
1213 eq_value = (0x00F8 & mdio_read(net_dev,
1214 sis_priv->cur_phy, MII_RESV)) >> 3;
1215 if (i == 0)
1216 max_value=min_value=eq_value;
1217 max_value = (eq_value > max_value) ?
1218 eq_value : max_value;
1219 min_value = (eq_value < min_value) ?
1220 eq_value : min_value;
1221 }
1222 /* 630E rule to determine the equalizer value */
1223 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1224 revision == SIS630ET_900_REV) {
1225 if (max_value < 5)
1226 eq_value = max_value;
1227 else if (max_value >= 5 && max_value < 15)
1228 eq_value = (max_value == min_value) ?
1229 max_value+2 : max_value+1;
1230 else if (max_value >= 15)
1231 eq_value=(max_value == min_value) ?
1232 max_value+6 : max_value+5;
1233 }
1234 /* 630B0&B1 rule to determine the equalizer value */
6aa20a22
JG
1235 if (revision == SIS630A_900_REV &&
1236 (sis_priv->host_bridge_rev == SIS630B0 ||
1da177e4
LT
1237 sis_priv->host_bridge_rev == SIS630B1)) {
1238 if (max_value == 0)
1239 eq_value = 3;
1240 else
1241 eq_value = (max_value + min_value + 1)/2;
1242 }
1243 /* write equalizer value and setting */
1244 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1245 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1246 reg14h = (reg14h | 0x6000) & 0xFDFF;
1247 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1248 } else {
1249 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
6aa20a22
JG
1250 if (revision == SIS630A_900_REV &&
1251 (sis_priv->host_bridge_rev == SIS630B0 ||
1252 sis_priv->host_bridge_rev == SIS630B1))
1da177e4
LT
1253 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1254 (reg14h | 0x2200) & 0xBFFF);
1255 else
1256 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1257 (reg14h | 0x2000) & 0xBFFF);
1258 }
1259 return;
1260}
1261
1262/**
1263 * sis900_timer - sis900 timer routine
1264 * @data: pointer to sis900 net device
1265 *
6aa20a22 1266 * On each timer ticks we check two things,
1da177e4
LT
1267 * link status (ON/OFF) and link mode (10/100/Full/Half)
1268 */
1269
1270static void sis900_timer(unsigned long data)
1271{
1272 struct net_device *net_dev = (struct net_device *)data;
1273 struct sis900_private *sis_priv = net_dev->priv;
1274 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1275 static const int next_tick = 5*HZ;
1da177e4
LT
1276 u16 status;
1277
1278 if (!sis_priv->autong_complete){
1279 int speed, duplex = 0;
1280
1281 sis900_read_mode(net_dev, &speed, &duplex);
1282 if (duplex){
1283 sis900_set_mode(net_dev->base_addr, speed, duplex);
1284 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1285 netif_start_queue(net_dev);
1286 }
1287
1288 sis_priv->timer.expires = jiffies + HZ;
1289 add_timer(&sis_priv->timer);
1290 return;
1291 }
1292
1293 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1294 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1295
1296 /* Link OFF -> ON */
1297 if (!netif_carrier_ok(net_dev)) {
1298 LookForLink:
1299 /* Search for new PHY */
1300 status = sis900_default_phy(net_dev);
1301 mii_phy = sis_priv->mii;
1302
1303 if (status & MII_STAT_LINK){
1304 sis900_check_mode(net_dev, mii_phy);
1305 netif_carrier_on(net_dev);
1306 }
1307 } else {
1308 /* Link ON -> OFF */
1309 if (!(status & MII_STAT_LINK)){
1310 netif_carrier_off(net_dev);
1311 if(netif_msg_link(sis_priv))
1312 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1313
1314 /* Change mode issue */
6aa20a22 1315 if ((mii_phy->phy_id0 == 0x001D) &&
1da177e4
LT
1316 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1317 sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 1318
1da177e4 1319 sis630_set_eq(net_dev, sis_priv->chipset_rev);
6aa20a22 1320
1da177e4
LT
1321 goto LookForLink;
1322 }
1323 }
1324
1325 sis_priv->timer.expires = jiffies + next_tick;
1326 add_timer(&sis_priv->timer);
1327}
1328
1329/**
1330 * sis900_check_mode - check the media mode for sis900
1331 * @net_dev: the net device to be checked
1332 * @mii_phy: the mii phy
1333 *
1334 * Older driver gets the media mode from mii status output
1335 * register. Now we set our media capability and auto-negotiate
1336 * to get the upper bound of speed and duplex between two ends.
1337 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1338 * and autong_complete should be set to 1.
1339 */
1340
1341static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1342{
1343 struct sis900_private *sis_priv = net_dev->priv;
1344 long ioaddr = net_dev->base_addr;
1345 int speed, duplex;
1346
1347 if (mii_phy->phy_types == LAN) {
1348 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1349 sis900_set_capability(net_dev , mii_phy);
1350 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1351 } else {
1352 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1353 speed = HW_SPEED_HOME;
1354 duplex = FDX_CAPABLE_HALF_SELECTED;
1355 sis900_set_mode(ioaddr, speed, duplex);
1356 sis_priv->autong_complete = 1;
1357 }
1358}
1359
1360/**
1361 * sis900_set_mode - Set the media mode of mac register.
1362 * @ioaddr: the address of the device
1363 * @speed : the transmit speed to be determined
1364 * @duplex: the duplex mode to be determined
1365 *
1366 * Set the media mode of mac register txcfg/rxcfg according to
1367 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1368 * bus is used instead of PCI bus. When this bit is set 1, the
1369 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1370 * double words.
1371 */
1372
1373static void sis900_set_mode (long ioaddr, int speed, int duplex)
1374{
1375 u32 tx_flags = 0, rx_flags = 0;
1376
1377 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1378 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1379 (TX_FILL_THRESH << TxFILLT_shift);
1380 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1381 } else {
1382 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1383 (TX_FILL_THRESH << TxFILLT_shift);
1384 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1385 }
1386
1387 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1388 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1389 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1390 } else {
1391 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1392 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1393 }
1394
1395 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1396 tx_flags |= (TxCSI | TxHBI);
1397 rx_flags |= RxATX;
1398 }
1399
d269a69f
DV
1400#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1401 /* Can accept Jumbo packet */
1402 rx_flags |= RxAJAB;
1403#endif
1404
1da177e4
LT
1405 outl (tx_flags, ioaddr + txcfg);
1406 outl (rx_flags, ioaddr + rxcfg);
1407}
1408
1409/**
1410 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1411 * @net_dev: the net device to read mode for
1412 * @phy_addr: mii phy address
1413 *
1414 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1415 * autong_complete should be set to 0 when starting auto-negotiation.
1416 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1417 * sis900_timer will wait for link on again if autong_complete = 0.
1418 */
1419
1420static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1421{
1422 struct sis900_private *sis_priv = net_dev->priv;
1423 int i = 0;
1424 u32 status;
6aa20a22 1425
f3be9742 1426 for (i = 0; i < 2; i++)
1da177e4
LT
1427 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1428
1429 if (!(status & MII_STAT_LINK)){
1430 if(netif_msg_link(sis_priv))
1431 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1432 sis_priv->autong_complete = 1;
1433 netif_carrier_off(net_dev);
1434 return;
1435 }
1436
1437 /* (Re)start AutoNegotiate */
1438 mdio_write(net_dev, phy_addr, MII_CONTROL,
1439 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1440 sis_priv->autong_complete = 0;
1441}
1442
1443
1444/**
1445 * sis900_read_mode - read media mode for sis900 internal phy
1446 * @net_dev: the net device to read mode for
1447 * @speed : the transmit speed to be determined
1448 * @duplex : the duplex mode to be determined
1449 *
1450 * The capability of remote end will be put in mii register autorec
1451 * after auto-negotiation. Use AND operation to get the upper bound
1452 * of speed and duplex between two ends.
1453 */
1454
1455static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1456{
1457 struct sis900_private *sis_priv = net_dev->priv;
1458 struct mii_phy *phy = sis_priv->mii;
1459 int phy_addr = sis_priv->cur_phy;
1460 u32 status;
1461 u16 autoadv, autorec;
f3be9742 1462 int i;
1da177e4 1463
f3be9742 1464 for (i = 0; i < 2; i++)
1da177e4
LT
1465 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1466
1467 if (!(status & MII_STAT_LINK))
1468 return;
1469
1470 /* AutoNegotiate completed */
1471 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1472 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1473 status = autoadv & autorec;
6aa20a22 1474
1da177e4
LT
1475 *speed = HW_SPEED_10_MBPS;
1476 *duplex = FDX_CAPABLE_HALF_SELECTED;
1477
1478 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1479 *speed = HW_SPEED_100_MBPS;
1480 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1481 *duplex = FDX_CAPABLE_FULL_SELECTED;
6aa20a22 1482
1da177e4
LT
1483 sis_priv->autong_complete = 1;
1484
1485 /* Workaround for Realtek RTL8201 PHY issue */
1486 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1487 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1488 *duplex = FDX_CAPABLE_FULL_SELECTED;
1489 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1490 *speed = HW_SPEED_100_MBPS;
1491 }
1492
1493 if(netif_msg_link(sis_priv))
1494 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1495 net_dev->name,
1496 *speed == HW_SPEED_100_MBPS ?
1497 "100mbps" : "10mbps",
1498 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1499 "full" : "half");
1500}
1501
1502/**
1503 * sis900_tx_timeout - sis900 transmit timeout routine
1504 * @net_dev: the net device to transmit
1505 *
1506 * print transmit timeout status
1507 * disable interrupts and do some tasks
1508 */
1509
1510static void sis900_tx_timeout(struct net_device *net_dev)
1511{
1512 struct sis900_private *sis_priv = net_dev->priv;
1513 long ioaddr = net_dev->base_addr;
1514 unsigned long flags;
1515 int i;
1516
1517 if(netif_msg_tx_err(sis_priv))
1518 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1519 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1520
1521 /* Disable interrupts by clearing the interrupt mask. */
1522 outl(0x0000, ioaddr + imr);
1523
1524 /* use spinlock to prevent interrupt handler accessing buffer ring */
1525 spin_lock_irqsave(&sis_priv->lock, flags);
1526
1527 /* discard unsent packets */
1528 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1529 for (i = 0; i < NUM_TX_DESC; i++) {
1530 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1531
1532 if (skb) {
6aa20a22 1533 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1534 sis_priv->tx_ring[i].bufptr, skb->len,
1535 PCI_DMA_TODEVICE);
1536 dev_kfree_skb_irq(skb);
1537 sis_priv->tx_skbuff[i] = NULL;
1538 sis_priv->tx_ring[i].cmdsts = 0;
1539 sis_priv->tx_ring[i].bufptr = 0;
09f75cd7 1540 net_dev->stats.tx_dropped++;
1da177e4
LT
1541 }
1542 }
1543 sis_priv->tx_full = 0;
1544 netif_wake_queue(net_dev);
1545
1546 spin_unlock_irqrestore(&sis_priv->lock, flags);
1547
1548 net_dev->trans_start = jiffies;
1549
1550 /* load Transmit Descriptor Register */
1551 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1552
1553 /* Enable all known interrupts by setting the interrupt mask. */
1554 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1555 return;
1556}
1557
1558/**
1559 * sis900_start_xmit - sis900 start transmit routine
1560 * @skb: socket buffer pointer to put the data being transmitted
1561 * @net_dev: the net device to transmit with
1562 *
6aa20a22 1563 * Set the transmit buffer descriptor,
1da177e4
LT
1564 * and write TxENA to enable transmit state machine.
1565 * tell upper layer if the buffer is full
1566 */
1567
1568static int
1569sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1570{
1571 struct sis900_private *sis_priv = net_dev->priv;
1572 long ioaddr = net_dev->base_addr;
1573 unsigned int entry;
1574 unsigned long flags;
1575 unsigned int index_cur_tx, index_dirty_tx;
1576 unsigned int count_dirty_tx;
1577
1578 /* Don't transmit data before the complete of auto-negotiation */
1579 if(!sis_priv->autong_complete){
1580 netif_stop_queue(net_dev);
1581 return 1;
1582 }
1583
1584 spin_lock_irqsave(&sis_priv->lock, flags);
1585
1586 /* Calculate the next Tx descriptor entry. */
1587 entry = sis_priv->cur_tx % NUM_TX_DESC;
1588 sis_priv->tx_skbuff[entry] = skb;
1589
1590 /* set the transmit buffer descriptor and enable Transmit State Machine */
1591 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1592 skb->data, skb->len, PCI_DMA_TODEVICE);
1593 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1594 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1595
1596 sis_priv->cur_tx ++;
1597 index_cur_tx = sis_priv->cur_tx;
1598 index_dirty_tx = sis_priv->dirty_tx;
1599
1600 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1601 count_dirty_tx ++;
1602
1603 if (index_cur_tx == index_dirty_tx) {
1604 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1605 sis_priv->tx_full = 1;
1606 netif_stop_queue(net_dev);
6aa20a22 1607 } else if (count_dirty_tx < NUM_TX_DESC) {
1da177e4
LT
1608 /* Typical path, tell upper layer that more transmission is possible */
1609 netif_start_queue(net_dev);
1610 } else {
1611 /* buffer full, tell upper layer no more transmission */
1612 sis_priv->tx_full = 1;
1613 netif_stop_queue(net_dev);
1614 }
1615
1616 spin_unlock_irqrestore(&sis_priv->lock, flags);
1617
1618 net_dev->trans_start = jiffies;
1619
1620 if (netif_msg_tx_queued(sis_priv))
1621 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1622 "to slot %d.\n",
1623 net_dev->name, skb->data, (int)skb->len, entry);
1624
1625 return 0;
1626}
1627
1628/**
1629 * sis900_interrupt - sis900 interrupt handler
1630 * @irq: the irq number
1631 * @dev_instance: the client data object
1632 * @regs: snapshot of processor context
1633 *
6aa20a22 1634 * The interrupt handler does all of the Rx thread work,
1da177e4
LT
1635 * and cleans up after the Tx thread
1636 */
1637
7d12e780 1638static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1da177e4
LT
1639{
1640 struct net_device *net_dev = dev_instance;
1641 struct sis900_private *sis_priv = net_dev->priv;
1642 int boguscnt = max_interrupt_work;
1643 long ioaddr = net_dev->base_addr;
1644 u32 status;
1645 unsigned int handled = 0;
1646
1647 spin_lock (&sis_priv->lock);
1648
1649 do {
1650 status = inl(ioaddr + isr);
1651
1652 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1653 /* nothing intresting happened */
1654 break;
1655 handled = 1;
1656
1657 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1658 if (status & (RxORN | RxERR | RxOK))
1659 /* Rx interrupt */
1660 sis900_rx(net_dev);
1661
1662 if (status & (TxURN | TxERR | TxIDLE))
1663 /* Tx interrupt */
1664 sis900_finish_xmit(net_dev);
1665
1666 /* something strange happened !!! */
1667 if (status & HIBERR) {
1668 if(netif_msg_intr(sis_priv))
2450022a 1669 printk(KERN_INFO "%s: Abnormal interrupt, "
1da177e4
LT
1670 "status %#8.8x.\n", net_dev->name, status);
1671 break;
1672 }
1673 if (--boguscnt < 0) {
1674 if(netif_msg_intr(sis_priv))
1675 printk(KERN_INFO "%s: Too much work at interrupt, "
1676 "interrupt status = %#8.8x.\n",
1677 net_dev->name, status);
1678 break;
1679 }
1680 } while (1);
1681
1682 if(netif_msg_intr(sis_priv))
1683 printk(KERN_DEBUG "%s: exiting interrupt, "
1684 "interrupt status = 0x%#8.8x.\n",
1685 net_dev->name, inl(ioaddr + isr));
6aa20a22 1686
1da177e4
LT
1687 spin_unlock (&sis_priv->lock);
1688 return IRQ_RETVAL(handled);
1689}
1690
1691/**
1692 * sis900_rx - sis900 receive routine
1693 * @net_dev: the net device which receives data
1694 *
6aa20a22 1695 * Process receive interrupt events,
1da177e4 1696 * put buffer to higher layer and refill buffer pool
0b28002f 1697 * Note: This function is called by interrupt handler,
1da177e4
LT
1698 * don't do "too much" work here
1699 */
1700
1701static int sis900_rx(struct net_device *net_dev)
1702{
1703 struct sis900_private *sis_priv = net_dev->priv;
1704 long ioaddr = net_dev->base_addr;
1705 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1706 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1707 int rx_work_limit;
1da177e4
LT
1708
1709 if (netif_msg_rx_status(sis_priv))
1710 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1711 "status:0x%8.8x\n",
1712 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1713 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT
1714
1715 while (rx_status & OWN) {
1716 unsigned int rx_size;
d269a69f 1717 unsigned int data_size;
1da177e4 1718
7380a78a
VA
1719 if (--rx_work_limit < 0)
1720 break;
1721
d269a69f
DV
1722 data_size = rx_status & DSIZE;
1723 rx_size = data_size - CRC_SIZE;
1724
1725#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1726 /* ``TOOLONG'' flag means jumbo packet recived. */
1727 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1728 rx_status &= (~ ((unsigned int)TOOLONG));
1729#endif
1da177e4
LT
1730
1731 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1732 /* corrupted packet received */
1733 if (netif_msg_rx_err(sis_priv))
1734 printk(KERN_DEBUG "%s: Corrupted packet "
d269a69f
DV
1735 "received, buffer status = 0x%8.8x/%d.\n",
1736 net_dev->name, rx_status, data_size);
09f75cd7 1737 net_dev->stats.rx_errors++;
1da177e4 1738 if (rx_status & OVERRUN)
09f75cd7 1739 net_dev->stats.rx_over_errors++;
1da177e4 1740 if (rx_status & (TOOLONG|RUNT))
09f75cd7 1741 net_dev->stats.rx_length_errors++;
1da177e4 1742 if (rx_status & (RXISERR | FAERR))
09f75cd7 1743 net_dev->stats.rx_frame_errors++;
6aa20a22 1744 if (rx_status & CRCERR)
09f75cd7 1745 net_dev->stats.rx_crc_errors++;
1da177e4
LT
1746 /* reset buffer descriptor state */
1747 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1748 } else {
1749 struct sk_buff * skb;
dc5a1449 1750 struct sk_buff * rx_skb;
1da177e4 1751
b748d9e3
NH
1752 pci_unmap_single(sis_priv->pci_dev,
1753 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1754 PCI_DMA_FROMDEVICE);
1755
1756 /* refill the Rx buffer, what if there is not enought
1757 * memory for new socket buffer ?? */
1758 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1759 /*
1760 * Not enough memory to refill the buffer
1761 * so we need to recycle the old one so
1762 * as to avoid creating a memory hole
1763 * in the rx ring
1764 */
1765 skb = sis_priv->rx_skbuff[entry];
09f75cd7 1766 net_dev->stats.rx_dropped++;
b748d9e3 1767 goto refill_rx_ring;
7d2e3cb7 1768 }
b748d9e3 1769
1da177e4
LT
1770 /* This situation should never happen, but due to
1771 some unknow bugs, it is possible that
1772 we are working on NULL sk_buff :-( */
1773 if (sis_priv->rx_skbuff[entry] == NULL) {
1774 if (netif_msg_rx_err(sis_priv))
6aa20a22 1775 printk(KERN_WARNING "%s: NULL pointer "
7380a78a
VA
1776 "encountered in Rx ring\n"
1777 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1778 net_dev->name, sis_priv->cur_rx,
1779 sis_priv->dirty_rx);
1da177e4
LT
1780 break;
1781 }
1782
1da177e4 1783 /* give the socket buffer to upper layers */
dc5a1449
NH
1784 rx_skb = sis_priv->rx_skbuff[entry];
1785 skb_put(rx_skb, rx_size);
1786 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1787 netif_rx(rx_skb);
1da177e4
LT
1788
1789 /* some network statistics */
1790 if ((rx_status & BCAST) == MCAST)
09f75cd7 1791 net_dev->stats.multicast++;
09f75cd7
JG
1792 net_dev->stats.rx_bytes += rx_size;
1793 net_dev->stats.rx_packets++;
b748d9e3
NH
1794 sis_priv->dirty_rx++;
1795refill_rx_ring:
1da177e4
LT
1796 sis_priv->rx_skbuff[entry] = skb;
1797 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
6aa20a22
JG
1798 sis_priv->rx_ring[entry].bufptr =
1799 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4 1800 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1801 }
1802 sis_priv->cur_rx++;
1803 entry = sis_priv->cur_rx % NUM_RX_DESC;
1804 rx_status = sis_priv->rx_ring[entry].cmdsts;
1805 } // while
1806
1807 /* refill the Rx buffer, what if the rate of refilling is slower
1808 * than consuming ?? */
7380a78a 1809 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT
1810 struct sk_buff *skb;
1811
1812 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1813
1814 if (sis_priv->rx_skbuff[entry] == NULL) {
1815 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1816 /* not enough memory for skbuff, this makes a
1817 * "hole" on the buffer ring, it is not clear
1818 * how the hardware will react to this kind
1819 * of degenerated buffer */
1820 if (netif_msg_rx_err(sis_priv))
2450022a 1821 printk(KERN_INFO "%s: Memory squeeze, "
1da177e4
LT
1822 "deferring packet.\n",
1823 net_dev->name);
09f75cd7 1824 net_dev->stats.rx_dropped++;
1da177e4
LT
1825 break;
1826 }
1da177e4
LT
1827 sis_priv->rx_skbuff[entry] = skb;
1828 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1829 sis_priv->rx_ring[entry].bufptr =
689be439 1830 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1831 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1832 }
1833 }
1834 /* re-enable the potentially idle receive state matchine */
1835 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1836
1837 return 0;
1838}
1839
1840/**
1841 * sis900_finish_xmit - finish up transmission of packets
1842 * @net_dev: the net device to be transmitted on
1843 *
6aa20a22 1844 * Check for error condition and free socket buffer etc
1da177e4 1845 * schedule for more transmission as needed
0b28002f 1846 * Note: This function is called by interrupt handler,
1da177e4
LT
1847 * don't do "too much" work here
1848 */
1849
1850static void sis900_finish_xmit (struct net_device *net_dev)
1851{
1852 struct sis900_private *sis_priv = net_dev->priv;
1853
1854 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1855 struct sk_buff *skb;
1856 unsigned int entry;
1857 u32 tx_status;
1858
1859 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1860 tx_status = sis_priv->tx_ring[entry].cmdsts;
1861
1862 if (tx_status & OWN) {
1863 /* The packet is not transmitted yet (owned by hardware) !
1864 * Note: the interrupt is generated only when Tx Machine
1865 * is idle, so this is an almost impossible case */
1866 break;
1867 }
1868
1869 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1870 /* packet unsuccessfully transmitted */
1871 if (netif_msg_tx_err(sis_priv))
1872 printk(KERN_DEBUG "%s: Transmit "
1873 "error, Tx status %8.8x.\n",
1874 net_dev->name, tx_status);
09f75cd7 1875 net_dev->stats.tx_errors++;
1da177e4 1876 if (tx_status & UNDERRUN)
09f75cd7 1877 net_dev->stats.tx_fifo_errors++;
1da177e4 1878 if (tx_status & ABORT)
09f75cd7 1879 net_dev->stats.tx_aborted_errors++;
1da177e4 1880 if (tx_status & NOCARRIER)
09f75cd7 1881 net_dev->stats.tx_carrier_errors++;
1da177e4 1882 if (tx_status & OWCOLL)
09f75cd7 1883 net_dev->stats.tx_window_errors++;
1da177e4
LT
1884 } else {
1885 /* packet successfully transmitted */
09f75cd7
JG
1886 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1887 net_dev->stats.tx_bytes += tx_status & DSIZE;
1888 net_dev->stats.tx_packets++;
1da177e4
LT
1889 }
1890 /* Free the original skb. */
1891 skb = sis_priv->tx_skbuff[entry];
6aa20a22 1892 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1893 sis_priv->tx_ring[entry].bufptr, skb->len,
1894 PCI_DMA_TODEVICE);
1895 dev_kfree_skb_irq(skb);
1896 sis_priv->tx_skbuff[entry] = NULL;
1897 sis_priv->tx_ring[entry].bufptr = 0;
1898 sis_priv->tx_ring[entry].cmdsts = 0;
1899 }
1900
1901 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1902 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1903 /* The ring is no longer full, clear tx_full and schedule
1904 * more transmission by netif_wake_queue(net_dev) */
1905 sis_priv->tx_full = 0;
1906 netif_wake_queue (net_dev);
1907 }
1908}
1909
1910/**
6aa20a22 1911 * sis900_close - close sis900 device
1da177e4
LT
1912 * @net_dev: the net device to be closed
1913 *
6aa20a22 1914 * Disable interrupts, stop the Tx and Rx Status Machine
1da177e4
LT
1915 * free Tx and RX socket buffer
1916 */
1917
1918static int sis900_close(struct net_device *net_dev)
1919{
1920 long ioaddr = net_dev->base_addr;
1921 struct sis900_private *sis_priv = net_dev->priv;
1922 struct sk_buff *skb;
1923 int i;
1924
1925 netif_stop_queue(net_dev);
1926
1927 /* Disable interrupts by clearing the interrupt mask. */
1928 outl(0x0000, ioaddr + imr);
1929 outl(0x0000, ioaddr + ier);
1930
1931 /* Stop the chip's Tx and Rx Status Machine */
1932 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1933
1934 del_timer(&sis_priv->timer);
1935
1936 free_irq(net_dev->irq, net_dev);
1937
1938 /* Free Tx and RX skbuff */
1939 for (i = 0; i < NUM_RX_DESC; i++) {
1940 skb = sis_priv->rx_skbuff[i];
1941 if (skb) {
6aa20a22 1942 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1943 sis_priv->rx_ring[i].bufptr,
1944 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1945 dev_kfree_skb(skb);
1946 sis_priv->rx_skbuff[i] = NULL;
1947 }
1948 }
1949 for (i = 0; i < NUM_TX_DESC; i++) {
1950 skb = sis_priv->tx_skbuff[i];
1951 if (skb) {
6aa20a22 1952 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1953 sis_priv->tx_ring[i].bufptr, skb->len,
1954 PCI_DMA_TODEVICE);
1955 dev_kfree_skb(skb);
1956 sis_priv->tx_skbuff[i] = NULL;
1957 }
1958 }
1959
1960 /* Green! Put the chip in low-power mode. */
1961
1962 return 0;
1963}
1964
1965/**
1966 * sis900_get_drvinfo - Return information about driver
1967 * @net_dev: the net device to probe
1968 * @info: container for info returned
1969 *
1970 * Process ethtool command such as "ehtool -i" to show information
1971 */
6aa20a22 1972
1da177e4
LT
1973static void sis900_get_drvinfo(struct net_device *net_dev,
1974 struct ethtool_drvinfo *info)
1975{
1976 struct sis900_private *sis_priv = net_dev->priv;
1977
1978 strcpy (info->driver, SIS900_MODULE_NAME);
1979 strcpy (info->version, SIS900_DRV_VERSION);
1980 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1981}
1982
1983static u32 sis900_get_msglevel(struct net_device *net_dev)
1984{
1985 struct sis900_private *sis_priv = net_dev->priv;
1986 return sis_priv->msg_enable;
1987}
6aa20a22 1988
1da177e4
LT
1989static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1990{
1991 struct sis900_private *sis_priv = net_dev->priv;
1992 sis_priv->msg_enable = value;
1993}
1994
da369b01
DV
1995static u32 sis900_get_link(struct net_device *net_dev)
1996{
1997 struct sis900_private *sis_priv = net_dev->priv;
1998 return mii_link_ok(&sis_priv->mii_info);
1999}
2000
2001static int sis900_get_settings(struct net_device *net_dev,
2002 struct ethtool_cmd *cmd)
2003{
2004 struct sis900_private *sis_priv = net_dev->priv;
2005 spin_lock_irq(&sis_priv->lock);
2006 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2007 spin_unlock_irq(&sis_priv->lock);
2008 return 0;
2009}
2010
2011static int sis900_set_settings(struct net_device *net_dev,
2012 struct ethtool_cmd *cmd)
2013{
2014 struct sis900_private *sis_priv = net_dev->priv;
2015 int rt;
2016 spin_lock_irq(&sis_priv->lock);
2017 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2018 spin_unlock_irq(&sis_priv->lock);
2019 return rt;
2020}
2021
2022static int sis900_nway_reset(struct net_device *net_dev)
2023{
2024 struct sis900_private *sis_priv = net_dev->priv;
2025 return mii_nway_restart(&sis_priv->mii_info);
2026}
2027
ea37ccea
DV
2028/**
2029 * sis900_set_wol - Set up Wake on Lan registers
2030 * @net_dev: the net device to probe
2031 * @wol: container for info passed to the driver
2032 *
2033 * Process ethtool command "wol" to setup wake on lan features.
2034 * SiS900 supports sending WoL events if a correct packet is received,
2035 * but there is no simple way to filter them to only a subset (broadcast,
2036 * multicast, unicast or arp).
2037 */
6aa20a22 2038
ea37ccea
DV
2039static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2040{
2041 struct sis900_private *sis_priv = net_dev->priv;
2042 long pmctrl_addr = net_dev->base_addr + pmctrl;
2043 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2044
2045 if (wol->wolopts == 0) {
2046 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2047 cfgpmcsr &= ~PME_EN;
ea37ccea
DV
2048 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2049 outl(pmctrl_bits, pmctrl_addr);
2050 if (netif_msg_wol(sis_priv))
2051 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2052 return 0;
2053 }
2054
2055 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2056 | WAKE_BCAST | WAKE_ARP))
2057 return -EINVAL;
2058
2059 if (wol->wolopts & WAKE_MAGIC)
2060 pmctrl_bits |= MAGICPKT;
2061 if (wol->wolopts & WAKE_PHY)
2062 pmctrl_bits |= LINKON;
6aa20a22 2063
ea37ccea
DV
2064 outl(pmctrl_bits, pmctrl_addr);
2065
2066 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2067 cfgpmcsr |= PME_EN;
2068 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2069 if (netif_msg_wol(sis_priv))
2070 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2071
2072 return 0;
2073}
2074
2075static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2076{
2077 long pmctrl_addr = net_dev->base_addr + pmctrl;
2078 u32 pmctrl_bits;
2079
2080 pmctrl_bits = inl(pmctrl_addr);
2081 if (pmctrl_bits & MAGICPKT)
2082 wol->wolopts |= WAKE_MAGIC;
2083 if (pmctrl_bits & LINKON)
2084 wol->wolopts |= WAKE_PHY;
2085
2086 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2087}
2088
7282d491 2089static const struct ethtool_ops sis900_ethtool_ops = {
1da177e4
LT
2090 .get_drvinfo = sis900_get_drvinfo,
2091 .get_msglevel = sis900_get_msglevel,
2092 .set_msglevel = sis900_set_msglevel,
da369b01
DV
2093 .get_link = sis900_get_link,
2094 .get_settings = sis900_get_settings,
2095 .set_settings = sis900_set_settings,
2096 .nway_reset = sis900_nway_reset,
ea37ccea
DV
2097 .get_wol = sis900_get_wol,
2098 .set_wol = sis900_set_wol
1da177e4
LT
2099};
2100
2101/**
6aa20a22 2102 * mii_ioctl - process MII i/o control command
1da177e4
LT
2103 * @net_dev: the net device to command for
2104 * @rq: parameter for command
2105 * @cmd: the i/o command
2106 *
2107 * Process MII command like read/write MII register
2108 */
2109
2110static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2111{
2112 struct sis900_private *sis_priv = net_dev->priv;
2113 struct mii_ioctl_data *data = if_mii(rq);
2114
2115 switch(cmd) {
2116 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2117 data->phy_id = sis_priv->mii->phy_addr;
2118 /* Fall Through */
2119
2120 case SIOCGMIIREG: /* Read MII PHY register. */
2121 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2122 return 0;
2123
2124 case SIOCSMIIREG: /* Write MII PHY register. */
2125 if (!capable(CAP_NET_ADMIN))
2126 return -EPERM;
2127 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2128 return 0;
2129 default:
2130 return -EOPNOTSUPP;
2131 }
2132}
2133
1da177e4 2134/**
6aa20a22 2135 * sis900_set_config - Set media type by net_device.set_config
1da177e4
LT
2136 * @dev: the net device for media type change
2137 * @map: ifmap passed by ifconfig
2138 *
2139 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2140 * we support only port changes. All other runtime configuration
2141 * changes will be ignored
2142 */
2143
2144static int sis900_set_config(struct net_device *dev, struct ifmap *map)
6aa20a22 2145{
1da177e4
LT
2146 struct sis900_private *sis_priv = dev->priv;
2147 struct mii_phy *mii_phy = sis_priv->mii;
6aa20a22 2148
1da177e4
LT
2149 u16 status;
2150
2151 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2152 /* we switch on the ifmap->port field. I couldn't find anything
2153 * like a definition or standard for the values of that field.
2154 * I think the meaning of those values is device specific. But
2155 * since I would like to change the media type via the ifconfig
6aa20a22 2156 * command I use the definition from linux/netdevice.h
1da177e4
LT
2157 * (which seems to be different from the ifport(pcmcia) definition) */
2158 switch(map->port){
6aa20a22 2159 case IF_PORT_UNKNOWN: /* use auto here */
1da177e4
LT
2160 dev->if_port = map->port;
2161 /* we are going to change the media type, so the Link
2162 * will be temporary down and we need to reflect that
2163 * here. When the Link comes up again, it will be
2164 * sensed by the sis_timer procedure, which also does
2165 * all the rest for us */
2166 netif_carrier_off(dev);
6aa20a22 2167
1da177e4
LT
2168 /* read current state */
2169 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2170
1da177e4
LT
2171 /* enable auto negotiation and reset the negotioation
2172 * (I don't really know what the auto negatiotiation
2173 * reset really means, but it sounds for me right to
2174 * do one here) */
2175 mdio_write(dev, mii_phy->phy_addr,
2176 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2177
2178 break;
6aa20a22
JG
2179
2180 case IF_PORT_10BASET: /* 10BaseT */
1da177e4 2181 dev->if_port = map->port;
6aa20a22 2182
1da177e4
LT
2183 /* we are going to change the media type, so the Link
2184 * will be temporary down and we need to reflect that
2185 * here. When the Link comes up again, it will be
2186 * sensed by the sis_timer procedure, which also does
2187 * all the rest for us */
2188 netif_carrier_off(dev);
6aa20a22 2189
1da177e4
LT
2190 /* set Speed to 10Mbps */
2191 /* read current state */
2192 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2193
1da177e4
LT
2194 /* disable auto negotiation and force 10MBit mode*/
2195 mdio_write(dev, mii_phy->phy_addr,
2196 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2197 MII_CNTL_AUTO));
2198 break;
6aa20a22 2199
1da177e4 2200 case IF_PORT_100BASET: /* 100BaseT */
6aa20a22 2201 case IF_PORT_100BASETX: /* 100BaseTx */
1da177e4 2202 dev->if_port = map->port;
6aa20a22 2203
1da177e4
LT
2204 /* we are going to change the media type, so the Link
2205 * will be temporary down and we need to reflect that
2206 * here. When the Link comes up again, it will be
2207 * sensed by the sis_timer procedure, which also does
2208 * all the rest for us */
2209 netif_carrier_off(dev);
6aa20a22 2210
1da177e4
LT
2211 /* set Speed to 100Mbps */
2212 /* disable auto negotiation and enable 100MBit Mode */
2213 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2214 mdio_write(dev, mii_phy->phy_addr,
2215 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2216 MII_CNTL_SPEED);
6aa20a22 2217
1da177e4 2218 break;
6aa20a22 2219
1da177e4
LT
2220 case IF_PORT_10BASE2: /* 10Base2 */
2221 case IF_PORT_AUI: /* AUI */
2222 case IF_PORT_100BASEFX: /* 100BaseFx */
2223 /* These Modes are not supported (are they?)*/
2224 return -EOPNOTSUPP;
2225 break;
6aa20a22 2226
1da177e4
LT
2227 default:
2228 return -EINVAL;
2229 }
2230 }
2231 return 0;
2232}
2233
2234/**
6aa20a22 2235 * sis900_mcast_bitnr - compute hashtable index
1da177e4
LT
2236 * @addr: multicast address
2237 * @revision: revision id of chip
2238 *
2239 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2240 * hash table, which makes this function a little bit different from other drivers
2241 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
6aa20a22 2242 * multicast hash table.
1da177e4
LT
2243 */
2244
2245static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2246{
2247
2248 u32 crc = ether_crc(6, addr);
2249
2250 /* leave 8 or 7 most siginifant bits */
2251 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2252 return ((int)(crc >> 24));
2253 else
2254 return ((int)(crc >> 25));
2255}
2256
2257/**
6aa20a22 2258 * set_rx_mode - Set SiS900 receive mode
1da177e4
LT
2259 * @net_dev: the net device to be set
2260 *
2261 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2262 * And set the appropriate multicast filter.
2263 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2264 */
2265
2266static void set_rx_mode(struct net_device *net_dev)
2267{
2268 long ioaddr = net_dev->base_addr;
2269 struct sis900_private * sis_priv = net_dev->priv;
2270 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2271 int i, table_entries;
2272 u32 rx_mode;
2273
7f927fcc 2274 /* 635 Hash Table entries = 256(2^16) */
1da177e4
LT
2275 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2276 (sis_priv->chipset_rev == SIS900B_900_REV))
2277 table_entries = 16;
2278 else
2279 table_entries = 8;
2280
2281 if (net_dev->flags & IFF_PROMISC) {
2282 /* Accept any kinds of packets */
2283 rx_mode = RFPromiscuous;
2284 for (i = 0; i < table_entries; i++)
2285 mc_filter[i] = 0xffff;
2286 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2287 (net_dev->flags & IFF_ALLMULTI)) {
2288 /* too many multicast addresses or accept all multicast packet */
2289 rx_mode = RFAAB | RFAAM;
2290 for (i = 0; i < table_entries; i++)
2291 mc_filter[i] = 0xffff;
2292 } else {
2293 /* Accept Broadcast packet, destination address matchs our
2294 * MAC address, use Receive Filter to reject unwanted MCAST
2295 * packets */
2296 struct dev_mc_list *mclist;
2297 rx_mode = RFAAB;
2298 for (i = 0, mclist = net_dev->mc_list;
2299 mclist && i < net_dev->mc_count;
2300 i++, mclist = mclist->next) {
2301 unsigned int bit_nr =
2302 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2303 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2304 }
2305 }
2306
2307 /* update Multicast Hash Table in Receive Filter */
2308 for (i = 0; i < table_entries; i++) {
2309 /* why plus 0x04 ??, That makes the correct value for hash table. */
2310 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2311 outl(mc_filter[i], ioaddr + rfdr);
2312 }
2313
2314 outl(RFEN | rx_mode, ioaddr + rfcr);
2315
2316 /* sis900 is capable of looping back packets at MAC level for
2317 * debugging purpose */
2318 if (net_dev->flags & IFF_LOOPBACK) {
2319 u32 cr_saved;
2320 /* We must disable Tx/Rx before setting loopback mode */
2321 cr_saved = inl(ioaddr + cr);
2322 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2323 /* enable loopback */
2324 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2325 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2326 /* restore cr */
2327 outl(cr_saved, ioaddr + cr);
2328 }
2329
2330 return;
2331}
2332
2333/**
6aa20a22 2334 * sis900_reset - Reset sis900 MAC
1da177e4
LT
2335 * @net_dev: the net device to reset
2336 *
2337 * reset sis900 MAC and wait until finished
2338 * reset through command register
2339 * change backoff algorithm for 900B0 & 635 M/B
2340 */
2341
2342static void sis900_reset(struct net_device *net_dev)
2343{
2344 struct sis900_private * sis_priv = net_dev->priv;
2345 long ioaddr = net_dev->base_addr;
2346 int i = 0;
2347 u32 status = TxRCMP | RxRCMP;
2348
2349 outl(0, ioaddr + ier);
2350 outl(0, ioaddr + imr);
2351 outl(0, ioaddr + rfcr);
2352
2353 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
6aa20a22 2354
1da177e4
LT
2355 /* Check that the chip has finished the reset. */
2356 while (status && (i++ < 1000)) {
2357 status ^= (inl(isr + ioaddr) & status);
2358 }
2359
2360 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2361 (sis_priv->chipset_rev == SIS900B_900_REV) )
2362 outl(PESEL | RND_CNT, ioaddr + cfg);
2363 else
2364 outl(PESEL, ioaddr + cfg);
2365}
2366
2367/**
6aa20a22 2368 * sis900_remove - Remove sis900 device
1da177e4
LT
2369 * @pci_dev: the pci device to be removed
2370 *
2371 * remove and release SiS900 net device
2372 */
2373
2374static void __devexit sis900_remove(struct pci_dev *pci_dev)
2375{
2376 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2377 struct sis900_private * sis_priv = net_dev->priv;
2378 struct mii_phy *phy = NULL;
2379
2380 while (sis_priv->first_mii) {
2381 phy = sis_priv->first_mii;
2382 sis_priv->first_mii = phy->next;
2383 kfree(phy);
2384 }
2385
2386 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2387 sis_priv->rx_ring_dma);
2388 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2389 sis_priv->tx_ring_dma);
2390 unregister_netdev(net_dev);
2391 free_netdev(net_dev);
2392 pci_release_regions(pci_dev);
2393 pci_set_drvdata(pci_dev, NULL);
2394}
2395
2396#ifdef CONFIG_PM
2397
2398static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2399{
2400 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2401 long ioaddr = net_dev->base_addr;
2402
2403 if(!netif_running(net_dev))
2404 return 0;
2405
2406 netif_stop_queue(net_dev);
2407 netif_device_detach(net_dev);
2408
2409 /* Stop the chip's Tx and Rx Status Machine */
2410 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2411
2412 pci_set_power_state(pci_dev, PCI_D3hot);
2413 pci_save_state(pci_dev);
2414
2415 return 0;
2416}
2417
2418static int sis900_resume(struct pci_dev *pci_dev)
2419{
2420 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2421 struct sis900_private *sis_priv = net_dev->priv;
2422 long ioaddr = net_dev->base_addr;
2423
2424 if(!netif_running(net_dev))
2425 return 0;
2426 pci_restore_state(pci_dev);
2427 pci_set_power_state(pci_dev, PCI_D0);
2428
2429 sis900_init_rxfilter(net_dev);
2430
2431 sis900_init_tx_ring(net_dev);
2432 sis900_init_rx_ring(net_dev);
2433
2434 set_rx_mode(net_dev);
2435
2436 netif_device_attach(net_dev);
2437 netif_start_queue(net_dev);
2438
2439 /* Workaround for EDB */
2440 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2441
2442 /* Enable all known interrupts by setting the interrupt mask. */
2443 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2444 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2445 outl(IE, ioaddr + ier);
2446
2447 sis900_check_mode(net_dev, sis_priv->mii);
2448
2449 return 0;
2450}
2451#endif /* CONFIG_PM */
2452
2453static struct pci_driver sis900_pci_driver = {
2454 .name = SIS900_MODULE_NAME,
2455 .id_table = sis900_pci_tbl,
2456 .probe = sis900_probe,
2457 .remove = __devexit_p(sis900_remove),
2458#ifdef CONFIG_PM
2459 .suspend = sis900_suspend,
2460 .resume = sis900_resume,
2461#endif /* CONFIG_PM */
2462};
2463
2464static int __init sis900_init_module(void)
2465{
2466/* when a module, this is printed whether or not devices are found in probe */
2467#ifdef MODULE
2468 printk(version);
2469#endif
2470
29917620 2471 return pci_register_driver(&sis900_pci_driver);
1da177e4
LT
2472}
2473
2474static void __exit sis900_cleanup_module(void)
2475{
2476 pci_unregister_driver(&sis900_pci_driver);
2477}
2478
2479module_init(sis900_init_module);
2480module_exit(sis900_cleanup_module);
2481