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8ceee660 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
3 | * Copyright 2005 Fen Systems Ltd. | |
4 | * Copyright 2006 Solarflare Communications Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
11 | #ifndef EFX_SPI_H | |
12 | #define EFX_SPI_H | |
13 | ||
14 | #include "net_driver.h" | |
15 | ||
16 | /************************************************************************** | |
17 | * | |
18 | * Basic SPI command set and bit definitions | |
19 | * | |
20 | *************************************************************************/ | |
21 | ||
4a5b504d BH |
22 | #define SPI_WRSR 0x01 /* Write status register */ |
23 | #define SPI_WRITE 0x02 /* Write data to memory array */ | |
24 | #define SPI_READ 0x03 /* Read data from memory array */ | |
25 | #define SPI_WRDI 0x04 /* Reset write enable latch */ | |
26 | #define SPI_RDSR 0x05 /* Read status register */ | |
27 | #define SPI_WREN 0x06 /* Set write enable latch */ | |
f4150724 | 28 | #define SPI_SST_EWSR 0x50 /* SST: Enable write to status register */ |
4a5b504d BH |
29 | |
30 | #define SPI_STATUS_WPEN 0x80 /* Write-protect pin enabled */ | |
31 | #define SPI_STATUS_BP2 0x10 /* Block protection bit 2 */ | |
32 | #define SPI_STATUS_BP1 0x08 /* Block protection bit 1 */ | |
33 | #define SPI_STATUS_BP0 0x04 /* Block protection bit 0 */ | |
34 | #define SPI_STATUS_WEN 0x02 /* State of the write enable latch */ | |
35 | #define SPI_STATUS_NRDY 0x01 /* Device busy flag */ | |
36 | ||
37 | /** | |
38 | * struct efx_spi_device - an Efx SPI (Serial Peripheral Interface) device | |
39 | * @efx: The Efx controller that owns this device | |
f4150724 | 40 | * @mtd: MTD state |
4a5b504d BH |
41 | * @device_id: Controller's id for the device |
42 | * @size: Size (in bytes) | |
43 | * @addr_len: Number of address bytes in read/write commands | |
44 | * @munge_address: Flag whether addresses should be munged. | |
45 | * Some devices with 9-bit addresses (e.g. AT25040A EEPROM) | |
46 | * use bit 3 of the command byte as address bit A8, rather | |
47 | * than having a two-byte address. If this flag is set, then | |
48 | * commands should be munged in this way. | |
f4150724 BH |
49 | * @erase_command: Erase command (or 0 if sector erase not needed). |
50 | * @erase_size: Erase sector size (in bytes) | |
51 | * Erase commands affect sectors with this size and alignment. | |
52 | * This must be a power of two. | |
4a5b504d BH |
53 | * @block_size: Write block size (in bytes). |
54 | * Write commands are limited to blocks with this size and alignment. | |
8ceee660 | 55 | */ |
4a5b504d BH |
56 | struct efx_spi_device { |
57 | struct efx_nic *efx; | |
f4150724 BH |
58 | #ifdef CONFIG_SFC_MTD |
59 | void *mtd; | |
60 | #endif | |
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61 | int device_id; |
62 | unsigned int size; | |
63 | unsigned int addr_len; | |
64 | unsigned int munge_address:1; | |
f4150724 BH |
65 | u8 erase_command; |
66 | unsigned int erase_size; | |
4a5b504d BH |
67 | unsigned int block_size; |
68 | }; | |
69 | ||
f4150724 | 70 | int falcon_spi_cmd(const struct efx_spi_device *spi, unsigned int command, |
23d30f02 | 71 | int address, const void* in, void *out, size_t len); |
be4ea89c | 72 | int falcon_spi_wait_write(const struct efx_spi_device *spi); |
4a5b504d BH |
73 | int falcon_spi_read(const struct efx_spi_device *spi, loff_t start, |
74 | size_t len, size_t *retlen, u8 *buffer); | |
75 | int falcon_spi_write(const struct efx_spi_device *spi, loff_t start, | |
76 | size_t len, size_t *retlen, const u8 *buffer); | |
8ceee660 | 77 | |
0a95f563 BH |
78 | /* |
79 | * SFC4000 flash is partitioned into: | |
80 | * 0-0x400 chip and board config (see falcon_hwdefs.h) | |
81 | * 0x400-0x8000 unused (or may contain VPD if EEPROM not present) | |
82 | * 0x8000-end boot code (mapped to PCI expansion ROM) | |
83 | * SFC4000 small EEPROM (size < 0x400) is used for VPD only. | |
84 | * SFC4000 large EEPROM (size >= 0x400) is partitioned into: | |
85 | * 0-0x400 chip and board config | |
86 | * configurable VPD | |
87 | * 0x800-0x1800 boot config | |
88 | * Aside from the chip and board config, all of these are optional and may | |
89 | * be absent or truncated depending on the devices used. | |
90 | */ | |
91 | #define FALCON_NVCONFIG_END 0x400U | |
f4150724 | 92 | #define FALCON_FLASH_BOOTCODE_START 0x8000U |
0a95f563 BH |
93 | #define EFX_EEPROM_BOOTCONFIG_START 0x800U |
94 | #define EFX_EEPROM_BOOTCONFIG_END 0x1800U | |
95 | ||
8ceee660 | 96 | #endif /* EFX_SPI_H */ |