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8ceee660 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
3 | * Copyright 2005-2006 Fen Systems Ltd. | |
0a6f40c6 | 4 | * Copyright 2006-2011 Solarflare Communications Inc. |
8ceee660 BH |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
744093c9 BH |
11 | #ifndef EFX_NIC_H |
12 | #define EFX_NIC_H | |
8ceee660 | 13 | |
5c16a96c | 14 | #include <linux/i2c-algo-bit.h> |
8ceee660 | 15 | #include "net_driver.h" |
177dfcd8 | 16 | #include "efx.h" |
8880f4ec | 17 | #include "mcdi.h" |
4de92180 | 18 | #include "spi.h" |
8ceee660 BH |
19 | |
20 | /* | |
21 | * Falcon hardware control | |
22 | */ | |
23 | ||
daeda630 BH |
24 | enum { |
25 | EFX_REV_FALCON_A0 = 0, | |
26 | EFX_REV_FALCON_A1 = 1, | |
27 | EFX_REV_FALCON_B0 = 2, | |
8880f4ec | 28 | EFX_REV_SIENA_A0 = 3, |
8ceee660 BH |
29 | }; |
30 | ||
daeda630 | 31 | static inline int efx_nic_rev(struct efx_nic *efx) |
55668611 | 32 | { |
daeda630 | 33 | return efx->type->revision; |
55668611 | 34 | } |
8ceee660 | 35 | |
152b6a62 BH |
36 | extern u32 efx_nic_fpga_ver(struct efx_nic *efx); |
37 | ||
8880f4ec BH |
38 | static inline bool efx_nic_has_mc(struct efx_nic *efx) |
39 | { | |
40 | return efx_nic_rev(efx) >= EFX_REV_SIENA_A0; | |
41 | } | |
152b6a62 BH |
42 | /* NIC has two interlinked PCI functions for the same port. */ |
43 | static inline bool efx_nic_is_dual_func(struct efx_nic *efx) | |
44 | { | |
45 | return efx_nic_rev(efx) < EFX_REV_FALCON_B0; | |
46 | } | |
47 | ||
c1c4f453 BH |
48 | enum { |
49 | PHY_TYPE_NONE = 0, | |
50 | PHY_TYPE_TXC43128 = 1, | |
51 | PHY_TYPE_88E1111 = 2, | |
52 | PHY_TYPE_SFX7101 = 3, | |
53 | PHY_TYPE_QT2022C2 = 4, | |
54 | PHY_TYPE_PM8358 = 6, | |
55 | PHY_TYPE_SFT9001A = 8, | |
56 | PHY_TYPE_QT2025C = 9, | |
57 | PHY_TYPE_SFT9001B = 10, | |
58 | }; | |
59 | ||
60 | #define FALCON_XMAC_LOOPBACKS \ | |
61 | ((1 << LOOPBACK_XGMII) | \ | |
62 | (1 << LOOPBACK_XGXS) | \ | |
63 | (1 << LOOPBACK_XAUI)) | |
64 | ||
65 | #define FALCON_GMAC_LOOPBACKS \ | |
66 | (1 << LOOPBACK_GMAC) | |
67 | ||
3759433d | 68 | /** |
44838a44 BH |
69 | * struct falcon_board_type - board operations and type information |
70 | * @id: Board type id, as found in NVRAM | |
71 | * @ref_model: Model number of Solarflare reference design | |
72 | * @gen_type: Generic board type description | |
3759433d BH |
73 | * @init: Allocate resources and initialise peripheral hardware |
74 | * @init_phy: Do board-specific PHY initialisation | |
44838a44 | 75 | * @fini: Shut down hardware and free resources |
3759433d BH |
76 | * @set_id_led: Set state of identifying LED or revert to automatic function |
77 | * @monitor: Board-specific health check function | |
44838a44 BH |
78 | */ |
79 | struct falcon_board_type { | |
80 | u8 id; | |
81 | const char *ref_model; | |
82 | const char *gen_type; | |
83 | int (*init) (struct efx_nic *nic); | |
84 | void (*init_phy) (struct efx_nic *efx); | |
85 | void (*fini) (struct efx_nic *nic); | |
86 | void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode); | |
87 | int (*monitor) (struct efx_nic *nic); | |
88 | }; | |
89 | ||
90 | /** | |
91 | * struct falcon_board - board information | |
92 | * @type: Type of board | |
93 | * @major: Major rev. ('A', 'B' ...) | |
94 | * @minor: Minor rev. (0, 1, ...) | |
e775fb93 BH |
95 | * @i2c_adap: I2C adapter for on-board peripherals |
96 | * @i2c_data: Data for bit-banging algorithm | |
3759433d BH |
97 | * @hwmon_client: I2C client for hardware monitor |
98 | * @ioexp_client: I2C client for power/port control | |
99 | */ | |
100 | struct falcon_board { | |
44838a44 | 101 | const struct falcon_board_type *type; |
3759433d BH |
102 | int major; |
103 | int minor; | |
e775fb93 BH |
104 | struct i2c_adapter i2c_adap; |
105 | struct i2c_algo_bit_data i2c_data; | |
3759433d BH |
106 | struct i2c_client *hwmon_client, *ioexp_client; |
107 | }; | |
108 | ||
5c16a96c BH |
109 | /** |
110 | * struct falcon_nic_data - Falcon NIC state | |
8986352a | 111 | * @pci_dev2: Secondary function of Falcon A |
3759433d | 112 | * @board: Board state and functions |
55edc6e6 BH |
113 | * @stats_disable_count: Nest count for disabling statistics fetches |
114 | * @stats_pending: Is there a pending DMA of MAC statistics. | |
115 | * @stats_timer: A timer for regularly fetching MAC statistics. | |
116 | * @stats_dma_done: Pointer to the flag which indicates DMA completion. | |
4de92180 BH |
117 | * @spi_flash: SPI flash device |
118 | * @spi_eeprom: SPI EEPROM device | |
119 | * @spi_lock: SPI bus lock | |
4833f02a | 120 | * @mdio_lock: MDIO bus lock |
cef68bde | 121 | * @xmac_poll_required: XMAC link state needs polling |
5c16a96c BH |
122 | */ |
123 | struct falcon_nic_data { | |
124 | struct pci_dev *pci_dev2; | |
3759433d | 125 | struct falcon_board board; |
55edc6e6 BH |
126 | unsigned int stats_disable_count; |
127 | bool stats_pending; | |
128 | struct timer_list stats_timer; | |
129 | u32 *stats_dma_done; | |
4de92180 BH |
130 | struct efx_spi_device spi_flash; |
131 | struct efx_spi_device spi_eeprom; | |
132 | struct mutex spi_lock; | |
4833f02a | 133 | struct mutex mdio_lock; |
cef68bde | 134 | bool xmac_poll_required; |
5c16a96c BH |
135 | }; |
136 | ||
278c0621 BH |
137 | static inline struct falcon_board *falcon_board(struct efx_nic *efx) |
138 | { | |
3759433d BH |
139 | struct falcon_nic_data *data = efx->nic_data; |
140 | return &data->board; | |
278c0621 BH |
141 | } |
142 | ||
8880f4ec BH |
143 | /** |
144 | * struct siena_nic_data - Siena NIC state | |
8880f4ec | 145 | * @mcdi: Management-Controller-to-Driver Interface |
747df225 | 146 | * @mcdi_smem: MCDI shared memory mapping. The mapping is always uncacheable. |
8880f4ec BH |
147 | * @wol_filter_id: Wake-on-LAN packet filter id |
148 | */ | |
149 | struct siena_nic_data { | |
8880f4ec | 150 | struct efx_mcdi_iface mcdi; |
747df225 | 151 | void __iomem *mcdi_smem; |
8880f4ec BH |
152 | int wol_filter_id; |
153 | }; | |
154 | ||
daeda630 BH |
155 | extern struct efx_nic_type falcon_a1_nic_type; |
156 | extern struct efx_nic_type falcon_b0_nic_type; | |
8880f4ec | 157 | extern struct efx_nic_type siena_a0_nic_type; |
8ceee660 BH |
158 | |
159 | /************************************************************************** | |
160 | * | |
161 | * Externs | |
162 | * | |
163 | ************************************************************************** | |
164 | */ | |
165 | ||
e41c11ee | 166 | extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info); |
5087b54d | 167 | |
8ceee660 | 168 | /* TX data path */ |
152b6a62 BH |
169 | extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue); |
170 | extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue); | |
171 | extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue); | |
172 | extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue); | |
173 | extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue); | |
8ceee660 BH |
174 | |
175 | /* RX data path */ | |
152b6a62 BH |
176 | extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue); |
177 | extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue); | |
178 | extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue); | |
179 | extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue); | |
180 | extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue); | |
8ceee660 BH |
181 | |
182 | /* Event data path */ | |
152b6a62 BH |
183 | extern int efx_nic_probe_eventq(struct efx_channel *channel); |
184 | extern void efx_nic_init_eventq(struct efx_channel *channel); | |
185 | extern void efx_nic_fini_eventq(struct efx_channel *channel); | |
186 | extern void efx_nic_remove_eventq(struct efx_channel *channel); | |
187 | extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota); | |
188 | extern void efx_nic_eventq_read_ack(struct efx_channel *channel); | |
d4fabcc8 | 189 | extern bool efx_nic_event_present(struct efx_channel *channel); |
8ceee660 | 190 | |
8ceee660 | 191 | /* MAC/PHY */ |
8ceee660 | 192 | extern void falcon_drain_tx_fifo(struct efx_nic *efx); |
8ceee660 BH |
193 | extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx); |
194 | ||
195 | /* Interrupts and test events */ | |
152b6a62 BH |
196 | extern int efx_nic_init_interrupt(struct efx_nic *efx); |
197 | extern void efx_nic_enable_interrupts(struct efx_nic *efx); | |
d730dc52 | 198 | extern void efx_nic_generate_test_event(struct efx_channel *channel); |
90d683af | 199 | extern void efx_nic_generate_fill_event(struct efx_channel *channel); |
152b6a62 BH |
200 | extern void efx_nic_generate_interrupt(struct efx_nic *efx); |
201 | extern void efx_nic_disable_interrupts(struct efx_nic *efx); | |
202 | extern void efx_nic_fini_interrupt(struct efx_nic *efx); | |
203 | extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx); | |
204 | extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id); | |
205 | extern void falcon_irq_ack_a1(struct efx_nic *efx); | |
206 | ||
207 | #define EFX_IRQ_MOD_RESOLUTION 5 | |
6fb70fd1 | 208 | |
8ceee660 | 209 | /* Global Resources */ |
152b6a62 | 210 | extern int efx_nic_flush_queues(struct efx_nic *efx); |
55edc6e6 BH |
211 | extern void falcon_start_nic_stats(struct efx_nic *efx); |
212 | extern void falcon_stop_nic_stats(struct efx_nic *efx); | |
b7b40eeb | 213 | extern void falcon_setup_xaui(struct efx_nic *efx); |
8ceee660 | 214 | extern int falcon_reset_xaui(struct efx_nic *efx); |
152b6a62 | 215 | extern void efx_nic_init_common(struct efx_nic *efx); |
765c9f46 | 216 | extern void efx_nic_push_rx_indir_table(struct efx_nic *efx); |
152b6a62 BH |
217 | |
218 | int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer, | |
219 | unsigned int len); | |
220 | void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer); | |
8ceee660 | 221 | |
8c8661e4 | 222 | /* Tests */ |
152b6a62 BH |
223 | struct efx_nic_register_test { |
224 | unsigned address; | |
225 | efx_oword_t mask; | |
226 | }; | |
227 | extern int efx_nic_test_registers(struct efx_nic *efx, | |
228 | const struct efx_nic_register_test *regs, | |
229 | size_t n_regs); | |
8c8661e4 | 230 | |
5b98c1bf BH |
231 | extern size_t efx_nic_get_regs_len(struct efx_nic *efx); |
232 | extern void efx_nic_get_regs(struct efx_nic *efx, void *buf); | |
233 | ||
8ceee660 BH |
234 | /************************************************************************** |
235 | * | |
236 | * Falcon MAC stats | |
237 | * | |
238 | ************************************************************************** | |
239 | */ | |
240 | ||
241 | #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset) | |
242 | #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH) | |
243 | ||
244 | /* Retrieve statistic from statistics block */ | |
245 | #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \ | |
246 | if (FALCON_STAT_WIDTH(falcon_stat) == 16) \ | |
247 | (efx)->mac_stats.efx_stat += le16_to_cpu( \ | |
248 | *((__force __le16 *) \ | |
249 | (efx->stats_buffer.addr + \ | |
250 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
251 | else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \ | |
252 | (efx)->mac_stats.efx_stat += le32_to_cpu( \ | |
253 | *((__force __le32 *) \ | |
254 | (efx->stats_buffer.addr + \ | |
255 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
256 | else \ | |
257 | (efx)->mac_stats.efx_stat += le64_to_cpu( \ | |
258 | *((__force __le64 *) \ | |
259 | (efx->stats_buffer.addr + \ | |
260 | FALCON_STAT_OFFSET(falcon_stat)))); \ | |
261 | } while (0) | |
262 | ||
263 | #define FALCON_MAC_STATS_SIZE 0x100 | |
264 | ||
265 | #define MAC_DATA_LBN 0 | |
266 | #define MAC_DATA_WIDTH 32 | |
267 | ||
152b6a62 BH |
268 | extern void efx_nic_generate_event(struct efx_channel *channel, |
269 | efx_qword_t *event); | |
8ceee660 | 270 | |
9007b9fa BH |
271 | extern void falcon_poll_xmac(struct efx_nic *efx); |
272 | ||
744093c9 | 273 | #endif /* EFX_NIC_H */ |