Commit | Line | Data |
---|---|---|
34e45ad9 AD |
1 | /* |
2 | * Driver for the Texas Instruments DP83848 PHY | |
3 | * | |
2f67864b | 4 | * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ |
34e45ad9 AD |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/phy.h> | |
18 | ||
68336293 AD |
19 | #define TI_DP83848C_PHY_ID 0x20005ca0 |
20 | #define NS_DP83848C_PHY_ID 0x20005c90 | |
d1782f7b | 21 | #define TLK10X_PHY_ID 0x2000a210 |
30347834 | 22 | #define TI_DP83822_PHY_ID 0x2000a240 |
34e45ad9 AD |
23 | |
24 | /* Registers */ | |
5fed0393 AD |
25 | #define DP83848_MICR 0x11 /* MII Interrupt Control Register */ |
26 | #define DP83848_MISR 0x12 /* MII Interrupt Status Register */ | |
34e45ad9 AD |
27 | |
28 | /* MICR Register Fields */ | |
29 | #define DP83848_MICR_INT_OE BIT(0) /* Interrupt Output Enable */ | |
30 | #define DP83848_MICR_INTEN BIT(1) /* Interrupt Enable */ | |
31 | ||
32 | /* MISR Register Fields */ | |
33 | #define DP83848_MISR_RHF_INT_EN BIT(0) /* Receive Error Counter */ | |
34 | #define DP83848_MISR_FHF_INT_EN BIT(1) /* False Carrier Counter */ | |
35 | #define DP83848_MISR_ANC_INT_EN BIT(2) /* Auto-negotiation complete */ | |
36 | #define DP83848_MISR_DUP_INT_EN BIT(3) /* Duplex Status */ | |
37 | #define DP83848_MISR_SPD_INT_EN BIT(4) /* Speed status */ | |
38 | #define DP83848_MISR_LINK_INT_EN BIT(5) /* Link status */ | |
39 | #define DP83848_MISR_ED_INT_EN BIT(6) /* Energy detect */ | |
40 | #define DP83848_MISR_LQM_INT_EN BIT(7) /* Link Quality Monitor */ | |
41 | ||
cf13be5a AD |
42 | #define DP83848_INT_EN_MASK \ |
43 | (DP83848_MISR_ANC_INT_EN | \ | |
44 | DP83848_MISR_DUP_INT_EN | \ | |
45 | DP83848_MISR_SPD_INT_EN | \ | |
46 | DP83848_MISR_LINK_INT_EN) | |
47 | ||
34e45ad9 AD |
48 | static int dp83848_ack_interrupt(struct phy_device *phydev) |
49 | { | |
50 | int err = phy_read(phydev, DP83848_MISR); | |
51 | ||
52 | return err < 0 ? err : 0; | |
53 | } | |
54 | ||
55 | static int dp83848_config_intr(struct phy_device *phydev) | |
56 | { | |
cf13be5a AD |
57 | int control, ret; |
58 | ||
59 | control = phy_read(phydev, DP83848_MICR); | |
60 | if (control < 0) | |
61 | return control; | |
34e45ad9 AD |
62 | |
63 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { | |
cf13be5a AD |
64 | control |= DP83848_MICR_INT_OE; |
65 | control |= DP83848_MICR_INTEN; | |
34e45ad9 | 66 | |
cf13be5a AD |
67 | ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK); |
68 | if (ret < 0) | |
69 | return ret; | |
70 | } else { | |
71 | control &= ~DP83848_MICR_INTEN; | |
34e45ad9 AD |
72 | } |
73 | ||
cf13be5a | 74 | return phy_write(phydev, DP83848_MICR, control); |
34e45ad9 AD |
75 | } |
76 | ||
77 | static struct mdio_device_id __maybe_unused dp83848_tbl[] = { | |
68336293 AD |
78 | { TI_DP83848C_PHY_ID, 0xfffffff0 }, |
79 | { NS_DP83848C_PHY_ID, 0xfffffff0 }, | |
d1782f7b | 80 | { TLK10X_PHY_ID, 0xfffffff0 }, |
30347834 | 81 | { TI_DP83822_PHY_ID, 0xfffffff0 }, |
34e45ad9 AD |
82 | { } |
83 | }; | |
84 | MODULE_DEVICE_TABLE(mdio, dp83848_tbl); | |
85 | ||
2f67864b AD |
86 | #define DP83848_PHY_DRIVER(_id, _name) \ |
87 | { \ | |
88 | .phy_id = _id, \ | |
89 | .phy_id_mask = 0xfffffff0, \ | |
90 | .name = _name, \ | |
91 | .features = PHY_BASIC_FEATURES, \ | |
92 | .flags = PHY_HAS_INTERRUPT, \ | |
93 | \ | |
94 | .soft_reset = genphy_soft_reset, \ | |
95 | .config_init = genphy_config_init, \ | |
96 | .suspend = genphy_suspend, \ | |
97 | .resume = genphy_resume, \ | |
98 | .config_aneg = genphy_config_aneg, \ | |
99 | .read_status = genphy_read_status, \ | |
100 | \ | |
101 | /* IRQ related */ \ | |
102 | .ack_interrupt = dp83848_ack_interrupt, \ | |
103 | .config_intr = dp83848_config_intr, \ | |
104 | } | |
34e45ad9 | 105 | |
2f67864b | 106 | static struct phy_driver dp83848_driver[] = { |
68336293 | 107 | DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY"), |
e12a285c | 108 | DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY"), |
d1782f7b | 109 | DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY"), |
30347834 | 110 | DP83848_PHY_DRIVER(TI_DP83822_PHY_ID, "TI DP83822 10/100 Mbps PHY"), |
34e45ad9 AD |
111 | }; |
112 | module_phy_driver(dp83848_driver); | |
113 | ||
114 | MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver"); | |
115 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com"); | |
116 | MODULE_LICENSE("GPL"); |