pcmcia: introduce autoconfiguration feature
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT
1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT
47#include <pcmcia/cistpl.h>
48#include <pcmcia/cisreg.h>
49#include <pcmcia/ciscode.h>
50#include <pcmcia/ds.h>
50db3fdb 51#include <pcmcia/ss.h>
1da177e4
LT
52
53#include <asm/io.h>
54#include <asm/system.h>
55#include <asm/uaccess.h>
56
1da177e4
LT
57/*====================================================================*/
58
f71e1309 59static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 60
75bf758f
JSR
61/* Firmware name */
62#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
1da177e4
LT
64/* Module parameters */
65
66MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67MODULE_LICENSE("GPL");
75bf758f 68MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT
69
70#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72/*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77*/
78INT_MODULE_PARM(if_port, 0);
79
1da177e4
LT
80
81#define DRV_NAME "smc91c92_cs"
d5b20697 82#define DRV_VERSION "1.123"
1da177e4
LT
83
84/*====================================================================*/
85
86/* Operational parameter that usually are not changed. */
87
88/* Time in jiffies before concluding Tx hung */
89#define TX_TIMEOUT ((400*HZ)/1000)
90
91/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92#define INTR_WORK 4
93
94/* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96#define MEMORY_WAIT_TIME 8
97
1da177e4 98struct smc_private {
fd238232 99 struct pcmcia_device *p_dev;
1da177e4
LT
100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
6fb7298c 103
1da177e4
LT
104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116};
117
118/* Special definitions for Megahertz multifunction cards */
119#define MEGAHERTZ_ISR 0x0380
120
121/* Special function registers for Motorola Mariner */
122#define MOT_LAN 0x0000
123#define MOT_UART 0x0020
124#define MOT_EEPROM 0x20
125
126#define MOT_NORMAL \
127(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
128
129/* Special function registers for Ositech cards */
130#define OSITECH_AUI_CTL 0x0c
131#define OSITECH_PWRDOWN 0x0d
132#define OSITECH_RESET 0x0e
133#define OSITECH_ISR 0x0f
134#define OSITECH_AUI_PWR 0x0c
135#define OSITECH_RESET_ISR 0x0e
136
137#define OSI_AUI_PWR 0x40
138#define OSI_LAN_PWRDOWN 0x02
139#define OSI_MODEM_PWRDOWN 0x01
140#define OSI_LAN_RESET 0x02
141#define OSI_MODEM_RESET 0x01
142
143/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
144#define BANK_SELECT 14 /* Window select register. */
145#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
146
147/* Bank 0 registers. */
148#define TCR 0 /* transmit control register */
149#define TCR_CLEAR 0 /* do NOTHING */
150#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
151#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
152#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
153#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
154#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
155
156#define EPH 2 /* Ethernet Protocol Handler report. */
157#define EPH_TX_SUC 0x0001
158#define EPH_SNGLCOL 0x0002
159#define EPH_MULCOL 0x0004
160#define EPH_LTX_MULT 0x0008
161#define EPH_16COL 0x0010
162#define EPH_SQET 0x0020
163#define EPH_LTX_BRD 0x0040
164#define EPH_TX_DEFR 0x0080
165#define EPH_LAT_COL 0x0200
166#define EPH_LOST_CAR 0x0400
167#define EPH_EXC_DEF 0x0800
168#define EPH_CTR_ROL 0x1000
169#define EPH_RX_OVRN 0x2000
170#define EPH_LINK_OK 0x4000
171#define EPH_TX_UNRN 0x8000
172#define MEMINFO 8 /* Memory Information Register */
173#define MEMCFG 10 /* Memory Configuration Register */
174
175/* Bank 1 registers. */
176#define CONFIG 0
177#define CFG_MII_SELECT 0x8000 /* 91C100 only */
178#define CFG_NO_WAIT 0x1000
179#define CFG_FULL_STEP 0x0400
180#define CFG_SET_SQLCH 0x0200
181#define CFG_AUI_SELECT 0x0100
182#define CFG_16BIT 0x0080
183#define CFG_DIS_LINK 0x0040
184#define CFG_STATIC 0x0030
185#define CFG_IRQ_SEL_1 0x0004
186#define CFG_IRQ_SEL_0 0x0002
187#define BASE_ADDR 2
188#define ADDR0 4
189#define GENERAL 10
190#define CONTROL 12
191#define CTL_STORE 0x0001
192#define CTL_RELOAD 0x0002
193#define CTL_EE_SELECT 0x0004
194#define CTL_TE_ENABLE 0x0020
195#define CTL_CR_ENABLE 0x0040
196#define CTL_LE_ENABLE 0x0080
197#define CTL_AUTO_RELEASE 0x0800
198#define CTL_POWERDOWN 0x2000
199
200/* Bank 2 registers. */
201#define MMU_CMD 0
202#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
203#define MC_RESET 0x40
204#define MC_RELEASE 0x80 /* remove and release the current rx packet */
205#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
206#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
207#define PNR_ARR 2
208#define FIFO_PORTS 4
209#define FP_RXEMPTY 0x8000
210#define POINTER 6
211#define PTR_AUTO_INC 0x0040
212#define PTR_READ 0x2000
213#define PTR_AUTOINC 0x4000
214#define PTR_RCV 0x8000
215#define DATA_1 8
216#define INTERRUPT 12
217#define IM_RCV_INT 0x1
218#define IM_TX_INT 0x2
219#define IM_TX_EMPTY_INT 0x4
220#define IM_ALLOC_INT 0x8
221#define IM_RX_OVRN_INT 0x10
222#define IM_EPH_INT 0x20
223
224#define RCR 4
225enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
226 RxEnable = 0x0100, RxStripCRC = 0x0200};
227#define RCR_SOFTRESET 0x8000 /* resets the chip */
228#define RCR_STRIP_CRC 0x200 /* strips CRC */
229#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
230#define RCR_ALMUL 0x4 /* receive all multicast packets */
231#define RCR_PROMISC 0x2 /* enable promiscuous mode */
232
233/* the normal settings for the RCR register : */
234#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
235#define RCR_CLEAR 0x0 /* set it to a base state */
236#define COUNTER 6
237
238/* BANK 3 -- not the same values as in smc9194! */
239#define MULTICAST0 0
240#define MULTICAST2 2
241#define MULTICAST4 4
242#define MULTICAST6 6
243#define MGMT 8
244#define REVISION 0x0a
245
246/* Transmit status bits. */
247#define TS_SUCCESS 0x0001
248#define TS_16COL 0x0010
249#define TS_LATCOL 0x0200
250#define TS_LOSTCAR 0x0400
251
252/* Receive status bits. */
253#define RS_ALGNERR 0x8000
254#define RS_BADCRC 0x2000
255#define RS_ODDFRAME 0x1000
256#define RS_TOOLONG 0x0800
257#define RS_TOOSHORT 0x0400
258#define RS_MULTICAST 0x0001
259#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
260
261#define set_bits(v, p) outw(inw(p)|(v), (p))
262#define mask_bits(v, p) outw(inw(p)&(v), (p))
263
264/*====================================================================*/
265
cc3b4866 266static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 267static int smc91c92_config(struct pcmcia_device *link);
fba395ee 268static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT
269
270static int smc_open(struct net_device *dev);
271static int smc_close(struct net_device *dev);
272static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
273static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH
274static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
275 struct net_device *dev);
7d12e780 276static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 277static void smc_rx(struct net_device *dev);
1da177e4
LT
278static void set_rx_mode(struct net_device *dev);
279static int s9k_config(struct net_device *dev, struct ifmap *map);
280static void smc_set_xcvr(struct net_device *dev, int if_port);
281static void smc_reset(struct net_device *dev);
282static void media_check(u_long arg);
906da809 283static void mdio_sync(unsigned int addr);
1da177e4
LT
284static int mdio_read(struct net_device *dev, int phy_id, int loc);
285static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
286static int smc_link_ok(struct net_device *dev);
7282d491 287static const struct ethtool_ops ethtool_ops;
1da177e4 288
9b31b697
SH
289static const struct net_device_ops smc_netdev_ops = {
290 .ndo_open = smc_open,
291 .ndo_stop = smc_close,
292 .ndo_start_xmit = smc_start_xmit,
293 .ndo_tx_timeout = smc_tx_timeout,
294 .ndo_set_config = s9k_config,
295 .ndo_set_multicast_list = set_rx_mode,
296 .ndo_do_ioctl = &smc_ioctl,
297 .ndo_change_mtu = eth_change_mtu,
298 .ndo_set_mac_address = eth_mac_addr,
299 .ndo_validate_addr = eth_validate_addr,
300};
301
1da177e4
LT
302/*======================================================================
303
304 smc91c92_attach() creates an "instance" of the driver, allocating
305 local data structures for one device. The device is registered
306 with Card Services.
307
308======================================================================*/
309
15b99ac1 310static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 311{
1da177e4 312 struct smc_private *smc;
1da177e4 313 struct net_device *dev;
1da177e4 314
dd0fab5b 315 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT
316
317 /* Create new ethernet device */
318 dev = alloc_etherdev(sizeof(struct smc_private));
319 if (!dev)
f8cfa618 320 return -ENOMEM;
1da177e4 321 smc = netdev_priv(dev);
fba395ee 322 smc->p_dev = link;
44b496f6 323 link->priv = dev;
1da177e4
LT
324
325 spin_lock_init(&smc->lock);
90abdc3b
DB
326 link->resource[0]->end = 16;
327 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1ac71e5a 328 link->config_flags |= CONF_ENABLE_IRQ;
1da177e4
LT
329
330 /* The SMC91c92-specific entries in the device structure. */
9b31b697 331 dev->netdev_ops = &smc_netdev_ops;
1da177e4 332 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 333 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT
334
335 smc->mii_if.dev = dev;
336 smc->mii_if.mdio_read = mdio_read;
337 smc->mii_if.mdio_write = mdio_write;
338 smc->mii_if.phy_id_mask = 0x1f;
339 smc->mii_if.reg_num_mask = 0x1f;
340
15b99ac1 341 return smc91c92_config(link);
1da177e4
LT
342} /* smc91c92_attach */
343
344/*======================================================================
345
346 This deletes a driver "instance". The device is de-registered
347 with Card Services. If it has been released, all local data
348 structures are freed. Otherwise, the structures will be freed
349 when the device is released.
350
351======================================================================*/
352
fba395ee 353static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT
354{
355 struct net_device *dev = link->priv;
1da177e4 356
dd0fab5b 357 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 358
c7c2fa07 359 unregister_netdev(dev);
1da177e4 360
e2d40963 361 smc91c92_release(link);
1da177e4 362
1da177e4
LT
363 free_netdev(dev);
364} /* smc91c92_detach */
365
366/*====================================================================*/
367
368static int cvt_ascii_address(struct net_device *dev, char *s)
369{
370 int i, j, da, c;
371
372 if (strlen(s) != 12)
373 return -1;
374 for (i = 0; i < 6; i++) {
375 da = 0;
376 for (j = 0; j < 2; j++) {
377 c = *s++;
378 da <<= 4;
379 da += ((c >= '0') && (c <= '9')) ?
380 (c - '0') : ((c & 0x0f) + 9);
381 }
382 dev->dev_addr[i] = da;
383 }
384 return 0;
385}
386
dddfbd82 387/*====================================================================
1da177e4
LT
388
389 Configuration stuff for Megahertz cards
390
391 mhz_3288_power() is used to power up a 3288's ethernet chip.
392 mhz_mfc_config() handles socket setup for multifunction (1144
393 and 3288) cards. mhz_setup() gets a card's hardware ethernet
394 address.
395
396======================================================================*/
397
fba395ee 398static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT
399{
400 struct net_device *dev = link->priv;
401 struct smc_private *smc = netdev_priv(dev);
402 u_char tmp;
403
404 /* Read the ISR twice... */
405 readb(smc->base+MEGAHERTZ_ISR);
406 udelay(5);
407 readb(smc->base+MEGAHERTZ_ISR);
408
409 /* Pause 200ms... */
410 mdelay(200);
411
412 /* Now read and write the COR... */
7feabb64 413 tmp = readb(smc->base + link->config_base + CISREG_COR);
1da177e4 414 udelay(5);
7feabb64 415 writeb(tmp, smc->base + link->config_base + CISREG_COR);
1da177e4
LT
416
417 return 0;
418}
419
b54bf94b
DB
420static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
421 cistpl_cftable_entry_t *cf,
8e2fc39d 422 cistpl_cftable_entry_t *dflt,
b54bf94b
DB
423 void *priv_data)
424{
425 int k;
90abdc3b 426 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB
427 for (k = 0; k < 0x400; k += 0x10) {
428 if (k & 0x80)
429 continue;
90abdc3b
DB
430 p_dev->resource[0]->start = k ^ 0x300;
431 p_dev->io_lines = 16;
432 if (!pcmcia_request_io(p_dev))
b54bf94b
DB
433 return 0;
434 }
435 return -ENODEV;
436}
437
fba395ee 438static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT
439{
440 struct net_device *dev = link->priv;
441 struct smc_private *smc = netdev_priv(dev);
b5cb259e 442 unsigned int offset;
b54bf94b 443 int i;
1da177e4 444
1ac71e5a 445 link->config_flags |= CONF_ENABLE_SPKR;
90abdc3b
DB
446 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
447 link->resource[1]->end = 8;
1da177e4 448
1da177e4
LT
449 /* The Megahertz combo cards have modem-like CIS entries, so
450 we have to explicitly try a bunch of port combinations. */
b54bf94b 451 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB
452 return -ENODEV;
453
9a017a91 454 dev->base_addr = link->resource[0]->start;
1da177e4
LT
455
456 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB
457 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
458 link->resource[2]->start = link->resource[2]->end = 0;
459 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 460 if (i != 0)
dddfbd82
DB
461 return -ENODEV;
462
cdb13808
DB
463 smc->base = ioremap(link->resource[2]->start,
464 resource_size(link->resource[2]));
7feabb64 465 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
cdb13808 466 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP
467 if ((i == 0) &&
468 (smc->manfid == MANFID_MEGAHERTZ) &&
469 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
470 mhz_3288_power(link);
1da177e4 471
dddfbd82 472 return 0;
1da177e4
LT
473}
474
dddfbd82
DB
475static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
476 tuple_t *tuple,
477 void *priv)
1da177e4 478{
dddfbd82
DB
479 struct net_device *dev = priv;
480 cisparse_t parse;
fb9e2d88 481 u8 *buf;
4638aef4 482
dddfbd82
DB
483 if (pcmcia_parse_tuple(tuple, &parse))
484 return -EINVAL;
1da177e4 485
fb9e2d88
KK
486 buf = parse.version_1.str + parse.version_1.ofs[3];
487
488 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 489 return 0;
4638aef4 490
dddfbd82
DB
491 return -EINVAL;
492};
493
fba395ee 494static int mhz_setup(struct pcmcia_device *link)
1da177e4 495{
1da177e4 496 struct net_device *dev = link->priv;
dddfbd82
DB
497 size_t len;
498 u8 *buf;
4638aef4 499 int rc;
1da177e4
LT
500
501 /* Read the station address from the CIS. It is stored as the last
502 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB
503 if ((link->prod_id[3]) &&
504 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
505 return 0;
506
507 /* Workarounds for broken cards start here. */
a1a98b72 508 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB
509 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
510 return 0;
1da177e4
LT
511
512 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 513 rc = -1;
dddfbd82
DB
514 len = pcmcia_get_tuple(link, 0x81, &buf);
515 if (buf && len >= 13) {
516 buf[12] = '\0';
fb9e2d88 517 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB
518 rc = 0;
519 }
520 kfree(buf);
521
522 return rc;
523};
1da177e4
LT
524
525/*======================================================================
526
527 Configuration stuff for the Motorola Mariner
528
529 mot_config() writes directly to the Mariner configuration
530 registers because the CIS is just bogus.
531
532======================================================================*/
533
fba395ee 534static void mot_config(struct pcmcia_device *link)
1da177e4
LT
535{
536 struct net_device *dev = link->priv;
537 struct smc_private *smc = netdev_priv(dev);
906da809 538 unsigned int ioaddr = dev->base_addr;
9a017a91 539 unsigned int iouart = link->resource[1]->start;
1da177e4
LT
540
541 /* Set UART base address and force map with COR bit 1 */
542 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
543 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
544 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
545
546 /* Set SMC base address and force map with COR bit 1 */
547 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
548 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
549 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
550
551 /* Wait for things to settle down */
552 mdelay(100);
553}
554
fba395ee 555static int mot_setup(struct pcmcia_device *link)
1da177e4
LT
556{
557 struct net_device *dev = link->priv;
906da809 558 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
559 int i, wait, loop;
560 u_int addr;
561
562 /* Read Ethernet address from Serial EEPROM */
563
564 for (i = 0; i < 3; i++) {
565 SMC_SELECT_BANK(2);
566 outw(MOT_EEPROM + i, ioaddr + POINTER);
567 SMC_SELECT_BANK(1);
568 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
569
570 for (loop = wait = 0; loop < 200; loop++) {
571 udelay(10);
572 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
573 if (wait == 0) break;
574 }
575
576 if (wait)
577 return -1;
578
579 addr = inw(ioaddr + GENERAL);
580 dev->dev_addr[2*i] = addr & 0xff;
581 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
582 }
583
584 return 0;
585}
586
587/*====================================================================*/
588
b54bf94b
DB
589static int smc_configcheck(struct pcmcia_device *p_dev,
590 cistpl_cftable_entry_t *cf,
8e2fc39d 591 cistpl_cftable_entry_t *dflt,
b54bf94b
DB
592 void *priv_data)
593{
90abdc3b
DB
594 p_dev->resource[0]->start = cf->io.win[0].base;
595 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
596 return pcmcia_request_io(p_dev);
b54bf94b
DB
597}
598
fba395ee 599static int smc_config(struct pcmcia_device *link)
1da177e4
LT
600{
601 struct net_device *dev = link->priv;
1da177e4
LT
602 int i;
603
90abdc3b 604 link->resource[0]->end = 16;
b54bf94b
DB
605 i = pcmcia_loop_config(link, smc_configcheck, NULL);
606 if (!i)
9a017a91 607 dev->base_addr = link->resource[0]->start;
4638aef4 608
1da177e4
LT
609 return i;
610}
611
dddfbd82 612
fba395ee 613static int smc_setup(struct pcmcia_device *link)
1da177e4 614{
1da177e4 615 struct net_device *dev = link->priv;
1da177e4
LT
616
617 /* Check for a LAN function extension tuple */
dddfbd82
DB
618 if (!pcmcia_get_mac_from_cis(link, dev))
619 return 0;
620
1da177e4 621 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 622 if (link->prod_id[2]) {
dddfbd82
DB
623 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
624 return 0;
4638aef4 625 }
dddfbd82 626 return -1;
1da177e4
LT
627}
628
629/*====================================================================*/
630
fba395ee 631static int osi_config(struct pcmcia_device *link)
1da177e4
LT
632{
633 struct net_device *dev = link->priv;
906da809 634 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT
635 int i, j;
636
1ac71e5a 637 link->config_flags |= CONF_ENABLE_SPKR;
90abdc3b
DB
638 link->resource[0]->end = 64;
639 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
640 link->resource[1]->end = 8;
1da177e4
LT
641
642 /* Enable Hard Decode, LAN, Modem */
90abdc3b 643 link->io_lines = 16;
7feabb64 644 link->config_index = 0x23;
1da177e4
LT
645
646 for (i = j = 0; j < 4; j++) {
90abdc3b
DB
647 link->resource[1]->start = com[j];
648 i = pcmcia_request_io(link);
4c89e88b
DB
649 if (i == 0)
650 break;
1da177e4 651 }
4c89e88b 652 if (i != 0) {
1da177e4 653 /* Fallback: turn off hard decode */
7feabb64 654 link->config_index = 0x03;
90abdc3b
DB
655 link->resource[1]->end = 0;
656 i = pcmcia_request_io(link);
1da177e4 657 }
9a017a91 658 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT
659 return i;
660}
661
75bf758f
JSR
662static int osi_load_firmware(struct pcmcia_device *link)
663{
664 const struct firmware *fw;
665 int i, err;
666
667 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
668 if (err) {
669 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
670 return err;
671 }
672
673 /* Download the Seven of Diamonds firmware */
674 for (i = 0; i < fw->size; i++) {
9a017a91 675 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR
676 udelay(50);
677 }
678 release_firmware(fw);
679 return err;
680}
681
dddfbd82
DB
682static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
683 tuple_t *tuple,
684 void *priv)
1da177e4 685{
dddfbd82
DB
686 struct net_device *dev = priv;
687 int i;
1da177e4 688
dddfbd82
DB
689 if (tuple->TupleDataLen < 8)
690 return -EINVAL;
691 if (tuple->TupleData[0] != 0x04)
692 return -EINVAL;
693 for (i = 0; i < 6; i++)
694 dev->dev_addr[i] = tuple->TupleData[i+2];
695 return 0;
696};
4638aef4 697
4638aef4 698
dddfbd82
DB
699static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
700{
701 struct net_device *dev = link->priv;
702 int rc;
1da177e4
LT
703
704 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB
705 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
706 return -1;
1da177e4
LT
707
708 if (((manfid == MANFID_OSITECH) &&
709 (cardid == PRODID_OSITECH_SEVEN)) ||
710 ((manfid == MANFID_PSION) &&
711 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
712 rc = osi_load_firmware(link);
713 if (rc)
dddfbd82 714 return rc;
1da177e4
LT
715 } else if (manfid == MANFID_OSITECH) {
716 /* Make sure both functions are powered up */
9a017a91 717 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 718 /* Now, turn on the interrupt for both card functions */
9a017a91 719 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 720 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB
721 inw(link->resource[0]->start + OSITECH_AUI_PWR),
722 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 723 }
dddfbd82 724 return 0;
1da177e4
LT
725}
726
fba395ee 727static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 728{
98e4c28b
DB
729 struct net_device *dev = link->priv;
730
e2d40963 731 if (link->open)
4bbed523 732 netif_device_detach(dev);
98e4c28b
DB
733
734 return 0;
735}
736
fba395ee 737static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 738{
98e4c28b
DB
739 struct net_device *dev = link->priv;
740 struct smc_private *smc = netdev_priv(dev);
741 int i;
742
e2d40963
DB
743 if ((smc->manfid == MANFID_MEGAHERTZ) &&
744 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
745 mhz_3288_power(link);
746 if (smc->manfid == MANFID_MOTOROLA)
747 mot_config(link);
748 if ((smc->manfid == MANFID_OSITECH) &&
749 (smc->cardid != PRODID_OSITECH_SEVEN)) {
750 /* Power up the card and enable interrupts */
751 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
752 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
753 }
754 if (((smc->manfid == MANFID_OSITECH) &&
755 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
756 ((smc->manfid == MANFID_PSION) &&
757 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
758 i = osi_load_firmware(link);
759 if (i) {
760 pr_err("smc91c92_cs: Failed to load firmware\n");
761 return i;
98e4c28b
DB
762 }
763 }
e2d40963
DB
764 if (link->open) {
765 smc_reset(dev);
766 netif_device_attach(dev);
767 }
98e4c28b
DB
768
769 return 0;
770}
771
772
1da177e4
LT
773/*======================================================================
774
775 This verifies that the chip is some SMC91cXX variant, and returns
776 the revision code if successful. Otherwise, it returns -ENODEV.
777
778======================================================================*/
779
fba395ee 780static int check_sig(struct pcmcia_device *link)
1da177e4
LT
781{
782 struct net_device *dev = link->priv;
906da809 783 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
784 int width;
785 u_short s;
786
787 SMC_SELECT_BANK(1);
788 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
789 /* Try powering up the chip */
790 outw(0, ioaddr + CONTROL);
791 mdelay(55);
792 }
793
794 /* Try setting bus width */
90abdc3b 795 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT
796 s = inb(ioaddr + CONFIG);
797 if (width)
798 s |= CFG_16BIT;
799 else
800 s &= ~CFG_16BIT;
801 outb(s, ioaddr + CONFIG);
802
803 /* Check Base Address Register to make sure bus width is OK */
804 s = inw(ioaddr + BASE_ADDR);
805 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
806 ((s >> 8) != (s & 0xff))) {
807 SMC_SELECT_BANK(3);
808 s = inw(ioaddr + REVISION);
809 return (s & 0xff);
810 }
811
812 if (width) {
4bbed523
DB
813 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
814
fba395ee 815 smc91c92_suspend(link);
fb49fa53 816 pcmcia_fixup_iowidth(link);
fba395ee 817 smc91c92_resume(link);
4bbed523 818 return check_sig(link);
1da177e4
LT
819 }
820 return -ENODEV;
821}
822
823/*======================================================================
824
825 smc91c92_config() is scheduled to run after a CARD_INSERTION event
826 is received, to configure the PCMCIA socket, and to make the
827 ethernet device available to the system.
828
829======================================================================*/
830
15b99ac1 831static int smc91c92_config(struct pcmcia_device *link)
1da177e4 832{
1da177e4
LT
833 struct net_device *dev = link->priv;
834 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
835 char *name;
836 int i, j, rev;
906da809 837 unsigned int ioaddr;
1da177e4
LT
838 u_long mir;
839
dd0fab5b 840 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 841
efd50585
DB
842 smc->manfid = link->manf_id;
843 smc->cardid = link->card_id;
1da177e4 844
1da177e4
LT
845 if ((smc->manfid == MANFID_OSITECH) &&
846 (smc->cardid != PRODID_OSITECH_SEVEN)) {
847 i = osi_config(link);
848 } else if ((smc->manfid == MANFID_MOTOROLA) ||
849 ((smc->manfid == MANFID_MEGAHERTZ) &&
850 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
851 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
852 i = mhz_mfc_config(link);
853 } else {
854 i = smc_config(link);
855 }
dd0fab5b
DB
856 if (i)
857 goto config_failed;
1da177e4 858
eb14120f 859 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB
860 if (i)
861 goto config_failed;
1ac71e5a 862 i = pcmcia_enable_device(link);
dd0fab5b
DB
863 if (i)
864 goto config_failed;
1da177e4
LT
865
866 if (smc->manfid == MANFID_MOTOROLA)
867 mot_config(link);
868
eb14120f 869 dev->irq = link->irq;
1da177e4
LT
870
871 if ((if_port >= 0) && (if_port <= 2))
872 dev->if_port = if_port;
873 else
874 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
875
876 switch (smc->manfid) {
877 case MANFID_OSITECH:
878 case MANFID_PSION:
879 i = osi_setup(link, smc->manfid, smc->cardid); break;
880 case MANFID_SMC:
881 case MANFID_NEW_MEDIA:
882 i = smc_setup(link); break;
883 case 0x128: /* For broken Megahertz cards */
884 case MANFID_MEGAHERTZ:
885 i = mhz_setup(link); break;
886 case MANFID_MOTOROLA:
887 default: /* get the hw address from EEPROM */
888 i = mot_setup(link); break;
889 }
890
891 if (i != 0) {
892 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 893 goto config_failed;
1da177e4
LT
894 }
895
896 smc->duplex = 0;
897 smc->rx_ovrn = 0;
898
899 rev = check_sig(link);
900 name = "???";
901 if (rev > 0)
902 switch (rev >> 4) {
903 case 3: name = "92"; break;
904 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
905 case 5: name = "95"; break;
906 case 7: name = "100"; break;
907 case 8: name = "100-FD"; break;
908 case 9: name = "110"; break;
909 }
910
911 ioaddr = dev->base_addr;
912 if (rev > 0) {
913 u_long mcr;
914 SMC_SELECT_BANK(0);
915 mir = inw(ioaddr + MEMINFO) & 0xff;
916 if (mir == 0xff) mir++;
917 /* Get scale factor for memory size */
918 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
919 mir *= 128 * (1<<((mcr >> 9) & 7));
920 SMC_SELECT_BANK(1);
921 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
922 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
923 if (smc->manfid == MANFID_OSITECH)
924 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
925 if ((rev >> 4) >= 7)
926 smc->cfg |= CFG_MII_SELECT;
927 } else
928 mir = 0;
929
930 if (smc->cfg & CFG_MII_SELECT) {
931 SMC_SELECT_BANK(3);
932
933 for (i = 0; i < 32; i++) {
934 j = mdio_read(dev, i, 1);
935 if ((j != 0) && (j != 0xffff)) break;
936 }
937 smc->mii_if.phy_id = (i < 32) ? i : -1;
938
939 SMC_SELECT_BANK(0);
940 }
941
dd2e5a15 942 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT
943
944 if (register_netdev(dev) != 0) {
945 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT
946 goto config_undo;
947 }
948
1da177e4 949 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 950 "hw_addr %pM\n",
0795af57 951 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 952 dev->dev_addr);
1da177e4
LT
953
954 if (rev > 0) {
955 if (mir & 0x3ff)
956 printk(KERN_INFO " %lu byte", mir);
957 else
958 printk(KERN_INFO " %lu kb", mir>>10);
959 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
960 "MII" : if_names[dev->if_port]);
961 }
962
963 if (smc->cfg & CFG_MII_SELECT) {
964 if (smc->mii_if.phy_id != -1) {
dd0fab5b 965 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT
966 smc->mii_if.phy_id, j);
967 } else {
968 printk(KERN_NOTICE " No MII transceivers found!\n");
969 }
970 }
15b99ac1 971 return 0;
1da177e4
LT
972
973config_undo:
974 unregister_netdev(dev);
dd0fab5b 975config_failed:
1da177e4 976 smc91c92_release(link);
fb9e2d88 977 free_netdev(dev);
15b99ac1 978 return -ENODEV;
1da177e4
LT
979} /* smc91c92_config */
980
981/*======================================================================
982
983 After a card is removed, smc91c92_release() will unregister the net
984 device, and release the PCMCIA configuration. If the device is
985 still open, this will be postponed until it is closed.
986
987======================================================================*/
988
fba395ee 989static void smc91c92_release(struct pcmcia_device *link)
1da177e4 990{
dd0fab5b 991 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 992 if (link->resource[2]->end) {
5f2a71fc
DB
993 struct net_device *dev = link->priv;
994 struct smc_private *smc = netdev_priv(dev);
995 iounmap(smc->base);
996 }
fba395ee 997 pcmcia_disable_device(link);
1da177e4
LT
998}
999
1da177e4
LT
1000/*======================================================================
1001
1002 MII interface support for SMC91cXX based cards
1003======================================================================*/
1004
1005#define MDIO_SHIFT_CLK 0x04
1006#define MDIO_DATA_OUT 0x01
1007#define MDIO_DIR_WRITE 0x08
1008#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1009#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1010#define MDIO_DATA_READ 0x02
1011
906da809 1012static void mdio_sync(unsigned int addr)
1da177e4
LT
1013{
1014 int bits;
1015 for (bits = 0; bits < 32; bits++) {
1016 outb(MDIO_DATA_WRITE1, addr);
1017 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1018 }
1019}
1020
1021static int mdio_read(struct net_device *dev, int phy_id, int loc)
1022{
906da809 1023 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1024 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1025 int i, retval = 0;
1026
1027 mdio_sync(addr);
1028 for (i = 13; i >= 0; i--) {
1029 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1030 outb(dat, addr);
1031 outb(dat | MDIO_SHIFT_CLK, addr);
1032 }
1033 for (i = 19; i > 0; i--) {
1034 outb(0, addr);
1035 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1036 outb(MDIO_SHIFT_CLK, addr);
1037 }
1038 return (retval>>1) & 0xffff;
1039}
1040
1041static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1042{
906da809 1043 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1044 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1045 int i;
1046
1047 mdio_sync(addr);
1048 for (i = 31; i >= 0; i--) {
1049 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1050 outb(dat, addr);
1051 outb(dat | MDIO_SHIFT_CLK, addr);
1052 }
1053 for (i = 1; i >= 0; i--) {
1054 outb(0, addr);
1055 outb(MDIO_SHIFT_CLK, addr);
1056 }
1057}
1058
1059/*======================================================================
1060
1061 The driver core code, most of which should be common with a
1062 non-PCMCIA implementation.
1063
1064======================================================================*/
1065
1066#ifdef PCMCIA_DEBUG
1067static void smc_dump(struct net_device *dev)
1068{
906da809 1069 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1070 u_short i, w, save;
1071 save = inw(ioaddr + BANK_SELECT);
1072 for (w = 0; w < 4; w++) {
1073 SMC_SELECT_BANK(w);
1074 printk(KERN_DEBUG "bank %d: ", w);
1075 for (i = 0; i < 14; i += 2)
1076 printk(" %04x", inw(ioaddr + i));
1077 printk("\n");
1078 }
1079 outw(save, ioaddr + BANK_SELECT);
1080}
1081#endif
1082
1083static int smc_open(struct net_device *dev)
1084{
1085 struct smc_private *smc = netdev_priv(dev);
fba395ee 1086 struct pcmcia_device *link = smc->p_dev;
1da177e4 1087
dd0fab5b 1088 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1089 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB
1090#ifdef PCMCIA_DEBUG
1091 smc_dump(dev);
1da177e4
LT
1092#endif
1093
1094 /* Check that the PCMCIA card is still here. */
9940ec36 1095 if (!pcmcia_dev_present(link))
1da177e4
LT
1096 return -ENODEV;
1097 /* Physical device present signature. */
1098 if (check_sig(link) < 0) {
1099 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1100 return -ENODEV;
1101 }
1102 link->open++;
1103
1104 netif_start_queue(dev);
1105 smc->saved_skb = NULL;
1106 smc->packets_waiting = 0;
1107
1108 smc_reset(dev);
1109 init_timer(&smc->media);
1110 smc->media.function = &media_check;
1111 smc->media.data = (u_long) dev;
1112 smc->media.expires = jiffies + HZ;
1113 add_timer(&smc->media);
1114
1115 return 0;
1116} /* smc_open */
1117
1118/*====================================================================*/
1119
1120static int smc_close(struct net_device *dev)
1121{
1122 struct smc_private *smc = netdev_priv(dev);
fba395ee 1123 struct pcmcia_device *link = smc->p_dev;
906da809 1124 unsigned int ioaddr = dev->base_addr;
1da177e4 1125
dd0fab5b 1126 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT
1127 dev->name, inw(ioaddr + BANK_SELECT));
1128
1129 netif_stop_queue(dev);
1130
1131 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1132 Don't bother to check for chip present. */
1133 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1134 outw(0, ioaddr + INTERRUPT);
1135 SMC_SELECT_BANK(0);
1136 mask_bits(0xff00, ioaddr + RCR);
1137 mask_bits(0xff00, ioaddr + TCR);
1138
1139 /* Put the chip into power-down mode. */
1140 SMC_SELECT_BANK(1);
1141 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1142
1143 link->open--;
1144 del_timer_sync(&smc->media);
1145
1146 return 0;
1147} /* smc_close */
1148
1149/*======================================================================
1150
1151 Transfer a packet to the hardware and trigger the packet send.
1152 This may be called at either from either the Tx queue code
1153 or the interrupt handler.
1154
1155======================================================================*/
1156
1157static void smc_hardware_send_packet(struct net_device * dev)
1158{
1159 struct smc_private *smc = netdev_priv(dev);
1160 struct sk_buff *skb = smc->saved_skb;
906da809 1161 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1162 u_char packet_no;
1163
1164 if (!skb) {
1165 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1166 return;
1167 }
1168
1169 /* There should be a packet slot waiting. */
1170 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1171 if (packet_no & 0x80) {
1172 /* If not, there is a hardware problem! Likely an ejected card. */
1173 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1174 " failed, status %#2.2x.\n", dev->name, packet_no);
1175 dev_kfree_skb_irq(skb);
1176 smc->saved_skb = NULL;
1177 netif_start_queue(dev);
1178 return;
1179 }
1180
6fb7298c 1181 dev->stats.tx_bytes += skb->len;
1da177e4
LT
1182 /* The card should use the just-allocated buffer. */
1183 outw(packet_no, ioaddr + PNR_ARR);
1184 /* point to the beginning of the packet */
1185 outw(PTR_AUTOINC , ioaddr + POINTER);
1186
1187 /* Send the packet length (+6 for status, length and ctl byte)
1188 and the status word (set to zeros). */
1189 {
1190 u_char *buf = skb->data;
1191 u_int length = skb->len; /* The chip will pad to ethernet min. */
1192
dd0fab5b 1193 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT
1194 dev->name, length);
1195
1196 /* send the packet length: +6 for status word, length, and ctl */
1197 outw(0, ioaddr + DATA_1);
1198 outw(length + 6, ioaddr + DATA_1);
1199 outsw(ioaddr + DATA_1, buf, length >> 1);
1200
1201 /* The odd last byte, if there is one, goes in the control word. */
1202 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1203 }
1204
1205 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1206 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1207 (inw(ioaddr + INTERRUPT) & 0xff00),
1208 ioaddr + INTERRUPT);
1209
1210 /* The chip does the rest of the work. */
1211 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1212
1213 smc->saved_skb = NULL;
1214 dev_kfree_skb_irq(skb);
1215 dev->trans_start = jiffies;
1216 netif_start_queue(dev);
1da177e4
LT
1217}
1218
1219/*====================================================================*/
1220
1221static void smc_tx_timeout(struct net_device *dev)
1222{
1223 struct smc_private *smc = netdev_priv(dev);
906da809 1224 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1225
1226 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1227 "Tx_status %2.2x status %4.4x.\n",
1228 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1229 dev->stats.tx_errors++;
1da177e4 1230 smc_reset(dev);
1ae5dc34 1231 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
1232 smc->saved_skb = NULL;
1233 netif_wake_queue(dev);
1234}
1235
dbf02fae
SH
1236static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1237 struct net_device *dev)
1da177e4
LT
1238{
1239 struct smc_private *smc = netdev_priv(dev);
906da809 1240 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1241 u_short num_pages;
1242 short time_out, ir;
85e27831 1243 unsigned long flags;
1da177e4
LT
1244
1245 netif_stop_queue(dev);
1246
dd0fab5b 1247 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT
1248 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1249
1250 if (smc->saved_skb) {
1251 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1252 dev->stats.tx_aborted_errors++;
1da177e4
LT
1253 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1254 dev->name);
5b548140 1255 return NETDEV_TX_BUSY;
1da177e4
LT
1256 }
1257 smc->saved_skb = skb;
1258
1259 num_pages = skb->len >> 8;
1260
1261 if (num_pages > 7) {
1262 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1263 dev_kfree_skb (skb);
1264 smc->saved_skb = NULL;
6fb7298c 1265 dev->stats.tx_dropped++;
6ed10654 1266 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT
1267 }
1268 /* A packet is now waiting. */
1269 smc->packets_waiting++;
1270
85e27831 1271 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1272 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1273
1274 /* need MC_RESET to keep the memory consistent. errata? */
1275 if (smc->rx_ovrn) {
1276 outw(MC_RESET, ioaddr + MMU_CMD);
1277 smc->rx_ovrn = 0;
1278 }
1279
1280 /* Allocate the memory; send the packet now if we win. */
1281 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1282 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1283 ir = inw(ioaddr+INTERRUPT);
1284 if (ir & IM_ALLOC_INT) {
1285 /* Acknowledge the interrupt, send the packet. */
1286 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1287 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1288 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1289 return NETDEV_TX_OK;
1da177e4
LT
1290 }
1291 }
1292
1293 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1294 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1295 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1296 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1297
6ed10654 1298 return NETDEV_TX_OK;
1da177e4
LT
1299}
1300
1301/*======================================================================
1302
1303 Handle a Tx anomolous event. Entered while in Window 2.
1304
1305======================================================================*/
1306
1307static void smc_tx_err(struct net_device * dev)
1308{
1309 struct smc_private *smc = netdev_priv(dev);
906da809 1310 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1311 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1312 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1313 int tx_status;
1314
1315 /* select this as the packet to read from */
1316 outw(packet_no, ioaddr + PNR_ARR);
1317
1318 /* read the first word from this packet */
1319 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1320
1321 tx_status = inw(ioaddr + DATA_1);
1322
6fb7298c
SH
1323 dev->stats.tx_errors++;
1324 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1325 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1326 if (tx_status & TS_16COL) {
6fb7298c 1327 dev->stats.tx_aborted_errors++;
1da177e4
LT
1328 smc->tx_err++;
1329 }
1330
1331 if (tx_status & TS_SUCCESS) {
1332 printk(KERN_NOTICE "%s: Successful packet caused error "
1333 "interrupt?\n", dev->name);
1334 }
1335 /* re-enable transmit */
1336 SMC_SELECT_BANK(0);
1337 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1338 SMC_SELECT_BANK(2);
1339
1340 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1341
1342 /* one less packet waiting for me */
1343 smc->packets_waiting--;
1344
1345 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT
1346}
1347
1348/*====================================================================*/
1349
1350static void smc_eph_irq(struct net_device *dev)
1351{
1352 struct smc_private *smc = netdev_priv(dev);
906da809 1353 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1354 u_short card_stats, ephs;
1355
1356 SMC_SELECT_BANK(0);
1357 ephs = inw(ioaddr + EPH);
dd0fab5b 1358 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT
1359 " %4.4x.\n", dev->name, ephs);
1360 /* Could be a counter roll-over warning: update stats. */
1361 card_stats = inw(ioaddr + COUNTER);
1362 /* single collisions */
6fb7298c 1363 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1364 card_stats >>= 4;
1365 /* multiple collisions */
6fb7298c 1366 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1367#if 0 /* These are for when linux supports these statistics */
1368 card_stats >>= 4; /* deferred */
1369 card_stats >>= 4; /* excess deferred */
1370#endif
1371 /* If we had a transmit error we must re-enable the transmitter. */
1372 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1373
1374 /* Clear a link error interrupt. */
1375 SMC_SELECT_BANK(1);
1376 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1377 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1378 ioaddr + CONTROL);
1379 SMC_SELECT_BANK(2);
1380}
1381
1382/*====================================================================*/
1383
7d12e780 1384static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT
1385{
1386 struct net_device *dev = dev_id;
1387 struct smc_private *smc = netdev_priv(dev);
906da809 1388 unsigned int ioaddr;
1da177e4
LT
1389 u_short saved_bank, saved_pointer, mask, status;
1390 unsigned int handled = 1;
1391 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1392
1393 if (!netif_device_present(dev))
1394 return IRQ_NONE;
1395
1396 ioaddr = dev->base_addr;
1397
dd0fab5b 1398 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT
1399 irq, ioaddr);
1400
85e27831 1401 spin_lock(&smc->lock);
1da177e4
LT
1402 smc->watchdog = 0;
1403 saved_bank = inw(ioaddr + BANK_SELECT);
1404 if ((saved_bank & 0xff00) != 0x3300) {
1405 /* The device does not exist -- the card could be off-line, or
1406 maybe it has been ejected. */
dd0fab5b 1407 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT
1408 "/ejected device.\n", dev->name, irq);
1409 handled = 0;
1410 goto irq_done;
1411 }
1412
1413 SMC_SELECT_BANK(2);
1414 saved_pointer = inw(ioaddr + POINTER);
1415 mask = inw(ioaddr + INTERRUPT) >> 8;
1416 /* clear all interrupts */
1417 outw(0, ioaddr + INTERRUPT);
1418
1419 do { /* read the status flag, and mask it */
1420 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1421 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT
1422 status, mask);
1423 if ((status & mask) == 0) {
1424 if (bogus_cnt == INTR_WORK)
1425 handled = 0;
1426 break;
1427 }
1428 if (status & IM_RCV_INT) {
1429 /* Got a packet(s). */
1430 smc_rx(dev);
1431 }
1432 if (status & IM_TX_INT) {
1433 smc_tx_err(dev);
1434 outw(IM_TX_INT, ioaddr + INTERRUPT);
1435 }
1436 status &= mask;
1437 if (status & IM_TX_EMPTY_INT) {
1438 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1439 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1440 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT
1441 smc->packets_waiting = 0;
1442 }
1443 if (status & IM_ALLOC_INT) {
1444 /* Clear this interrupt so it doesn't happen again */
1445 mask &= ~IM_ALLOC_INT;
1446
1447 smc_hardware_send_packet(dev);
1448
1449 /* enable xmit interrupts based on this */
1450 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1451
1452 /* and let the card send more packets to me */
1453 netif_wake_queue(dev);
1454 }
1455 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH
1456 dev->stats.rx_errors++;
1457 dev->stats.rx_fifo_errors++;
1da177e4
LT
1458 if (smc->duplex)
1459 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1460 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1461 }
1462 if (status & IM_EPH_INT)
1463 smc_eph_irq(dev);
1464 } while (--bogus_cnt);
1465
dd0fab5b 1466 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT
1467 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1468
1469 /* restore state register */
1470 outw((mask<<8), ioaddr + INTERRUPT);
1471 outw(saved_pointer, ioaddr + POINTER);
1472 SMC_SELECT_BANK(saved_bank);
1473
dd0fab5b 1474 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT
1475
1476irq_done:
1477
1478 if ((smc->manfid == MANFID_OSITECH) &&
1479 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1480 /* Retrigger interrupt if needed */
1481 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1482 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1483 }
1484 if (smc->manfid == MANFID_MOTOROLA) {
1485 u_char cor;
1486 cor = readb(smc->base + MOT_UART + CISREG_COR);
1487 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1488 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1489 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1490 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1491 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1492 }
9735b7ef
KK
1493
1494 if ((smc->base != NULL) && /* Megahertz MFC's */
1495 (smc->manfid == MANFID_MEGAHERTZ) &&
1496 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1497
1498 u_char tmp;
1499 tmp = readb(smc->base+MEGAHERTZ_ISR);
1500 tmp = readb(smc->base+MEGAHERTZ_ISR);
1501
1502 /* Retrigger interrupt if needed */
1503 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1504 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1505 }
9735b7ef 1506
85e27831 1507 spin_unlock(&smc->lock);
1da177e4
LT
1508 return IRQ_RETVAL(handled);
1509}
1510
1511/*====================================================================*/
1512
1513static void smc_rx(struct net_device *dev)
1514{
906da809 1515 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1516 int rx_status;
1517 int packet_length; /* Caution: not frame length, rather words
1518 to transfer from the chip. */
1519
1520 /* Assertion: we are in Window 2. */
1521
1522 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1523 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1524 dev->name);
1525 return;
1526 }
1527
1528 /* Reset the read pointer, and read the status and packet length. */
1529 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1530 rx_status = inw(ioaddr + DATA_1);
1531 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1532
dd0fab5b 1533 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT
1534 dev->name, rx_status, packet_length);
1535
1536 if (!(rx_status & RS_ERRORS)) {
1537 /* do stuff to make a new packet */
1538 struct sk_buff *skb;
1539
1540 /* Note: packet_length adds 5 or 6 extra bytes here! */
1541 skb = dev_alloc_skb(packet_length+2);
1542
1543 if (skb == NULL) {
dd0fab5b 1544 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1545 dev->stats.rx_dropped++;
1da177e4
LT
1546 outw(MC_RELEASE, ioaddr + MMU_CMD);
1547 return;
1548 }
1549
1550 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1551 skb_reserve(skb, 2);
1552 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1553 (packet_length+1)>>1);
1554 skb->protocol = eth_type_trans(skb, dev);
1555
1da177e4
LT
1556 netif_rx(skb);
1557 dev->last_rx = jiffies;
6fb7298c
SH
1558 dev->stats.rx_packets++;
1559 dev->stats.rx_bytes += packet_length;
1da177e4 1560 if (rx_status & RS_MULTICAST)
6fb7298c 1561 dev->stats.multicast++;
1da177e4
LT
1562 } else {
1563 /* error ... */
6fb7298c 1564 dev->stats.rx_errors++;
1da177e4 1565
6fb7298c 1566 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1567 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH
1568 dev->stats.rx_length_errors++;
1569 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT
1570 }
1571 /* Let the MMU free the memory of this packet. */
1572 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT
1573}
1574
1da177e4
LT
1575/*======================================================================
1576
1577 Set the receive mode.
1578
1579 This routine is used by both the protocol level to notify us of
1580 promiscuous/multicast mode changes, and by the open/reset code to
1581 initialize the Rx registers. We always set the multicast list and
1582 leave the receiver running.
1583
1584======================================================================*/
1585
1586static void set_rx_mode(struct net_device *dev)
1587{
906da809 1588 unsigned int ioaddr = dev->base_addr;
1da177e4 1589 struct smc_private *smc = netdev_priv(dev);
a6d37024 1590 unsigned char multicast_table[8];
1da177e4
LT
1591 unsigned long flags;
1592 u_short rx_cfg_setting;
a6d37024
KK
1593 int i;
1594
1595 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT
1596
1597 if (dev->flags & IFF_PROMISC) {
1da177e4
LT
1598 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1599 } else if (dev->flags & IFF_ALLMULTI)
1600 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1601 else {
4cd24eaf 1602 if (!netdev_mc_empty(dev)) {
22bedad3 1603 struct netdev_hw_addr *ha;
91fea585 1604
22bedad3
JP
1605 netdev_for_each_mc_addr(ha, dev) {
1606 u_int position = ether_crc(6, ha->addr);
91fea585
JP
1607 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1608 }
1da177e4
LT
1609 }
1610 rx_cfg_setting = RxStripCRC | RxEnable;
1611 }
1612
1613 /* Load MC table and Rx setting into the chip without interrupts. */
1614 spin_lock_irqsave(&smc->lock, flags);
1615 SMC_SELECT_BANK(3);
a6d37024
KK
1616 for (i = 0; i < 8; i++)
1617 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT
1618 SMC_SELECT_BANK(0);
1619 outw(rx_cfg_setting, ioaddr + RCR);
1620 SMC_SELECT_BANK(2);
1621 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1622}
1623
1624/*======================================================================
1625
1626 Senses when a card's config changes. Here, it's coax or TP.
1627
1628======================================================================*/
1629
1630static int s9k_config(struct net_device *dev, struct ifmap *map)
1631{
1632 struct smc_private *smc = netdev_priv(dev);
1633 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1634 if (smc->cfg & CFG_MII_SELECT)
1635 return -EOPNOTSUPP;
1636 else if (map->port > 2)
1637 return -EINVAL;
1638 dev->if_port = map->port;
1639 printk(KERN_INFO "%s: switched to %s port\n",
1640 dev->name, if_names[dev->if_port]);
1641 smc_reset(dev);
1642 }
1643 return 0;
1644}
1645
1646/*======================================================================
1647
1648 Reset the chip, reloading every register that might be corrupted.
1649
1650======================================================================*/
1651
1652/*
1653 Set transceiver type, perhaps to something other than what the user
1654 specified in dev->if_port.
1655*/
1656static void smc_set_xcvr(struct net_device *dev, int if_port)
1657{
1658 struct smc_private *smc = netdev_priv(dev);
906da809 1659 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1660 u_short saved_bank;
1661
1662 saved_bank = inw(ioaddr + BANK_SELECT);
1663 SMC_SELECT_BANK(1);
1664 if (if_port == 2) {
1665 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1666 if ((smc->manfid == MANFID_OSITECH) &&
1667 (smc->cardid != PRODID_OSITECH_SEVEN))
1668 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1669 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1670 } else {
1671 outw(smc->cfg, ioaddr + CONFIG);
1672 if ((smc->manfid == MANFID_OSITECH) &&
1673 (smc->cardid != PRODID_OSITECH_SEVEN))
1674 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1675 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1676 }
1677 SMC_SELECT_BANK(saved_bank);
1678}
1679
1680static void smc_reset(struct net_device *dev)
1681{
906da809 1682 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1683 struct smc_private *smc = netdev_priv(dev);
1684 int i;
1685
dd0fab5b 1686 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT
1687
1688 /* The first interaction must be a write to bring the chip out
1689 of sleep mode. */
1690 SMC_SELECT_BANK(0);
1691 /* Reset the chip. */
1692 outw(RCR_SOFTRESET, ioaddr + RCR);
1693 udelay(10);
1694
1695 /* Clear the transmit and receive configuration registers. */
1696 outw(RCR_CLEAR, ioaddr + RCR);
1697 outw(TCR_CLEAR, ioaddr + TCR);
1698
1699 /* Set the Window 1 control, configuration and station addr registers.
1700 No point in writing the I/O base register ;-> */
1701 SMC_SELECT_BANK(1);
d6e05edc 1702 /* Automatically release successfully transmitted packets,
1da177e4
LT
1703 Accept link errors, counter and Tx error interrupts. */
1704 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1705 ioaddr + CONTROL);
1706 smc_set_xcvr(dev, dev->if_port);
1707 if ((smc->manfid == MANFID_OSITECH) &&
1708 (smc->cardid != PRODID_OSITECH_SEVEN))
1709 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1710 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1711 ioaddr - 0x10 + OSITECH_AUI_PWR);
1712
1713 /* Fill in the physical address. The databook is wrong about the order! */
1714 for (i = 0; i < 6; i += 2)
1715 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1716 ioaddr + ADDR0 + i);
1717
1718 /* Reset the MMU */
1719 SMC_SELECT_BANK(2);
1720 outw(MC_RESET, ioaddr + MMU_CMD);
1721 outw(0, ioaddr + INTERRUPT);
1722
1723 /* Re-enable the chip. */
1724 SMC_SELECT_BANK(0);
1725 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1726 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1727 set_rx_mode(dev);
1728
1729 if (smc->cfg & CFG_MII_SELECT) {
1730 SMC_SELECT_BANK(3);
1731
1732 /* Reset MII */
1733 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1734
1735 /* Advertise 100F, 100H, 10F, 10H */
1736 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1737
1738 /* Restart MII autonegotiation */
1739 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1740 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1741 }
1742
1743 /* Enable interrupts. */
1744 SMC_SELECT_BANK(2);
1745 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1746 ioaddr + INTERRUPT);
1747}
1748
1749/*======================================================================
1750
1751 Media selection timer routine
1752
1753======================================================================*/
1754
1755static void media_check(u_long arg)
1756{
1757 struct net_device *dev = (struct net_device *) arg;
1758 struct smc_private *smc = netdev_priv(dev);
906da809 1759 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1760 u_short i, media, saved_bank;
1761 u_short link;
85e27831
K
1762 unsigned long flags;
1763
1764 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1765
1766 saved_bank = inw(ioaddr + BANK_SELECT);
1767
1768 if (!netif_device_present(dev))
1769 goto reschedule;
1770
1771 SMC_SELECT_BANK(2);
1772
1773 /* need MC_RESET to keep the memory consistent. errata? */
1774 if (smc->rx_ovrn) {
1775 outw(MC_RESET, ioaddr + MMU_CMD);
1776 smc->rx_ovrn = 0;
1777 }
1778 i = inw(ioaddr + INTERRUPT);
1779 SMC_SELECT_BANK(0);
1780 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1781 SMC_SELECT_BANK(1);
1782 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1783
2a915157
KK
1784 SMC_SELECT_BANK(saved_bank);
1785 spin_unlock_irqrestore(&smc->lock, flags);
1786
1da177e4
LT
1787 /* Check for pending interrupt with watchdog flag set: with
1788 this, we can limp along even if the interrupt is blocked */
1789 if (smc->watchdog++ && ((i>>8) & i)) {
1790 if (!smc->fast_poll)
1791 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1792 local_irq_save(flags);
e363d138 1793 smc_interrupt(dev->irq, dev);
2a915157 1794 local_irq_restore(flags);
1da177e4
LT
1795 smc->fast_poll = HZ;
1796 }
1797 if (smc->fast_poll) {
1798 smc->fast_poll--;
1799 smc->media.expires = jiffies + HZ/100;
1800 add_timer(&smc->media);
1da177e4
LT
1801 return;
1802 }
1803
2a915157
KK
1804 spin_lock_irqsave(&smc->lock, flags);
1805
1806 saved_bank = inw(ioaddr + BANK_SELECT);
1807
1da177e4
LT
1808 if (smc->cfg & CFG_MII_SELECT) {
1809 if (smc->mii_if.phy_id < 0)
1810 goto reschedule;
1811
1812 SMC_SELECT_BANK(3);
1813 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1814 if (!link || (link == 0xffff)) {
1815 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1816 smc->mii_if.phy_id = -1;
1817 goto reschedule;
1818 }
1819
1820 link &= 0x0004;
1821 if (link != smc->link_status) {
1822 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1823 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1824 (link) ? "found" : "lost");
1825 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1826 ? TCR_FDUPLX : 0);
1827 if (link) {
1828 printk(KERN_INFO "%s: autonegotiation complete: "
1829 "%sbaseT-%cD selected\n", dev->name,
1830 ((p & 0x0180) ? "100" : "10"),
1831 (smc->duplex ? 'F' : 'H'));
1832 }
1833 SMC_SELECT_BANK(0);
1834 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1835 smc->link_status = link;
1836 }
1837 goto reschedule;
1838 }
1839
1840 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1841 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT
1842 if (smc->tx_err || (smc->media_status & EPH_16COL))
1843 media |= EPH_16COL;
1844 }
1845 smc->tx_err = 0;
1846
1847 if (media != smc->media_status) {
1848 if ((media & smc->media_status & 1) &&
1849 ((smc->media_status ^ media) & EPH_LINK_OK))
1850 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1851 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1852 else if ((media & smc->media_status & 2) &&
1853 ((smc->media_status ^ media) & EPH_16COL))
1854 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1855 (media & EPH_16COL ? "problem" : "ok"));
1856 if (dev->if_port == 0) {
1857 if (media & 1) {
1858 if (media & EPH_LINK_OK)
1859 printk(KERN_INFO "%s: flipped to 10baseT\n",
1860 dev->name);
1861 else
1862 smc_set_xcvr(dev, 2);
1863 } else {
1864 if (media & EPH_16COL)
1865 smc_set_xcvr(dev, 1);
1866 else
1867 printk(KERN_INFO "%s: flipped to 10base2\n",
1868 dev->name);
1869 }
1870 }
1871 smc->media_status = media;
1872 }
1873
1874reschedule:
1875 smc->media.expires = jiffies + HZ;
1876 add_timer(&smc->media);
1877 SMC_SELECT_BANK(saved_bank);
85e27831 1878 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1879}
1880
1881static int smc_link_ok(struct net_device *dev)
1882{
906da809 1883 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1884 struct smc_private *smc = netdev_priv(dev);
1885
1886 if (smc->cfg & CFG_MII_SELECT) {
1887 return mii_link_ok(&smc->mii_if);
1888 } else {
1889 SMC_SELECT_BANK(0);
1890 return inw(ioaddr + EPH) & EPH_LINK_OK;
1891 }
1892}
1893
1894static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1895{
1896 u16 tmp;
906da809 1897 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1898
1899 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1900 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1901
1902 SMC_SELECT_BANK(1);
1903 tmp = inw(ioaddr + CONFIG);
1904 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1905 ecmd->transceiver = XCVR_INTERNAL;
1906 ecmd->speed = SPEED_10;
1907 ecmd->phy_address = ioaddr + MGMT;
1908
1909 SMC_SELECT_BANK(0);
1910 tmp = inw(ioaddr + TCR);
1911 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1912
1913 return 0;
1914}
1915
1916static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1917{
1918 u16 tmp;
906da809 1919 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1920
1921 if (ecmd->speed != SPEED_10)
1922 return -EINVAL;
1923 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1924 return -EINVAL;
1925 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1926 return -EINVAL;
1927 if (ecmd->transceiver != XCVR_INTERNAL)
1928 return -EINVAL;
1929
1930 if (ecmd->port == PORT_AUI)
1931 smc_set_xcvr(dev, 1);
1932 else
1933 smc_set_xcvr(dev, 0);
1934
1935 SMC_SELECT_BANK(0);
1936 tmp = inw(ioaddr + TCR);
1937 if (ecmd->duplex == DUPLEX_FULL)
1938 tmp |= TCR_FDUPLX;
1939 else
1940 tmp &= ~TCR_FDUPLX;
1941 outw(tmp, ioaddr + TCR);
1942
1943 return 0;
1944}
1945
1946static int check_if_running(struct net_device *dev)
1947{
1948 if (!netif_running(dev))
1949 return -EINVAL;
1950 return 0;
1951}
1952
1953static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1954{
1955 strcpy(info->driver, DRV_NAME);
1956 strcpy(info->version, DRV_VERSION);
1957}
1958
1959static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1960{
1961 struct smc_private *smc = netdev_priv(dev);
906da809 1962 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1963 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1964 int ret;
2a915157 1965 unsigned long flags;
1da177e4 1966
2a915157 1967 spin_lock_irqsave(&smc->lock, flags);
85e27831 1968 SMC_SELECT_BANK(3);
1da177e4
LT
1969 if (smc->cfg & CFG_MII_SELECT)
1970 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1971 else
1972 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1973 SMC_SELECT_BANK(saved_bank);
2a915157 1974 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1975 return ret;
1976}
1977
1978static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1979{
1980 struct smc_private *smc = netdev_priv(dev);
906da809 1981 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1982 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1983 int ret;
2a915157 1984 unsigned long flags;
1da177e4 1985
2a915157 1986 spin_lock_irqsave(&smc->lock, flags);
85e27831 1987 SMC_SELECT_BANK(3);
1da177e4
LT
1988 if (smc->cfg & CFG_MII_SELECT)
1989 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1990 else
1991 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1992 SMC_SELECT_BANK(saved_bank);
2a915157 1993 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1994 return ret;
1995}
1996
1997static u32 smc_get_link(struct net_device *dev)
1998{
1999 struct smc_private *smc = netdev_priv(dev);
906da809 2000 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2001 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2002 u32 ret;
2a915157 2003 unsigned long flags;
1da177e4 2004
2a915157 2005 spin_lock_irqsave(&smc->lock, flags);
85e27831 2006 SMC_SELECT_BANK(3);
1da177e4 2007 ret = smc_link_ok(dev);
1da177e4 2008 SMC_SELECT_BANK(saved_bank);
2a915157 2009 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2010 return ret;
2011}
2012
1da177e4
LT
2013static int smc_nway_reset(struct net_device *dev)
2014{
2015 struct smc_private *smc = netdev_priv(dev);
2016 if (smc->cfg & CFG_MII_SELECT) {
906da809 2017 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2018 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2019 int res;
2020
2021 SMC_SELECT_BANK(3);
2022 res = mii_nway_restart(&smc->mii_if);
2023 SMC_SELECT_BANK(saved_bank);
2024
2025 return res;
2026 } else
2027 return -EOPNOTSUPP;
2028}
2029
7282d491 2030static const struct ethtool_ops ethtool_ops = {
1da177e4
LT
2031 .begin = check_if_running,
2032 .get_drvinfo = smc_get_drvinfo,
2033 .get_settings = smc_get_settings,
2034 .set_settings = smc_set_settings,
2035 .get_link = smc_get_link,
1da177e4
LT
2036 .nway_reset = smc_nway_reset,
2037};
2038
2039static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2040{
2041 struct smc_private *smc = netdev_priv(dev);
2042 struct mii_ioctl_data *mii = if_mii(rq);
2043 int rc = 0;
2044 u16 saved_bank;
906da809 2045 unsigned int ioaddr = dev->base_addr;
2a915157 2046 unsigned long flags;
1da177e4
LT
2047
2048 if (!netif_running(dev))
2049 return -EINVAL;
2050
2a915157 2051 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
2052 saved_bank = inw(ioaddr + BANK_SELECT);
2053 SMC_SELECT_BANK(3);
2054 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2055 SMC_SELECT_BANK(saved_bank);
2a915157 2056 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2057 return rc;
2058}
2059
5c672220
DB
2060static struct pcmcia_device_id smc91c92_ids[] = {
2061 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2062 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2063 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2064 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2065 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2066 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2067 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2068 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K
2069 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2070 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB
2071 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2072 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2073 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2074 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2075 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2076 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2077 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2078 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2079 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K
2080 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2081 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB
2082 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2083 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2084 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2085 /* These conflict with other cards! */
2086 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2087 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2088 PCMCIA_DEVICE_NULL,
2089};
2090MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2091
1da177e4
LT
2092static struct pcmcia_driver smc91c92_cs_driver = {
2093 .owner = THIS_MODULE,
2094 .drv = {
2095 .name = "smc91c92_cs",
2096 },
15b99ac1 2097 .probe = smc91c92_probe,
cc3b4866 2098 .remove = smc91c92_detach,
5c672220 2099 .id_table = smc91c92_ids,
98e4c28b
DB
2100 .suspend = smc91c92_suspend,
2101 .resume = smc91c92_resume,
1da177e4
LT
2102};
2103
2104static int __init init_smc91c92_cs(void)
2105{
2106 return pcmcia_register_driver(&smc91c92_cs_driver);
2107}
2108
2109static void __exit exit_smc91c92_cs(void)
2110{
2111 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT
2112}
2113
2114module_init(init_smc91c92_cs);
2115module_exit(exit_smc91c92_cs);