Commit | Line | Data |
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3d396eb1 AK |
1 | /* |
2 | * Copyright (C) 2003 - 2006 NetXen, Inc. | |
3 | * All rights reserved. | |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
25 | * NetXen, | |
26 | * 3965 Freedom Circle, Fourth floor, | |
27 | * Santa Clara, CA 95054 | |
28 | * | |
29 | * | |
30 | * Source file for NIC routines to initialize the Phantom Hardware | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/netdevice.h> | |
35 | #include <linux/delay.h> | |
36 | #include "netxen_nic.h" | |
37 | #include "netxen_nic_hw.h" | |
38 | #include "netxen_nic_ioctl.h" | |
39 | #include "netxen_nic_phan_reg.h" | |
40 | ||
41 | struct crb_addr_pair { | |
42 | long addr; | |
43 | long data; | |
44 | }; | |
45 | ||
46 | #define NETXEN_MAX_CRB_XFORM 60 | |
47 | static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; | |
48 | #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff ) | |
49 | ||
50 | #define crb_addr_transform(name) \ | |
51 | crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ | |
52 | NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 | |
53 | ||
cb8011ad AK |
54 | #define NETXEN_NIC_XDMA_RESET 0x8000ff |
55 | ||
3d396eb1 AK |
56 | static inline void |
57 | netxen_nic_locked_write_reg(struct netxen_adapter *adapter, | |
58 | unsigned long off, int *data) | |
59 | { | |
cb8011ad | 60 | void __iomem *addr = pci_base_offset(adapter, off); |
3d396eb1 AK |
61 | writel(*data, addr); |
62 | } | |
63 | ||
64 | static void crb_addr_transform_setup(void) | |
65 | { | |
66 | crb_addr_transform(XDMA); | |
67 | crb_addr_transform(TIMR); | |
68 | crb_addr_transform(SRE); | |
69 | crb_addr_transform(SQN3); | |
70 | crb_addr_transform(SQN2); | |
71 | crb_addr_transform(SQN1); | |
72 | crb_addr_transform(SQN0); | |
73 | crb_addr_transform(SQS3); | |
74 | crb_addr_transform(SQS2); | |
75 | crb_addr_transform(SQS1); | |
76 | crb_addr_transform(SQS0); | |
77 | crb_addr_transform(RPMX7); | |
78 | crb_addr_transform(RPMX6); | |
79 | crb_addr_transform(RPMX5); | |
80 | crb_addr_transform(RPMX4); | |
81 | crb_addr_transform(RPMX3); | |
82 | crb_addr_transform(RPMX2); | |
83 | crb_addr_transform(RPMX1); | |
84 | crb_addr_transform(RPMX0); | |
85 | crb_addr_transform(ROMUSB); | |
86 | crb_addr_transform(SN); | |
87 | crb_addr_transform(QMN); | |
88 | crb_addr_transform(QMS); | |
89 | crb_addr_transform(PGNI); | |
90 | crb_addr_transform(PGND); | |
91 | crb_addr_transform(PGN3); | |
92 | crb_addr_transform(PGN2); | |
93 | crb_addr_transform(PGN1); | |
94 | crb_addr_transform(PGN0); | |
95 | crb_addr_transform(PGSI); | |
96 | crb_addr_transform(PGSD); | |
97 | crb_addr_transform(PGS3); | |
98 | crb_addr_transform(PGS2); | |
99 | crb_addr_transform(PGS1); | |
100 | crb_addr_transform(PGS0); | |
101 | crb_addr_transform(PS); | |
102 | crb_addr_transform(PH); | |
103 | crb_addr_transform(NIU); | |
104 | crb_addr_transform(I2Q); | |
105 | crb_addr_transform(EG); | |
106 | crb_addr_transform(MN); | |
107 | crb_addr_transform(MS); | |
108 | crb_addr_transform(CAS2); | |
109 | crb_addr_transform(CAS1); | |
110 | crb_addr_transform(CAS0); | |
111 | crb_addr_transform(CAM); | |
112 | crb_addr_transform(C2C1); | |
113 | crb_addr_transform(C2C0); | |
114 | } | |
115 | ||
116 | int netxen_init_firmware(struct netxen_adapter *adapter) | |
117 | { | |
118 | u32 state = 0, loops = 0, err = 0; | |
119 | ||
120 | /* Window 1 call */ | |
121 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
122 | ||
123 | if (state == PHAN_INITIALIZE_ACK) | |
124 | return 0; | |
125 | ||
126 | while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) { | |
127 | udelay(100); | |
128 | /* Window 1 call */ | |
129 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
130 | ||
131 | loops++; | |
132 | } | |
133 | if (loops >= 2000) { | |
134 | printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n", | |
135 | state); | |
136 | err = -EIO; | |
137 | return err; | |
138 | } | |
139 | /* Window 1 call */ | |
140 | writel(PHAN_INITIALIZE_ACK, | |
141 | NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
142 | ||
143 | return err; | |
144 | } | |
145 | ||
cb8011ad AK |
146 | #define NETXEN_ADDR_LIMIT 0xffffffffULL |
147 | ||
148 | void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr, | |
149 | struct pci_dev **used_dev) | |
150 | { | |
151 | void *addr; | |
152 | ||
153 | addr = pci_alloc_consistent(pdev, sz, ptr); | |
154 | if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) { | |
155 | *used_dev = pdev; | |
156 | return addr; | |
157 | } | |
158 | pci_free_consistent(pdev, sz, addr, *ptr); | |
159 | addr = pci_alloc_consistent(NULL, sz, ptr); | |
160 | *used_dev = NULL; | |
161 | return addr; | |
162 | } | |
163 | ||
3d396eb1 AK |
164 | void netxen_initialize_adapter_sw(struct netxen_adapter *adapter) |
165 | { | |
166 | int ctxid, ring; | |
167 | u32 i; | |
168 | u32 num_rx_bufs = 0; | |
169 | struct netxen_rcv_desc_ctx *rcv_desc; | |
170 | ||
171 | DPRINTK(INFO, "initializing some queues: %p\n", adapter); | |
172 | for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) { | |
173 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
174 | struct netxen_rx_buffer *rx_buf; | |
175 | rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring]; | |
176 | rcv_desc->rcv_free = rcv_desc->max_rx_desc_count; | |
177 | rcv_desc->begin_alloc = 0; | |
178 | rx_buf = rcv_desc->rx_buf_arr; | |
179 | num_rx_bufs = rcv_desc->max_rx_desc_count; | |
180 | /* | |
181 | * Now go through all of them, set reference handles | |
182 | * and put them in the queues. | |
183 | */ | |
184 | for (i = 0; i < num_rx_bufs; i++) { | |
185 | rx_buf->ref_handle = i; | |
186 | rx_buf->state = NETXEN_BUFFER_FREE; | |
187 | ||
188 | DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:" | |
189 | "%p\n", ctxid, i, rx_buf); | |
190 | rx_buf++; | |
191 | } | |
192 | } | |
193 | } | |
194 | DPRINTK(INFO, "initialized buffers for %s and %s\n", | |
195 | "adapter->free_cmd_buf_list", "adapter->free_rxbuf"); | |
196 | } | |
197 | ||
198 | void netxen_initialize_adapter_hw(struct netxen_adapter *adapter) | |
199 | { | |
cb8011ad AK |
200 | int ports = 0; |
201 | struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); | |
202 | ||
3d396eb1 AK |
203 | if (netxen_nic_get_board_info(adapter) != 0) |
204 | printk("%s: Error getting board config info.\n", | |
205 | netxen_nic_driver_name); | |
cb8011ad AK |
206 | get_brd_port_by_type(board_info->board_type, &ports); |
207 | if (ports == 0) | |
3d396eb1 AK |
208 | printk(KERN_ERR "%s: Unknown board type\n", |
209 | netxen_nic_driver_name); | |
cb8011ad | 210 | adapter->ahw.max_ports = ports; |
3d396eb1 AK |
211 | } |
212 | ||
213 | void netxen_initialize_adapter_ops(struct netxen_adapter *adapter) | |
214 | { | |
3d396eb1 AK |
215 | switch (adapter->ahw.board_type) { |
216 | case NETXEN_NIC_GBE: | |
80922fbc | 217 | adapter->enable_phy_interrupts = |
3d396eb1 | 218 | netxen_niu_gbe_enable_phy_interrupts; |
80922fbc | 219 | adapter->disable_phy_interrupts = |
3d396eb1 | 220 | netxen_niu_gbe_disable_phy_interrupts; |
80922fbc AK |
221 | adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr; |
222 | adapter->macaddr_set = netxen_niu_macaddr_set; | |
223 | adapter->set_mtu = netxen_nic_set_mtu_gb; | |
224 | adapter->set_promisc = netxen_niu_set_promiscuous_mode; | |
225 | adapter->unset_promisc = netxen_niu_set_promiscuous_mode; | |
226 | adapter->phy_read = netxen_niu_gbe_phy_read; | |
227 | adapter->phy_write = netxen_niu_gbe_phy_write; | |
228 | adapter->init_port = netxen_niu_gbe_init_port; | |
229 | adapter->init_niu = netxen_nic_init_niu_gb; | |
230 | adapter->stop_port = netxen_niu_disable_gbe_port; | |
3d396eb1 AK |
231 | break; |
232 | ||
233 | case NETXEN_NIC_XGBE: | |
80922fbc | 234 | adapter->enable_phy_interrupts = |
3d396eb1 | 235 | netxen_niu_xgbe_enable_phy_interrupts; |
80922fbc | 236 | adapter->disable_phy_interrupts = |
3d396eb1 | 237 | netxen_niu_xgbe_disable_phy_interrupts; |
80922fbc AK |
238 | adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr; |
239 | adapter->macaddr_set = netxen_niu_xg_macaddr_set; | |
240 | adapter->set_mtu = netxen_nic_set_mtu_xgb; | |
241 | adapter->init_port = netxen_niu_xg_init_port; | |
242 | adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; | |
243 | adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode; | |
244 | adapter->stop_port = netxen_niu_disable_xg_port; | |
3d396eb1 AK |
245 | break; |
246 | ||
247 | default: | |
248 | break; | |
249 | } | |
250 | } | |
251 | ||
252 | /* | |
253 | * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB | |
254 | * address to external PCI CRB address. | |
255 | */ | |
256 | unsigned long netxen_decode_crb_addr(unsigned long addr) | |
257 | { | |
258 | int i; | |
259 | unsigned long base_addr, offset, pci_base; | |
260 | ||
261 | crb_addr_transform_setup(); | |
262 | ||
263 | pci_base = NETXEN_ADDR_ERROR; | |
264 | base_addr = addr & 0xfff00000; | |
265 | offset = addr & 0x000fffff; | |
266 | ||
267 | for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { | |
268 | if (crb_addr_xform[i] == base_addr) { | |
269 | pci_base = i << 20; | |
270 | break; | |
271 | } | |
272 | } | |
273 | if (pci_base == NETXEN_ADDR_ERROR) | |
274 | return pci_base; | |
275 | else | |
276 | return (pci_base + offset); | |
277 | } | |
278 | ||
279 | static long rom_max_timeout = 10000; | |
280 | static long rom_lock_timeout = 1000000; | |
281 | ||
282 | static inline int rom_lock(struct netxen_adapter *adapter) | |
283 | { | |
284 | int iter; | |
285 | u32 done = 0; | |
286 | int timeout = 0; | |
287 | ||
288 | while (!done) { | |
289 | /* acquire semaphore2 from PCI HW block */ | |
290 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK), | |
291 | &done); | |
292 | if (done == 1) | |
293 | break; | |
294 | if (timeout >= rom_lock_timeout) | |
295 | return -EIO; | |
296 | ||
297 | timeout++; | |
298 | /* | |
299 | * Yield CPU | |
300 | */ | |
301 | if (!in_atomic()) | |
302 | schedule(); | |
303 | else { | |
304 | for (iter = 0; iter < 20; iter++) | |
305 | cpu_relax(); /*This a nop instr on i386 */ | |
306 | } | |
307 | } | |
308 | netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER); | |
309 | return 0; | |
310 | } | |
311 | ||
3d396eb1 AK |
312 | int netxen_wait_rom_done(struct netxen_adapter *adapter) |
313 | { | |
314 | long timeout = 0; | |
315 | long done = 0; | |
316 | ||
317 | while (done == 0) { | |
318 | done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS); | |
319 | done &= 2; | |
320 | timeout++; | |
321 | if (timeout >= rom_max_timeout) { | |
322 | printk("Timeout reached waiting for rom done"); | |
323 | return -EIO; | |
324 | } | |
325 | } | |
326 | return 0; | |
327 | } | |
328 | ||
cb8011ad AK |
329 | static inline int netxen_rom_wren(struct netxen_adapter *adapter) |
330 | { | |
331 | /* Set write enable latch in ROM status register */ | |
332 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
333 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
334 | M25P_INSTR_WREN); | |
335 | if (netxen_wait_rom_done(adapter)) { | |
336 | return -1; | |
337 | } | |
338 | return 0; | |
339 | } | |
340 | ||
341 | static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter, | |
342 | unsigned int addr) | |
343 | { | |
344 | unsigned int data = 0xdeaddead; | |
345 | data = netxen_nic_reg_read(adapter, addr); | |
346 | return data; | |
347 | } | |
348 | ||
349 | static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter) | |
350 | { | |
351 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
352 | M25P_INSTR_RDSR); | |
353 | if (netxen_wait_rom_done(adapter)) { | |
354 | return -1; | |
355 | } | |
356 | return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
357 | } | |
358 | ||
359 | static inline void netxen_rom_unlock(struct netxen_adapter *adapter) | |
360 | { | |
361 | u32 val; | |
362 | ||
363 | /* release semaphore2 */ | |
364 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val); | |
365 | ||
366 | } | |
367 | ||
368 | int netxen_rom_wip_poll(struct netxen_adapter *adapter) | |
369 | { | |
370 | long timeout = 0; | |
371 | long wip = 1; | |
372 | int val; | |
373 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
374 | while (wip != 0) { | |
375 | val = netxen_do_rom_rdsr(adapter); | |
376 | wip = val & 1; | |
377 | timeout++; | |
378 | if (timeout > rom_max_timeout) { | |
379 | return -1; | |
380 | } | |
381 | } | |
382 | return 0; | |
383 | } | |
384 | ||
80922fbc AK |
385 | static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr, |
386 | int data) | |
cb8011ad AK |
387 | { |
388 | if (netxen_rom_wren(adapter)) { | |
389 | return -1; | |
390 | } | |
391 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data); | |
392 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
393 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
394 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
395 | M25P_INSTR_PP); | |
396 | if (netxen_wait_rom_done(adapter)) { | |
397 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
398 | return -1; | |
399 | } | |
400 | ||
401 | return netxen_rom_wip_poll(adapter); | |
402 | } | |
403 | ||
3d396eb1 AK |
404 | static inline int |
405 | do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | |
406 | { | |
407 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
408 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
409 | udelay(100); /* prevent bursting on CRB */ | |
410 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
411 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); | |
412 | if (netxen_wait_rom_done(adapter)) { | |
413 | printk("Error waiting for rom done\n"); | |
414 | return -EIO; | |
415 | } | |
416 | /* reset abyte_cnt and dummy_byte_cnt */ | |
417 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
418 | udelay(100); /* prevent bursting on CRB */ | |
419 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
420 | ||
421 | *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
422 | return 0; | |
423 | } | |
424 | ||
425 | int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | |
426 | { | |
427 | int ret; | |
428 | ||
429 | if (rom_lock(adapter) != 0) | |
430 | return -EIO; | |
431 | ||
432 | ret = do_rom_fast_read(adapter, addr, valp); | |
cb8011ad AK |
433 | netxen_rom_unlock(adapter); |
434 | return ret; | |
435 | } | |
436 | ||
437 | int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data) | |
438 | { | |
439 | int ret = 0; | |
440 | ||
441 | if (rom_lock(adapter) != 0) { | |
442 | return -1; | |
443 | } | |
444 | ret = do_rom_fast_write(adapter, addr, data); | |
445 | netxen_rom_unlock(adapter); | |
446 | return ret; | |
447 | } | |
448 | int netxen_do_rom_se(struct netxen_adapter *adapter, int addr) | |
449 | { | |
450 | netxen_rom_wren(adapter); | |
451 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
452 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
453 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
454 | M25P_INSTR_SE); | |
455 | if (netxen_wait_rom_done(adapter)) { | |
456 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
457 | return -1; | |
458 | } | |
459 | return netxen_rom_wip_poll(adapter); | |
460 | } | |
461 | ||
462 | int netxen_rom_se(struct netxen_adapter *adapter, int addr) | |
463 | { | |
464 | int ret = 0; | |
465 | if (rom_lock(adapter) != 0) { | |
466 | return -1; | |
467 | } | |
468 | ret = netxen_do_rom_se(adapter, addr); | |
469 | netxen_rom_unlock(adapter); | |
3d396eb1 AK |
470 | return ret; |
471 | } | |
472 | ||
473 | #define NETXEN_BOARDTYPE 0x4008 | |
474 | #define NETXEN_BOARDNUM 0x400c | |
475 | #define NETXEN_CHIPNUM 0x4010 | |
476 | #define NETXEN_ROMBUS_RESET 0xFFFFFFFF | |
477 | #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL | |
478 | #define NETXEN_ROM_FOUND_INIT 0x400 | |
479 | ||
480 | int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |
481 | { | |
482 | int addr, val, status; | |
483 | int n, i; | |
484 | int init_delay = 0; | |
485 | struct crb_addr_pair *buf; | |
486 | unsigned long off; | |
487 | ||
488 | /* resetall */ | |
489 | status = netxen_nic_get_board_info(adapter); | |
490 | if (status) | |
cb8011ad | 491 | printk("%s: netxen_pinit_from_rom: Error getting board info\n", |
3d396eb1 AK |
492 | netxen_nic_driver_name); |
493 | ||
494 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
495 | NETXEN_ROMBUS_RESET); | |
496 | ||
497 | if (verbose) { | |
498 | int val; | |
499 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0) | |
500 | printk("P2 ROM board type: 0x%08x\n", val); | |
501 | else | |
502 | printk("Could not read board type\n"); | |
503 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0) | |
504 | printk("P2 ROM board num: 0x%08x\n", val); | |
505 | else | |
506 | printk("Could not read board number\n"); | |
507 | if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0) | |
508 | printk("P2 ROM chip num: 0x%08x\n", val); | |
509 | else | |
510 | printk("Could not read chip number\n"); | |
511 | } | |
512 | ||
513 | if (netxen_rom_fast_read(adapter, 0, &n) == 0 | |
514 | && (n & NETXEN_ROM_FIRST_BARRIER)) { | |
515 | n &= ~NETXEN_ROM_ROUNDUP; | |
516 | if (n < NETXEN_ROM_FOUND_INIT) { | |
517 | if (verbose) | |
518 | printk("%s: %d CRB init values found" | |
519 | " in ROM.\n", netxen_nic_driver_name, n); | |
520 | } else { | |
521 | printk("%s:n=0x%x Error! NetXen card flash not" | |
522 | " initialized.\n", __FUNCTION__, n); | |
523 | return -EIO; | |
524 | } | |
525 | buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); | |
526 | if (buf == NULL) { | |
cb8011ad AK |
527 | printk("%s: netxen_pinit_from_rom: Unable to calloc " |
528 | "memory.\n", netxen_nic_driver_name); | |
3d396eb1 AK |
529 | return -ENOMEM; |
530 | } | |
531 | for (i = 0; i < n; i++) { | |
532 | if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0 | |
533 | || netxen_rom_fast_read(adapter, 8 * i + 8, | |
534 | &addr) != 0) | |
535 | return -EIO; | |
536 | ||
537 | buf[i].addr = addr; | |
538 | buf[i].data = val; | |
539 | ||
540 | if (verbose) | |
541 | printk("%s: PCI: 0x%08x == 0x%08x\n", | |
542 | netxen_nic_driver_name, (unsigned int) | |
543 | netxen_decode_crb_addr((unsigned long) | |
544 | addr), val); | |
545 | } | |
546 | for (i = 0; i < n; i++) { | |
547 | ||
548 | off = | |
549 | netxen_decode_crb_addr((unsigned long)buf[i].addr) + | |
550 | NETXEN_PCI_CRBSPACE; | |
551 | /* skipping cold reboot MAGIC */ | |
552 | if (off == NETXEN_CAM_RAM(0x1fc)) | |
553 | continue; | |
554 | ||
555 | /* After writing this register, HW needs time for CRB */ | |
556 | /* to quiet down (else crb_window returns 0xffffffff) */ | |
557 | if (off == NETXEN_ROMUSB_GLB_SW_RESET) { | |
558 | init_delay = 1; | |
559 | /* hold xdma in reset also */ | |
cb8011ad | 560 | buf[i].data = NETXEN_NIC_XDMA_RESET; |
3d396eb1 AK |
561 | } |
562 | ||
563 | if (ADDR_IN_WINDOW1(off)) { | |
564 | writel(buf[i].data, | |
565 | NETXEN_CRB_NORMALIZE(adapter, off)); | |
566 | } else { | |
567 | netxen_nic_pci_change_crbwindow(adapter, 0); | |
568 | writel(buf[i].data, | |
cb8011ad | 569 | pci_base_offset(adapter, off)); |
3d396eb1 AK |
570 | |
571 | netxen_nic_pci_change_crbwindow(adapter, 1); | |
572 | } | |
573 | if (init_delay == 1) { | |
574 | ssleep(1); | |
575 | init_delay = 0; | |
576 | } | |
577 | msleep(1); | |
578 | } | |
579 | kfree(buf); | |
580 | ||
581 | /* disable_peg_cache_all */ | |
582 | ||
583 | /* unreset_net_cache */ | |
584 | netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val, | |
585 | 4); | |
586 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
587 | (val & 0xffffff0f)); | |
588 | /* p2dn replyCount */ | |
589 | netxen_crb_writelit_adapter(adapter, | |
590 | NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); | |
591 | /* disable_peg_cache 0 */ | |
592 | netxen_crb_writelit_adapter(adapter, | |
593 | NETXEN_CRB_PEG_NET_D + 0x4c, 8); | |
594 | /* disable_peg_cache 1 */ | |
595 | netxen_crb_writelit_adapter(adapter, | |
596 | NETXEN_CRB_PEG_NET_I + 0x4c, 8); | |
597 | ||
598 | /* peg_clr_all */ | |
599 | ||
600 | /* peg_clr 0 */ | |
601 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, | |
602 | 0); | |
603 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, | |
604 | 0); | |
605 | /* peg_clr 1 */ | |
606 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, | |
607 | 0); | |
608 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, | |
609 | 0); | |
610 | /* peg_clr 2 */ | |
611 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, | |
612 | 0); | |
613 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, | |
614 | 0); | |
615 | /* peg_clr 3 */ | |
616 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, | |
617 | 0); | |
618 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, | |
619 | 0); | |
620 | } | |
621 | return 0; | |
622 | } | |
623 | ||
cb8011ad | 624 | void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) |
3d396eb1 AK |
625 | { |
626 | u32 val = 0; | |
627 | int loops = 0; | |
628 | ||
cb8011ad | 629 | if (!pegtune_val) { |
3d396eb1 AK |
630 | while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) { |
631 | udelay(100); | |
cb8011ad | 632 | schedule(); |
3d396eb1 AK |
633 | val = |
634 | readl(NETXEN_CRB_NORMALIZE | |
635 | (adapter, CRB_CMDPEG_STATE)); | |
636 | loops++; | |
637 | } | |
638 | if (val != PHAN_INITIALIZE_COMPLETE) | |
639 | printk("WARNING: Initial boot wait loop failed...\n"); | |
640 | } | |
641 | } | |
642 | ||
643 | int netxen_nic_rx_has_work(struct netxen_adapter *adapter) | |
644 | { | |
645 | int ctx; | |
646 | ||
647 | for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) { | |
648 | struct netxen_recv_context *recv_ctx = | |
649 | &(adapter->recv_ctx[ctx]); | |
650 | u32 consumer; | |
651 | struct status_desc *desc_head; | |
cb8011ad | 652 | struct status_desc *desc; |
3d396eb1 AK |
653 | |
654 | consumer = recv_ctx->status_rx_consumer; | |
655 | desc_head = recv_ctx->rcv_status_desc_head; | |
656 | desc = &desc_head[consumer]; | |
657 | ||
658 | if (((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST)) | |
659 | return 1; | |
660 | } | |
661 | ||
662 | return 0; | |
663 | } | |
664 | ||
cb8011ad AK |
665 | static inline int netxen_nic_check_temp(struct netxen_adapter *adapter) |
666 | { | |
667 | int port_num; | |
668 | struct netxen_port *port; | |
669 | struct net_device *netdev; | |
670 | uint32_t temp, temp_state, temp_val; | |
671 | int rv = 0; | |
672 | ||
673 | temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE)); | |
674 | ||
675 | temp_state = nx_get_temp_state(temp); | |
676 | temp_val = nx_get_temp_val(temp); | |
677 | ||
678 | if (temp_state == NX_TEMP_PANIC) { | |
679 | printk(KERN_ALERT | |
680 | "%s: Device temperature %d degrees C exceeds" | |
681 | " maximum allowed. Hardware has been shut down.\n", | |
682 | netxen_nic_driver_name, temp_val); | |
683 | for (port_num = 0; port_num < adapter->ahw.max_ports; | |
684 | port_num++) { | |
685 | port = adapter->port[port_num]; | |
686 | netdev = port->netdev; | |
687 | ||
688 | netif_carrier_off(netdev); | |
689 | netif_stop_queue(netdev); | |
690 | } | |
691 | rv = 1; | |
692 | } else if (temp_state == NX_TEMP_WARN) { | |
693 | if (adapter->temp == NX_TEMP_NORMAL) { | |
694 | printk(KERN_ALERT | |
695 | "%s: Device temperature %d degrees C " | |
696 | "exceeds operating range." | |
697 | " Immediate action needed.\n", | |
698 | netxen_nic_driver_name, temp_val); | |
699 | } | |
700 | } else { | |
701 | if (adapter->temp == NX_TEMP_WARN) { | |
702 | printk(KERN_INFO | |
703 | "%s: Device temperature is now %d degrees C" | |
704 | " in normal range.\n", netxen_nic_driver_name, | |
705 | temp_val); | |
706 | } | |
707 | } | |
708 | adapter->temp = temp_state; | |
709 | return rv; | |
710 | } | |
711 | ||
3d396eb1 AK |
712 | void netxen_watchdog_task(unsigned long v) |
713 | { | |
714 | int port_num; | |
715 | struct netxen_port *port; | |
716 | struct net_device *netdev; | |
717 | struct netxen_adapter *adapter = (struct netxen_adapter *)v; | |
718 | ||
cb8011ad AK |
719 | if (netxen_nic_check_temp(adapter)) |
720 | return; | |
721 | ||
3d396eb1 AK |
722 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { |
723 | port = adapter->port[port_num]; | |
724 | netdev = port->netdev; | |
725 | ||
726 | if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) { | |
727 | printk(KERN_INFO "%s port %d, %s carrier is now ok\n", | |
728 | netxen_nic_driver_name, port_num, netdev->name); | |
729 | netif_carrier_on(netdev); | |
730 | } | |
731 | ||
732 | if (netif_queue_stopped(netdev)) | |
733 | netif_wake_queue(netdev); | |
734 | } | |
735 | ||
80922fbc AK |
736 | if (adapter->handle_phy_intr) |
737 | adapter->handle_phy_intr(adapter); | |
3d396eb1 AK |
738 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); |
739 | } | |
740 | ||
741 | /* | |
742 | * netxen_process_rcv() send the received packet to the protocol stack. | |
743 | * and if the number of receives exceeds RX_BUFFERS_REFILL, then we | |
744 | * invoke the routine to send more rx buffers to the Phantom... | |
745 | */ | |
746 | void | |
747 | netxen_process_rcv(struct netxen_adapter *adapter, int ctxid, | |
748 | struct status_desc *desc) | |
749 | { | |
750 | struct netxen_port *port = adapter->port[STATUS_DESC_PORT(desc)]; | |
751 | struct pci_dev *pdev = port->pdev; | |
752 | struct net_device *netdev = port->netdev; | |
753 | int index = le16_to_cpu(desc->reference_handle); | |
754 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); | |
755 | struct netxen_rx_buffer *buffer; | |
756 | struct sk_buff *skb; | |
757 | u32 length = le16_to_cpu(desc->total_length); | |
758 | u32 desc_ctx; | |
759 | struct netxen_rcv_desc_ctx *rcv_desc; | |
760 | int ret; | |
761 | ||
762 | desc_ctx = STATUS_DESC_TYPE(desc); | |
763 | if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) { | |
764 | printk("%s: %s Bad Rcv descriptor ring\n", | |
765 | netxen_nic_driver_name, netdev->name); | |
766 | return; | |
767 | } | |
768 | ||
769 | rcv_desc = &recv_ctx->rcv_desc[desc_ctx]; | |
770 | buffer = &rcv_desc->rx_buf_arr[index]; | |
771 | ||
772 | pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size, | |
773 | PCI_DMA_FROMDEVICE); | |
774 | ||
775 | skb = (struct sk_buff *)buffer->skb; | |
776 | ||
777 | if (likely(STATUS_DESC_STATUS(desc) == STATUS_CKSUM_OK)) { | |
778 | port->stats.csummed++; | |
779 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
780 | } else | |
781 | skb->ip_summed = CHECKSUM_NONE; | |
782 | skb->dev = netdev; | |
783 | skb_put(skb, length); | |
784 | skb->protocol = eth_type_trans(skb, netdev); | |
785 | ||
786 | ret = netif_receive_skb(skb); | |
787 | ||
788 | /* | |
789 | * RH: Do we need these stats on a regular basis. Can we get it from | |
790 | * Linux stats. | |
791 | */ | |
792 | switch (ret) { | |
793 | case NET_RX_SUCCESS: | |
794 | port->stats.uphappy++; | |
795 | break; | |
796 | ||
797 | case NET_RX_CN_LOW: | |
798 | port->stats.uplcong++; | |
799 | break; | |
800 | ||
801 | case NET_RX_CN_MOD: | |
802 | port->stats.upmcong++; | |
803 | break; | |
804 | ||
805 | case NET_RX_CN_HIGH: | |
806 | port->stats.uphcong++; | |
807 | break; | |
808 | ||
809 | case NET_RX_DROP: | |
810 | port->stats.updropped++; | |
811 | break; | |
812 | ||
813 | default: | |
814 | port->stats.updunno++; | |
815 | break; | |
816 | } | |
817 | ||
818 | netdev->last_rx = jiffies; | |
819 | ||
820 | rcv_desc->rcv_free++; | |
821 | rcv_desc->rcv_pending--; | |
822 | ||
823 | /* | |
824 | * We just consumed one buffer so post a buffer. | |
825 | */ | |
826 | adapter->stats.post_called++; | |
827 | buffer->skb = NULL; | |
828 | buffer->state = NETXEN_BUFFER_FREE; | |
829 | ||
830 | port->stats.no_rcv++; | |
831 | port->stats.rxbytes += length; | |
832 | } | |
833 | ||
834 | /* Process Receive status ring */ | |
835 | u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max) | |
836 | { | |
837 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); | |
838 | struct status_desc *desc_head = recv_ctx->rcv_status_desc_head; | |
839 | struct status_desc *desc; /* used to read status desc here */ | |
840 | u32 consumer = recv_ctx->status_rx_consumer; | |
841 | int count = 0, ring; | |
842 | ||
843 | DPRINTK(INFO, "procesing receive\n"); | |
844 | /* | |
845 | * we assume in this case that there is only one port and that is | |
846 | * port #1...changes need to be done in firmware to indicate port | |
847 | * number as part of the descriptor. This way we will be able to get | |
848 | * the netdev which is associated with that device. | |
849 | */ | |
850 | while (count < max) { | |
851 | desc = &desc_head[consumer]; | |
852 | if (!((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST)) { | |
853 | DPRINTK(ERR, "desc %p ownedby %x\n", desc, desc->owner); | |
854 | break; | |
855 | } | |
856 | netxen_process_rcv(adapter, ctxid, desc); | |
857 | desc->owner = STATUS_OWNER_PHANTOM; | |
858 | consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1); | |
859 | count++; | |
860 | } | |
861 | if (count) { | |
862 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
863 | netxen_post_rx_buffers(adapter, ctxid, ring); | |
864 | } | |
865 | } | |
866 | ||
867 | /* update the consumer index in phantom */ | |
868 | if (count) { | |
869 | adapter->stats.process_rcv++; | |
870 | recv_ctx->status_rx_consumer = consumer; | |
871 | ||
872 | /* Window = 1 */ | |
873 | writel(consumer, | |
874 | NETXEN_CRB_NORMALIZE(adapter, | |
875 | recv_crb_registers[ctxid]. | |
876 | crb_rcv_status_consumer)); | |
877 | } | |
878 | ||
879 | return count; | |
880 | } | |
881 | ||
882 | /* Process Command status ring */ | |
883 | void netxen_process_cmd_ring(unsigned long data) | |
884 | { | |
885 | u32 last_consumer; | |
886 | u32 consumer; | |
887 | struct netxen_adapter *adapter = (struct netxen_adapter *)data; | |
888 | int count = 0; | |
889 | struct netxen_cmd_buffer *buffer; | |
890 | struct netxen_port *port; /* port #1 */ | |
891 | struct netxen_port *nport; | |
892 | struct pci_dev *pdev; | |
893 | struct netxen_skb_frag *frag; | |
894 | u32 i; | |
895 | struct sk_buff *skb = NULL; | |
896 | int p; | |
897 | ||
898 | spin_lock(&adapter->tx_lock); | |
899 | last_consumer = adapter->last_cmd_consumer; | |
900 | DPRINTK(INFO, "procesing xmit complete\n"); | |
901 | /* we assume in this case that there is only one port and that is | |
902 | * port #1...changes need to be done in firmware to indicate port | |
903 | * number as part of the descriptor. This way we will be able to get | |
904 | * the netdev which is associated with that device. | |
905 | */ | |
3d396eb1 AK |
906 | consumer = |
907 | readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMD_CONSUMER_OFFSET)); | |
908 | ||
909 | if (last_consumer == consumer) { /* Ring is empty */ | |
910 | DPRINTK(INFO, "last_consumer %d == consumer %d\n", | |
911 | last_consumer, consumer); | |
912 | spin_unlock(&adapter->tx_lock); | |
913 | return; | |
914 | } | |
915 | ||
916 | adapter->proc_cmd_buf_counter++; | |
917 | adapter->stats.process_xmit++; | |
918 | /* | |
919 | * Not needed - does not seem to be used anywhere. | |
920 | * adapter->cmd_consumer = consumer; | |
921 | */ | |
922 | spin_unlock(&adapter->tx_lock); | |
923 | ||
924 | while ((last_consumer != consumer) && (count < MAX_STATUS_HANDLE)) { | |
925 | buffer = &adapter->cmd_buf_arr[last_consumer]; | |
926 | port = adapter->port[buffer->port]; | |
927 | pdev = port->pdev; | |
928 | frag = &buffer->frag_array[0]; | |
929 | skb = buffer->skb; | |
930 | if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) { | |
931 | pci_unmap_single(pdev, frag->dma, frag->length, | |
932 | PCI_DMA_TODEVICE); | |
933 | for (i = 1; i < buffer->frag_count; i++) { | |
934 | DPRINTK(INFO, "getting fragment no %d\n", i); | |
935 | frag++; /* Get the next frag */ | |
936 | pci_unmap_page(pdev, frag->dma, frag->length, | |
937 | PCI_DMA_TODEVICE); | |
938 | } | |
939 | ||
940 | port->stats.skbfreed++; | |
941 | dev_kfree_skb_any(skb); | |
942 | skb = NULL; | |
943 | } else if (adapter->proc_cmd_buf_counter == 1) { | |
944 | port->stats.txnullskb++; | |
945 | } | |
946 | if (unlikely(netif_queue_stopped(port->netdev) | |
947 | && netif_carrier_ok(port->netdev)) | |
948 | && ((jiffies - port->netdev->trans_start) > | |
949 | port->netdev->watchdog_timeo)) { | |
950 | schedule_work(&port->adapter->tx_timeout_task); | |
951 | } | |
952 | ||
953 | last_consumer = get_next_index(last_consumer, | |
954 | adapter->max_tx_desc_count); | |
955 | count++; | |
956 | } | |
957 | adapter->stats.noxmitdone += count; | |
958 | ||
959 | count = 0; | |
960 | spin_lock(&adapter->tx_lock); | |
961 | if ((--adapter->proc_cmd_buf_counter) == 0) { | |
962 | adapter->last_cmd_consumer = last_consumer; | |
963 | while ((adapter->last_cmd_consumer != consumer) | |
964 | && (count < MAX_STATUS_HANDLE)) { | |
965 | buffer = | |
966 | &adapter->cmd_buf_arr[adapter->last_cmd_consumer]; | |
967 | count++; | |
968 | if (buffer->skb) | |
969 | break; | |
970 | else | |
971 | adapter->last_cmd_consumer = | |
972 | get_next_index(adapter->last_cmd_consumer, | |
973 | adapter->max_tx_desc_count); | |
974 | } | |
975 | } | |
976 | if (count) { | |
977 | for (p = 0; p < adapter->ahw.max_ports; p++) { | |
978 | nport = adapter->port[p]; | |
979 | if (netif_queue_stopped(nport->netdev) | |
980 | && (nport->flags & NETXEN_NETDEV_STATUS)) { | |
981 | netif_wake_queue(nport->netdev); | |
982 | nport->flags &= ~NETXEN_NETDEV_STATUS; | |
983 | } | |
984 | } | |
985 | } | |
986 | ||
987 | spin_unlock(&adapter->tx_lock); | |
988 | DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer, | |
989 | __FUNCTION__); | |
990 | } | |
991 | ||
992 | /* | |
993 | * netxen_post_rx_buffers puts buffer in the Phantom memory | |
994 | */ | |
995 | void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid) | |
996 | { | |
997 | struct pci_dev *pdev = adapter->ahw.pdev; | |
998 | struct sk_buff *skb; | |
999 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); | |
1000 | struct netxen_rcv_desc_ctx *rcv_desc = NULL; | |
1001 | struct netxen_recv_crb *crbarea = &recv_crb_registers[ctx]; | |
1002 | struct netxen_rcv_desc_crb *rcv_desc_crb = NULL; | |
1003 | u32 producer; | |
1004 | struct rcv_desc *pdesc; | |
1005 | struct netxen_rx_buffer *buffer; | |
1006 | int count = 0; | |
1007 | int index = 0; | |
1008 | ||
1009 | adapter->stats.post_called++; | |
1010 | rcv_desc = &recv_ctx->rcv_desc[ringid]; | |
1011 | rcv_desc_crb = &crbarea->rcv_desc_crb[ringid]; | |
1012 | ||
1013 | producer = rcv_desc->producer; | |
1014 | index = rcv_desc->begin_alloc; | |
1015 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1016 | /* We can start writing rx descriptors into the phantom memory. */ | |
1017 | while (buffer->state == NETXEN_BUFFER_FREE) { | |
1018 | skb = dev_alloc_skb(rcv_desc->skb_size); | |
1019 | if (unlikely(!skb)) { | |
1020 | /* | |
1021 | * We need to schedule the posting of buffers to the pegs. | |
1022 | */ | |
1023 | rcv_desc->begin_alloc = index; | |
cb8011ad | 1024 | DPRINTK(ERR, "netxen_post_rx_buffers: " |
3d396eb1 AK |
1025 | " allocated only %d buffers\n", count); |
1026 | break; | |
1027 | } | |
1028 | count++; /* now there should be no failure */ | |
1029 | pdesc = &rcv_desc->desc_head[producer]; | |
1030 | skb_reserve(skb, NET_IP_ALIGN); | |
1031 | /* | |
1032 | * This will be setup when we receive the | |
1033 | * buffer after it has been filled | |
1034 | * skb->dev = netdev; | |
1035 | */ | |
1036 | buffer->skb = skb; | |
1037 | buffer->state = NETXEN_BUFFER_BUSY; | |
1038 | buffer->dma = pci_map_single(pdev, skb->data, | |
1039 | rcv_desc->dma_size, | |
1040 | PCI_DMA_FROMDEVICE); | |
1041 | /* make a rcv descriptor */ | |
1042 | pdesc->reference_handle = le16_to_cpu(buffer->ref_handle); | |
1043 | pdesc->buffer_length = le16_to_cpu(rcv_desc->dma_size); | |
1044 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); | |
1045 | DPRINTK(INFO, "done writing descripter\n"); | |
1046 | producer = | |
1047 | get_next_index(producer, rcv_desc->max_rx_desc_count); | |
1048 | index = get_next_index(index, rcv_desc->max_rx_desc_count); | |
1049 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1050 | } | |
1051 | ||
1052 | /* if we did allocate buffers, then write the count to Phantom */ | |
1053 | if (count) { | |
1054 | rcv_desc->begin_alloc = index; | |
1055 | rcv_desc->rcv_pending += count; | |
1056 | adapter->stats.lastposted = count; | |
1057 | adapter->stats.posted += count; | |
1058 | rcv_desc->producer = producer; | |
1059 | if (rcv_desc->rcv_free >= 32) { | |
1060 | rcv_desc->rcv_free = 0; | |
1061 | /* Window = 1 */ | |
1062 | writel((producer - 1) & | |
1063 | (rcv_desc->max_rx_desc_count - 1), | |
1064 | NETXEN_CRB_NORMALIZE(adapter, | |
1065 | rcv_desc_crb-> | |
1066 | crb_rcv_producer_offset)); | |
1067 | wmb(); | |
1068 | } | |
1069 | } | |
1070 | } | |
1071 | ||
1072 | int netxen_nic_tx_has_work(struct netxen_adapter *adapter) | |
1073 | { | |
1074 | if (find_diff_among(adapter->last_cmd_consumer, | |
1075 | adapter->cmd_producer, | |
1076 | adapter->max_tx_desc_count) > 0) | |
1077 | return 1; | |
1078 | ||
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | int | |
1083 | netxen_nic_fill_statistics(struct netxen_adapter *adapter, | |
1084 | struct netxen_port *port, | |
1085 | struct netxen_statistics *netxen_stats) | |
1086 | { | |
1087 | void __iomem *addr; | |
1088 | ||
1089 | if (adapter->ahw.board_type == NETXEN_NIC_XGBE) { | |
1090 | netxen_nic_pci_change_crbwindow(adapter, 0); | |
1091 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_BYTE_CNT, | |
1092 | &(netxen_stats->tx_bytes)); | |
1093 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_FRAME_CNT, | |
1094 | &(netxen_stats->tx_packets)); | |
1095 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_BYTE_CNT, | |
1096 | &(netxen_stats->rx_bytes)); | |
1097 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_FRAME_CNT, | |
1098 | &(netxen_stats->rx_packets)); | |
1099 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_AGGR_ERROR_CNT, | |
1100 | &(netxen_stats->rx_errors)); | |
1101 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_CRC_ERROR_CNT, | |
1102 | &(netxen_stats->rx_crc_errors)); | |
1103 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR, | |
1104 | &(netxen_stats-> | |
1105 | rx_long_length_error)); | |
1106 | NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR, | |
1107 | &(netxen_stats-> | |
1108 | rx_short_length_error)); | |
1109 | ||
1110 | netxen_nic_pci_change_crbwindow(adapter, 1); | |
1111 | } else { | |
1112 | spin_lock_bh(&adapter->tx_lock); | |
1113 | netxen_stats->tx_bytes = port->stats.txbytes; | |
1114 | netxen_stats->tx_packets = port->stats.xmitedframes + | |
1115 | port->stats.xmitfinished; | |
1116 | netxen_stats->rx_bytes = port->stats.rxbytes; | |
1117 | netxen_stats->rx_packets = port->stats.no_rcv; | |
1118 | netxen_stats->rx_errors = port->stats.rcvdbadskb; | |
1119 | netxen_stats->tx_errors = port->stats.nocmddescriptor; | |
1120 | netxen_stats->rx_short_length_error = port->stats.uplcong; | |
1121 | netxen_stats->rx_long_length_error = port->stats.uphcong; | |
1122 | netxen_stats->rx_crc_errors = 0; | |
1123 | netxen_stats->rx_mac_errors = 0; | |
1124 | spin_unlock_bh(&adapter->tx_lock); | |
1125 | } | |
1126 | return 0; | |
1127 | } | |
1128 | ||
1129 | void netxen_nic_clear_stats(struct netxen_adapter *adapter) | |
1130 | { | |
1131 | struct netxen_port *port; | |
1132 | int port_num; | |
1133 | ||
1134 | memset(&adapter->stats, 0, sizeof(adapter->stats)); | |
1135 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { | |
1136 | port = adapter->port[port_num]; | |
1137 | memset(&port->stats, 0, sizeof(port->stats)); | |
1138 | } | |
1139 | } | |
1140 | ||
1141 | int | |
1142 | netxen_nic_clear_statistics(struct netxen_adapter *adapter, | |
1143 | struct netxen_port *port) | |
1144 | { | |
1145 | int data = 0; | |
1146 | ||
1147 | netxen_nic_pci_change_crbwindow(adapter, 0); | |
1148 | ||
1149 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_BYTE_CNT, &data); | |
1150 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_FRAME_CNT, | |
1151 | &data); | |
1152 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_BYTE_CNT, &data); | |
1153 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_FRAME_CNT, | |
1154 | &data); | |
1155 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_AGGR_ERROR_CNT, | |
1156 | &data); | |
1157 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_CRC_ERROR_CNT, | |
1158 | &data); | |
1159 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR, | |
1160 | &data); | |
1161 | netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR, | |
1162 | &data); | |
1163 | ||
1164 | netxen_nic_pci_change_crbwindow(adapter, 1); | |
1165 | netxen_nic_clear_stats(adapter); | |
1166 | return 0; | |
1167 | } | |
1168 | ||
1169 | int | |
1170 | netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data, | |
1171 | struct netxen_port *port) | |
1172 | { | |
1173 | struct netxen_nic_ioctl_data data; | |
1174 | struct netxen_nic_ioctl_data *up_data; | |
1175 | int retval = 0; | |
1176 | struct netxen_statistics netxen_stats; | |
1177 | ||
1178 | up_data = (void *)u_data; | |
1179 | ||
1180 | DPRINTK(INFO, "doing ioctl for %p\n", adapter); | |
1181 | if (copy_from_user(&data, (void __user *)up_data, sizeof(data))) { | |
1182 | /* evil user tried to crash the kernel */ | |
1183 | DPRINTK(ERR, "bad copy from userland: %d\n", (int)sizeof(data)); | |
1184 | retval = -EFAULT; | |
1185 | goto error_out; | |
1186 | } | |
1187 | ||
1188 | /* Shouldn't access beyond legal limits of "char u[64];" member */ | |
1189 | if (!data.ptr && (data.size > sizeof(data.u))) { | |
1190 | /* evil user tried to crash the kernel */ | |
1191 | DPRINTK(ERR, "bad size: %d\n", data.size); | |
1192 | retval = -EFAULT; | |
1193 | goto error_out; | |
1194 | } | |
1195 | ||
1196 | switch (data.cmd) { | |
1197 | case netxen_nic_cmd_pci_read: | |
1198 | if ((retval = netxen_nic_hw_read_wx(adapter, data.off, | |
1199 | &(data.u), data.size))) | |
1200 | goto error_out; | |
1201 | if (copy_to_user | |
1202 | ((void __user *)&(up_data->u), &(data.u), data.size)) { | |
1203 | DPRINTK(ERR, "bad copy to userland: %d\n", | |
1204 | (int)sizeof(data)); | |
1205 | retval = -EFAULT; | |
1206 | goto error_out; | |
1207 | } | |
1208 | data.rv = 0; | |
1209 | break; | |
1210 | ||
1211 | case netxen_nic_cmd_pci_write: | |
1212 | data.rv = netxen_nic_hw_write_wx(adapter, data.off, &(data.u), | |
1213 | data.size); | |
1214 | break; | |
1215 | ||
1216 | case netxen_nic_cmd_pci_config_read: | |
1217 | switch (data.size) { | |
1218 | case 1: | |
1219 | data.rv = pci_read_config_byte(adapter->ahw.pdev, | |
1220 | data.off, | |
1221 | (char *)&(data.u)); | |
1222 | break; | |
1223 | case 2: | |
1224 | data.rv = pci_read_config_word(adapter->ahw.pdev, | |
1225 | data.off, | |
1226 | (short *)&(data.u)); | |
1227 | break; | |
1228 | case 4: | |
1229 | data.rv = pci_read_config_dword(adapter->ahw.pdev, | |
1230 | data.off, | |
1231 | (u32 *) & (data.u)); | |
1232 | break; | |
1233 | } | |
1234 | if (copy_to_user | |
1235 | ((void __user *)&(up_data->u), &(data.u), data.size)) { | |
1236 | DPRINTK(ERR, "bad copy to userland: %d\n", | |
1237 | (int)sizeof(data)); | |
1238 | retval = -EFAULT; | |
1239 | goto error_out; | |
1240 | } | |
1241 | break; | |
1242 | ||
1243 | case netxen_nic_cmd_pci_config_write: | |
1244 | switch (data.size) { | |
1245 | case 1: | |
1246 | data.rv = pci_write_config_byte(adapter->ahw.pdev, | |
1247 | data.off, | |
1248 | *(char *)&(data.u)); | |
1249 | break; | |
1250 | case 2: | |
1251 | data.rv = pci_write_config_word(adapter->ahw.pdev, | |
1252 | data.off, | |
1253 | *(short *)&(data.u)); | |
1254 | break; | |
1255 | case 4: | |
1256 | data.rv = pci_write_config_dword(adapter->ahw.pdev, | |
1257 | data.off, | |
1258 | *(u32 *) & (data.u)); | |
1259 | break; | |
1260 | } | |
1261 | break; | |
1262 | ||
1263 | case netxen_nic_cmd_get_stats: | |
1264 | data.rv = | |
1265 | netxen_nic_fill_statistics(adapter, port, &netxen_stats); | |
1266 | if (copy_to_user | |
1267 | ((void __user *)(up_data->ptr), (void *)&netxen_stats, | |
1268 | sizeof(struct netxen_statistics))) { | |
1269 | DPRINTK(ERR, "bad copy to userland: %d\n", | |
1270 | (int)sizeof(netxen_stats)); | |
1271 | retval = -EFAULT; | |
1272 | goto error_out; | |
1273 | } | |
1274 | up_data->rv = data.rv; | |
1275 | break; | |
1276 | ||
1277 | case netxen_nic_cmd_clear_stats: | |
1278 | data.rv = netxen_nic_clear_statistics(adapter, port); | |
1279 | up_data->rv = data.rv; | |
1280 | break; | |
1281 | ||
1282 | case netxen_nic_cmd_get_version: | |
1283 | if (copy_to_user | |
1284 | ((void __user *)&(up_data->u), NETXEN_NIC_LINUX_VERSIONID, | |
1285 | sizeof(NETXEN_NIC_LINUX_VERSIONID))) { | |
1286 | DPRINTK(ERR, "bad copy to userland: %d\n", | |
1287 | (int)sizeof(data)); | |
1288 | retval = -EFAULT; | |
1289 | goto error_out; | |
1290 | } | |
1291 | break; | |
1292 | ||
1293 | default: | |
1294 | DPRINTK(INFO, "bad command %d for %p\n", data.cmd, adapter); | |
1295 | retval = -EOPNOTSUPP; | |
1296 | goto error_out; | |
1297 | } | |
1298 | put_user(data.rv, (u16 __user *) (&(up_data->rv))); | |
1299 | DPRINTK(INFO, "done ioctl for %p well.\n", adapter); | |
1300 | ||
1301 | error_out: | |
1302 | return retval; | |
1303 | } |