Commit | Line | Data |
---|---|---|
a46c30fd | 1 | /* myri_sbus.c: MyriCOM MyriNET SBUS card driver. |
1da177e4 | 2 | * |
9e6b6e7d | 3 | * Copyright (C) 1996, 1999, 2006, 2008 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | */ |
5 | ||
6 | static char version[] = | |
a46c30fd | 7 | "myri_sbus.c:v2.0 June 23, 2006 David S. Miller (davem@davemloft.net)\n"; |
1da177e4 LT |
8 | |
9 | #include <linux/module.h> | |
1da177e4 LT |
10 | #include <linux/errno.h> |
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/fcntl.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/ioport.h> | |
16 | #include <linux/in.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/netdevice.h> | |
22 | #include <linux/etherdevice.h> | |
23 | #include <linux/skbuff.h> | |
24 | #include <linux/bitops.h> | |
738f2b7b | 25 | #include <linux/dma-mapping.h> |
9e6b6e7d DM |
26 | #include <linux/of.h> |
27 | #include <linux/of_device.h> | |
1da177e4 LT |
28 | |
29 | #include <net/dst.h> | |
30 | #include <net/arp.h> | |
31 | #include <net/sock.h> | |
32 | #include <net/ipv6.h> | |
33 | ||
34 | #include <asm/system.h> | |
35 | #include <asm/io.h> | |
36 | #include <asm/dma.h> | |
37 | #include <asm/byteorder.h> | |
38 | #include <asm/idprom.h> | |
1da177e4 LT |
39 | #include <asm/openprom.h> |
40 | #include <asm/oplib.h> | |
41 | #include <asm/auxio.h> | |
42 | #include <asm/pgtable.h> | |
43 | #include <asm/irq.h> | |
1da177e4 LT |
44 | |
45 | #include "myri_sbus.h" | |
46 | #include "myri_code.h" | |
47 | ||
48 | /* #define DEBUG_DETECT */ | |
49 | /* #define DEBUG_IRQ */ | |
50 | /* #define DEBUG_TRANSMIT */ | |
51 | /* #define DEBUG_RECEIVE */ | |
52 | /* #define DEBUG_HEADER */ | |
53 | ||
54 | #ifdef DEBUG_DETECT | |
55 | #define DET(x) printk x | |
56 | #else | |
57 | #define DET(x) | |
58 | #endif | |
59 | ||
60 | #ifdef DEBUG_IRQ | |
61 | #define DIRQ(x) printk x | |
62 | #else | |
63 | #define DIRQ(x) | |
64 | #endif | |
65 | ||
66 | #ifdef DEBUG_TRANSMIT | |
67 | #define DTX(x) printk x | |
68 | #else | |
69 | #define DTX(x) | |
70 | #endif | |
71 | ||
72 | #ifdef DEBUG_RECEIVE | |
73 | #define DRX(x) printk x | |
74 | #else | |
75 | #define DRX(x) | |
76 | #endif | |
77 | ||
78 | #ifdef DEBUG_HEADER | |
79 | #define DHDR(x) printk x | |
80 | #else | |
81 | #define DHDR(x) | |
82 | #endif | |
83 | ||
1da177e4 LT |
84 | static void myri_reset_off(void __iomem *lp, void __iomem *cregs) |
85 | { | |
86 | /* Clear IRQ mask. */ | |
87 | sbus_writel(0, lp + LANAI_EIMASK); | |
88 | ||
89 | /* Turn RESET function off. */ | |
90 | sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL); | |
91 | } | |
92 | ||
93 | static void myri_reset_on(void __iomem *cregs) | |
94 | { | |
95 | /* Enable RESET function. */ | |
96 | sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL); | |
97 | ||
98 | /* Disable IRQ's. */ | |
99 | sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL); | |
100 | } | |
101 | ||
102 | static void myri_disable_irq(void __iomem *lp, void __iomem *cregs) | |
103 | { | |
104 | sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL); | |
105 | sbus_writel(0, lp + LANAI_EIMASK); | |
106 | sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT); | |
107 | } | |
108 | ||
109 | static void myri_enable_irq(void __iomem *lp, void __iomem *cregs) | |
110 | { | |
111 | sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL); | |
112 | sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK); | |
113 | } | |
114 | ||
115 | static inline void bang_the_chip(struct myri_eth *mp) | |
116 | { | |
117 | struct myri_shmem __iomem *shmem = mp->shmem; | |
118 | void __iomem *cregs = mp->cregs; | |
119 | ||
120 | sbus_writel(1, &shmem->send); | |
121 | sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL); | |
122 | } | |
123 | ||
124 | static int myri_do_handshake(struct myri_eth *mp) | |
125 | { | |
126 | struct myri_shmem __iomem *shmem = mp->shmem; | |
127 | void __iomem *cregs = mp->cregs; | |
128 | struct myri_channel __iomem *chan = &shmem->channel; | |
129 | int tick = 0; | |
130 | ||
131 | DET(("myri_do_handshake: ")); | |
132 | if (sbus_readl(&chan->state) == STATE_READY) { | |
133 | DET(("Already STATE_READY, failed.\n")); | |
134 | return -1; /* We're hosed... */ | |
135 | } | |
136 | ||
137 | myri_disable_irq(mp->lregs, cregs); | |
138 | ||
9db7720c | 139 | while (tick++ < 25) { |
1da177e4 LT |
140 | u32 softstate; |
141 | ||
142 | /* Wake it up. */ | |
143 | DET(("shakedown, CONTROL_WON, ")); | |
144 | sbus_writel(1, &shmem->shakedown); | |
145 | sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL); | |
146 | ||
147 | softstate = sbus_readl(&chan->state); | |
148 | DET(("chanstate[%08x] ", softstate)); | |
149 | if (softstate == STATE_READY) { | |
150 | DET(("wakeup successful, ")); | |
151 | break; | |
152 | } | |
153 | ||
154 | if (softstate != STATE_WFN) { | |
155 | DET(("not WFN setting that, ")); | |
156 | sbus_writel(STATE_WFN, &chan->state); | |
157 | } | |
158 | ||
159 | udelay(20); | |
160 | } | |
161 | ||
162 | myri_enable_irq(mp->lregs, cregs); | |
163 | ||
164 | if (tick > 25) { | |
165 | DET(("25 ticks we lose, failure.\n")); | |
166 | return -1; | |
167 | } | |
168 | DET(("success\n")); | |
169 | return 0; | |
170 | } | |
171 | ||
b48194bf | 172 | static int __devinit myri_load_lanai(struct myri_eth *mp) |
1da177e4 LT |
173 | { |
174 | struct net_device *dev = mp->dev; | |
175 | struct myri_shmem __iomem *shmem = mp->shmem; | |
176 | void __iomem *rptr; | |
177 | int i; | |
178 | ||
179 | myri_disable_irq(mp->lregs, mp->cregs); | |
180 | myri_reset_on(mp->cregs); | |
181 | ||
182 | rptr = mp->lanai; | |
183 | for (i = 0; i < mp->eeprom.ramsz; i++) | |
184 | sbus_writeb(0, rptr + i); | |
185 | ||
186 | if (mp->eeprom.cpuvers >= CPUVERS_3_0) | |
187 | sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL); | |
188 | ||
189 | /* Load executable code. */ | |
190 | for (i = 0; i < sizeof(lanai4_code); i++) | |
191 | sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i); | |
192 | ||
193 | /* Load data segment. */ | |
194 | for (i = 0; i < sizeof(lanai4_data); i++) | |
195 | sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i); | |
196 | ||
197 | /* Set device address. */ | |
198 | sbus_writeb(0, &shmem->addr[0]); | |
199 | sbus_writeb(0, &shmem->addr[1]); | |
200 | for (i = 0; i < 6; i++) | |
201 | sbus_writeb(dev->dev_addr[i], | |
202 | &shmem->addr[i + 2]); | |
203 | ||
204 | /* Set SBUS bursts and interrupt mask. */ | |
205 | sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst); | |
206 | sbus_writel(SHMEM_IMASK_RX, &shmem->imask); | |
207 | ||
208 | /* Release the LANAI. */ | |
209 | myri_disable_irq(mp->lregs, mp->cregs); | |
210 | myri_reset_off(mp->lregs, mp->cregs); | |
211 | myri_disable_irq(mp->lregs, mp->cregs); | |
212 | ||
213 | /* Wait for the reset to complete. */ | |
214 | for (i = 0; i < 5000; i++) { | |
215 | if (sbus_readl(&shmem->channel.state) != STATE_READY) | |
216 | break; | |
217 | else | |
218 | udelay(10); | |
219 | } | |
220 | ||
221 | if (i == 5000) | |
222 | printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n"); | |
223 | ||
224 | i = myri_do_handshake(mp); | |
225 | if (i) | |
226 | printk(KERN_ERR "myricom: Handshake with LANAI failed.\n"); | |
227 | ||
228 | if (mp->eeprom.cpuvers == CPUVERS_4_0) | |
229 | sbus_writel(0, mp->lregs + LANAI_VERS); | |
230 | ||
231 | return i; | |
232 | } | |
233 | ||
234 | static void myri_clean_rings(struct myri_eth *mp) | |
235 | { | |
236 | struct sendq __iomem *sq = mp->sq; | |
237 | struct recvq __iomem *rq = mp->rq; | |
238 | int i; | |
239 | ||
240 | sbus_writel(0, &rq->tail); | |
241 | sbus_writel(0, &rq->head); | |
242 | for (i = 0; i < (RX_RING_SIZE+1); i++) { | |
243 | if (mp->rx_skbs[i] != NULL) { | |
244 | struct myri_rxd __iomem *rxd = &rq->myri_rxd[i]; | |
245 | u32 dma_addr; | |
246 | ||
247 | dma_addr = sbus_readl(&rxd->myri_scatters[0].addr); | |
9e6b6e7d | 248 | dma_unmap_single(&mp->myri_op->dev, dma_addr, |
738f2b7b | 249 | RX_ALLOC_SIZE, DMA_FROM_DEVICE); |
1da177e4 LT |
250 | dev_kfree_skb(mp->rx_skbs[i]); |
251 | mp->rx_skbs[i] = NULL; | |
252 | } | |
253 | } | |
254 | ||
255 | mp->tx_old = 0; | |
256 | sbus_writel(0, &sq->tail); | |
257 | sbus_writel(0, &sq->head); | |
258 | for (i = 0; i < TX_RING_SIZE; i++) { | |
259 | if (mp->tx_skbs[i] != NULL) { | |
260 | struct sk_buff *skb = mp->tx_skbs[i]; | |
261 | struct myri_txd __iomem *txd = &sq->myri_txd[i]; | |
262 | u32 dma_addr; | |
263 | ||
264 | dma_addr = sbus_readl(&txd->myri_gathers[0].addr); | |
9e6b6e7d | 265 | dma_unmap_single(&mp->myri_op->dev, dma_addr, |
738f2b7b DM |
266 | (skb->len + 3) & ~3, |
267 | DMA_TO_DEVICE); | |
1da177e4 LT |
268 | dev_kfree_skb(mp->tx_skbs[i]); |
269 | mp->tx_skbs[i] = NULL; | |
270 | } | |
271 | } | |
272 | } | |
273 | ||
274 | static void myri_init_rings(struct myri_eth *mp, int from_irq) | |
275 | { | |
276 | struct recvq __iomem *rq = mp->rq; | |
277 | struct myri_rxd __iomem *rxd = &rq->myri_rxd[0]; | |
278 | struct net_device *dev = mp->dev; | |
9e24974d | 279 | gfp_t gfp_flags = GFP_KERNEL; |
1da177e4 LT |
280 | int i; |
281 | ||
282 | if (from_irq || in_interrupt()) | |
283 | gfp_flags = GFP_ATOMIC; | |
284 | ||
285 | myri_clean_rings(mp); | |
286 | for (i = 0; i < RX_RING_SIZE; i++) { | |
287 | struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags); | |
288 | u32 dma_addr; | |
289 | ||
290 | if (!skb) | |
291 | continue; | |
292 | mp->rx_skbs[i] = skb; | |
293 | skb->dev = dev; | |
294 | skb_put(skb, RX_ALLOC_SIZE); | |
295 | ||
9e6b6e7d | 296 | dma_addr = dma_map_single(&mp->myri_op->dev, |
738f2b7b DM |
297 | skb->data, RX_ALLOC_SIZE, |
298 | DMA_FROM_DEVICE); | |
1da177e4 LT |
299 | sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr); |
300 | sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len); | |
301 | sbus_writel(i, &rxd[i].ctx); | |
302 | sbus_writel(1, &rxd[i].num_sg); | |
303 | } | |
304 | sbus_writel(0, &rq->head); | |
305 | sbus_writel(RX_RING_SIZE, &rq->tail); | |
306 | } | |
307 | ||
308 | static int myri_init(struct myri_eth *mp, int from_irq) | |
309 | { | |
310 | myri_init_rings(mp, from_irq); | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static void myri_is_not_so_happy(struct myri_eth *mp) | |
315 | { | |
316 | } | |
317 | ||
318 | #ifdef DEBUG_HEADER | |
319 | static void dump_ehdr(struct ethhdr *ehdr) | |
320 | { | |
e174961c JB |
321 | printk("ehdr[h_dst(%pM)" |
322 | "h_source(%pM)" | |
0795af57 | 323 | "h_proto(%04x)]\n", |
e174961c | 324 | ehdr->h_dest, ehdr->h_source, ehdr->h_proto); |
1da177e4 LT |
325 | } |
326 | ||
327 | static void dump_ehdr_and_myripad(unsigned char *stuff) | |
328 | { | |
329 | struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2); | |
330 | ||
331 | printk("pad[%02x:%02x]", stuff[0], stuff[1]); | |
0795af57 | 332 | dump_ehdr(ehdr); |
1da177e4 LT |
333 | } |
334 | #endif | |
335 | ||
336 | static void myri_tx(struct myri_eth *mp, struct net_device *dev) | |
337 | { | |
338 | struct sendq __iomem *sq= mp->sq; | |
339 | int entry = mp->tx_old; | |
340 | int limit = sbus_readl(&sq->head); | |
341 | ||
342 | DTX(("entry[%d] limit[%d] ", entry, limit)); | |
343 | if (entry == limit) | |
344 | return; | |
345 | while (entry != limit) { | |
346 | struct sk_buff *skb = mp->tx_skbs[entry]; | |
347 | u32 dma_addr; | |
348 | ||
349 | DTX(("SKB[%d] ", entry)); | |
350 | dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr); | |
9e6b6e7d | 351 | dma_unmap_single(&mp->myri_op->dev, dma_addr, |
738f2b7b | 352 | skb->len, DMA_TO_DEVICE); |
1da177e4 LT |
353 | dev_kfree_skb(skb); |
354 | mp->tx_skbs[entry] = NULL; | |
09f75cd7 | 355 | dev->stats.tx_packets++; |
1da177e4 LT |
356 | entry = NEXT_TX(entry); |
357 | } | |
358 | mp->tx_old = entry; | |
359 | } | |
360 | ||
6aa20a22 | 361 | /* Determine the packet's protocol ID. The rule here is that we |
1da177e4 LT |
362 | * assume 802.3 if the type field is short enough to be a length. |
363 | * This is normal practice and works for any 'now in use' protocol. | |
364 | */ | |
ab611487 | 365 | static __be16 myri_type_trans(struct sk_buff *skb, struct net_device *dev) |
1da177e4 LT |
366 | { |
367 | struct ethhdr *eth; | |
368 | unsigned char *rawp; | |
6aa20a22 | 369 | |
48d49d0c | 370 | skb_set_mac_header(skb, MYRI_PAD_LEN); |
1da177e4 LT |
371 | skb_pull(skb, dev->hard_header_len); |
372 | eth = eth_hdr(skb); | |
6aa20a22 | 373 | |
1da177e4 LT |
374 | #ifdef DEBUG_HEADER |
375 | DHDR(("myri_type_trans: ")); | |
376 | dump_ehdr(eth); | |
377 | #endif | |
378 | if (*eth->h_dest & 1) { | |
379 | if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0) | |
380 | skb->pkt_type = PACKET_BROADCAST; | |
381 | else | |
382 | skb->pkt_type = PACKET_MULTICAST; | |
383 | } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) { | |
384 | if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN)) | |
385 | skb->pkt_type = PACKET_OTHERHOST; | |
386 | } | |
6aa20a22 | 387 | |
1da177e4 LT |
388 | if (ntohs(eth->h_proto) >= 1536) |
389 | return eth->h_proto; | |
6aa20a22 | 390 | |
1da177e4 | 391 | rawp = skb->data; |
6aa20a22 | 392 | |
1da177e4 LT |
393 | /* This is a magic hack to spot IPX packets. Older Novell breaks |
394 | * the protocol design and runs IPX over 802.3 without an 802.2 LLC | |
395 | * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This | |
396 | * won't work for fault tolerant netware but does for the rest. | |
397 | */ | |
398 | if (*(unsigned short *)rawp == 0xFFFF) | |
399 | return htons(ETH_P_802_3); | |
6aa20a22 | 400 | |
1da177e4 LT |
401 | /* Real 802.2 LLC */ |
402 | return htons(ETH_P_802_2); | |
403 | } | |
404 | ||
405 | static void myri_rx(struct myri_eth *mp, struct net_device *dev) | |
406 | { | |
407 | struct recvq __iomem *rq = mp->rq; | |
408 | struct recvq __iomem *rqa = mp->rqack; | |
409 | int entry = sbus_readl(&rqa->head); | |
410 | int limit = sbus_readl(&rqa->tail); | |
411 | int drops; | |
412 | ||
413 | DRX(("entry[%d] limit[%d] ", entry, limit)); | |
414 | if (entry == limit) | |
415 | return; | |
416 | drops = 0; | |
417 | DRX(("\n")); | |
418 | while (entry != limit) { | |
419 | struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry]; | |
420 | u32 csum = sbus_readl(&rxdack->csum); | |
421 | int len = sbus_readl(&rxdack->myri_scatters[0].len); | |
422 | int index = sbus_readl(&rxdack->ctx); | |
423 | struct myri_rxd __iomem *rxd = &rq->myri_rxd[sbus_readl(&rq->tail)]; | |
424 | struct sk_buff *skb = mp->rx_skbs[index]; | |
425 | ||
426 | /* Ack it. */ | |
427 | sbus_writel(NEXT_RX(entry), &rqa->head); | |
428 | ||
429 | /* Check for errors. */ | |
430 | DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum)); | |
9e6b6e7d | 431 | dma_sync_single_for_cpu(&mp->myri_op->dev, |
738f2b7b DM |
432 | sbus_readl(&rxd->myri_scatters[0].addr), |
433 | RX_ALLOC_SIZE, DMA_FROM_DEVICE); | |
1da177e4 LT |
434 | if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) { |
435 | DRX(("ERROR[")); | |
09f75cd7 | 436 | dev->stats.rx_errors++; |
1da177e4 LT |
437 | if (len < (ETH_HLEN + MYRI_PAD_LEN)) { |
438 | DRX(("BAD_LENGTH] ")); | |
09f75cd7 | 439 | dev->stats.rx_length_errors++; |
1da177e4 LT |
440 | } else { |
441 | DRX(("NO_PADDING] ")); | |
09f75cd7 | 442 | dev->stats.rx_frame_errors++; |
1da177e4 LT |
443 | } |
444 | ||
445 | /* Return it to the LANAI. */ | |
446 | drop_it: | |
447 | drops++; | |
448 | DRX(("DROP ")); | |
09f75cd7 | 449 | dev->stats.rx_dropped++; |
9e6b6e7d | 450 | dma_sync_single_for_device(&mp->myri_op->dev, |
738f2b7b DM |
451 | sbus_readl(&rxd->myri_scatters[0].addr), |
452 | RX_ALLOC_SIZE, | |
453 | DMA_FROM_DEVICE); | |
1da177e4 LT |
454 | sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); |
455 | sbus_writel(index, &rxd->ctx); | |
456 | sbus_writel(1, &rxd->num_sg); | |
457 | sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); | |
458 | goto next; | |
459 | } | |
460 | ||
461 | DRX(("len[%d] ", len)); | |
462 | if (len > RX_COPY_THRESHOLD) { | |
463 | struct sk_buff *new_skb; | |
464 | u32 dma_addr; | |
465 | ||
466 | DRX(("BIGBUFF ")); | |
467 | new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC); | |
468 | if (new_skb == NULL) { | |
469 | DRX(("skb_alloc(FAILED) ")); | |
470 | goto drop_it; | |
471 | } | |
9e6b6e7d | 472 | dma_unmap_single(&mp->myri_op->dev, |
738f2b7b DM |
473 | sbus_readl(&rxd->myri_scatters[0].addr), |
474 | RX_ALLOC_SIZE, | |
475 | DMA_FROM_DEVICE); | |
1da177e4 LT |
476 | mp->rx_skbs[index] = new_skb; |
477 | new_skb->dev = dev; | |
478 | skb_put(new_skb, RX_ALLOC_SIZE); | |
9e6b6e7d | 479 | dma_addr = dma_map_single(&mp->myri_op->dev, |
738f2b7b DM |
480 | new_skb->data, |
481 | RX_ALLOC_SIZE, | |
482 | DMA_FROM_DEVICE); | |
1da177e4 LT |
483 | sbus_writel(dma_addr, &rxd->myri_scatters[0].addr); |
484 | sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); | |
485 | sbus_writel(index, &rxd->ctx); | |
486 | sbus_writel(1, &rxd->num_sg); | |
487 | sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); | |
488 | ||
489 | /* Trim the original skb for the netif. */ | |
490 | DRX(("trim(%d) ", len)); | |
491 | skb_trim(skb, len); | |
492 | } else { | |
493 | struct sk_buff *copy_skb = dev_alloc_skb(len); | |
494 | ||
495 | DRX(("SMALLBUFF ")); | |
496 | if (copy_skb == NULL) { | |
497 | DRX(("dev_alloc_skb(FAILED) ")); | |
498 | goto drop_it; | |
499 | } | |
500 | /* DMA sync already done above. */ | |
501 | copy_skb->dev = dev; | |
502 | DRX(("resv_and_put ")); | |
503 | skb_put(copy_skb, len); | |
d626f62b | 504 | skb_copy_from_linear_data(skb, copy_skb->data, len); |
1da177e4 LT |
505 | |
506 | /* Reuse original ring buffer. */ | |
507 | DRX(("reuse ")); | |
9e6b6e7d | 508 | dma_sync_single_for_device(&mp->myri_op->dev, |
738f2b7b DM |
509 | sbus_readl(&rxd->myri_scatters[0].addr), |
510 | RX_ALLOC_SIZE, | |
511 | DMA_FROM_DEVICE); | |
1da177e4 LT |
512 | sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len); |
513 | sbus_writel(index, &rxd->ctx); | |
514 | sbus_writel(1, &rxd->num_sg); | |
515 | sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail); | |
516 | ||
517 | skb = copy_skb; | |
518 | } | |
519 | ||
520 | /* Just like the happy meal we get checksums from this card. */ | |
521 | skb->csum = csum; | |
522 | skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */ | |
523 | ||
524 | skb->protocol = myri_type_trans(skb, dev); | |
525 | DRX(("prot[%04x] netif_rx ", skb->protocol)); | |
526 | netif_rx(skb); | |
527 | ||
09f75cd7 JG |
528 | dev->stats.rx_packets++; |
529 | dev->stats.rx_bytes += len; | |
1da177e4 LT |
530 | next: |
531 | DRX(("NEXT\n")); | |
532 | entry = NEXT_RX(entry); | |
533 | } | |
534 | } | |
535 | ||
7d12e780 | 536 | static irqreturn_t myri_interrupt(int irq, void *dev_id) |
1da177e4 LT |
537 | { |
538 | struct net_device *dev = (struct net_device *) dev_id; | |
4cf1653a | 539 | struct myri_eth *mp = netdev_priv(dev); |
1da177e4 LT |
540 | void __iomem *lregs = mp->lregs; |
541 | struct myri_channel __iomem *chan = &mp->shmem->channel; | |
542 | unsigned long flags; | |
543 | u32 status; | |
544 | int handled = 0; | |
545 | ||
546 | spin_lock_irqsave(&mp->irq_lock, flags); | |
547 | ||
548 | status = sbus_readl(lregs + LANAI_ISTAT); | |
549 | DIRQ(("myri_interrupt: status[%08x] ", status)); | |
550 | if (status & ISTAT_HOST) { | |
551 | u32 softstate; | |
552 | ||
553 | handled = 1; | |
554 | DIRQ(("IRQ_DISAB ")); | |
555 | myri_disable_irq(lregs, mp->cregs); | |
556 | softstate = sbus_readl(&chan->state); | |
557 | DIRQ(("state[%08x] ", softstate)); | |
558 | if (softstate != STATE_READY) { | |
559 | DIRQ(("myri_not_so_happy ")); | |
560 | myri_is_not_so_happy(mp); | |
561 | } | |
562 | DIRQ(("\nmyri_rx: ")); | |
563 | myri_rx(mp, dev); | |
564 | DIRQ(("\nistat=ISTAT_HOST ")); | |
565 | sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT); | |
566 | DIRQ(("IRQ_ENAB ")); | |
567 | myri_enable_irq(lregs, mp->cregs); | |
568 | } | |
569 | DIRQ(("\n")); | |
570 | ||
571 | spin_unlock_irqrestore(&mp->irq_lock, flags); | |
572 | ||
573 | return IRQ_RETVAL(handled); | |
574 | } | |
575 | ||
576 | static int myri_open(struct net_device *dev) | |
577 | { | |
4cf1653a | 578 | struct myri_eth *mp = netdev_priv(dev); |
1da177e4 LT |
579 | |
580 | return myri_init(mp, in_interrupt()); | |
581 | } | |
582 | ||
583 | static int myri_close(struct net_device *dev) | |
584 | { | |
4cf1653a | 585 | struct myri_eth *mp = netdev_priv(dev); |
1da177e4 LT |
586 | |
587 | myri_clean_rings(mp); | |
588 | return 0; | |
589 | } | |
590 | ||
591 | static void myri_tx_timeout(struct net_device *dev) | |
592 | { | |
4cf1653a | 593 | struct myri_eth *mp = netdev_priv(dev); |
1da177e4 LT |
594 | |
595 | printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name); | |
596 | ||
09f75cd7 | 597 | dev->stats.tx_errors++; |
1da177e4 LT |
598 | myri_init(mp, 0); |
599 | netif_wake_queue(dev); | |
600 | } | |
601 | ||
602 | static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
603 | { | |
4cf1653a | 604 | struct myri_eth *mp = netdev_priv(dev); |
1da177e4 LT |
605 | struct sendq __iomem *sq = mp->sq; |
606 | struct myri_txd __iomem *txd; | |
607 | unsigned long flags; | |
608 | unsigned int head, tail; | |
609 | int len, entry; | |
610 | u32 dma_addr; | |
611 | ||
612 | DTX(("myri_start_xmit: ")); | |
613 | ||
614 | myri_tx(mp, dev); | |
615 | ||
616 | netif_stop_queue(dev); | |
617 | ||
618 | /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */ | |
619 | head = sbus_readl(&sq->head); | |
620 | tail = sbus_readl(&sq->tail); | |
621 | ||
622 | if (!TX_BUFFS_AVAIL(head, tail)) { | |
623 | DTX(("no buffs available, returning 1\n")); | |
624 | return 1; | |
625 | } | |
626 | ||
627 | spin_lock_irqsave(&mp->irq_lock, flags); | |
628 | ||
629 | DHDR(("xmit[skbdata(%p)]\n", skb->data)); | |
630 | #ifdef DEBUG_HEADER | |
631 | dump_ehdr_and_myripad(((unsigned char *) skb->data)); | |
632 | #endif | |
633 | ||
634 | /* XXX Maybe this can go as well. */ | |
635 | len = skb->len; | |
636 | if (len & 3) { | |
637 | DTX(("len&3 ")); | |
638 | len = (len + 4) & (~3); | |
639 | } | |
640 | ||
641 | entry = sbus_readl(&sq->tail); | |
642 | ||
643 | txd = &sq->myri_txd[entry]; | |
644 | mp->tx_skbs[entry] = skb; | |
645 | ||
646 | /* Must do this before we sbus map it. */ | |
647 | if (skb->data[MYRI_PAD_LEN] & 0x1) { | |
648 | sbus_writew(0xffff, &txd->addr[0]); | |
649 | sbus_writew(0xffff, &txd->addr[1]); | |
650 | sbus_writew(0xffff, &txd->addr[2]); | |
651 | sbus_writew(0xffff, &txd->addr[3]); | |
652 | } else { | |
653 | sbus_writew(0xffff, &txd->addr[0]); | |
654 | sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]); | |
655 | sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]); | |
656 | sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]); | |
657 | } | |
658 | ||
9e6b6e7d | 659 | dma_addr = dma_map_single(&mp->myri_op->dev, skb->data, |
738f2b7b | 660 | len, DMA_TO_DEVICE); |
1da177e4 LT |
661 | sbus_writel(dma_addr, &txd->myri_gathers[0].addr); |
662 | sbus_writel(len, &txd->myri_gathers[0].len); | |
663 | sbus_writel(1, &txd->num_sg); | |
664 | sbus_writel(KERNEL_CHANNEL, &txd->chan); | |
665 | sbus_writel(len, &txd->len); | |
666 | sbus_writel((u32)-1, &txd->csum_off); | |
667 | sbus_writel(0, &txd->csum_field); | |
668 | ||
669 | sbus_writel(NEXT_TX(entry), &sq->tail); | |
670 | DTX(("BangTheChip ")); | |
671 | bang_the_chip(mp); | |
672 | ||
673 | DTX(("tbusy=0, returning 0\n")); | |
674 | netif_start_queue(dev); | |
675 | spin_unlock_irqrestore(&mp->irq_lock, flags); | |
676 | return 0; | |
677 | } | |
678 | ||
6aa20a22 | 679 | /* Create the MyriNet MAC header for an arbitrary protocol layer |
1da177e4 LT |
680 | * |
681 | * saddr=NULL means use device source address | |
682 | * daddr=NULL means leave destination address (eg unresolved arp) | |
683 | */ | |
3b04ddde SH |
684 | static int myri_header(struct sk_buff *skb, struct net_device *dev, |
685 | unsigned short type, const void *daddr, | |
686 | const void *saddr, unsigned len) | |
1da177e4 LT |
687 | { |
688 | struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN); | |
689 | unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN); | |
690 | ||
691 | #ifdef DEBUG_HEADER | |
692 | DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1])); | |
693 | dump_ehdr(eth); | |
694 | #endif | |
695 | ||
696 | /* Set the MyriNET padding identifier. */ | |
697 | pad[0] = MYRI_PAD_LEN; | |
698 | pad[1] = 0xab; | |
699 | ||
700 | /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length | |
701 | * in here instead. It is up to the 802.2 layer to carry protocol information. | |
702 | */ | |
6aa20a22 | 703 | if (type != ETH_P_802_3) |
1da177e4 LT |
704 | eth->h_proto = htons(type); |
705 | else | |
706 | eth->h_proto = htons(len); | |
707 | ||
708 | /* Set the source hardware address. */ | |
709 | if (saddr) | |
710 | memcpy(eth->h_source, saddr, dev->addr_len); | |
711 | else | |
712 | memcpy(eth->h_source, dev->dev_addr, dev->addr_len); | |
713 | ||
714 | /* Anyway, the loopback-device should never use this function... */ | |
715 | if (dev->flags & IFF_LOOPBACK) { | |
716 | int i; | |
717 | for (i = 0; i < dev->addr_len; i++) | |
718 | eth->h_dest[i] = 0; | |
719 | return(dev->hard_header_len); | |
720 | } | |
6aa20a22 | 721 | |
1da177e4 LT |
722 | if (daddr) { |
723 | memcpy(eth->h_dest, daddr, dev->addr_len); | |
724 | return dev->hard_header_len; | |
725 | } | |
726 | return -dev->hard_header_len; | |
727 | } | |
728 | ||
729 | /* Rebuild the MyriNet MAC header. This is called after an ARP | |
730 | * (or in future other address resolution) has completed on this | |
731 | * sk_buff. We now let ARP fill in the other fields. | |
732 | */ | |
733 | static int myri_rebuild_header(struct sk_buff *skb) | |
734 | { | |
735 | unsigned char *pad = (unsigned char *) skb->data; | |
736 | struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN); | |
737 | struct net_device *dev = skb->dev; | |
738 | ||
739 | #ifdef DEBUG_HEADER | |
740 | DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1])); | |
741 | dump_ehdr(eth); | |
742 | #endif | |
743 | ||
744 | /* Refill MyriNet padding identifiers, this is just being anal. */ | |
745 | pad[0] = MYRI_PAD_LEN; | |
746 | pad[1] = 0xab; | |
747 | ||
748 | switch (eth->h_proto) | |
749 | { | |
750 | #ifdef CONFIG_INET | |
751 | case __constant_htons(ETH_P_IP): | |
752 | return arp_find(eth->h_dest, skb); | |
753 | #endif | |
754 | ||
755 | default: | |
6aa20a22 JG |
756 | printk(KERN_DEBUG |
757 | "%s: unable to resolve type %X addresses.\n", | |
1da177e4 | 758 | dev->name, (int)eth->h_proto); |
6aa20a22 | 759 | |
1da177e4 LT |
760 | memcpy(eth->h_source, dev->dev_addr, dev->addr_len); |
761 | return 0; | |
762 | break; | |
763 | } | |
764 | ||
6aa20a22 | 765 | return 0; |
1da177e4 LT |
766 | } |
767 | ||
3b04ddde | 768 | static int myri_header_cache(const struct neighbour *neigh, struct hh_cache *hh) |
1da177e4 LT |
769 | { |
770 | unsigned short type = hh->hh_type; | |
771 | unsigned char *pad; | |
772 | struct ethhdr *eth; | |
3b04ddde | 773 | const struct net_device *dev = neigh->dev; |
1da177e4 LT |
774 | |
775 | pad = ((unsigned char *) hh->hh_data) + | |
776 | HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN); | |
777 | eth = (struct ethhdr *) (pad + MYRI_PAD_LEN); | |
778 | ||
3b04ddde | 779 | if (type == htons(ETH_P_802_3)) |
1da177e4 LT |
780 | return -1; |
781 | ||
782 | /* Refill MyriNet padding identifiers, this is just being anal. */ | |
783 | pad[0] = MYRI_PAD_LEN; | |
784 | pad[1] = 0xab; | |
785 | ||
786 | eth->h_proto = type; | |
787 | memcpy(eth->h_source, dev->dev_addr, dev->addr_len); | |
788 | memcpy(eth->h_dest, neigh->ha, dev->addr_len); | |
789 | hh->hh_len = 16; | |
790 | return 0; | |
791 | } | |
792 | ||
793 | ||
794 | /* Called by Address Resolution module to notify changes in address. */ | |
3b04ddde SH |
795 | void myri_header_cache_update(struct hh_cache *hh, |
796 | const struct net_device *dev, | |
797 | const unsigned char * haddr) | |
1da177e4 LT |
798 | { |
799 | memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)), | |
800 | haddr, dev->addr_len); | |
801 | } | |
802 | ||
803 | static int myri_change_mtu(struct net_device *dev, int new_mtu) | |
804 | { | |
805 | if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU)) | |
806 | return -EINVAL; | |
807 | dev->mtu = new_mtu; | |
808 | return 0; | |
809 | } | |
810 | ||
1da177e4 LT |
811 | static void myri_set_multicast(struct net_device *dev) |
812 | { | |
813 | /* Do nothing, all MyriCOM nodes transmit multicast frames | |
814 | * as broadcast packets... | |
815 | */ | |
816 | } | |
817 | ||
818 | static inline void set_boardid_from_idprom(struct myri_eth *mp, int num) | |
819 | { | |
820 | mp->eeprom.id[0] = 0; | |
821 | mp->eeprom.id[1] = idprom->id_machtype; | |
822 | mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff; | |
823 | mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff; | |
824 | mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff; | |
825 | mp->eeprom.id[5] = num; | |
826 | } | |
827 | ||
828 | static inline void determine_reg_space_size(struct myri_eth *mp) | |
829 | { | |
830 | switch(mp->eeprom.cpuvers) { | |
831 | case CPUVERS_2_3: | |
832 | case CPUVERS_3_0: | |
833 | case CPUVERS_3_1: | |
834 | case CPUVERS_3_2: | |
835 | mp->reg_size = (3 * 128 * 1024) + 4096; | |
836 | break; | |
837 | ||
838 | case CPUVERS_4_0: | |
839 | case CPUVERS_4_1: | |
840 | mp->reg_size = ((4096<<1) + mp->eeprom.ramsz); | |
841 | break; | |
842 | ||
843 | case CPUVERS_4_2: | |
844 | case CPUVERS_5_0: | |
845 | default: | |
846 | printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n", | |
847 | mp->eeprom.cpuvers); | |
848 | mp->reg_size = (3 * 128 * 1024) + 4096; | |
849 | }; | |
850 | } | |
851 | ||
852 | #ifdef DEBUG_DETECT | |
853 | static void dump_eeprom(struct myri_eth *mp) | |
854 | { | |
855 | printk("EEPROM: clockval[%08x] cpuvers[%04x] " | |
856 | "id[%02x,%02x,%02x,%02x,%02x,%02x]\n", | |
857 | mp->eeprom.cval, mp->eeprom.cpuvers, | |
858 | mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2], | |
859 | mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]); | |
860 | printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz); | |
861 | printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", | |
862 | mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2], | |
863 | mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5], | |
864 | mp->eeprom.fvers[6], mp->eeprom.fvers[7]); | |
865 | printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", | |
866 | mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10], | |
867 | mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13], | |
868 | mp->eeprom.fvers[14], mp->eeprom.fvers[15]); | |
869 | printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", | |
870 | mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18], | |
871 | mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21], | |
872 | mp->eeprom.fvers[22], mp->eeprom.fvers[23]); | |
873 | printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n", | |
874 | mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26], | |
875 | mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29], | |
876 | mp->eeprom.fvers[30], mp->eeprom.fvers[31]); | |
877 | printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n", | |
878 | mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2], | |
879 | mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5], | |
880 | mp->eeprom.mvers[6], mp->eeprom.mvers[7]); | |
881 | printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n", | |
882 | mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10], | |
883 | mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13], | |
884 | mp->eeprom.mvers[14], mp->eeprom.mvers[15]); | |
885 | printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n", | |
886 | mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type, | |
887 | mp->eeprom.prod_code); | |
888 | printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num); | |
889 | } | |
890 | #endif | |
891 | ||
3b04ddde SH |
892 | static const struct header_ops myri_header_ops = { |
893 | .create = myri_header, | |
894 | .rebuild = myri_rebuild_header, | |
895 | .cache = myri_header_cache, | |
896 | .cache_update = myri_header_cache_update, | |
897 | }; | |
898 | ||
9e6b6e7d | 899 | static int __devinit myri_sbus_probe(struct of_device *op, const struct of_device_id *match) |
1da177e4 | 900 | { |
9e6b6e7d | 901 | struct device_node *dp = op->node; |
1da177e4 LT |
902 | static unsigned version_printed; |
903 | struct net_device *dev; | |
9e6b6e7d DM |
904 | struct myri_eth *mp; |
905 | const void *prop; | |
906 | static int num; | |
907 | int i, len; | |
1da177e4 | 908 | |
9e6b6e7d | 909 | DET(("myri_ether_init(%p,%d):\n", op, num)); |
1da177e4 | 910 | dev = alloc_etherdev(sizeof(struct myri_eth)); |
1da177e4 LT |
911 | if (!dev) |
912 | return -ENOMEM; | |
913 | ||
914 | if (version_printed++ == 0) | |
915 | printk(version); | |
916 | ||
9e6b6e7d | 917 | SET_NETDEV_DEV(dev, &op->dev); |
a46c30fd | 918 | |
9e6b6e7d | 919 | mp = netdev_priv(dev); |
1da177e4 | 920 | spin_lock_init(&mp->irq_lock); |
9e6b6e7d | 921 | mp->myri_op = op; |
1da177e4 LT |
922 | |
923 | /* Clean out skb arrays. */ | |
924 | for (i = 0; i < (RX_RING_SIZE + 1); i++) | |
925 | mp->rx_skbs[i] = NULL; | |
926 | ||
927 | for (i = 0; i < TX_RING_SIZE; i++) | |
928 | mp->tx_skbs[i] = NULL; | |
929 | ||
930 | /* First check for EEPROM information. */ | |
9e6b6e7d DM |
931 | prop = of_get_property(dp, "myrinet-eeprom-info", &len); |
932 | ||
933 | if (prop) | |
934 | memcpy(&mp->eeprom, prop, sizeof(struct myri_eeprom)); | |
935 | if (!prop) { | |
1da177e4 LT |
936 | /* No eeprom property, must cook up the values ourselves. */ |
937 | DET(("No EEPROM: ")); | |
938 | mp->eeprom.bus_type = BUS_TYPE_SBUS; | |
9e6b6e7d DM |
939 | mp->eeprom.cpuvers = |
940 | of_getintprop_default(dp, "cpu_version", 0); | |
941 | mp->eeprom.cval = | |
942 | of_getintprop_default(dp, "clock_value", 0); | |
943 | mp->eeprom.ramsz = of_getintprop_default(dp, "sram_size", 0); | |
944 | if (!mp->eeprom.cpuvers) | |
1da177e4 | 945 | mp->eeprom.cpuvers = CPUVERS_2_3; |
9e6b6e7d | 946 | if (mp->eeprom.cpuvers < CPUVERS_3_0) |
1da177e4 | 947 | mp->eeprom.cval = 0; |
9e6b6e7d | 948 | if (!mp->eeprom.ramsz) |
1da177e4 | 949 | mp->eeprom.ramsz = (128 * 1024); |
9e6b6e7d DM |
950 | |
951 | prop = of_get_property(dp, "myrinet-board-id", &len); | |
952 | if (prop) | |
953 | memcpy(&mp->eeprom.id[0], prop, 6); | |
1da177e4 LT |
954 | else |
955 | set_boardid_from_idprom(mp, num); | |
9e6b6e7d DM |
956 | |
957 | prop = of_get_property(dp, "fpga_version", &len); | |
958 | if (prop) | |
959 | memcpy(&mp->eeprom.fvers[0], prop, 32); | |
960 | else | |
1da177e4 LT |
961 | memset(&mp->eeprom.fvers[0], 0, 32); |
962 | ||
963 | if (mp->eeprom.cpuvers == CPUVERS_4_1) { | |
9e6b6e7d | 964 | if (mp->eeprom.ramsz == (128 * 1024)) |
1da177e4 | 965 | mp->eeprom.ramsz = (256 * 1024); |
9e6b6e7d DM |
966 | if ((mp->eeprom.cval == 0x40414041) || |
967 | (mp->eeprom.cval == 0x90449044)) | |
1da177e4 | 968 | mp->eeprom.cval = 0x50e450e4; |
1da177e4 LT |
969 | } |
970 | } | |
971 | #ifdef DEBUG_DETECT | |
972 | dump_eeprom(mp); | |
973 | #endif | |
974 | ||
975 | for (i = 0; i < 6; i++) | |
976 | dev->dev_addr[i] = mp->eeprom.id[i]; | |
977 | ||
978 | determine_reg_space_size(mp); | |
979 | ||
980 | /* Map in the MyriCOM register/localram set. */ | |
981 | if (mp->eeprom.cpuvers < CPUVERS_4_0) { | |
982 | /* XXX Makes no sense, if control reg is non-existant this | |
983 | * XXX driver cannot function at all... maybe pre-4.0 is | |
984 | * XXX only a valid version for PCI cards? Ask feldy... | |
985 | */ | |
986 | DET(("Mapping regs for cpuvers < CPUVERS_4_0\n")); | |
9e6b6e7d DM |
987 | mp->regs = of_ioremap(&op->resource[0], 0, |
988 | mp->reg_size, "MyriCOM Regs"); | |
1da177e4 LT |
989 | if (!mp->regs) { |
990 | printk("MyriCOM: Cannot map MyriCOM registers.\n"); | |
991 | goto err; | |
992 | } | |
993 | mp->lanai = mp->regs + (256 * 1024); | |
994 | mp->lregs = mp->lanai + (0x10000 * 2); | |
995 | } else { | |
996 | DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n")); | |
9e6b6e7d DM |
997 | mp->cregs = of_ioremap(&op->resource[0], 0, |
998 | PAGE_SIZE, "MyriCOM Control Regs"); | |
999 | mp->lregs = of_ioremap(&op->resource[0], (256 * 1024), | |
1da177e4 | 1000 | PAGE_SIZE, "MyriCOM LANAI Regs"); |
9e6b6e7d DM |
1001 | mp->lanai = of_ioremap(&op->resource[0], (512 * 1024), |
1002 | mp->eeprom.ramsz, "MyriCOM SRAM"); | |
1da177e4 LT |
1003 | } |
1004 | DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n", | |
1005 | mp->cregs, mp->lregs, mp->lanai)); | |
1006 | ||
1007 | if (mp->eeprom.cpuvers >= CPUVERS_4_0) | |
1008 | mp->shmem_base = 0xf000; | |
1009 | else | |
1010 | mp->shmem_base = 0x8000; | |
1011 | ||
1012 | DET(("Shared memory base is %04x, ", mp->shmem_base)); | |
1013 | ||
1014 | mp->shmem = (struct myri_shmem __iomem *) | |
1015 | (mp->lanai + (mp->shmem_base * 2)); | |
1016 | DET(("shmem mapped at %p\n", mp->shmem)); | |
1017 | ||
1018 | mp->rqack = &mp->shmem->channel.recvqa; | |
1019 | mp->rq = &mp->shmem->channel.recvq; | |
1020 | mp->sq = &mp->shmem->channel.sendq; | |
1021 | ||
1022 | /* Reset the board. */ | |
1023 | DET(("Resetting LANAI\n")); | |
1024 | myri_reset_off(mp->lregs, mp->cregs); | |
1025 | myri_reset_on(mp->cregs); | |
1026 | ||
1027 | /* Turn IRQ's off. */ | |
1028 | myri_disable_irq(mp->lregs, mp->cregs); | |
1029 | ||
1030 | /* Reset once more. */ | |
1031 | myri_reset_on(mp->cregs); | |
1032 | ||
1033 | /* Get the supported DVMA burst sizes from our SBUS. */ | |
9e6b6e7d DM |
1034 | mp->myri_bursts = of_getintprop_default(dp->parent, |
1035 | "burst-sizes", 0x00); | |
63237eeb | 1036 | if (!sbus_can_burst64()) |
1da177e4 LT |
1037 | mp->myri_bursts &= ~(DMA_BURST64); |
1038 | ||
1039 | DET(("MYRI bursts %02x\n", mp->myri_bursts)); | |
1040 | ||
1041 | /* Encode SBUS interrupt level in second control register. */ | |
9e6b6e7d | 1042 | i = of_getintprop_default(dp, "interrupts", 0); |
1da177e4 LT |
1043 | if (i == 0) |
1044 | i = 4; | |
1045 | DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n", | |
1046 | i, (1 << i))); | |
1047 | ||
1048 | sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL); | |
1049 | ||
1050 | mp->dev = dev; | |
1051 | dev->open = &myri_open; | |
1052 | dev->stop = &myri_close; | |
1053 | dev->hard_start_xmit = &myri_start_xmit; | |
1054 | dev->tx_timeout = &myri_tx_timeout; | |
1055 | dev->watchdog_timeo = 5*HZ; | |
1da177e4 | 1056 | dev->set_multicast_list = &myri_set_multicast; |
9e6b6e7d | 1057 | dev->irq = op->irqs[0]; |
1da177e4 LT |
1058 | |
1059 | /* Register interrupt handler now. */ | |
1060 | DET(("Requesting MYRIcom IRQ line.\n")); | |
1061 | if (request_irq(dev->irq, &myri_interrupt, | |
1fb9df5d | 1062 | IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) { |
1da177e4 LT |
1063 | printk("MyriCOM: Cannot register interrupt handler.\n"); |
1064 | goto err; | |
1065 | } | |
1066 | ||
1067 | dev->mtu = MYRINET_MTU; | |
1068 | dev->change_mtu = myri_change_mtu; | |
3b04ddde SH |
1069 | dev->header_ops = &myri_header_ops; |
1070 | ||
1da177e4 | 1071 | dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN); |
1da177e4 LT |
1072 | |
1073 | /* Load code onto the LANai. */ | |
1074 | DET(("Loading LANAI firmware\n")); | |
1075 | myri_load_lanai(mp); | |
1076 | ||
1077 | if (register_netdev(dev)) { | |
1078 | printk("MyriCOM: Cannot register device.\n"); | |
1079 | goto err_free_irq; | |
1080 | } | |
1081 | ||
9e6b6e7d | 1082 | dev_set_drvdata(&op->dev, mp); |
a46c30fd DM |
1083 | |
1084 | num++; | |
1da177e4 | 1085 | |
e174961c JB |
1086 | printk("%s: MyriCOM MyriNET Ethernet %pM\n", |
1087 | dev->name, dev->dev_addr); | |
1da177e4 LT |
1088 | |
1089 | return 0; | |
1090 | ||
1091 | err_free_irq: | |
1092 | free_irq(dev->irq, dev); | |
1093 | err: | |
b74ca3a8 | 1094 | /* This will also free the co-allocated private data*/ |
1da177e4 LT |
1095 | free_netdev(dev); |
1096 | return -ENODEV; | |
1097 | } | |
1098 | ||
9e6b6e7d | 1099 | static int __devexit myri_sbus_remove(struct of_device *op) |
1da177e4 | 1100 | { |
9e6b6e7d | 1101 | struct myri_eth *mp = dev_get_drvdata(&op->dev); |
a46c30fd | 1102 | struct net_device *net_dev = mp->dev; |
1da177e4 | 1103 | |
7afb9dc9 | 1104 | unregister_netdev(net_dev); |
1da177e4 | 1105 | |
a46c30fd DM |
1106 | free_irq(net_dev->irq, net_dev); |
1107 | ||
1108 | if (mp->eeprom.cpuvers < CPUVERS_4_0) { | |
9e6b6e7d | 1109 | of_iounmap(&op->resource[0], mp->regs, mp->reg_size); |
a46c30fd | 1110 | } else { |
9e6b6e7d DM |
1111 | of_iounmap(&op->resource[0], mp->cregs, PAGE_SIZE); |
1112 | of_iounmap(&op->resource[0], mp->lregs, (256 * 1024)); | |
1113 | of_iounmap(&op->resource[0], mp->lanai, (512 * 1024)); | |
1da177e4 | 1114 | } |
a46c30fd DM |
1115 | |
1116 | free_netdev(net_dev); | |
1117 | ||
9e6b6e7d | 1118 | dev_set_drvdata(&op->dev, NULL); |
a46c30fd | 1119 | |
1da177e4 LT |
1120 | return 0; |
1121 | } | |
1122 | ||
fd098316 | 1123 | static const struct of_device_id myri_sbus_match[] = { |
a46c30fd DM |
1124 | { |
1125 | .name = "MYRICOM,mlanai", | |
1126 | }, | |
1127 | { | |
1128 | .name = "myri", | |
1129 | }, | |
1130 | {}, | |
1131 | }; | |
1132 | ||
1133 | MODULE_DEVICE_TABLE(of, myri_sbus_match); | |
1134 | ||
1135 | static struct of_platform_driver myri_sbus_driver = { | |
1136 | .name = "myri", | |
1137 | .match_table = myri_sbus_match, | |
1138 | .probe = myri_sbus_probe, | |
1139 | .remove = __devexit_p(myri_sbus_remove), | |
1140 | }; | |
1141 | ||
1142 | static int __init myri_sbus_init(void) | |
1143 | { | |
9e6b6e7d | 1144 | return of_register_driver(&myri_sbus_driver, &of_bus_type); |
a46c30fd DM |
1145 | } |
1146 | ||
1147 | static void __exit myri_sbus_exit(void) | |
1da177e4 | 1148 | { |
a46c30fd | 1149 | of_unregister_driver(&myri_sbus_driver); |
1da177e4 LT |
1150 | } |
1151 | ||
a46c30fd DM |
1152 | module_init(myri_sbus_init); |
1153 | module_exit(myri_sbus_exit); | |
1154 | ||
1da177e4 | 1155 | MODULE_LICENSE("GPL"); |