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net: Forgot to commit net/core/dev.c part of Jiri's ->rx_handler patch.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
66c87bd5 4 Copyright(c) 1999 - 2010 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
69bfbec4 54#define DRV_VERSION "1.1.0-k0"
92915f71 55const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5
GR		 56static char ixgbevf_copyright[] =
57 "Copyright (c) 2009 - 2010 Intel Corporation.";
92915f71
GR		 58
59static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 60 [board_82599_vf] = &ixgbevf_82599_vf_info,
61 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 62};
63
64/* ixgbevf_pci_tbl - PCI Device ID Table
65 *
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72static struct pci_device_id ixgbevf_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
74 board_82599_vf},
2316aa2a
GR		 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
76 board_X540_vf},
92915f71
GR		 77
78 /* required last entry */
79 {0, }
80};
81MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
82
83MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88#define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90/* forward decls */
91static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
92static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
93 u32 itr_reg);
94
95static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
96 struct ixgbevf_ring *rx_ring,
97 u32 val)
98{
99 /*
100 * Force memory writes to complete before letting h/w
101 * know there are new descriptors to fetch. (Only
102 * applicable for weak-ordered memory model archs,
103 * such as IA-64).
104 */
105 wmb();
106 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
107}
108
109/*
65d676c8 110 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 111 * @adapter: pointer to adapter struct
112 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
113 * @queue: queue to map the corresponding interrupt to
114 * @msix_vector: the vector to map to the corresponding queue
115 *
116 */
117static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
118 u8 queue, u8 msix_vector)
119{
120 u32 ivar, index;
121 struct ixgbe_hw *hw = &adapter->hw;
122 if (direction == -1) {
123 /* other causes */
124 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
125 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
126 ivar &= ~0xFF;
127 ivar |= msix_vector;
128 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
129 } else {
130 /* tx or rx causes */
131 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
132 index = ((16 * (queue & 1)) + (8 * direction));
133 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
134 ivar &= ~(0xFF << index);
135 ivar |= (msix_vector << index);
136 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
137 }
138}
139
140static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
141 struct ixgbevf_tx_buffer
142 *tx_buffer_info)
143{
144 if (tx_buffer_info->dma) {
145 if (tx_buffer_info->mapped_as_page)
2a1f8794 146 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 147 tx_buffer_info->dma,
148 tx_buffer_info->length,
2a1f8794 149 DMA_TO_DEVICE);
92915f71 150 else
2a1f8794 151 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 152 tx_buffer_info->dma,
153 tx_buffer_info->length,
2a1f8794 154 DMA_TO_DEVICE);
92915f71
GR		 155 tx_buffer_info->dma = 0;
156 }
157 if (tx_buffer_info->skb) {
158 dev_kfree_skb_any(tx_buffer_info->skb);
159 tx_buffer_info->skb = NULL;
160 }
161 tx_buffer_info->time_stamp = 0;
162 /* tx_buffer_info must be completely set up in the transmit path */
163}
164
165static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
166 struct ixgbevf_ring *tx_ring,
167 unsigned int eop)
168{
169 struct ixgbe_hw *hw = &adapter->hw;
170 u32 head, tail;
171
172 /* Detect a transmit hang in hardware, this serializes the
173 * check with the clearing of time_stamp and movement of eop */
174 head = readl(hw->hw_addr + tx_ring->head);
175 tail = readl(hw->hw_addr + tx_ring->tail);
176 adapter->detect_tx_hung = false;
177 if ((head != tail) &&
178 tx_ring->tx_buffer_info[eop].time_stamp &&
179 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
180 /* detected Tx unit hang */
181 union ixgbe_adv_tx_desc *tx_desc;
182 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
183 printk(KERN_ERR "Detected Tx Unit Hang\n"
184 " Tx Queue <%d>\n"
185 " TDH, TDT <%x>, <%x>\n"
186 " next_to_use <%x>\n"
187 " next_to_clean <%x>\n"
188 "tx_buffer_info[next_to_clean]\n"
189 " time_stamp <%lx>\n"
190 " jiffies <%lx>\n",
191 tx_ring->queue_index,
192 head, tail,
193 tx_ring->next_to_use, eop,
194 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
195 return true;
196 }
197
198 return false;
199}
200
201#define IXGBE_MAX_TXD_PWR 14
202#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
203
204/* Tx Descriptors needed, worst case */
205#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
206 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
207#ifdef MAX_SKB_FRAGS
208#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
209 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
210#else
211#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
212#endif
213
214static void ixgbevf_tx_timeout(struct net_device *netdev);
215
216/**
217 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
218 * @adapter: board private structure
219 * @tx_ring: tx ring to clean
220 **/
221static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
222 struct ixgbevf_ring *tx_ring)
223{
224 struct net_device *netdev = adapter->netdev;
225 struct ixgbe_hw *hw = &adapter->hw;
226 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
227 struct ixgbevf_tx_buffer *tx_buffer_info;
228 unsigned int i, eop, count = 0;
229 unsigned int total_bytes = 0, total_packets = 0;
230
231 i = tx_ring->next_to_clean;
232 eop = tx_ring->tx_buffer_info[i].next_to_watch;
233 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
234
235 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
236 (count < tx_ring->work_limit)) {
237 bool cleaned = false;
2d0bb1c1 238 rmb(); /* read buffer_info after eop_desc */
92915f71
GR		 239 for ( ; !cleaned; count++) {
240 struct sk_buff *skb;
241 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
242 tx_buffer_info = &tx_ring->tx_buffer_info[i];
243 cleaned = (i == eop);
244 skb = tx_buffer_info->skb;
245
246 if (cleaned && skb) {
247 unsigned int segs, bytecount;
248
249 /* gso_segs is currently only valid for tcp */
250 segs = skb_shinfo(skb)->gso_segs ?: 1;
251 /* multiply data chunks by size of headers */
252 bytecount = ((segs - 1) * skb_headlen(skb)) +
253 skb->len;
254 total_packets += segs;
255 total_bytes += bytecount;
256 }
257
258 ixgbevf_unmap_and_free_tx_resource(adapter,
259 tx_buffer_info);
260
261 tx_desc->wb.status = 0;
262
263 i++;
264 if (i == tx_ring->count)
265 i = 0;
266 }
267
268 eop = tx_ring->tx_buffer_info[i].next_to_watch;
269 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
270 }
271
272 tx_ring->next_to_clean = i;
273
274#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
275 if (unlikely(count && netif_carrier_ok(netdev) &&
276 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
277 /* Make sure that anybody stopping the queue after this
278 * sees the new next_to_clean.
279 */
280 smp_mb();
281#ifdef HAVE_TX_MQ
282 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
283 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
284 netif_wake_subqueue(netdev, tx_ring->queue_index);
285 ++adapter->restart_queue;
286 }
287#else
288 if (netif_queue_stopped(netdev) &&
289 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
290 netif_wake_queue(netdev);
291 ++adapter->restart_queue;
292 }
293#endif
294 }
295
296 if (adapter->detect_tx_hung) {
297 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
298 /* schedule immediate reset if we believe we hung */
299 printk(KERN_INFO
300 "tx hang %d detected, resetting adapter\n",
301 adapter->tx_timeout_count + 1);
302 ixgbevf_tx_timeout(adapter->netdev);
303 }
304 }
305
306 /* re-arm the interrupt */
307 if ((count >= tx_ring->work_limit) &&
308 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
309 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
310 }
311
312 tx_ring->total_bytes += total_bytes;
313 tx_ring->total_packets += total_packets;
314
fb621bac
ED		 315 netdev->stats.tx_bytes += total_bytes;
316 netdev->stats.tx_packets += total_packets;
92915f71 317
807540ba 318 return count < tx_ring->work_limit;
92915f71
GR		 319}
320
321/**
322 * ixgbevf_receive_skb - Send a completed packet up the stack
323 * @q_vector: structure containing interrupt and ring information
324 * @skb: packet to send up
325 * @status: hardware indication of status of receive
326 * @rx_ring: rx descriptor ring (for a specific queue) to setup
327 * @rx_desc: rx descriptor
328 **/
329static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
330 struct sk_buff *skb, u8 status,
331 struct ixgbevf_ring *ring,
332 union ixgbe_adv_rx_desc *rx_desc)
333{
334 struct ixgbevf_adapter *adapter = q_vector->adapter;
335 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
336 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
337 int ret;
338
339 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
340 if (adapter->vlgrp && is_vlan)
341 vlan_gro_receive(&q_vector->napi,
342 adapter->vlgrp,
343 tag, skb);
344 else
345 napi_gro_receive(&q_vector->napi, skb);
346 } else {
347 if (adapter->vlgrp && is_vlan)
348 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
349 else
350 ret = netif_rx(skb);
351 }
352}
353
354/**
355 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
356 * @adapter: address of board private structure
357 * @status_err: hardware indication of status of receive
358 * @skb: skb currently being received and modified
359 **/
360static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
361 u32 status_err, struct sk_buff *skb)
362{
bc8acf2c 363 skb_checksum_none_assert(skb);
92915f71
GR		 364
365 /* Rx csum disabled */
366 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
367 return;
368
369 /* if IP and error */
370 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
371 (status_err & IXGBE_RXDADV_ERR_IPE)) {
372 adapter->hw_csum_rx_error++;
373 return;
374 }
375
376 if (!(status_err & IXGBE_RXD_STAT_L4CS))
377 return;
378
379 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
380 adapter->hw_csum_rx_error++;
381 return;
382 }
383
384 /* It must be a TCP or UDP packet with a valid checksum */
385 skb->ip_summed = CHECKSUM_UNNECESSARY;
386 adapter->hw_csum_rx_good++;
387}
388
389/**
390 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
391 * @adapter: address of board private structure
392 **/
393static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
394 struct ixgbevf_ring *rx_ring,
395 int cleaned_count)
396{
397 struct pci_dev *pdev = adapter->pdev;
398 union ixgbe_adv_rx_desc *rx_desc;
399 struct ixgbevf_rx_buffer *bi;
400 struct sk_buff *skb;
401 unsigned int i;
402 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
403
404 i = rx_ring->next_to_use;
405 bi = &rx_ring->rx_buffer_info[i];
406
407 while (cleaned_count--) {
408 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
409
410 if (!bi->page_dma &&
411 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
412 if (!bi->page) {
413 bi->page = netdev_alloc_page(adapter->netdev);
414 if (!bi->page) {
415 adapter->alloc_rx_page_failed++;
416 goto no_buffers;
417 }
418 bi->page_offset = 0;
419 } else {
420 /* use a half page if we're re-using */
421 bi->page_offset ^= (PAGE_SIZE / 2);
422 }
423
2a1f8794 424 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 425 bi->page_offset,
426 (PAGE_SIZE / 2),
2a1f8794 427 DMA_FROM_DEVICE);
92915f71
GR		 428 }
429
430 skb = bi->skb;
431 if (!skb) {
432 skb = netdev_alloc_skb(adapter->netdev,
433 bufsz);
434
435 if (!skb) {
436 adapter->alloc_rx_buff_failed++;
437 goto no_buffers;
438 }
439
440 /*
441 * Make buffer alignment 2 beyond a 16 byte boundary
442 * this will result in a 16 byte aligned IP header after
443 * the 14 byte MAC header is removed
444 */
445 skb_reserve(skb, NET_IP_ALIGN);
446
447 bi->skb = skb;
448 }
449 if (!bi->dma) {
2a1f8794 450 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 451 rx_ring->rx_buf_len,
2a1f8794 452 DMA_FROM_DEVICE);
92915f71
GR		 453 }
454 /* Refresh the desc even if buffer_addrs didn't change because
455 * each write-back erases this info. */
456 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
457 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
458 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
459 } else {
460 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
461 }
462
463 i++;
464 if (i == rx_ring->count)
465 i = 0;
466 bi = &rx_ring->rx_buffer_info[i];
467 }
468
469no_buffers:
470 if (rx_ring->next_to_use != i) {
471 rx_ring->next_to_use = i;
472 if (i-- == 0)
473 i = (rx_ring->count - 1);
474
475 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
476 }
477}
478
479static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
480 u64 qmask)
481{
482 u32 mask;
483 struct ixgbe_hw *hw = &adapter->hw;
484
485 mask = (qmask & 0xFFFFFFFF);
486 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
487}
488
489static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
490{
491 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
492}
493
494static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
495{
496 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
497}
498
499static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
500 struct ixgbevf_ring *rx_ring,
501 int *work_done, int work_to_do)
502{
503 struct ixgbevf_adapter *adapter = q_vector->adapter;
504 struct pci_dev *pdev = adapter->pdev;
505 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
506 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
507 struct sk_buff *skb;
508 unsigned int i;
509 u32 len, staterr;
510 u16 hdr_info;
511 bool cleaned = false;
512 int cleaned_count = 0;
513 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
514
515 i = rx_ring->next_to_clean;
516 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
517 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
518 rx_buffer_info = &rx_ring->rx_buffer_info[i];
519
520 while (staterr & IXGBE_RXD_STAT_DD) {
521 u32 upper_len = 0;
522 if (*work_done >= work_to_do)
523 break;
524 (*work_done)++;
525
2d0bb1c1 526 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 527 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
528 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
529 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
530 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
531 if (hdr_info & IXGBE_RXDADV_SPH)
532 adapter->rx_hdr_split++;
533 if (len > IXGBEVF_RX_HDR_SIZE)
534 len = IXGBEVF_RX_HDR_SIZE;
535 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
536 } else {
537 len = le16_to_cpu(rx_desc->wb.upper.length);
538 }
539 cleaned = true;
540 skb = rx_buffer_info->skb;
541 prefetch(skb->data - NET_IP_ALIGN);
542 rx_buffer_info->skb = NULL;
543
544 if (rx_buffer_info->dma) {
2a1f8794 545 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 546 rx_ring->rx_buf_len,
2a1f8794 547 DMA_FROM_DEVICE);
92915f71
GR		 548 rx_buffer_info->dma = 0;
549 skb_put(skb, len);
550 }
551
552 if (upper_len) {
2a1f8794
NN		 553 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
554 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 555 rx_buffer_info->page_dma = 0;
556 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
557 rx_buffer_info->page,
558 rx_buffer_info->page_offset,
559 upper_len);
560
561 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
562 (page_count(rx_buffer_info->page) != 1))
563 rx_buffer_info->page = NULL;
564 else
565 get_page(rx_buffer_info->page);
566
567 skb->len += upper_len;
568 skb->data_len += upper_len;
569 skb->truesize += upper_len;
570 }
571
572 i++;
573 if (i == rx_ring->count)
574 i = 0;
575
576 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
577 prefetch(next_rxd);
578 cleaned_count++;
579
580 next_buffer = &rx_ring->rx_buffer_info[i];
581
582 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
583 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
584 rx_buffer_info->skb = next_buffer->skb;
585 rx_buffer_info->dma = next_buffer->dma;
586 next_buffer->skb = skb;
587 next_buffer->dma = 0;
588 } else {
589 skb->next = next_buffer->skb;
590 skb->next->prev = skb;
591 }
592 adapter->non_eop_descs++;
593 goto next_desc;
594 }
595
596 /* ERR_MASK will only have valid bits if EOP set */
597 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
598 dev_kfree_skb_irq(skb);
599 goto next_desc;
600 }
601
602 ixgbevf_rx_checksum(adapter, staterr, skb);
603
604 /* probably a little skewed due to removing CRC */
605 total_rx_bytes += skb->len;
606 total_rx_packets++;
607
608 /*
609 * Work around issue of some types of VM to VM loop back
610 * packets not getting split correctly
611 */
612 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 613 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 614 if (header_fixup_len < 14)
615 skb_push(skb, header_fixup_len);
616 }
617 skb->protocol = eth_type_trans(skb, adapter->netdev);
618
619 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 620
621next_desc:
622 rx_desc->wb.upper.status_error = 0;
623
624 /* return some buffers to hardware, one at a time is too slow */
625 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
626 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
627 cleaned_count);
628 cleaned_count = 0;
629 }
630
631 /* use prefetched values */
632 rx_desc = next_rxd;
633 rx_buffer_info = &rx_ring->rx_buffer_info[i];
634
635 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
636 }
637
638 rx_ring->next_to_clean = i;
639 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
640
641 if (cleaned_count)
642 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
643
644 rx_ring->total_packets += total_rx_packets;
645 rx_ring->total_bytes += total_rx_bytes;
fb621bac
ED		 646 adapter->netdev->stats.rx_bytes += total_rx_bytes;
647 adapter->netdev->stats.rx_packets += total_rx_packets;
92915f71
GR		 648
649 return cleaned;
650}
651
652/**
653 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
654 * @napi: napi struct with our devices info in it
655 * @budget: amount of work driver is allowed to do this pass, in packets
656 *
657 * This function is optimized for cleaning one queue only on a single
658 * q_vector!!!
659 **/
660static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
661{
662 struct ixgbevf_q_vector *q_vector =
663 container_of(napi, struct ixgbevf_q_vector, napi);
664 struct ixgbevf_adapter *adapter = q_vector->adapter;
665 struct ixgbevf_ring *rx_ring = NULL;
666 int work_done = 0;
667 long r_idx;
668
669 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
670 rx_ring = &(adapter->rx_ring[r_idx]);
671
672 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
673
674 /* If all Rx work done, exit the polling mode */
675 if (work_done < budget) {
676 napi_complete(napi);
677 if (adapter->itr_setting & 1)
678 ixgbevf_set_itr_msix(q_vector);
679 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
680 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
681 }
682
683 return work_done;
684}
685
686/**
687 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
688 * @napi: napi struct with our devices info in it
689 * @budget: amount of work driver is allowed to do this pass, in packets
690 *
691 * This function will clean more than one rx queue associated with a
692 * q_vector.
693 **/
694static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
695{
696 struct ixgbevf_q_vector *q_vector =
697 container_of(napi, struct ixgbevf_q_vector, napi);
698 struct ixgbevf_adapter *adapter = q_vector->adapter;
699 struct ixgbevf_ring *rx_ring = NULL;
700 int work_done = 0, i;
701 long r_idx;
702 u64 enable_mask = 0;
703
704 /* attempt to distribute budget to each queue fairly, but don't allow
705 * the budget to go below 1 because we'll exit polling */
706 budget /= (q_vector->rxr_count ?: 1);
707 budget = max(budget, 1);
708 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
709 for (i = 0; i < q_vector->rxr_count; i++) {
710 rx_ring = &(adapter->rx_ring[r_idx]);
711 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
712 enable_mask |= rx_ring->v_idx;
713 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
714 r_idx + 1);
715 }
716
717#ifndef HAVE_NETDEV_NAPI_LIST
718 if (!netif_running(adapter->netdev))
719 work_done = 0;
720
721#endif
722 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
723 rx_ring = &(adapter->rx_ring[r_idx]);
724
725 /* If all Rx work done, exit the polling mode */
726 if (work_done < budget) {
727 napi_complete(napi);
728 if (adapter->itr_setting & 1)
729 ixgbevf_set_itr_msix(q_vector);
730 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
731 ixgbevf_irq_enable_queues(adapter, enable_mask);
732 }
733
734 return work_done;
735}
736
737
738/**
739 * ixgbevf_configure_msix - Configure MSI-X hardware
740 * @adapter: board private structure
741 *
742 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
743 * interrupts.
744 **/
745static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
746{
747 struct ixgbevf_q_vector *q_vector;
748 struct ixgbe_hw *hw = &adapter->hw;
749 int i, j, q_vectors, v_idx, r_idx;
750 u32 mask;
751
752 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
753
754 /*
755 * Populate the IVAR table and set the ITR values to the
756 * corresponding register.
757 */
758 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
759 q_vector = adapter->q_vector[v_idx];
984b3f57 760 /* XXX for_each_set_bit(...) */
92915f71
GR		 761 r_idx = find_first_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues);
763
764 for (i = 0; i < q_vector->rxr_count; i++) {
765 j = adapter->rx_ring[r_idx].reg_idx;
766 ixgbevf_set_ivar(adapter, 0, j, v_idx);
767 r_idx = find_next_bit(q_vector->rxr_idx,
768 adapter->num_rx_queues,
769 r_idx + 1);
770 }
771 r_idx = find_first_bit(q_vector->txr_idx,
772 adapter->num_tx_queues);
773
774 for (i = 0; i < q_vector->txr_count; i++) {
775 j = adapter->tx_ring[r_idx].reg_idx;
776 ixgbevf_set_ivar(adapter, 1, j, v_idx);
777 r_idx = find_next_bit(q_vector->txr_idx,
778 adapter->num_tx_queues,
779 r_idx + 1);
780 }
781
782 /* if this is a tx only vector halve the interrupt rate */
783 if (q_vector->txr_count && !q_vector->rxr_count)
784 q_vector->eitr = (adapter->eitr_param >> 1);
785 else if (q_vector->rxr_count)
786 /* rx only */
787 q_vector->eitr = adapter->eitr_param;
788
789 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
790 }
791
792 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
793
794 /* set up to autoclear timer, and the vectors */
795 mask = IXGBE_EIMS_ENABLE_MASK;
796 mask &= ~IXGBE_EIMS_OTHER;
797 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
798}
799
800enum latency_range {
801 lowest_latency = 0,
802 low_latency = 1,
803 bulk_latency = 2,
804 latency_invalid = 255
805};
806
807/**
808 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
809 * @adapter: pointer to adapter
810 * @eitr: eitr setting (ints per sec) to give last timeslice
811 * @itr_setting: current throttle rate in ints/second
812 * @packets: the number of packets during this measurement interval
813 * @bytes: the number of bytes during this measurement interval
814 *
815 * Stores a new ITR value based on packets and byte
816 * counts during the last interrupt. The advantage of per interrupt
817 * computation is faster updates and more accurate ITR for the current
818 * traffic pattern. Constants in this function were computed
819 * based on theoretical maximum wire speed and thresholds were set based
820 * on testing data as well as attempting to minimize response time
821 * while increasing bulk throughput.
822 **/
823static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
824 u32 eitr, u8 itr_setting,
825 int packets, int bytes)
826{
827 unsigned int retval = itr_setting;
828 u32 timepassed_us;
829 u64 bytes_perint;
830
831 if (packets == 0)
832 goto update_itr_done;
833
834
835 /* simple throttlerate management
836 * 0-20MB/s lowest (100000 ints/s)
837 * 20-100MB/s low (20000 ints/s)
838 * 100-1249MB/s bulk (8000 ints/s)
839 */
840 /* what was last interrupt timeslice? */
841 timepassed_us = 1000000/eitr;
842 bytes_perint = bytes / timepassed_us; /* bytes/usec */
843
844 switch (itr_setting) {
845 case lowest_latency:
846 if (bytes_perint > adapter->eitr_low)
847 retval = low_latency;
848 break;
849 case low_latency:
850 if (bytes_perint > adapter->eitr_high)
851 retval = bulk_latency;
852 else if (bytes_perint <= adapter->eitr_low)
853 retval = lowest_latency;
854 break;
855 case bulk_latency:
856 if (bytes_perint <= adapter->eitr_high)
857 retval = low_latency;
858 break;
859 }
860
861update_itr_done:
862 return retval;
863}
864
865/**
866 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
867 * @adapter: pointer to adapter struct
868 * @v_idx: vector index into q_vector array
869 * @itr_reg: new value to be written in *register* format, not ints/s
870 *
871 * This function is made to be called by ethtool and by the driver
872 * when it needs to update VTEITR registers at runtime. Hardware
873 * specific quirks/differences are taken care of here.
874 */
875static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
876 u32 itr_reg)
877{
878 struct ixgbe_hw *hw = &adapter->hw;
879
880 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
881
882 /*
883 * set the WDIS bit to not clear the timer bits and cause an
884 * immediate assertion of the interrupt
885 */
886 itr_reg |= IXGBE_EITR_CNT_WDIS;
887
888 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
889}
890
891static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
892{
893 struct ixgbevf_adapter *adapter = q_vector->adapter;
894 u32 new_itr;
895 u8 current_itr, ret_itr;
896 int i, r_idx, v_idx = q_vector->v_idx;
897 struct ixgbevf_ring *rx_ring, *tx_ring;
898
899 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
900 for (i = 0; i < q_vector->txr_count; i++) {
901 tx_ring = &(adapter->tx_ring[r_idx]);
902 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
903 q_vector->tx_itr,
904 tx_ring->total_packets,
905 tx_ring->total_bytes);
906 /* if the result for this queue would decrease interrupt
907 * rate for this vector then use that result */
908 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
909 q_vector->tx_itr - 1 : ret_itr);
910 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
911 r_idx + 1);
912 }
913
914 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
915 for (i = 0; i < q_vector->rxr_count; i++) {
916 rx_ring = &(adapter->rx_ring[r_idx]);
917 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
918 q_vector->rx_itr,
919 rx_ring->total_packets,
920 rx_ring->total_bytes);
921 /* if the result for this queue would decrease interrupt
922 * rate for this vector then use that result */
923 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
924 q_vector->rx_itr - 1 : ret_itr);
925 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
926 r_idx + 1);
927 }
928
929 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
930
931 switch (current_itr) {
932 /* counts and packets in update_itr are dependent on these numbers */
933 case lowest_latency:
934 new_itr = 100000;
935 break;
936 case low_latency:
937 new_itr = 20000; /* aka hwitr = ~200 */
938 break;
939 case bulk_latency:
940 default:
941 new_itr = 8000;
942 break;
943 }
944
945 if (new_itr != q_vector->eitr) {
946 u32 itr_reg;
947
948 /* save the algorithm value here, not the smoothed one */
949 q_vector->eitr = new_itr;
950 /* do an exponential smoothing */
951 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
952 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
953 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
954 }
92915f71
GR		 955}
956
957static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
958{
959 struct net_device *netdev = data;
960 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
961 struct ixgbe_hw *hw = &adapter->hw;
962 u32 eicr;
a9ee25a2 963 u32 msg;
92915f71
GR		 964
965 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
966 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
967
08259594
GR		 968 if (!hw->mbx.ops.check_for_ack(hw)) {
969 /*
970 * checking for the ack clears the PFACK bit. Place
971 * it back in the v2p_mailbox cache so that anyone
972 * polling for an ack will not miss it. Also
973 * avoid the read below because the code to read
974 * the mailbox will also clear the ack bit. This was
975 * causing lost acks. Just cache the bit and exit
976 * the IRQ handler.
977 */
978 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
979 goto out;
980 }
981
982 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 983 hw->mbx.ops.read(hw, &msg, 1);
984
985 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
986 mod_timer(&adapter->watchdog_timer,
4c3a8223 987 round_jiffies(jiffies + 1));
a9ee25a2 988
08259594 989out:
92915f71
GR		 990 return IRQ_HANDLED;
991}
992
993static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
994{
995 struct ixgbevf_q_vector *q_vector = data;
996 struct ixgbevf_adapter *adapter = q_vector->adapter;
997 struct ixgbevf_ring *tx_ring;
998 int i, r_idx;
999
1000 if (!q_vector->txr_count)
1001 return IRQ_HANDLED;
1002
1003 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1004 for (i = 0; i < q_vector->txr_count; i++) {
1005 tx_ring = &(adapter->tx_ring[r_idx]);
1006 tx_ring->total_bytes = 0;
1007 tx_ring->total_packets = 0;
1008 ixgbevf_clean_tx_irq(adapter, tx_ring);
1009 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1010 r_idx + 1);
1011 }
1012
1013 if (adapter->itr_setting & 1)
1014 ixgbevf_set_itr_msix(q_vector);
1015
1016 return IRQ_HANDLED;
1017}
1018
1019/**
65d676c8 1020 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues)
92915f71
GR		 1021 * @irq: unused
1022 * @data: pointer to our q_vector struct for this interrupt vector
1023 **/
1024static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1025{
1026 struct ixgbevf_q_vector *q_vector = data;
1027 struct ixgbevf_adapter *adapter = q_vector->adapter;
1028 struct ixgbe_hw *hw = &adapter->hw;
1029 struct ixgbevf_ring *rx_ring;
1030 int r_idx;
1031 int i;
1032
1033 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1034 for (i = 0; i < q_vector->rxr_count; i++) {
1035 rx_ring = &(adapter->rx_ring[r_idx]);
1036 rx_ring->total_bytes = 0;
1037 rx_ring->total_packets = 0;
1038 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1039 r_idx + 1);
1040 }
1041
1042 if (!q_vector->rxr_count)
1043 return IRQ_HANDLED;
1044
1045 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1046 rx_ring = &(adapter->rx_ring[r_idx]);
1047 /* disable interrupts on this vector only */
1048 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1049 napi_schedule(&q_vector->napi);
1050
1051
1052 return IRQ_HANDLED;
1053}
1054
1055static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1056{
1057 ixgbevf_msix_clean_rx(irq, data);
1058 ixgbevf_msix_clean_tx(irq, data);
1059
1060 return IRQ_HANDLED;
1061}
1062
1063static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1064 int r_idx)
1065{
1066 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1067
1068 set_bit(r_idx, q_vector->rxr_idx);
1069 q_vector->rxr_count++;
1070 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1071}
1072
1073static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1074 int t_idx)
1075{
1076 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1077
1078 set_bit(t_idx, q_vector->txr_idx);
1079 q_vector->txr_count++;
1080 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1081}
1082
1083/**
1084 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1085 * @adapter: board private structure to initialize
1086 *
1087 * This function maps descriptor rings to the queue-specific vectors
1088 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1089 * one vector per ring/queue, but on a constrained vector budget, we
1090 * group the rings as "efficiently" as possible. You would add new
1091 * mapping configurations in here.
1092 **/
1093static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1094{
1095 int q_vectors;
1096 int v_start = 0;
1097 int rxr_idx = 0, txr_idx = 0;
1098 int rxr_remaining = adapter->num_rx_queues;
1099 int txr_remaining = adapter->num_tx_queues;
1100 int i, j;
1101 int rqpv, tqpv;
1102 int err = 0;
1103
1104 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1105
1106 /*
1107 * The ideal configuration...
1108 * We have enough vectors to map one per queue.
1109 */
1110 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1111 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1112 map_vector_to_rxq(adapter, v_start, rxr_idx);
1113
1114 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1115 map_vector_to_txq(adapter, v_start, txr_idx);
1116 goto out;
1117 }
1118
1119 /*
1120 * If we don't have enough vectors for a 1-to-1
1121 * mapping, we'll have to group them so there are
1122 * multiple queues per vector.
1123 */
1124 /* Re-adjusting *qpv takes care of the remainder. */
1125 for (i = v_start; i < q_vectors; i++) {
1126 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1127 for (j = 0; j < rqpv; j++) {
1128 map_vector_to_rxq(adapter, i, rxr_idx);
1129 rxr_idx++;
1130 rxr_remaining--;
1131 }
1132 }
1133 for (i = v_start; i < q_vectors; i++) {
1134 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1135 for (j = 0; j < tqpv; j++) {
1136 map_vector_to_txq(adapter, i, txr_idx);
1137 txr_idx++;
1138 txr_remaining--;
1139 }
1140 }
1141
1142out:
1143 return err;
1144}
1145
1146/**
1147 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1148 * @adapter: board private structure
1149 *
1150 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1151 * interrupts from the kernel.
1152 **/
1153static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1154{
1155 struct net_device *netdev = adapter->netdev;
1156 irqreturn_t (*handler)(int, void *);
1157 int i, vector, q_vectors, err;
1158 int ri = 0, ti = 0;
1159
1160 /* Decrement for Other and TCP Timer vectors */
1161 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1162
1163#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1164 ? &ixgbevf_msix_clean_many : \
1165 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1166 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1167 NULL)
1168 for (vector = 0; vector < q_vectors; vector++) {
1169 handler = SET_HANDLER(adapter->q_vector[vector]);
1170
1171 if (handler == &ixgbevf_msix_clean_rx) {
1172 sprintf(adapter->name[vector], "%s-%s-%d",
1173 netdev->name, "rx", ri++);
1174 } else if (handler == &ixgbevf_msix_clean_tx) {
1175 sprintf(adapter->name[vector], "%s-%s-%d",
1176 netdev->name, "tx", ti++);
1177 } else if (handler == &ixgbevf_msix_clean_many) {
1178 sprintf(adapter->name[vector], "%s-%s-%d",
1179 netdev->name, "TxRx", vector);
1180 } else {
1181 /* skip this unused q_vector */
1182 continue;
1183 }
1184 err = request_irq(adapter->msix_entries[vector].vector,
1185 handler, 0, adapter->name[vector],
1186 adapter->q_vector[vector]);
1187 if (err) {
1188 hw_dbg(&adapter->hw,
1189 "request_irq failed for MSIX interrupt "
1190 "Error: %d\n", err);
1191 goto free_queue_irqs;
1192 }
1193 }
1194
1195 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1196 err = request_irq(adapter->msix_entries[vector].vector,
1197 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1198 if (err) {
1199 hw_dbg(&adapter->hw,
1200 "request_irq for msix_mbx failed: %d\n", err);
1201 goto free_queue_irqs;
1202 }
1203
1204 return 0;
1205
1206free_queue_irqs:
1207 for (i = vector - 1; i >= 0; i--)
1208 free_irq(adapter->msix_entries[--vector].vector,
1209 &(adapter->q_vector[i]));
1210 pci_disable_msix(adapter->pdev);
1211 kfree(adapter->msix_entries);
1212 adapter->msix_entries = NULL;
1213 return err;
1214}
1215
1216static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1217{
1218 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1219
1220 for (i = 0; i < q_vectors; i++) {
1221 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1222 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1223 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1224 q_vector->rxr_count = 0;
1225 q_vector->txr_count = 0;
1226 q_vector->eitr = adapter->eitr_param;
1227 }
1228}
1229
1230/**
1231 * ixgbevf_request_irq - initialize interrupts
1232 * @adapter: board private structure
1233 *
1234 * Attempts to configure interrupts using the best available
1235 * capabilities of the hardware and kernel.
1236 **/
1237static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1238{
1239 int err = 0;
1240
1241 err = ixgbevf_request_msix_irqs(adapter);
1242
1243 if (err)
1244 hw_dbg(&adapter->hw,
1245 "request_irq failed, Error %d\n", err);
1246
1247 return err;
1248}
1249
1250static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1251{
1252 struct net_device *netdev = adapter->netdev;
1253 int i, q_vectors;
1254
1255 q_vectors = adapter->num_msix_vectors;
1256
1257 i = q_vectors - 1;
1258
1259 free_irq(adapter->msix_entries[i].vector, netdev);
1260 i--;
1261
1262 for (; i >= 0; i--) {
1263 free_irq(adapter->msix_entries[i].vector,
1264 adapter->q_vector[i]);
1265 }
1266
1267 ixgbevf_reset_q_vectors(adapter);
1268}
1269
1270/**
1271 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1272 * @adapter: board private structure
1273 **/
1274static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1275{
1276 int i;
1277 struct ixgbe_hw *hw = &adapter->hw;
1278
1279 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1280
1281 IXGBE_WRITE_FLUSH(hw);
1282
1283 for (i = 0; i < adapter->num_msix_vectors; i++)
1284 synchronize_irq(adapter->msix_entries[i].vector);
1285}
1286
1287/**
1288 * ixgbevf_irq_enable - Enable default interrupt generation settings
1289 * @adapter: board private structure
1290 **/
1291static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1292 bool queues, bool flush)
1293{
1294 struct ixgbe_hw *hw = &adapter->hw;
1295 u32 mask;
1296 u64 qmask;
1297
1298 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1299 qmask = ~0;
1300
1301 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1302
1303 if (queues)
1304 ixgbevf_irq_enable_queues(adapter, qmask);
1305
1306 if (flush)
1307 IXGBE_WRITE_FLUSH(hw);
1308}
1309
1310/**
1311 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1312 * @adapter: board private structure
1313 *
1314 * Configure the Tx unit of the MAC after a reset.
1315 **/
1316static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1317{
1318 u64 tdba;
1319 struct ixgbe_hw *hw = &adapter->hw;
1320 u32 i, j, tdlen, txctrl;
1321
1322 /* Setup the HW Tx Head and Tail descriptor pointers */
1323 for (i = 0; i < adapter->num_tx_queues; i++) {
1324 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1325 j = ring->reg_idx;
1326 tdba = ring->dma;
1327 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1328 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1329 (tdba & DMA_BIT_MASK(32)));
1330 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1331 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1332 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1333 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1334 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1335 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1336 /* Disable Tx Head Writeback RO bit, since this hoses
1337 * bookkeeping if things aren't delivered in order.
1338 */
1339 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1340 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1341 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1342 }
1343}
1344
1345#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1346
1347static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1348{
1349 struct ixgbevf_ring *rx_ring;
1350 struct ixgbe_hw *hw = &adapter->hw;
1351 u32 srrctl;
1352
1353 rx_ring = &adapter->rx_ring[index];
1354
1355 srrctl = IXGBE_SRRCTL_DROP_EN;
1356
1357 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1358 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1359 /* grow the amount we can receive on large page machines */
1360 if (bufsz < (PAGE_SIZE / 2))
1361 bufsz = (PAGE_SIZE / 2);
1362 /* cap the bufsz at our largest descriptor size */
1363 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1364
1365 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1366 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1367 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1368 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1369 IXGBE_SRRCTL_BSIZEHDR_MASK);
1370 } else {
1371 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1372
1373 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1374 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1375 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1376 else
1377 srrctl |= rx_ring->rx_buf_len >>
1378 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1379 }
1380 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1381}
1382
1383/**
1384 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1385 * @adapter: board private structure
1386 *
1387 * Configure the Rx unit of the MAC after a reset.
1388 **/
1389static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1390{
1391 u64 rdba;
1392 struct ixgbe_hw *hw = &adapter->hw;
1393 struct net_device *netdev = adapter->netdev;
1394 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1395 int i, j;
1396 u32 rdlen;
1397 int rx_buf_len;
1398
1399 /* Decide whether to use packet split mode or not */
1400 if (netdev->mtu > ETH_DATA_LEN) {
1401 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1402 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1403 else
1404 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1405 } else {
1406 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1407 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1408 else
1409 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1410 }
1411
1412 /* Set the RX buffer length according to the mode */
1413 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1414 /* PSRTYPE must be initialized in 82599 */
1415 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1416 IXGBE_PSRTYPE_UDPHDR |
1417 IXGBE_PSRTYPE_IPV4HDR |
1418 IXGBE_PSRTYPE_IPV6HDR |
1419 IXGBE_PSRTYPE_L2HDR;
1420 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1421 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1422 } else {
1423 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1424 if (netdev->mtu <= ETH_DATA_LEN)
1425 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1426 else
1427 rx_buf_len = ALIGN(max_frame, 1024);
1428 }
1429
1430 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1431 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1432 * the Base and Length of the Rx Descriptor Ring */
1433 for (i = 0; i < adapter->num_rx_queues; i++) {
1434 rdba = adapter->rx_ring[i].dma;
1435 j = adapter->rx_ring[i].reg_idx;
1436 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1437 (rdba & DMA_BIT_MASK(32)));
1438 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1439 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1440 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1441 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1442 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1443 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1444 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1445
1446 ixgbevf_configure_srrctl(adapter, j);
1447 }
1448}
1449
1450static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1451 struct vlan_group *grp)
1452{
1453 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1454 struct ixgbe_hw *hw = &adapter->hw;
1455 int i, j;
1456 u32 ctrl;
1457
1458 adapter->vlgrp = grp;
1459
1460 for (i = 0; i < adapter->num_rx_queues; i++) {
1461 j = adapter->rx_ring[i].reg_idx;
1462 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1463 ctrl |= IXGBE_RXDCTL_VME;
1464 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1465 }
1466}
1467
1468static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1469{
1470 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1471 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1472
1473 /* add VID to filter table */
1474 if (hw->mac.ops.set_vfta)
1475 hw->mac.ops.set_vfta(hw, vid, 0, true);
92915f71
GR		 1476}
1477
1478static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1479{
1480 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1481 struct ixgbe_hw *hw = &adapter->hw;
1482
1483 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1484 ixgbevf_irq_disable(adapter);
1485
1486 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1487
1488 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1489 ixgbevf_irq_enable(adapter, true, true);
1490
1491 /* remove VID from filter table */
1492 if (hw->mac.ops.set_vfta)
1493 hw->mac.ops.set_vfta(hw, vid, 0, false);
1494}
1495
1496static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1497{
1498 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1499
1500 if (adapter->vlgrp) {
1501 u16 vid;
b738127d 1502 for (vid = 0; vid < VLAN_N_VID; vid++) {
92915f71
GR		 1503 if (!vlan_group_get_device(adapter->vlgrp, vid))
1504 continue;
1505 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1506 }
1507 }
1508}
1509
92915f71
GR		 1510/**
1511 * ixgbevf_set_rx_mode - Multicast set
1512 * @netdev: network interface device structure
1513 *
1514 * The set_rx_method entry point is called whenever the multicast address
1515 * list or the network interface flags are updated. This routine is
1516 * responsible for configuring the hardware for proper multicast mode.
1517 **/
1518static void ixgbevf_set_rx_mode(struct net_device *netdev)
1519{
1520 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1521 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1522
1523 /* reprogram multicast list */
92915f71 1524 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1525 hw->mac.ops.update_mc_addr_list(hw, netdev);
92915f71
GR		 1526}
1527
1528static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1529{
1530 int q_idx;
1531 struct ixgbevf_q_vector *q_vector;
1532 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1533
1534 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1535 struct napi_struct *napi;
1536 q_vector = adapter->q_vector[q_idx];
1537 if (!q_vector->rxr_count)
1538 continue;
1539 napi = &q_vector->napi;
1540 if (q_vector->rxr_count > 1)
1541 napi->poll = &ixgbevf_clean_rxonly_many;
1542
1543 napi_enable(napi);
1544 }
1545}
1546
1547static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1548{
1549 int q_idx;
1550 struct ixgbevf_q_vector *q_vector;
1551 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1552
1553 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1554 q_vector = adapter->q_vector[q_idx];
1555 if (!q_vector->rxr_count)
1556 continue;
1557 napi_disable(&q_vector->napi);
1558 }
1559}
1560
1561static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1562{
1563 struct net_device *netdev = adapter->netdev;
1564 int i;
1565
1566 ixgbevf_set_rx_mode(netdev);
1567
1568 ixgbevf_restore_vlan(adapter);
1569
1570 ixgbevf_configure_tx(adapter);
1571 ixgbevf_configure_rx(adapter);
1572 for (i = 0; i < adapter->num_rx_queues; i++) {
1573 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1574 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1575 ring->next_to_use = ring->count - 1;
1576 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1577 }
1578}
1579
1580#define IXGBE_MAX_RX_DESC_POLL 10
1581static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1582 int rxr)
1583{
1584 struct ixgbe_hw *hw = &adapter->hw;
1585 int j = adapter->rx_ring[rxr].reg_idx;
1586 int k;
1587
1588 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1589 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1590 break;
1591 else
1592 msleep(1);
1593 }
1594 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1595 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1596 "not set within the polling period\n", rxr);
1597 }
1598
1599 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1600 (adapter->rx_ring[rxr].count - 1));
1601}
1602
33bd9f60
GR		 1603static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1604{
1605 /* Only save pre-reset stats if there are some */
1606 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1607 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1608 adapter->stats.base_vfgprc;
1609 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1610 adapter->stats.base_vfgptc;
1611 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1612 adapter->stats.base_vfgorc;
1613 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1614 adapter->stats.base_vfgotc;
1615 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1616 adapter->stats.base_vfmprc;
1617 }
1618}
1619
1620static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1621{
1622 struct ixgbe_hw *hw = &adapter->hw;
1623
1624 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1625 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1626 adapter->stats.last_vfgorc |=
1627 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1628 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1629 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1630 adapter->stats.last_vfgotc |=
1631 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1632 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1633
1634 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1635 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1636 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1637 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1638 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1639}
1640
92915f71
GR		 1641static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1642{
1643 struct net_device *netdev = adapter->netdev;
1644 struct ixgbe_hw *hw = &adapter->hw;
1645 int i, j = 0;
1646 int num_rx_rings = adapter->num_rx_queues;
1647 u32 txdctl, rxdctl;
1648
1649 for (i = 0; i < adapter->num_tx_queues; i++) {
1650 j = adapter->tx_ring[i].reg_idx;
1651 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1652 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1653 txdctl |= (8 << 16);
1654 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1655 }
1656
1657 for (i = 0; i < adapter->num_tx_queues; i++) {
1658 j = adapter->tx_ring[i].reg_idx;
1659 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1660 txdctl |= IXGBE_TXDCTL_ENABLE;
1661 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1662 }
1663
1664 for (i = 0; i < num_rx_rings; i++) {
1665 j = adapter->rx_ring[i].reg_idx;
1666 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1667 rxdctl |= IXGBE_RXDCTL_ENABLE;
69bfbec4
GR		 1668 if (hw->mac.type == ixgbe_mac_X540_vf) {
1669 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1670 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1671 IXGBE_RXDCTL_RLPML_EN);
1672 }
92915f71
GR		 1673 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1674 ixgbevf_rx_desc_queue_enable(adapter, i);
1675 }
1676
1677 ixgbevf_configure_msix(adapter);
1678
1679 if (hw->mac.ops.set_rar) {
1680 if (is_valid_ether_addr(hw->mac.addr))
1681 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1682 else
1683 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1684 }
1685
1686 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1687 ixgbevf_napi_enable_all(adapter);
1688
1689 /* enable transmits */
1690 netif_tx_start_all_queues(netdev);
1691
33bd9f60
GR		 1692 ixgbevf_save_reset_stats(adapter);
1693 ixgbevf_init_last_counter_stats(adapter);
1694
92915f71
GR		 1695 /* bring the link up in the watchdog, this could race with our first
1696 * link up interrupt but shouldn't be a problem */
1697 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1698 adapter->link_check_timeout = jiffies;
1699 mod_timer(&adapter->watchdog_timer, jiffies);
1700 return 0;
1701}
1702
1703int ixgbevf_up(struct ixgbevf_adapter *adapter)
1704{
1705 int err;
1706 struct ixgbe_hw *hw = &adapter->hw;
1707
1708 ixgbevf_configure(adapter);
1709
1710 err = ixgbevf_up_complete(adapter);
1711
1712 /* clear any pending interrupts, may auto mask */
1713 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1714
1715 ixgbevf_irq_enable(adapter, true, true);
1716
1717 return err;
1718}
1719
1720/**
1721 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1722 * @adapter: board private structure
1723 * @rx_ring: ring to free buffers from
1724 **/
1725static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1726 struct ixgbevf_ring *rx_ring)
1727{
1728 struct pci_dev *pdev = adapter->pdev;
1729 unsigned long size;
1730 unsigned int i;
1731
c0456c23
GR		 1732 if (!rx_ring->rx_buffer_info)
1733 return;
92915f71 1734
c0456c23 1735 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1736 for (i = 0; i < rx_ring->count; i++) {
1737 struct ixgbevf_rx_buffer *rx_buffer_info;
1738
1739 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1740 if (rx_buffer_info->dma) {
2a1f8794 1741 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1742 rx_ring->rx_buf_len,
2a1f8794 1743 DMA_FROM_DEVICE);
92915f71
GR		 1744 rx_buffer_info->dma = 0;
1745 }
1746 if (rx_buffer_info->skb) {
1747 struct sk_buff *skb = rx_buffer_info->skb;
1748 rx_buffer_info->skb = NULL;
1749 do {
1750 struct sk_buff *this = skb;
1751 skb = skb->prev;
1752 dev_kfree_skb(this);
1753 } while (skb);
1754 }
1755 if (!rx_buffer_info->page)
1756 continue;
2a1f8794
NN		 1757 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1758 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1759 rx_buffer_info->page_dma = 0;
1760 put_page(rx_buffer_info->page);
1761 rx_buffer_info->page = NULL;
1762 rx_buffer_info->page_offset = 0;
1763 }
1764
1765 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1766 memset(rx_ring->rx_buffer_info, 0, size);
1767
1768 /* Zero out the descriptor ring */
1769 memset(rx_ring->desc, 0, rx_ring->size);
1770
1771 rx_ring->next_to_clean = 0;
1772 rx_ring->next_to_use = 0;
1773
1774 if (rx_ring->head)
1775 writel(0, adapter->hw.hw_addr + rx_ring->head);
1776 if (rx_ring->tail)
1777 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1778}
1779
1780/**
1781 * ixgbevf_clean_tx_ring - Free Tx Buffers
1782 * @adapter: board private structure
1783 * @tx_ring: ring to be cleaned
1784 **/
1785static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1786 struct ixgbevf_ring *tx_ring)
1787{
1788 struct ixgbevf_tx_buffer *tx_buffer_info;
1789 unsigned long size;
1790 unsigned int i;
1791
c0456c23
GR		 1792 if (!tx_ring->tx_buffer_info)
1793 return;
1794
92915f71
GR		 1795 /* Free all the Tx ring sk_buffs */
1796
1797 for (i = 0; i < tx_ring->count; i++) {
1798 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1799 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1800 }
1801
1802 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1803 memset(tx_ring->tx_buffer_info, 0, size);
1804
1805 memset(tx_ring->desc, 0, tx_ring->size);
1806
1807 tx_ring->next_to_use = 0;
1808 tx_ring->next_to_clean = 0;
1809
1810 if (tx_ring->head)
1811 writel(0, adapter->hw.hw_addr + tx_ring->head);
1812 if (tx_ring->tail)
1813 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1814}
1815
1816/**
1817 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1818 * @adapter: board private structure
1819 **/
1820static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1821{
1822 int i;
1823
1824 for (i = 0; i < adapter->num_rx_queues; i++)
1825 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1826}
1827
1828/**
1829 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1830 * @adapter: board private structure
1831 **/
1832static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1833{
1834 int i;
1835
1836 for (i = 0; i < adapter->num_tx_queues; i++)
1837 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1838}
1839
1840void ixgbevf_down(struct ixgbevf_adapter *adapter)
1841{
1842 struct net_device *netdev = adapter->netdev;
1843 struct ixgbe_hw *hw = &adapter->hw;
1844 u32 txdctl;
1845 int i, j;
1846
1847 /* signal that we are down to the interrupt handler */
1848 set_bit(__IXGBEVF_DOWN, &adapter->state);
1849 /* disable receives */
1850
1851 netif_tx_disable(netdev);
1852
1853 msleep(10);
1854
1855 netif_tx_stop_all_queues(netdev);
1856
1857 ixgbevf_irq_disable(adapter);
1858
1859 ixgbevf_napi_disable_all(adapter);
1860
1861 del_timer_sync(&adapter->watchdog_timer);
1862 /* can't call flush scheduled work here because it can deadlock
1863 * if linkwatch_event tries to acquire the rtnl_lock which we are
1864 * holding */
1865 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1866 msleep(1);
1867
1868 /* disable transmits in the hardware now that interrupts are off */
1869 for (i = 0; i < adapter->num_tx_queues; i++) {
1870 j = adapter->tx_ring[i].reg_idx;
1871 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1872 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1873 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1874 }
1875
1876 netif_carrier_off(netdev);
1877
1878 if (!pci_channel_offline(adapter->pdev))
1879 ixgbevf_reset(adapter);
1880
1881 ixgbevf_clean_all_tx_rings(adapter);
1882 ixgbevf_clean_all_rx_rings(adapter);
1883}
1884
1885void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1886{
c0456c23
GR		 1887 struct ixgbe_hw *hw = &adapter->hw;
1888
92915f71 1889 WARN_ON(in_interrupt());
c0456c23 1890
92915f71
GR		 1891 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1892 msleep(1);
1893
c0456c23
GR		 1894 /*
1895 * Check if PF is up before re-init. If not then skip until
1896 * later when the PF is up and ready to service requests from
1897 * the VF via mailbox. If the VF is up and running then the
1898 * watchdog task will continue to schedule reset tasks until
1899 * the PF is up and running.
1900 */
1901 if (!hw->mac.ops.reset_hw(hw)) {
1902 ixgbevf_down(adapter);
1903 ixgbevf_up(adapter);
1904 }
92915f71
GR		 1905
1906 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1907}
1908
1909void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1910{
1911 struct ixgbe_hw *hw = &adapter->hw;
1912 struct net_device *netdev = adapter->netdev;
1913
1914 if (hw->mac.ops.reset_hw(hw))
1915 hw_dbg(hw, "PF still resetting\n");
1916 else
1917 hw->mac.ops.init_hw(hw);
1918
1919 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1920 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1921 netdev->addr_len);
1922 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1923 netdev->addr_len);
1924 }
1925}
1926
1927static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1928 int vectors)
1929{
1930 int err, vector_threshold;
1931
1932 /* We'll want at least 3 (vector_threshold):
1933 * 1) TxQ[0] Cleanup
1934 * 2) RxQ[0] Cleanup
1935 * 3) Other (Link Status Change, etc.)
1936 */
1937 vector_threshold = MIN_MSIX_COUNT;
1938
1939 /* The more we get, the more we will assign to Tx/Rx Cleanup
1940 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1941 * Right now, we simply care about how many we'll get; we'll
1942 * set them up later while requesting irq's.
1943 */
1944 while (vectors >= vector_threshold) {
1945 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1946 vectors);
1947 if (!err) /* Success in acquiring all requested vectors. */
1948 break;
1949 else if (err < 0)
1950 vectors = 0; /* Nasty failure, quit now */
1951 else /* err == number of vectors we should try again with */
1952 vectors = err;
1953 }
1954
1955 if (vectors < vector_threshold) {
1956 /* Can't allocate enough MSI-X interrupts? Oh well.
1957 * This just means we'll go with either a single MSI
1958 * vector or fall back to legacy interrupts.
1959 */
1960 hw_dbg(&adapter->hw,
1961 "Unable to allocate MSI-X interrupts\n");
1962 kfree(adapter->msix_entries);
1963 adapter->msix_entries = NULL;
1964 } else {
1965 /*
1966 * Adjust for only the vectors we'll use, which is minimum
1967 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1968 * vectors we were allocated.
1969 */
1970 adapter->num_msix_vectors = vectors;
1971 }
1972}
1973
1974/*
65d676c8 1975 * ixgbevf_set_num_queues: Allocate queues for device, feature dependant
92915f71
GR		 1976 * @adapter: board private structure to initialize
1977 *
1978 * This is the top level queue allocation routine. The order here is very
1979 * important, starting with the "most" number of features turned on at once,
1980 * and ending with the smallest set of features. This way large combinations
1981 * can be allocated if they're turned on, and smaller combinations are the
1982 * fallthrough conditions.
1983 *
1984 **/
1985static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1986{
1987 /* Start with base case */
1988 adapter->num_rx_queues = 1;
1989 adapter->num_tx_queues = 1;
1990 adapter->num_rx_pools = adapter->num_rx_queues;
1991 adapter->num_rx_queues_per_pool = 1;
1992}
1993
1994/**
1995 * ixgbevf_alloc_queues - Allocate memory for all rings
1996 * @adapter: board private structure to initialize
1997 *
1998 * We allocate one ring per queue at run-time since we don't know the
1999 * number of queues at compile-time. The polling_netdev array is
2000 * intended for Multiqueue, but should work fine with a single queue.
2001 **/
2002static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2003{
2004 int i;
2005
2006 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2007 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2008 if (!adapter->tx_ring)
2009 goto err_tx_ring_allocation;
2010
2011 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2012 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2013 if (!adapter->rx_ring)
2014 goto err_rx_ring_allocation;
2015
2016 for (i = 0; i < adapter->num_tx_queues; i++) {
2017 adapter->tx_ring[i].count = adapter->tx_ring_count;
2018 adapter->tx_ring[i].queue_index = i;
2019 adapter->tx_ring[i].reg_idx = i;
2020 }
2021
2022 for (i = 0; i < adapter->num_rx_queues; i++) {
2023 adapter->rx_ring[i].count = adapter->rx_ring_count;
2024 adapter->rx_ring[i].queue_index = i;
2025 adapter->rx_ring[i].reg_idx = i;
2026 }
2027
2028 return 0;
2029
2030err_rx_ring_allocation:
2031 kfree(adapter->tx_ring);
2032err_tx_ring_allocation:
2033 return -ENOMEM;
2034}
2035
2036/**
2037 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2038 * @adapter: board private structure to initialize
2039 *
2040 * Attempt to configure the interrupts using the best available
2041 * capabilities of the hardware and the kernel.
2042 **/
2043static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2044{
2045 int err = 0;
2046 int vector, v_budget;
2047
2048 /*
2049 * It's easy to be greedy for MSI-X vectors, but it really
2050 * doesn't do us much good if we have a lot more vectors
2051 * than CPU's. So let's be conservative and only ask for
2052 * (roughly) twice the number of vectors as there are CPU's.
2053 */
2054 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2055 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2056
2057 /* A failure in MSI-X entry allocation isn't fatal, but it does
2058 * mean we disable MSI-X capabilities of the adapter. */
2059 adapter->msix_entries = kcalloc(v_budget,
2060 sizeof(struct msix_entry), GFP_KERNEL);
2061 if (!adapter->msix_entries) {
2062 err = -ENOMEM;
2063 goto out;
2064 }
2065
2066 for (vector = 0; vector < v_budget; vector++)
2067 adapter->msix_entries[vector].entry = vector;
2068
2069 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2070
2071out:
2072 return err;
2073}
2074
2075/**
2076 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2077 * @adapter: board private structure to initialize
2078 *
2079 * We allocate one q_vector per queue interrupt. If allocation fails we
2080 * return -ENOMEM.
2081 **/
2082static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2083{
2084 int q_idx, num_q_vectors;
2085 struct ixgbevf_q_vector *q_vector;
2086 int napi_vectors;
2087 int (*poll)(struct napi_struct *, int);
2088
2089 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2090 napi_vectors = adapter->num_rx_queues;
2091 poll = &ixgbevf_clean_rxonly;
2092
2093 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2094 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2095 if (!q_vector)
2096 goto err_out;
2097 q_vector->adapter = adapter;
2098 q_vector->v_idx = q_idx;
2099 q_vector->eitr = adapter->eitr_param;
2100 if (q_idx < napi_vectors)
2101 netif_napi_add(adapter->netdev, &q_vector->napi,
2102 (*poll), 64);
2103 adapter->q_vector[q_idx] = q_vector;
2104 }
2105
2106 return 0;
2107
2108err_out:
2109 while (q_idx) {
2110 q_idx--;
2111 q_vector = adapter->q_vector[q_idx];
2112 netif_napi_del(&q_vector->napi);
2113 kfree(q_vector);
2114 adapter->q_vector[q_idx] = NULL;
2115 }
2116 return -ENOMEM;
2117}
2118
2119/**
2120 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2121 * @adapter: board private structure to initialize
2122 *
2123 * This function frees the memory allocated to the q_vectors. In addition if
2124 * NAPI is enabled it will delete any references to the NAPI struct prior
2125 * to freeing the q_vector.
2126 **/
2127static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2128{
2129 int q_idx, num_q_vectors;
2130 int napi_vectors;
2131
2132 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2133 napi_vectors = adapter->num_rx_queues;
2134
2135 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2136 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2137
2138 adapter->q_vector[q_idx] = NULL;
2139 if (q_idx < napi_vectors)
2140 netif_napi_del(&q_vector->napi);
2141 kfree(q_vector);
2142 }
2143}
2144
2145/**
2146 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2147 * @adapter: board private structure
2148 *
2149 **/
2150static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2151{
2152 pci_disable_msix(adapter->pdev);
2153 kfree(adapter->msix_entries);
2154 adapter->msix_entries = NULL;
92915f71
GR		 2155}
2156
2157/**
2158 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2159 * @adapter: board private structure to initialize
2160 *
2161 **/
2162static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2163{
2164 int err;
2165
2166 /* Number of supported queues */
2167 ixgbevf_set_num_queues(adapter);
2168
2169 err = ixgbevf_set_interrupt_capability(adapter);
2170 if (err) {
2171 hw_dbg(&adapter->hw,
2172 "Unable to setup interrupt capabilities\n");
2173 goto err_set_interrupt;
2174 }
2175
2176 err = ixgbevf_alloc_q_vectors(adapter);
2177 if (err) {
2178 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2179 "vectors\n");
2180 goto err_alloc_q_vectors;
2181 }
2182
2183 err = ixgbevf_alloc_queues(adapter);
2184 if (err) {
2185 printk(KERN_ERR "Unable to allocate memory for queues\n");
2186 goto err_alloc_queues;
2187 }
2188
2189 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2190 "Tx Queue count = %u\n",
2191 (adapter->num_rx_queues > 1) ? "Enabled" :
2192 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2193
2194 set_bit(__IXGBEVF_DOWN, &adapter->state);
2195
2196 return 0;
2197err_alloc_queues:
2198 ixgbevf_free_q_vectors(adapter);
2199err_alloc_q_vectors:
2200 ixgbevf_reset_interrupt_capability(adapter);
2201err_set_interrupt:
2202 return err;
2203}
2204
2205/**
2206 * ixgbevf_sw_init - Initialize general software structures
2207 * (struct ixgbevf_adapter)
2208 * @adapter: board private structure to initialize
2209 *
2210 * ixgbevf_sw_init initializes the Adapter private data structure.
2211 * Fields are initialized based on PCI device information and
2212 * OS network device settings (MTU size).
2213 **/
2214static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2215{
2216 struct ixgbe_hw *hw = &adapter->hw;
2217 struct pci_dev *pdev = adapter->pdev;
2218 int err;
2219
2220 /* PCI config space info */
2221
2222 hw->vendor_id = pdev->vendor;
2223 hw->device_id = pdev->device;
2224 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2225 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2226 hw->subsystem_device_id = pdev->subsystem_device;
2227
2228 hw->mbx.ops.init_params(hw);
2229 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2230 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2231 err = hw->mac.ops.reset_hw(hw);
2232 if (err) {
2233 dev_info(&pdev->dev,
2234 "PF still in reset state, assigning new address\n");
2c6952df 2235 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2236 } else {
2237 err = hw->mac.ops.init_hw(hw);
2238 if (err) {
2239 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2240 goto out;
2241 }
2242 }
2243
2244 /* Enable dynamic interrupt throttling rates */
2245 adapter->eitr_param = 20000;
2246 adapter->itr_setting = 1;
2247
2248 /* set defaults for eitr in MegaBytes */
2249 adapter->eitr_low = 10;
2250 adapter->eitr_high = 20;
2251
2252 /* set default ring sizes */
2253 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2254 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2255
2256 /* enable rx csum by default */
2257 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2258
2259 set_bit(__IXGBEVF_DOWN, &adapter->state);
2260
2261out:
2262 return err;
2263}
2264
92915f71
GR		 2265#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2266 { \
2267 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2268 if (current_counter < last_counter) \
2269 counter += 0x100000000LL; \
2270 last_counter = current_counter; \
2271 counter &= 0xFFFFFFFF00000000LL; \
2272 counter |= current_counter; \
2273 }
2274
2275#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2276 { \
2277 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2278 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2279 u64 current_counter = (current_counter_msb << 32) | \
2280 current_counter_lsb; \
2281 if (current_counter < last_counter) \
2282 counter += 0x1000000000LL; \
2283 last_counter = current_counter; \
2284 counter &= 0xFFFFFFF000000000LL; \
2285 counter |= current_counter; \
2286 }
2287/**
2288 * ixgbevf_update_stats - Update the board statistics counters.
2289 * @adapter: board private structure
2290 **/
2291void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2292{
2293 struct ixgbe_hw *hw = &adapter->hw;
2294
2295 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2296 adapter->stats.vfgprc);
2297 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2298 adapter->stats.vfgptc);
2299 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2300 adapter->stats.last_vfgorc,
2301 adapter->stats.vfgorc);
2302 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2303 adapter->stats.last_vfgotc,
2304 adapter->stats.vfgotc);
2305 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2306 adapter->stats.vfmprc);
2307
2308 /* Fill out the OS statistics structure */
fb621bac 2309 adapter->netdev->stats.multicast = adapter->stats.vfmprc -
92915f71
GR		 2310 adapter->stats.base_vfmprc;
2311}
2312
2313/**
2314 * ixgbevf_watchdog - Timer Call-back
2315 * @data: pointer to adapter cast into an unsigned long
2316 **/
2317static void ixgbevf_watchdog(unsigned long data)
2318{
2319 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2320 struct ixgbe_hw *hw = &adapter->hw;
2321 u64 eics = 0;
2322 int i;
2323
2324 /*
2325 * Do the watchdog outside of interrupt context due to the lovely
2326 * delays that some of the newer hardware requires
2327 */
2328
2329 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2330 goto watchdog_short_circuit;
2331
2332 /* get one bit for every active tx/rx interrupt vector */
2333 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2334 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2335 if (qv->rxr_count || qv->txr_count)
2336 eics |= (1 << i);
2337 }
2338
2339 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2340
2341watchdog_short_circuit:
2342 schedule_work(&adapter->watchdog_task);
2343}
2344
2345/**
2346 * ixgbevf_tx_timeout - Respond to a Tx Hang
2347 * @netdev: network interface device structure
2348 **/
2349static void ixgbevf_tx_timeout(struct net_device *netdev)
2350{
2351 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2352
2353 /* Do the reset outside of interrupt context */
2354 schedule_work(&adapter->reset_task);
2355}
2356
2357static void ixgbevf_reset_task(struct work_struct *work)
2358{
2359 struct ixgbevf_adapter *adapter;
2360 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2361
2362 /* If we're already down or resetting, just bail */
2363 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2364 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2365 return;
2366
2367 adapter->tx_timeout_count++;
2368
2369 ixgbevf_reinit_locked(adapter);
2370}
2371
2372/**
2373 * ixgbevf_watchdog_task - worker thread to bring link up
2374 * @work: pointer to work_struct containing our data
2375 **/
2376static void ixgbevf_watchdog_task(struct work_struct *work)
2377{
2378 struct ixgbevf_adapter *adapter = container_of(work,
2379 struct ixgbevf_adapter,
2380 watchdog_task);
2381 struct net_device *netdev = adapter->netdev;
2382 struct ixgbe_hw *hw = &adapter->hw;
2383 u32 link_speed = adapter->link_speed;
2384 bool link_up = adapter->link_up;
2385
2386 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2387
2388 /*
2389 * Always check the link on the watchdog because we have
2390 * no LSC interrupt
2391 */
2392 if (hw->mac.ops.check_link) {
2393 if ((hw->mac.ops.check_link(hw, &link_speed,
2394 &link_up, false)) != 0) {
2395 adapter->link_up = link_up;
2396 adapter->link_speed = link_speed;
da6b3330
GR		 2397 netif_carrier_off(netdev);
2398 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2399 schedule_work(&adapter->reset_task);
2400 goto pf_has_reset;
2401 }
2402 } else {
2403 /* always assume link is up, if no check link
2404 * function */
2405 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2406 link_up = true;
2407 }
2408 adapter->link_up = link_up;
2409 adapter->link_speed = link_speed;
2410
2411 if (link_up) {
2412 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2413 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2414 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2415 10 : 1);
92915f71
GR		 2416 netif_carrier_on(netdev);
2417 netif_tx_wake_all_queues(netdev);
2418 } else {
2419 /* Force detection of hung controller */
2420 adapter->detect_tx_hung = true;
2421 }
2422 } else {
2423 adapter->link_up = false;
2424 adapter->link_speed = 0;
2425 if (netif_carrier_ok(netdev)) {
2426 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2427 netif_carrier_off(netdev);
2428 netif_tx_stop_all_queues(netdev);
2429 }
2430 }
2431
92915f71
GR		 2432 ixgbevf_update_stats(adapter);
2433
33bd9f60 2434pf_has_reset:
92915f71
GR		 2435 /* Force detection of hung controller every watchdog period */
2436 adapter->detect_tx_hung = true;
2437
2438 /* Reset the timer */
2439 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2440 mod_timer(&adapter->watchdog_timer,
2441 round_jiffies(jiffies + (2 * HZ)));
2442
2443 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2444}
2445
2446/**
2447 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2448 * @adapter: board private structure
2449 * @tx_ring: Tx descriptor ring for a specific queue
2450 *
2451 * Free all transmit software resources
2452 **/
2453void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2454 struct ixgbevf_ring *tx_ring)
2455{
2456 struct pci_dev *pdev = adapter->pdev;
2457
92915f71
GR		 2458 ixgbevf_clean_tx_ring(adapter, tx_ring);
2459
2460 vfree(tx_ring->tx_buffer_info);
2461 tx_ring->tx_buffer_info = NULL;
2462
2a1f8794
NN		 2463 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2464 tx_ring->dma);
92915f71
GR		 2465
2466 tx_ring->desc = NULL;
2467}
2468
2469/**
2470 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2471 * @adapter: board private structure
2472 *
2473 * Free all transmit software resources
2474 **/
2475static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2476{
2477 int i;
2478
2479 for (i = 0; i < adapter->num_tx_queues; i++)
2480 if (adapter->tx_ring[i].desc)
2481 ixgbevf_free_tx_resources(adapter,
2482 &adapter->tx_ring[i]);
2483
2484}
2485
2486/**
2487 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2488 * @adapter: board private structure
2489 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2490 *
2491 * Return 0 on success, negative on failure
2492 **/
2493int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2494 struct ixgbevf_ring *tx_ring)
2495{
2496 struct pci_dev *pdev = adapter->pdev;
2497 int size;
2498
2499 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2500 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2501 if (!tx_ring->tx_buffer_info)
2502 goto err;
92915f71
GR		 2503
2504 /* round up to nearest 4K */
2505 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2506 tx_ring->size = ALIGN(tx_ring->size, 4096);
2507
2a1f8794
NN		 2508 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2509 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2510 if (!tx_ring->desc)
2511 goto err;
2512
2513 tx_ring->next_to_use = 0;
2514 tx_ring->next_to_clean = 0;
2515 tx_ring->work_limit = tx_ring->count;
2516 return 0;
2517
2518err:
2519 vfree(tx_ring->tx_buffer_info);
2520 tx_ring->tx_buffer_info = NULL;
2521 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2522 "descriptor ring\n");
2523 return -ENOMEM;
2524}
2525
2526/**
2527 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2528 * @adapter: board private structure
2529 *
2530 * If this function returns with an error, then it's possible one or
2531 * more of the rings is populated (while the rest are not). It is the
2532 * callers duty to clean those orphaned rings.
2533 *
2534 * Return 0 on success, negative on failure
2535 **/
2536static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2537{
2538 int i, err = 0;
2539
2540 for (i = 0; i < adapter->num_tx_queues; i++) {
2541 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2542 if (!err)
2543 continue;
2544 hw_dbg(&adapter->hw,
2545 "Allocation for Tx Queue %u failed\n", i);
2546 break;
2547 }
2548
2549 return err;
2550}
2551
2552/**
2553 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2554 * @adapter: board private structure
2555 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2556 *
2557 * Returns 0 on success, negative on failure
2558 **/
2559int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2560 struct ixgbevf_ring *rx_ring)
2561{
2562 struct pci_dev *pdev = adapter->pdev;
2563 int size;
2564
2565 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2566 rx_ring->rx_buffer_info = vzalloc(size);
92915f71
GR		 2567 if (!rx_ring->rx_buffer_info) {
2568 hw_dbg(&adapter->hw,
2569 "Unable to vmalloc buffer memory for "
2570 "the receive descriptor ring\n");
2571 goto alloc_failed;
2572 }
92915f71
GR		 2573
2574 /* Round up to nearest 4K */
2575 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2576 rx_ring->size = ALIGN(rx_ring->size, 4096);
2577
2a1f8794
NN		 2578 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2579 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2580
2581 if (!rx_ring->desc) {
2582 hw_dbg(&adapter->hw,
2583 "Unable to allocate memory for "
2584 "the receive descriptor ring\n");
2585 vfree(rx_ring->rx_buffer_info);
2586 rx_ring->rx_buffer_info = NULL;
2587 goto alloc_failed;
2588 }
2589
2590 rx_ring->next_to_clean = 0;
2591 rx_ring->next_to_use = 0;
2592
2593 return 0;
2594alloc_failed:
2595 return -ENOMEM;
2596}
2597
2598/**
2599 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2600 * @adapter: board private structure
2601 *
2602 * If this function returns with an error, then it's possible one or
2603 * more of the rings is populated (while the rest are not). It is the
2604 * callers duty to clean those orphaned rings.
2605 *
2606 * Return 0 on success, negative on failure
2607 **/
2608static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2609{
2610 int i, err = 0;
2611
2612 for (i = 0; i < adapter->num_rx_queues; i++) {
2613 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2614 if (!err)
2615 continue;
2616 hw_dbg(&adapter->hw,
2617 "Allocation for Rx Queue %u failed\n", i);
2618 break;
2619 }
2620 return err;
2621}
2622
2623/**
2624 * ixgbevf_free_rx_resources - Free Rx Resources
2625 * @adapter: board private structure
2626 * @rx_ring: ring to clean the resources from
2627 *
2628 * Free all receive software resources
2629 **/
2630void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2631 struct ixgbevf_ring *rx_ring)
2632{
2633 struct pci_dev *pdev = adapter->pdev;
2634
2635 ixgbevf_clean_rx_ring(adapter, rx_ring);
2636
2637 vfree(rx_ring->rx_buffer_info);
2638 rx_ring->rx_buffer_info = NULL;
2639
2a1f8794
NN		 2640 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2641 rx_ring->dma);
92915f71
GR		 2642
2643 rx_ring->desc = NULL;
2644}
2645
2646/**
2647 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2648 * @adapter: board private structure
2649 *
2650 * Free all receive software resources
2651 **/
2652static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2653{
2654 int i;
2655
2656 for (i = 0; i < adapter->num_rx_queues; i++)
2657 if (adapter->rx_ring[i].desc)
2658 ixgbevf_free_rx_resources(adapter,
2659 &adapter->rx_ring[i]);
2660}
2661
2662/**
2663 * ixgbevf_open - Called when a network interface is made active
2664 * @netdev: network interface device structure
2665 *
2666 * Returns 0 on success, negative value on failure
2667 *
2668 * The open entry point is called when a network interface is made
2669 * active by the system (IFF_UP). At this point all resources needed
2670 * for transmit and receive operations are allocated, the interrupt
2671 * handler is registered with the OS, the watchdog timer is started,
2672 * and the stack is notified that the interface is ready.
2673 **/
2674static int ixgbevf_open(struct net_device *netdev)
2675{
2676 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2677 struct ixgbe_hw *hw = &adapter->hw;
2678 int err;
2679
2680 /* disallow open during test */
2681 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2682 return -EBUSY;
2683
2684 if (hw->adapter_stopped) {
2685 ixgbevf_reset(adapter);
2686 /* if adapter is still stopped then PF isn't up and
2687 * the vf can't start. */
2688 if (hw->adapter_stopped) {
2689 err = IXGBE_ERR_MBX;
2690 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2691 " Driver isn't up yet\n");
92915f71
GR		 2692 goto err_setup_reset;
2693 }
2694 }
2695
2696 /* allocate transmit descriptors */
2697 err = ixgbevf_setup_all_tx_resources(adapter);
2698 if (err)
2699 goto err_setup_tx;
2700
2701 /* allocate receive descriptors */
2702 err = ixgbevf_setup_all_rx_resources(adapter);
2703 if (err)
2704 goto err_setup_rx;
2705
2706 ixgbevf_configure(adapter);
2707
2708 /*
2709 * Map the Tx/Rx rings to the vectors we were allotted.
2710 * if request_irq will be called in this function map_rings
2711 * must be called *before* up_complete
2712 */
2713 ixgbevf_map_rings_to_vectors(adapter);
2714
2715 err = ixgbevf_up_complete(adapter);
2716 if (err)
2717 goto err_up;
2718
2719 /* clear any pending interrupts, may auto mask */
2720 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2721 err = ixgbevf_request_irq(adapter);
2722 if (err)
2723 goto err_req_irq;
2724
2725 ixgbevf_irq_enable(adapter, true, true);
2726
2727 return 0;
2728
2729err_req_irq:
2730 ixgbevf_down(adapter);
2731err_up:
2732 ixgbevf_free_irq(adapter);
2733err_setup_rx:
2734 ixgbevf_free_all_rx_resources(adapter);
2735err_setup_tx:
2736 ixgbevf_free_all_tx_resources(adapter);
2737 ixgbevf_reset(adapter);
2738
2739err_setup_reset:
2740
2741 return err;
2742}
2743
2744/**
2745 * ixgbevf_close - Disables a network interface
2746 * @netdev: network interface device structure
2747 *
2748 * Returns 0, this is not allowed to fail
2749 *
2750 * The close entry point is called when an interface is de-activated
2751 * by the OS. The hardware is still under the drivers control, but
2752 * needs to be disabled. A global MAC reset is issued to stop the
2753 * hardware, and all transmit and receive resources are freed.
2754 **/
2755static int ixgbevf_close(struct net_device *netdev)
2756{
2757 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2758
2759 ixgbevf_down(adapter);
2760 ixgbevf_free_irq(adapter);
2761
2762 ixgbevf_free_all_tx_resources(adapter);
2763 ixgbevf_free_all_rx_resources(adapter);
2764
2765 return 0;
2766}
2767
2768static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2769 struct ixgbevf_ring *tx_ring,
2770 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2771{
2772 struct ixgbe_adv_tx_context_desc *context_desc;
2773 unsigned int i;
2774 int err;
2775 struct ixgbevf_tx_buffer *tx_buffer_info;
2776 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2777 u32 mss_l4len_idx, l4len;
2778
2779 if (skb_is_gso(skb)) {
2780 if (skb_header_cloned(skb)) {
2781 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2782 if (err)
2783 return err;
2784 }
2785 l4len = tcp_hdrlen(skb);
2786 *hdr_len += l4len;
2787
2788 if (skb->protocol == htons(ETH_P_IP)) {
2789 struct iphdr *iph = ip_hdr(skb);
2790 iph->tot_len = 0;
2791 iph->check = 0;
2792 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2793 iph->daddr, 0,
2794 IPPROTO_TCP,
2795 0);
2796 adapter->hw_tso_ctxt++;
9010bc33 2797 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2798 ipv6_hdr(skb)->payload_len = 0;
2799 tcp_hdr(skb)->check =
2800 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2801 &ipv6_hdr(skb)->daddr,
2802 0, IPPROTO_TCP, 0);
2803 adapter->hw_tso6_ctxt++;
2804 }
2805
2806 i = tx_ring->next_to_use;
2807
2808 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2809 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2810
2811 /* VLAN MACLEN IPLEN */
2812 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2813 vlan_macip_lens |=
2814 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2815 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2816 IXGBE_ADVTXD_MACLEN_SHIFT);
2817 *hdr_len += skb_network_offset(skb);
2818 vlan_macip_lens |=
2819 (skb_transport_header(skb) - skb_network_header(skb));
2820 *hdr_len +=
2821 (skb_transport_header(skb) - skb_network_header(skb));
2822 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2823 context_desc->seqnum_seed = 0;
2824
2825 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2826 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2827 IXGBE_ADVTXD_DTYP_CTXT);
2828
2829 if (skb->protocol == htons(ETH_P_IP))
2830 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2831 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2832 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2833
2834 /* MSS L4LEN IDX */
2835 mss_l4len_idx =
2836 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2837 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2838 /* use index 1 for TSO */
2839 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2840 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2841
2842 tx_buffer_info->time_stamp = jiffies;
2843 tx_buffer_info->next_to_watch = i;
2844
2845 i++;
2846 if (i == tx_ring->count)
2847 i = 0;
2848 tx_ring->next_to_use = i;
2849
2850 return true;
2851 }
2852
2853 return false;
2854}
2855
2856static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2857 struct ixgbevf_ring *tx_ring,
2858 struct sk_buff *skb, u32 tx_flags)
2859{
2860 struct ixgbe_adv_tx_context_desc *context_desc;
2861 unsigned int i;
2862 struct ixgbevf_tx_buffer *tx_buffer_info;
2863 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2864
2865 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2866 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2867 i = tx_ring->next_to_use;
2868 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2869 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2870
2871 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2872 vlan_macip_lens |= (tx_flags &
2873 IXGBE_TX_FLAGS_VLAN_MASK);
2874 vlan_macip_lens |= (skb_network_offset(skb) <<
2875 IXGBE_ADVTXD_MACLEN_SHIFT);
2876 if (skb->ip_summed == CHECKSUM_PARTIAL)
2877 vlan_macip_lens |= (skb_transport_header(skb) -
2878 skb_network_header(skb));
2879
2880 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2881 context_desc->seqnum_seed = 0;
2882
2883 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2884 IXGBE_ADVTXD_DTYP_CTXT);
2885
2886 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2887 switch (skb->protocol) {
2888 case __constant_htons(ETH_P_IP):
2889 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2890 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2891 type_tucmd_mlhl |=
2892 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2893 break;
2894 case __constant_htons(ETH_P_IPV6):
2895 /* XXX what about other V6 headers?? */
2896 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2897 type_tucmd_mlhl |=
2898 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2899 break;
2900 default:
2901 if (unlikely(net_ratelimit())) {
2902 printk(KERN_WARNING
2903 "partial checksum but "
2904 "proto=%x!\n",
2905 skb->protocol);
2906 }
2907 break;
2908 }
2909 }
2910
2911 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2912 /* use index zero for tx checksum offload */
2913 context_desc->mss_l4len_idx = 0;
2914
2915 tx_buffer_info->time_stamp = jiffies;
2916 tx_buffer_info->next_to_watch = i;
2917
2918 adapter->hw_csum_tx_good++;
2919 i++;
2920 if (i == tx_ring->count)
2921 i = 0;
2922 tx_ring->next_to_use = i;
2923
2924 return true;
2925 }
2926
2927 return false;
2928}
2929
2930static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2931 struct ixgbevf_ring *tx_ring,
2932 struct sk_buff *skb, u32 tx_flags,
2933 unsigned int first)
2934{
2935 struct pci_dev *pdev = adapter->pdev;
2936 struct ixgbevf_tx_buffer *tx_buffer_info;
2937 unsigned int len;
2938 unsigned int total = skb->len;
2540ddb5
KV		 2939 unsigned int offset = 0, size;
2940 int count = 0;
92915f71
GR		 2941 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2942 unsigned int f;
65deeed7 2943 int i;
92915f71
GR		 2944
2945 i = tx_ring->next_to_use;
2946
2947 len = min(skb_headlen(skb), total);
2948 while (len) {
2949 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2950 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2951
2952 tx_buffer_info->length = size;
2953 tx_buffer_info->mapped_as_page = false;
2a1f8794 2954 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2955 skb->data + offset,
2a1f8794
NN		 2956 size, DMA_TO_DEVICE);
2957 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2958 goto dma_error;
2959 tx_buffer_info->time_stamp = jiffies;
2960 tx_buffer_info->next_to_watch = i;
2961
2962 len -= size;
2963 total -= size;
2964 offset += size;
2965 count++;
2966 i++;
2967 if (i == tx_ring->count)
2968 i = 0;
2969 }
2970
2971 for (f = 0; f < nr_frags; f++) {
2972 struct skb_frag_struct *frag;
2973
2974 frag = &skb_shinfo(skb)->frags[f];
2975 len = min((unsigned int)frag->size, total);
2976 offset = frag->page_offset;
2977
2978 while (len) {
2979 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2980 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2981
2982 tx_buffer_info->length = size;
2a1f8794 2983 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2984 frag->page,
2985 offset,
2986 size,
2a1f8794 2987 DMA_TO_DEVICE);
92915f71 2988 tx_buffer_info->mapped_as_page = true;
2a1f8794 2989 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2990 goto dma_error;
2991 tx_buffer_info->time_stamp = jiffies;
2992 tx_buffer_info->next_to_watch = i;
2993
2994 len -= size;
2995 total -= size;
2996 offset += size;
2997 count++;
2998 i++;
2999 if (i == tx_ring->count)
3000 i = 0;
3001 }
3002 if (total == 0)
3003 break;
3004 }
3005
3006 if (i == 0)
3007 i = tx_ring->count - 1;
3008 else
3009 i = i - 1;
3010 tx_ring->tx_buffer_info[i].skb = skb;
3011 tx_ring->tx_buffer_info[first].next_to_watch = i;
3012
3013 return count;
3014
3015dma_error:
3016 dev_err(&pdev->dev, "TX DMA map failed\n");
3017
3018 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3019 tx_buffer_info->dma = 0;
3020 tx_buffer_info->time_stamp = 0;
3021 tx_buffer_info->next_to_watch = 0;
3022 count--;
3023
3024 /* clear timestamp and dma mappings for remaining portion of packet */
3025 while (count >= 0) {
3026 count--;
3027 i--;
3028 if (i < 0)
3029 i += tx_ring->count;
3030 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3031 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3032 }
3033
3034 return count;
3035}
3036
3037static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3038 struct ixgbevf_ring *tx_ring, int tx_flags,
3039 int count, u32 paylen, u8 hdr_len)
3040{
3041 union ixgbe_adv_tx_desc *tx_desc = NULL;
3042 struct ixgbevf_tx_buffer *tx_buffer_info;
3043 u32 olinfo_status = 0, cmd_type_len = 0;
3044 unsigned int i;
3045
3046 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3047
3048 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3049
3050 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3051
3052 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3053 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3054
3055 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3056 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3057
3058 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3059 IXGBE_ADVTXD_POPTS_SHIFT;
3060
3061 /* use index 1 context for tso */
3062 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3063 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3064 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3065 IXGBE_ADVTXD_POPTS_SHIFT;
3066
3067 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3068 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3069 IXGBE_ADVTXD_POPTS_SHIFT;
3070
3071 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3072
3073 i = tx_ring->next_to_use;
3074 while (count--) {
3075 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3076 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3077 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3078 tx_desc->read.cmd_type_len =
3079 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3080 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3081 i++;
3082 if (i == tx_ring->count)
3083 i = 0;
3084 }
3085
3086 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3087
3088 /*
3089 * Force memory writes to complete before letting h/w
3090 * know there are new descriptors to fetch. (Only
3091 * applicable for weak-ordered memory model archs,
3092 * such as IA-64).
3093 */
3094 wmb();
3095
3096 tx_ring->next_to_use = i;
3097 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3098}
3099
3100static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3101 struct ixgbevf_ring *tx_ring, int size)
3102{
3103 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3104
3105 netif_stop_subqueue(netdev, tx_ring->queue_index);
3106 /* Herbert's original patch had:
3107 * smp_mb__after_netif_stop_queue();
3108 * but since that doesn't exist yet, just open code it. */
3109 smp_mb();
3110
3111 /* We need to check again in a case another CPU has just
3112 * made room available. */
3113 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3114 return -EBUSY;
3115
3116 /* A reprieve! - use start_queue because it doesn't call schedule */
3117 netif_start_subqueue(netdev, tx_ring->queue_index);
3118 ++adapter->restart_queue;
3119 return 0;
3120}
3121
3122static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3123 struct ixgbevf_ring *tx_ring, int size)
3124{
3125 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3126 return 0;
3127 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3128}
3129
3130static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3131{
3132 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3133 struct ixgbevf_ring *tx_ring;
3134 unsigned int first;
3135 unsigned int tx_flags = 0;
3136 u8 hdr_len = 0;
3137 int r_idx = 0, tso;
3138 int count = 0;
3139
3140 unsigned int f;
3141
3142 tx_ring = &adapter->tx_ring[r_idx];
3143
eab6d18d 3144 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3145 tx_flags |= vlan_tx_tag_get(skb);
3146 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3147 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3148 }
3149
3150 /* four things can cause us to need a context descriptor */
3151 if (skb_is_gso(skb) ||
3152 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3153 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3154 count++;
3155
3156 count += TXD_USE_COUNT(skb_headlen(skb));
3157 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3158 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3159
3160 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3161 adapter->tx_busy++;
3162 return NETDEV_TX_BUSY;
3163 }
3164
3165 first = tx_ring->next_to_use;
3166
3167 if (skb->protocol == htons(ETH_P_IP))
3168 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3169 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3170 if (tso < 0) {
3171 dev_kfree_skb_any(skb);
3172 return NETDEV_TX_OK;
3173 }
3174
3175 if (tso)
3176 tx_flags |= IXGBE_TX_FLAGS_TSO;
3177 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3178 (skb->ip_summed == CHECKSUM_PARTIAL))
3179 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3180
3181 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3182 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3183 skb->len, hdr_len);
3184
92915f71
GR		 3185 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3186
3187 return NETDEV_TX_OK;
3188}
3189
92915f71
GR		 3190/**
3191 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3192 * @netdev: network interface device structure
3193 * @p: pointer to an address structure
3194 *
3195 * Returns 0 on success, negative on failure
3196 **/
3197static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3198{
3199 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3200 struct ixgbe_hw *hw = &adapter->hw;
3201 struct sockaddr *addr = p;
3202
3203 if (!is_valid_ether_addr(addr->sa_data))
3204 return -EADDRNOTAVAIL;
3205
3206 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3207 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3208
3209 if (hw->mac.ops.set_rar)
3210 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3211
3212 return 0;
3213}
3214
3215/**
3216 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3217 * @netdev: network interface device structure
3218 * @new_mtu: new value for maximum frame size
3219 *
3220 * Returns 0 on success, negative on failure
3221 **/
3222static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3223{
3224 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
69bfbec4 3225 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3226 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4
GR		 3227 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
3228 u32 msg[2];
3229
3230 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3231 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 3232
3233 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3234 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3235 return -EINVAL;
3236
3237 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3238 netdev->mtu, new_mtu);
3239 /* must set new MTU before calling down or up */
3240 netdev->mtu = new_mtu;
3241
69bfbec4
GR		 3242 msg[0] = IXGBE_VF_SET_LPE;
3243 msg[1] = max_frame;
3244 hw->mbx.ops.write_posted(hw, msg, 2);
3245
92915f71
GR		 3246 if (netif_running(netdev))
3247 ixgbevf_reinit_locked(adapter);
3248
3249 return 0;
3250}
3251
3252static void ixgbevf_shutdown(struct pci_dev *pdev)
3253{
3254 struct net_device *netdev = pci_get_drvdata(pdev);
3255 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3256
3257 netif_device_detach(netdev);
3258
3259 if (netif_running(netdev)) {
3260 ixgbevf_down(adapter);
3261 ixgbevf_free_irq(adapter);
3262 ixgbevf_free_all_tx_resources(adapter);
3263 ixgbevf_free_all_rx_resources(adapter);
3264 }
3265
3266#ifdef CONFIG_PM
3267 pci_save_state(pdev);
3268#endif
3269
3270 pci_disable_device(pdev);
3271}
3272
92915f71
GR		 3273static const struct net_device_ops ixgbe_netdev_ops = {
3274 .ndo_open = &ixgbevf_open,
3275 .ndo_stop = &ixgbevf_close,
3276 .ndo_start_xmit = &ixgbevf_xmit_frame,
92915f71
GR		 3277 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3278 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3279 .ndo_validate_addr = eth_validate_addr,
3280 .ndo_set_mac_address = &ixgbevf_set_mac,
3281 .ndo_change_mtu = &ixgbevf_change_mtu,
3282 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3283 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3284 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3285 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3286};
92915f71
GR		 3287
3288static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3289{
3290 struct ixgbevf_adapter *adapter;
3291 adapter = netdev_priv(dev);
92915f71 3292 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3293 ixgbevf_set_ethtool_ops(dev);
3294 dev->watchdog_timeo = 5 * HZ;
3295}
3296
3297/**
3298 * ixgbevf_probe - Device Initialization Routine
3299 * @pdev: PCI device information struct
3300 * @ent: entry in ixgbevf_pci_tbl
3301 *
3302 * Returns 0 on success, negative on failure
3303 *
3304 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3305 * The OS initialization, configuring of the adapter private structure,
3306 * and a hardware reset occur.
3307 **/
3308static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3309 const struct pci_device_id *ent)
3310{
3311 struct net_device *netdev;
3312 struct ixgbevf_adapter *adapter = NULL;
3313 struct ixgbe_hw *hw = NULL;
3314 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3315 static int cards_found;
3316 int err, pci_using_dac;
3317
3318 err = pci_enable_device(pdev);
3319 if (err)
3320 return err;
3321
2a1f8794
NN		 3322 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3323 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3324 pci_using_dac = 1;
3325 } else {
2a1f8794 3326 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3327 if (err) {
2a1f8794
NN		 3328 err = dma_set_coherent_mask(&pdev->dev,
3329 DMA_BIT_MASK(32));
92915f71
GR		 3330 if (err) {
3331 dev_err(&pdev->dev, "No usable DMA "
3332 "configuration, aborting\n");
3333 goto err_dma;
3334 }
3335 }
3336 pci_using_dac = 0;
3337 }
3338
3339 err = pci_request_regions(pdev, ixgbevf_driver_name);
3340 if (err) {
3341 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3342 goto err_pci_reg;
3343 }
3344
3345 pci_set_master(pdev);
3346
3347#ifdef HAVE_TX_MQ
3348 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3349 MAX_TX_QUEUES);
3350#else
3351 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3352#endif
3353 if (!netdev) {
3354 err = -ENOMEM;
3355 goto err_alloc_etherdev;
3356 }
3357
3358 SET_NETDEV_DEV(netdev, &pdev->dev);
3359
3360 pci_set_drvdata(pdev, netdev);
3361 adapter = netdev_priv(netdev);
3362
3363 adapter->netdev = netdev;
3364 adapter->pdev = pdev;
3365 hw = &adapter->hw;
3366 hw->back = adapter;
3367 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3368
3369 /*
3370 * call save state here in standalone driver because it relies on
3371 * adapter struct to exist, and needs to call netdev_priv
3372 */
3373 pci_save_state(pdev);
3374
3375 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3376 pci_resource_len(pdev, 0));
3377 if (!hw->hw_addr) {
3378 err = -EIO;
3379 goto err_ioremap;
3380 }
3381
3382 ixgbevf_assign_netdev_ops(netdev);
3383
3384 adapter->bd_number = cards_found;
3385
3386 /* Setup hw api */
3387 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3388 hw->mac.type = ii->mac;
3389
3390 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3391 sizeof(struct ixgbe_mac_operations));
3392
3393 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3394 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3395 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3396
3397 /* setup the private structure */
3398 err = ixgbevf_sw_init(adapter);
3399
92915f71
GR		 3400 netdev->features = NETIF_F_SG |
3401 NETIF_F_IP_CSUM |
3402 NETIF_F_HW_VLAN_TX |
3403 NETIF_F_HW_VLAN_RX |
3404 NETIF_F_HW_VLAN_FILTER;
3405
3406 netdev->features |= NETIF_F_IPV6_CSUM;
3407 netdev->features |= NETIF_F_TSO;
3408 netdev->features |= NETIF_F_TSO6;
e59d44df 3409 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3410 netdev->vlan_features |= NETIF_F_TSO;
3411 netdev->vlan_features |= NETIF_F_TSO6;
3412 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3413 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3414 netdev->vlan_features |= NETIF_F_SG;
3415
3416 if (pci_using_dac)
3417 netdev->features |= NETIF_F_HIGHDMA;
3418
92915f71
GR		 3419 /* The HW MAC address was set and/or determined in sw_init */
3420 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3421 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3422
3423 if (!is_valid_ether_addr(netdev->dev_addr)) {
3424 printk(KERN_ERR "invalid MAC address\n");
3425 err = -EIO;
3426 goto err_sw_init;
3427 }
3428
3429 init_timer(&adapter->watchdog_timer);
c061b18d 3430 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3431 adapter->watchdog_timer.data = (unsigned long)adapter;
3432
3433 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3434 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3435
3436 err = ixgbevf_init_interrupt_scheme(adapter);
3437 if (err)
3438 goto err_sw_init;
3439
3440 /* pick up the PCI bus settings for reporting later */
3441 if (hw->mac.ops.get_bus_info)
3442 hw->mac.ops.get_bus_info(hw);
3443
92915f71
GR		 3444 strcpy(netdev->name, "eth%d");
3445
3446 err = register_netdev(netdev);
3447 if (err)
3448 goto err_register;
3449
3450 adapter->netdev_registered = true;
3451
5d426ad1
GR		 3452 netif_carrier_off(netdev);
3453
33bd9f60
GR		 3454 ixgbevf_init_last_counter_stats(adapter);
3455
92915f71
GR		 3456 /* print the MAC address */
3457 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3458 netdev->dev_addr[0],
3459 netdev->dev_addr[1],
3460 netdev->dev_addr[2],
3461 netdev->dev_addr[3],
3462 netdev->dev_addr[4],
3463 netdev->dev_addr[5]);
3464
3465 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3466
d6dbee86 3467 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3468
3469 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3470 cards_found++;
3471 return 0;
3472
3473err_register:
3474err_sw_init:
3475 ixgbevf_reset_interrupt_capability(adapter);
3476 iounmap(hw->hw_addr);
3477err_ioremap:
3478 free_netdev(netdev);
3479err_alloc_etherdev:
3480 pci_release_regions(pdev);
3481err_pci_reg:
3482err_dma:
3483 pci_disable_device(pdev);
3484 return err;
3485}
3486
3487/**
3488 * ixgbevf_remove - Device Removal Routine
3489 * @pdev: PCI device information struct
3490 *
3491 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3492 * that it should release a PCI device. The could be caused by a
3493 * Hot-Plug event, or because the driver is going to be removed from
3494 * memory.
3495 **/
3496static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3497{
3498 struct net_device *netdev = pci_get_drvdata(pdev);
3499 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3500
3501 set_bit(__IXGBEVF_DOWN, &adapter->state);
3502
3503 del_timer_sync(&adapter->watchdog_timer);
3504
23f333a2 3505 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3506 cancel_work_sync(&adapter->watchdog_task);
3507
92915f71
GR		 3508 if (adapter->netdev_registered) {
3509 unregister_netdev(netdev);
3510 adapter->netdev_registered = false;
3511 }
3512
3513 ixgbevf_reset_interrupt_capability(adapter);
3514
3515 iounmap(adapter->hw.hw_addr);
3516 pci_release_regions(pdev);
3517
3518 hw_dbg(&adapter->hw, "Remove complete\n");
3519
3520 kfree(adapter->tx_ring);
3521 kfree(adapter->rx_ring);
3522
3523 free_netdev(netdev);
3524
3525 pci_disable_device(pdev);
3526}
3527
3528static struct pci_driver ixgbevf_driver = {
3529 .name = ixgbevf_driver_name,
3530 .id_table = ixgbevf_pci_tbl,
3531 .probe = ixgbevf_probe,
3532 .remove = __devexit_p(ixgbevf_remove),
3533 .shutdown = ixgbevf_shutdown,
3534};
3535
3536/**
65d676c8 3537 * ixgbevf_init_module - Driver Registration Routine
92915f71 3538 *
65d676c8 3539 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3540 * loaded. All it does is register with the PCI subsystem.
3541 **/
3542static int __init ixgbevf_init_module(void)
3543{
3544 int ret;
3545 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3546 ixgbevf_driver_version);
3547
3548 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3549
3550 ret = pci_register_driver(&ixgbevf_driver);
3551 return ret;
3552}
3553
3554module_init(ixgbevf_init_module);
3555
3556/**
65d676c8 3557 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3558 *
65d676c8 3559 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3560 * from memory.
3561 **/
3562static void __exit ixgbevf_exit_module(void)
3563{
3564 pci_unregister_driver(&ixgbevf_driver);
3565}
3566
3567#ifdef DEBUG
3568/**
65d676c8 3569 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3570 * used by hardware layer to print debugging information
3571 **/
3572char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3573{
3574 struct ixgbevf_adapter *adapter = hw->back;
3575 return adapter->netdev->name;
3576}
3577
3578#endif
3579module_exit(ixgbevf_exit_module);
3580
3581/* ixgbevf_main.c */
kernel source for telekom puls (alcatel/mediatek)