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ixgb: fix interface losing macaddr on ifdn/up
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC		 32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- bunk@stusta.de
34 * - ethtool cleanup -- shemminger@osdl.org
35 * - Support for MODULE_VERSION -- linville@tuxdriver.com
36 * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
1da177e4
LT		 37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - shemminger@osdl.org
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
a24e2513 55#define DRV_VERSION "1.0.104-k4"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
75 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76
77 /* required last entry */
78 {0,}
79};
80
81MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
82
83/* Local Function Prototypes */
84
85int ixgb_up(struct ixgb_adapter *adapter);
86void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
87void ixgb_reset(struct ixgb_adapter *adapter);
88int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
89int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
91void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
92void ixgb_update_stats(struct ixgb_adapter *adapter);
93
94static int ixgb_init_module(void);
95static void ixgb_exit_module(void);
96static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
97static void __devexit ixgb_remove(struct pci_dev *pdev);
98static int ixgb_sw_init(struct ixgb_adapter *adapter);
99static int ixgb_open(struct net_device *netdev);
100static int ixgb_close(struct net_device *netdev);
101static void ixgb_configure_tx(struct ixgb_adapter *adapter);
102static void ixgb_configure_rx(struct ixgb_adapter *adapter);
103static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
104static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
105static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
106static void ixgb_set_multi(struct net_device *netdev);
107static void ixgb_watchdog(unsigned long data);
108static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
109static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
110static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
111static int ixgb_set_mac(struct net_device *netdev, void *p);
112static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
113static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 114
1da177e4
LT		 115#ifdef CONFIG_IXGB_NAPI
116static int ixgb_clean(struct net_device *netdev, int *budget);
117static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
118 int *work_done, int work_to_do);
119#else
120static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
121#endif
122static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
123void ixgb_set_ethtool_ops(struct net_device *netdev);
124static void ixgb_tx_timeout(struct net_device *dev);
125static void ixgb_tx_timeout_task(struct net_device *dev);
126static void ixgb_vlan_rx_register(struct net_device *netdev,
127 struct vlan_group *grp);
128static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
129static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
130static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
131
1da177e4
LT		 132#ifdef CONFIG_NET_POLL_CONTROLLER
133/* for netdump / net console */
134static void ixgb_netpoll(struct net_device *dev);
135#endif
136
1da177e4
LT		 137/* Exported from other modules */
138
139extern void ixgb_check_options(struct ixgb_adapter *adapter);
140
141static struct pci_driver ixgb_driver = {
c2eba932 142 .name = ixgb_driver_name,
1da177e4 143 .id_table = ixgb_pci_tbl,
c2eba932
MC		 144 .probe = ixgb_probe,
145 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 146};
147
148MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
149MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
150MODULE_LICENSE("GPL");
01e5abc2 151MODULE_VERSION(DRV_VERSION);
1da177e4 152
ec9c3f5d
AK		 153#define DEFAULT_DEBUG_LEVEL_SHIFT 3
154static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
155module_param(debug, int, 0);
156MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
157
1da177e4 158/* some defines for controlling descriptor fetches in h/w */
1da177e4 159#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 160#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
161 * this */
162#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
163 * is pushed this many descriptors
164 * from head */
1da177e4
LT		 165
166/**
167 * ixgb_init_module - Driver Registration Routine
168 *
169 * ixgb_init_module is the first routine called when the driver is
170 * loaded. All it does is register with the PCI subsystem.
171 **/
172
173static int __init
174ixgb_init_module(void)
175{
1da177e4
LT		 176 printk(KERN_INFO "%s - version %s\n",
177 ixgb_driver_string, ixgb_driver_version);
178
179 printk(KERN_INFO "%s\n", ixgb_copyright);
180
c2eba932 181 return pci_module_init(&ixgb_driver);
1da177e4
LT		 182}
183
184module_init(ixgb_init_module);
185
186/**
187 * ixgb_exit_module - Driver Exit Cleanup Routine
188 *
189 * ixgb_exit_module is called just before the driver is removed
190 * from memory.
191 **/
192
193static void __exit
194ixgb_exit_module(void)
195{
1da177e4
LT		 196 pci_unregister_driver(&ixgb_driver);
197}
198
199module_exit(ixgb_exit_module);
200
201/**
202 * ixgb_irq_disable - Mask off interrupt generation on the NIC
203 * @adapter: board private structure
204 **/
205
206static inline void
207ixgb_irq_disable(struct ixgb_adapter *adapter)
208{
209 atomic_inc(&adapter->irq_sem);
210 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
211 IXGB_WRITE_FLUSH(&adapter->hw);
212 synchronize_irq(adapter->pdev->irq);
213}
214
215/**
216 * ixgb_irq_enable - Enable default interrupt generation settings
217 * @adapter: board private structure
218 **/
219
220static inline void
221ixgb_irq_enable(struct ixgb_adapter *adapter)
222{
223 if(atomic_dec_and_test(&adapter->irq_sem)) {
224 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 225 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
226 IXGB_INT_LSC);
1da177e4
LT		 227 IXGB_WRITE_FLUSH(&adapter->hw);
228 }
229}
230
231int
232ixgb_up(struct ixgb_adapter *adapter)
233{
234 struct net_device *netdev = adapter->netdev;
235 int err;
236 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
237 struct ixgb_hw *hw = &adapter->hw;
238
239 /* hardware has been reset, we need to reload some things */
240
8556f0d1 241 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT		 242 ixgb_set_multi(netdev);
243
244 ixgb_restore_vlan(adapter);
245
246 ixgb_configure_tx(adapter);
247 ixgb_setup_rctl(adapter);
248 ixgb_configure_rx(adapter);
249 ixgb_alloc_rx_buffers(adapter);
250
e59d1696
AK		 251 /* disable interrupts and get the hardware into a known state */
252 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
253
1da177e4
LT		 254#ifdef CONFIG_PCI_MSI
255 {
256 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
257 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
258 adapter->have_msi = TRUE;
259
260 if (!pcix)
261 adapter->have_msi = FALSE;
262 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 263 DPRINTK(PROBE, ERR,
1da177e4
LT		 264 "Unable to allocate MSI interrupt Error: %d\n", err);
265 adapter->have_msi = FALSE;
266 /* proceed to try to request regular interrupt */
267 }
268 }
269
270#endif
271 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
272 SA_SHIRQ | SA_SAMPLE_RANDOM,
ec9c3f5d
AK		 273 netdev->name, netdev))) {
274 DPRINTK(PROBE, ERR,
275 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 276 return err;
ec9c3f5d 277 }
1da177e4 278
1da177e4
LT		 279 if((hw->max_frame_size != max_frame) ||
280 (hw->max_frame_size !=
281 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
282
283 hw->max_frame_size = max_frame;
284
285 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
286
287 if(hw->max_frame_size >
288 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
289 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
290
291 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
292 ctrl0 |= IXGB_CTRL0_JFE;
293 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
294 }
295 }
296 }
297
298 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 299
300#ifdef CONFIG_IXGB_NAPI
301 netif_poll_enable(netdev);
302#endif
e59d1696
AK		 303 ixgb_irq_enable(adapter);
304
1da177e4
LT		 305 return 0;
306}
307
308void
309ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
310{
311 struct net_device *netdev = adapter->netdev;
312
313 ixgb_irq_disable(adapter);
314 free_irq(adapter->pdev->irq, netdev);
315#ifdef CONFIG_PCI_MSI
316 if(adapter->have_msi == TRUE)
317 pci_disable_msi(adapter->pdev);
318
319#endif
320 if(kill_watchdog)
321 del_timer_sync(&adapter->watchdog_timer);
322#ifdef CONFIG_IXGB_NAPI
323 netif_poll_disable(netdev);
324#endif
325 adapter->link_speed = 0;
326 adapter->link_duplex = 0;
327 netif_carrier_off(netdev);
328 netif_stop_queue(netdev);
329
330 ixgb_reset(adapter);
331 ixgb_clean_tx_ring(adapter);
332 ixgb_clean_rx_ring(adapter);
333}
334
335void
336ixgb_reset(struct ixgb_adapter *adapter)
337{
338
339 ixgb_adapter_stop(&adapter->hw);
340 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 341 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT		 342}
343
344/**
345 * ixgb_probe - Device Initialization Routine
346 * @pdev: PCI device information struct
347 * @ent: entry in ixgb_pci_tbl
348 *
349 * Returns 0 on success, negative on failure
350 *
351 * ixgb_probe initializes an adapter identified by a pci_dev structure.
352 * The OS initialization, configuring of the adapter private structure,
353 * and a hardware reset occur.
354 **/
355
356static int __devinit
357ixgb_probe(struct pci_dev *pdev,
358 const struct pci_device_id *ent)
359{
360 struct net_device *netdev = NULL;
361 struct ixgb_adapter *adapter;
362 static int cards_found = 0;
363 unsigned long mmio_start;
364 int mmio_len;
365 int pci_using_dac;
366 int i;
367 int err;
368
369 if((err = pci_enable_device(pdev)))
370 return err;
371
c91e468a
AS		 372 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
373 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 374 pci_using_dac = 1;
375 } else {
c91e468a
AS		 376 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
377 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 378 printk(KERN_ERR
379 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 380 goto err_dma_mask;
1da177e4
LT		 381 }
382 pci_using_dac = 0;
383 }
384
385 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 386 goto err_request_regions;
1da177e4
LT		 387
388 pci_set_master(pdev);
389
390 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
391 if(!netdev) {
392 err = -ENOMEM;
393 goto err_alloc_etherdev;
394 }
395
396 SET_MODULE_OWNER(netdev);
397 SET_NETDEV_DEV(netdev, &pdev->dev);
398
399 pci_set_drvdata(pdev, netdev);
8908c6cd 400 adapter = netdev_priv(netdev);
1da177e4
LT		 401 adapter->netdev = netdev;
402 adapter->pdev = pdev;
403 adapter->hw.back = adapter;
ec9c3f5d 404 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 405
406 mmio_start = pci_resource_start(pdev, BAR_0);
407 mmio_len = pci_resource_len(pdev, BAR_0);
408
409 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
410 if(!adapter->hw.hw_addr) {
411 err = -EIO;
412 goto err_ioremap;
413 }
414
415 for(i = BAR_1; i <= BAR_5; i++) {
416 if(pci_resource_len(pdev, i) == 0)
417 continue;
418 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
419 adapter->hw.io_base = pci_resource_start(pdev, i);
420 break;
421 }
422 }
423
424 netdev->open = &ixgb_open;
425 netdev->stop = &ixgb_close;
426 netdev->hard_start_xmit = &ixgb_xmit_frame;
427 netdev->get_stats = &ixgb_get_stats;
428 netdev->set_multicast_list = &ixgb_set_multi;
429 netdev->set_mac_address = &ixgb_set_mac;
430 netdev->change_mtu = &ixgb_change_mtu;
431 ixgb_set_ethtool_ops(netdev);
432 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 433 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT		 434#ifdef CONFIG_IXGB_NAPI
435 netdev->poll = &ixgb_clean;
436 netdev->weight = 64;
437#endif
438 netdev->vlan_rx_register = ixgb_vlan_rx_register;
439 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
440 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
441#ifdef CONFIG_NET_POLL_CONTROLLER
442 netdev->poll_controller = ixgb_netpoll;
443#endif
444
ec9c3f5d 445 strcpy(netdev->name, pci_name(pdev));
1da177e4
LT		 446 netdev->mem_start = mmio_start;
447 netdev->mem_end = mmio_start + mmio_len;
448 netdev->base_addr = adapter->hw.io_base;
449
450 adapter->bd_number = cards_found;
451 adapter->link_speed = 0;
452 adapter->link_duplex = 0;
453
454 /* setup the private structure */
455
456 if((err = ixgb_sw_init(adapter)))
457 goto err_sw_init;
458
459 netdev->features = NETIF_F_SG |
460 NETIF_F_HW_CSUM |
461 NETIF_F_HW_VLAN_TX |
462 NETIF_F_HW_VLAN_RX |
463 NETIF_F_HW_VLAN_FILTER;
464#ifdef NETIF_F_TSO
465 netdev->features |= NETIF_F_TSO;
466#endif
f017f14b
AK		 467#ifdef NETIF_F_LLTX
468 netdev->features |= NETIF_F_LLTX;
469#endif
1da177e4
LT		 470
471 if(pci_using_dac)
472 netdev->features |= NETIF_F_HIGHDMA;
473
474 /* make sure the EEPROM is good */
475
476 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 477 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 478 err = -EIO;
479 goto err_eeprom;
480 }
481
482 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 483 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 484
df859c51 485 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 486 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 487 err = -EIO;
488 goto err_eeprom;
489 }
490
491 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
492
493 init_timer(&adapter->watchdog_timer);
494 adapter->watchdog_timer.function = &ixgb_watchdog;
495 adapter->watchdog_timer.data = (unsigned long)adapter;
496
497 INIT_WORK(&adapter->tx_timeout_task,
498 (void (*)(void *))ixgb_tx_timeout_task, netdev);
499
ec9c3f5d 500 strcpy(netdev->name, "eth%d");
1da177e4
LT		 501 if((err = register_netdev(netdev)))
502 goto err_register;
503
504 /* we're going to reset, so assume we have no link for now */
505
506 netif_carrier_off(netdev);
507 netif_stop_queue(netdev);
508
ec9c3f5d 509 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 510 ixgb_check_options(adapter);
511 /* reset the hardware with the new settings */
512
513 ixgb_reset(adapter);
514
515 cards_found++;
516 return 0;
517
518err_register:
519err_sw_init:
520err_eeprom:
521 iounmap(adapter->hw.hw_addr);
522err_ioremap:
523 free_netdev(netdev);
524err_alloc_etherdev:
525 pci_release_regions(pdev);
c91e468a
AS		 526err_request_regions:
527err_dma_mask:
528 pci_disable_device(pdev);
1da177e4
LT		 529 return err;
530}
531
532/**
533 * ixgb_remove - Device Removal Routine
534 * @pdev: PCI device information struct
535 *
536 * ixgb_remove is called by the PCI subsystem to alert the driver
537 * that it should release a PCI device. The could be caused by a
538 * Hot-Plug event, or because the driver is going to be removed from
539 * memory.
540 **/
541
542static void __devexit
543ixgb_remove(struct pci_dev *pdev)
544{
545 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 546 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 547
548 unregister_netdev(netdev);
549
550 iounmap(adapter->hw.hw_addr);
551 pci_release_regions(pdev);
552
553 free_netdev(netdev);
554}
555
556/**
557 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
558 * @adapter: board private structure to initialize
559 *
560 * ixgb_sw_init initializes the Adapter private data structure.
561 * Fields are initialized based on PCI device information and
562 * OS network device settings (MTU size).
563 **/
564
565static int __devinit
566ixgb_sw_init(struct ixgb_adapter *adapter)
567{
568 struct ixgb_hw *hw = &adapter->hw;
569 struct net_device *netdev = adapter->netdev;
570 struct pci_dev *pdev = adapter->pdev;
571
572 /* PCI config space info */
573
574 hw->vendor_id = pdev->vendor;
575 hw->device_id = pdev->device;
576 hw->subsystem_vendor_id = pdev->subsystem_vendor;
577 hw->subsystem_id = pdev->subsystem_device;
578
579 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
580
581 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
582
583 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 584 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
585 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
586 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 587 hw->mac_type = ixgb_82597;
588 else {
589 /* should never have loaded on this device */
ec9c3f5d 590 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 591 }
592
593 /* enable flow control to be programmed */
594 hw->fc.send_xon = 1;
595
596 atomic_set(&adapter->irq_sem, 1);
597 spin_lock_init(&adapter->tx_lock);
598
599 return 0;
600}
601
602/**
603 * ixgb_open - Called when a network interface is made active
604 * @netdev: network interface device structure
605 *
606 * Returns 0 on success, negative value on failure
607 *
608 * The open entry point is called when a network interface is made
609 * active by the system (IFF_UP). At this point all resources needed
610 * for transmit and receive operations are allocated, the interrupt
611 * handler is registered with the OS, the watchdog timer is started,
612 * and the stack is notified that the interface is ready.
613 **/
614
615static int
616ixgb_open(struct net_device *netdev)
617{
8908c6cd 618 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 619 int err;
620
621 /* allocate transmit descriptors */
622
623 if((err = ixgb_setup_tx_resources(adapter)))
624 goto err_setup_tx;
625
626 /* allocate receive descriptors */
627
628 if((err = ixgb_setup_rx_resources(adapter)))
629 goto err_setup_rx;
630
631 if((err = ixgb_up(adapter)))
632 goto err_up;
633
634 return 0;
635
636err_up:
637 ixgb_free_rx_resources(adapter);
638err_setup_rx:
639 ixgb_free_tx_resources(adapter);
640err_setup_tx:
641 ixgb_reset(adapter);
642
643 return err;
644}
645
646/**
647 * ixgb_close - Disables a network interface
648 * @netdev: network interface device structure
649 *
650 * Returns 0, this is not allowed to fail
651 *
652 * The close entry point is called when an interface is de-activated
653 * by the OS. The hardware is still under the drivers control, but
654 * needs to be disabled. A global MAC reset is issued to stop the
655 * hardware, and all transmit and receive resources are freed.
656 **/
657
658static int
659ixgb_close(struct net_device *netdev)
660{
8908c6cd 661 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 662
663 ixgb_down(adapter, TRUE);
664
665 ixgb_free_tx_resources(adapter);
666 ixgb_free_rx_resources(adapter);
667
668 return 0;
669}
670
671/**
672 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
673 * @adapter: board private structure
674 *
675 * Return 0 on success, negative on failure
676 **/
677
678int
679ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
680{
681 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
682 struct pci_dev *pdev = adapter->pdev;
683 int size;
684
685 size = sizeof(struct ixgb_buffer) * txdr->count;
686 txdr->buffer_info = vmalloc(size);
687 if(!txdr->buffer_info) {
ec9c3f5d
AK		 688 DPRINTK(PROBE, ERR,
689 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 690 return -ENOMEM;
691 }
692 memset(txdr->buffer_info, 0, size);
693
694 /* round up to nearest 4K */
695
696 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
697 IXGB_ROUNDUP(txdr->size, 4096);
698
699 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
700 if(!txdr->desc) {
701 vfree(txdr->buffer_info);
ec9c3f5d
AK		 702 DPRINTK(PROBE, ERR,
703 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 704 return -ENOMEM;
705 }
706 memset(txdr->desc, 0, txdr->size);
707
708 txdr->next_to_use = 0;
709 txdr->next_to_clean = 0;
710
711 return 0;
712}
713
714/**
715 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
716 * @adapter: board private structure
717 *
718 * Configure the Tx unit of the MAC after a reset.
719 **/
720
721static void
722ixgb_configure_tx(struct ixgb_adapter *adapter)
723{
724 uint64_t tdba = adapter->tx_ring.dma;
725 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
726 uint32_t tctl;
727 struct ixgb_hw *hw = &adapter->hw;
728
729 /* Setup the Base and Length of the Tx Descriptor Ring
730 * tx_ring.dma can be either a 32 or 64 bit value
731 */
732
733 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
734 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
735
736 IXGB_WRITE_REG(hw, TDLEN, tdlen);
737
738 /* Setup the HW Tx Head and Tail descriptor pointers */
739
740 IXGB_WRITE_REG(hw, TDH, 0);
741 IXGB_WRITE_REG(hw, TDT, 0);
742
743 /* don't set up txdctl, it induces performance problems if configured
744 * incorrectly */
745 /* Set the Tx Interrupt Delay register */
746
747 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
748
749 /* Program the Transmit Control Register */
750
751 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
752 IXGB_WRITE_REG(hw, TCTL, tctl);
753
754 /* Setup Transmit Descriptor Settings for this adapter */
755 adapter->tx_cmd_type =
756 IXGB_TX_DESC_TYPE
757 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
758}
759
760/**
761 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
762 * @adapter: board private structure
763 *
764 * Returns 0 on success, negative on failure
765 **/
766
767int
768ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
769{
770 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
771 struct pci_dev *pdev = adapter->pdev;
772 int size;
773
774 size = sizeof(struct ixgb_buffer) * rxdr->count;
775 rxdr->buffer_info = vmalloc(size);
776 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 777 DPRINTK(PROBE, ERR,
778 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 779 return -ENOMEM;
780 }
781 memset(rxdr->buffer_info, 0, size);
782
783 /* Round up to nearest 4K */
784
785 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
786 IXGB_ROUNDUP(rxdr->size, 4096);
787
788 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
789
790 if(!rxdr->desc) {
791 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 792 DPRINTK(PROBE, ERR,
793 "Unable to allocate receive descriptors\n");
1da177e4
LT		 794 return -ENOMEM;
795 }
796 memset(rxdr->desc, 0, rxdr->size);
797
798 rxdr->next_to_clean = 0;
799 rxdr->next_to_use = 0;
800
801 return 0;
802}
803
804/**
805 * ixgb_setup_rctl - configure the receive control register
806 * @adapter: Board private structure
807 **/
808
809static void
810ixgb_setup_rctl(struct ixgb_adapter *adapter)
811{
812 uint32_t rctl;
813
814 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
815
816 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
817
818 rctl |=
819 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
820 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
821 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
822
823 rctl |= IXGB_RCTL_SECRC;
824
825 switch (adapter->rx_buffer_len) {
826 case IXGB_RXBUFFER_2048:
827 default:
828 rctl |= IXGB_RCTL_BSIZE_2048;
829 break;
830 case IXGB_RXBUFFER_4096:
831 rctl |= IXGB_RCTL_BSIZE_4096;
832 break;
833 case IXGB_RXBUFFER_8192:
834 rctl |= IXGB_RCTL_BSIZE_8192;
835 break;
836 case IXGB_RXBUFFER_16384:
837 rctl |= IXGB_RCTL_BSIZE_16384;
838 break;
839 }
840
841 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
842}
843
844/**
845 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
846 * @adapter: board private structure
847 *
848 * Configure the Rx unit of the MAC after a reset.
849 **/
850
851static void
852ixgb_configure_rx(struct ixgb_adapter *adapter)
853{
854 uint64_t rdba = adapter->rx_ring.dma;
855 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
856 struct ixgb_hw *hw = &adapter->hw;
857 uint32_t rctl;
858 uint32_t rxcsum;
859 uint32_t rxdctl;
860
861 /* make sure receives are disabled while setting up the descriptors */
862
863 rctl = IXGB_READ_REG(hw, RCTL);
864 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
865
866 /* set the Receive Delay Timer Register */
867
868 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
869
870 /* Setup the Base and Length of the Rx Descriptor Ring */
871
872 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
873 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
874
875 IXGB_WRITE_REG(hw, RDLEN, rdlen);
876
877 /* Setup the HW Rx Head and Tail Descriptor Pointers */
878 IXGB_WRITE_REG(hw, RDH, 0);
879 IXGB_WRITE_REG(hw, RDT, 0);
880
881 /* set up pre-fetching of receive buffers so we get some before we
882 * run out (default hardware behavior is to run out before fetching
883 * more). This sets up to fetch if HTHRESH rx descriptors are avail
884 * and the descriptors in hw cache are below PTHRESH. This avoids
885 * the hardware behavior of fetching <=512 descriptors in a single
886 * burst that pre-empts all other activity, usually causing fifo
887 * overflows. */
888 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
889 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
890 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
891 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
892 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
893
894 /* Enable Receive Checksum Offload for TCP and UDP */
895 if(adapter->rx_csum == TRUE) {
896 rxcsum = IXGB_READ_REG(hw, RXCSUM);
897 rxcsum |= IXGB_RXCSUM_TUOFL;
898 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
899 }
900
901 /* Enable Receives */
902
903 IXGB_WRITE_REG(hw, RCTL, rctl);
904}
905
906/**
907 * ixgb_free_tx_resources - Free Tx Resources
908 * @adapter: board private structure
909 *
910 * Free all transmit software resources
911 **/
912
913void
914ixgb_free_tx_resources(struct ixgb_adapter *adapter)
915{
916 struct pci_dev *pdev = adapter->pdev;
917
918 ixgb_clean_tx_ring(adapter);
919
920 vfree(adapter->tx_ring.buffer_info);
921 adapter->tx_ring.buffer_info = NULL;
922
923 pci_free_consistent(pdev, adapter->tx_ring.size,
924 adapter->tx_ring.desc, adapter->tx_ring.dma);
925
926 adapter->tx_ring.desc = NULL;
927}
928
929static inline void
930ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
931 struct ixgb_buffer *buffer_info)
932{
933 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 934
935 if (buffer_info->dma)
936 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
937 PCI_DMA_TODEVICE);
938
939 if (buffer_info->skb)
1da177e4 940 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 941
942 buffer_info->skb = NULL;
943 buffer_info->dma = 0;
944 buffer_info->time_stamp = 0;
945 /* these fields must always be initialized in tx
946 * buffer_info->length = 0;
947 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 948}
949
950/**
951 * ixgb_clean_tx_ring - Free Tx Buffers
952 * @adapter: board private structure
953 **/
954
955static void
956ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
957{
958 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
959 struct ixgb_buffer *buffer_info;
960 unsigned long size;
961 unsigned int i;
962
963 /* Free all the Tx ring sk_buffs */
964
965 for(i = 0; i < tx_ring->count; i++) {
966 buffer_info = &tx_ring->buffer_info[i];
967 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
968 }
969
970 size = sizeof(struct ixgb_buffer) * tx_ring->count;
971 memset(tx_ring->buffer_info, 0, size);
972
973 /* Zero out the descriptor ring */
974
975 memset(tx_ring->desc, 0, tx_ring->size);
976
977 tx_ring->next_to_use = 0;
978 tx_ring->next_to_clean = 0;
979
980 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
981 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
982}
983
984/**
985 * ixgb_free_rx_resources - Free Rx Resources
986 * @adapter: board private structure
987 *
988 * Free all receive software resources
989 **/
990
991void
992ixgb_free_rx_resources(struct ixgb_adapter *adapter)
993{
994 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
995 struct pci_dev *pdev = adapter->pdev;
996
997 ixgb_clean_rx_ring(adapter);
998
999 vfree(rx_ring->buffer_info);
1000 rx_ring->buffer_info = NULL;
1001
1002 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1003
1004 rx_ring->desc = NULL;
1005}
1006
1007/**
1008 * ixgb_clean_rx_ring - Free Rx Buffers
1009 * @adapter: board private structure
1010 **/
1011
1012static void
1013ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1014{
1015 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1016 struct ixgb_buffer *buffer_info;
1017 struct pci_dev *pdev = adapter->pdev;
1018 unsigned long size;
1019 unsigned int i;
1020
1021 /* Free all the Rx ring sk_buffs */
1022
1023 for(i = 0; i < rx_ring->count; i++) {
1024 buffer_info = &rx_ring->buffer_info[i];
1025 if(buffer_info->skb) {
1026
1027 pci_unmap_single(pdev,
1028 buffer_info->dma,
1029 buffer_info->length,
1030 PCI_DMA_FROMDEVICE);
1031
1032 dev_kfree_skb(buffer_info->skb);
1033
1034 buffer_info->skb = NULL;
1035 }
1036 }
1037
1038 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1039 memset(rx_ring->buffer_info, 0, size);
1040
1041 /* Zero out the descriptor ring */
1042
1043 memset(rx_ring->desc, 0, rx_ring->size);
1044
1045 rx_ring->next_to_clean = 0;
1046 rx_ring->next_to_use = 0;
1047
1048 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1049 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1050}
1051
1052/**
1053 * ixgb_set_mac - Change the Ethernet Address of the NIC
1054 * @netdev: network interface device structure
1055 * @p: pointer to an address structure
1056 *
1057 * Returns 0 on success, negative on failure
1058 **/
1059
1060static int
1061ixgb_set_mac(struct net_device *netdev, void *p)
1062{
8908c6cd 1063 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1064 struct sockaddr *addr = p;
1065
1066 if(!is_valid_ether_addr(addr->sa_data))
1067 return -EADDRNOTAVAIL;
1068
1069 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1070
1071 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1072
1073 return 0;
1074}
1075
1076/**
1077 * ixgb_set_multi - Multicast and Promiscuous mode set
1078 * @netdev: network interface device structure
1079 *
1080 * The set_multi entry point is called whenever the multicast address
1081 * list or the network interface flags are updated. This routine is
1082 * responsible for configuring the hardware for proper multicast,
1083 * promiscuous mode, and all-multi behavior.
1084 **/
1085
1086static void
1087ixgb_set_multi(struct net_device *netdev)
1088{
8908c6cd 1089 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1090 struct ixgb_hw *hw = &adapter->hw;
1091 struct dev_mc_list *mc_ptr;
1092 uint32_t rctl;
1093 int i;
1094
1095 /* Check for Promiscuous and All Multicast modes */
1096
1097 rctl = IXGB_READ_REG(hw, RCTL);
1098
1099 if(netdev->flags & IFF_PROMISC) {
1100 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1101 } else if(netdev->flags & IFF_ALLMULTI) {
1102 rctl |= IXGB_RCTL_MPE;
1103 rctl &= ~IXGB_RCTL_UPE;
1104 } else {
1105 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1106 }
1107
1108 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1109 rctl |= IXGB_RCTL_MPE;
1110 IXGB_WRITE_REG(hw, RCTL, rctl);
1111 } else {
1112 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1113
1114 IXGB_WRITE_REG(hw, RCTL, rctl);
1115
1116 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1117 i++, mc_ptr = mc_ptr->next)
1118 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1119 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1120
1121 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1122 }
1123}
1124
1125/**
1126 * ixgb_watchdog - Timer Call-back
1127 * @data: pointer to netdev cast into an unsigned long
1128 **/
1129
1130static void
1131ixgb_watchdog(unsigned long data)
1132{
1133 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1134 struct net_device *netdev = adapter->netdev;
1135 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1136
1137 ixgb_check_for_link(&adapter->hw);
1138
1139 if (ixgb_check_for_bad_link(&adapter->hw)) {
1140 /* force the reset path */
1141 netif_stop_queue(netdev);
1142 }
1143
1144 if(adapter->hw.link_up) {
1145 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1146 DPRINTK(LINK, INFO,
1147 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1148 adapter->link_speed = 10000;
1149 adapter->link_duplex = FULL_DUPLEX;
1150 netif_carrier_on(netdev);
1151 netif_wake_queue(netdev);
1152 }
1153 } else {
1154 if(netif_carrier_ok(netdev)) {
1155 adapter->link_speed = 0;
1156 adapter->link_duplex = 0;
ec9c3f5d 1157 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1158 netif_carrier_off(netdev);
1159 netif_stop_queue(netdev);
1160
1161 }
1162 }
1163
1164 ixgb_update_stats(adapter);
1165
1166 if(!netif_carrier_ok(netdev)) {
1167 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1168 /* We've lost link, so the controller stops DMA,
1169 * but we've got queued Tx work that's never going
1170 * to get done, so reset controller to flush Tx.
1171 * (Do the reset outside of interrupt context). */
1172 schedule_work(&adapter->tx_timeout_task);
1173 }
1174 }
1175
1176 /* Force detection of hung controller every watchdog period */
1177 adapter->detect_tx_hung = TRUE;
1178
1179 /* generate an interrupt to force clean up of any stragglers */
1180 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1181
1182 /* Reset the timer */
1183 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1184}
1185
1186#define IXGB_TX_FLAGS_CSUM 0x00000001
1187#define IXGB_TX_FLAGS_VLAN 0x00000002
1188#define IXGB_TX_FLAGS_TSO 0x00000004
1189
1190static inline int
1191ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1192{
1193#ifdef NETIF_F_TSO
1194 struct ixgb_context_desc *context_desc;
1195 unsigned int i;
1196 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1197 uint16_t ipcse, tucse, mss;
1198 int err;
1199
1200 if(likely(skb_shinfo(skb)->tso_size)) {
1201 if (skb_header_cloned(skb)) {
1202 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1203 if (err)
1204 return err;
1205 }
1206
1207 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1208 mss = skb_shinfo(skb)->tso_size;
1209 skb->nh.iph->tot_len = 0;
1210 skb->nh.iph->check = 0;
1211 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1212 skb->nh.iph->daddr,
1213 0, IPPROTO_TCP, 0);
1214 ipcss = skb->nh.raw - skb->data;
1215 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1216 ipcse = skb->h.raw - skb->data - 1;
1217 tucss = skb->h.raw - skb->data;
1218 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1219 tucse = 0;
1220
1221 i = adapter->tx_ring.next_to_use;
1222 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1223
1224 context_desc->ipcss = ipcss;
1225 context_desc->ipcso = ipcso;
1226 context_desc->ipcse = cpu_to_le16(ipcse);
1227 context_desc->tucss = tucss;
1228 context_desc->tucso = tucso;
1229 context_desc->tucse = cpu_to_le16(tucse);
1230 context_desc->mss = cpu_to_le16(mss);
1231 context_desc->hdr_len = hdr_len;
1232 context_desc->status = 0;
1233 context_desc->cmd_type_len = cpu_to_le32(
1234 IXGB_CONTEXT_DESC_TYPE
1235 | IXGB_CONTEXT_DESC_CMD_TSE
1236 | IXGB_CONTEXT_DESC_CMD_IP
1237 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1238 | IXGB_CONTEXT_DESC_CMD_IDE
1239 | (skb->len - (hdr_len)));
1240
06c2f9ec 1241
1da177e4
LT		 1242 if(++i == adapter->tx_ring.count) i = 0;
1243 adapter->tx_ring.next_to_use = i;
1244
1245 return 1;
1246 }
1247#endif
1248
1249 return 0;
1250}
1251
1252static inline boolean_t
1253ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1254{
1255 struct ixgb_context_desc *context_desc;
1256 unsigned int i;
1257 uint8_t css, cso;
1258
1259 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1260 css = skb->h.raw - skb->data;
1261 cso = (skb->h.raw + skb->csum) - skb->data;
1262
1263 i = adapter->tx_ring.next_to_use;
1264 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1265
1266 context_desc->tucss = css;
1267 context_desc->tucso = cso;
1268 context_desc->tucse = 0;
1269 /* zero out any previously existing data in one instruction */
1270 *(uint32_t *)&(context_desc->ipcss) = 0;
1271 context_desc->status = 0;
1272 context_desc->hdr_len = 0;
1273 context_desc->mss = 0;
1274 context_desc->cmd_type_len =
1275 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1276 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1277
1278 if(++i == adapter->tx_ring.count) i = 0;
1279 adapter->tx_ring.next_to_use = i;
1280
1281 return TRUE;
1282 }
1283
1284 return FALSE;
1285}
1286
1287#define IXGB_MAX_TXD_PWR 14
1288#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1289
1290static inline int
1291ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1292 unsigned int first)
1293{
1294 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1295 struct ixgb_buffer *buffer_info;
1296 int len = skb->len;
1297 unsigned int offset = 0, size, count = 0, i;
96f9c2e2 1298 unsigned int mss = skb_shinfo(skb)->tso_size;
1da177e4
LT		 1299
1300 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1301 unsigned int f;
ac79c82e 1302
1da177e4
LT		 1303 len -= skb->data_len;
1304
1305 i = tx_ring->next_to_use;
1306
1307 while(len) {
1308 buffer_info = &tx_ring->buffer_info[i];
1309 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1310 /* Workaround for premature desc write-backs
1311 * in TSO mode. Append 4-byte sentinel desc */
1312 if(unlikely(mss && !nr_frags && size == len && size > 8))
1313 size -= 4;
1314
1da177e4
LT		 1315 buffer_info->length = size;
1316 buffer_info->dma =
1317 pci_map_single(adapter->pdev,
1318 skb->data + offset,
1319 size,
1320 PCI_DMA_TODEVICE);
1321 buffer_info->time_stamp = jiffies;
1dfdd7df 1322 buffer_info->next_to_watch = 0;
1da177e4
LT		 1323
1324 len -= size;
1325 offset += size;
1326 count++;
1327 if(++i == tx_ring->count) i = 0;
1328 }
1329
1330 for(f = 0; f < nr_frags; f++) {
1331 struct skb_frag_struct *frag;
1332
1333 frag = &skb_shinfo(skb)->frags[f];
1334 len = frag->size;
1335 offset = 0;
1336
1337 while(len) {
1338 buffer_info = &tx_ring->buffer_info[i];
1339 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1340 /* Workaround for premature desc write-backs
1341 * in TSO mode. Append 4-byte sentinel desc */
1342 if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
1343 && (size > 8)))
1344 size -= 4;
1345
1da177e4
LT		 1346 buffer_info->length = size;
1347 buffer_info->dma =
1348 pci_map_page(adapter->pdev,
1349 frag->page,
1350 frag->page_offset + offset,
1351 size,
1352 PCI_DMA_TODEVICE);
1353 buffer_info->time_stamp = jiffies;
1dfdd7df 1354 buffer_info->next_to_watch = 0;
1da177e4
LT		 1355
1356 len -= size;
1357 offset += size;
1358 count++;
1359 if(++i == tx_ring->count) i = 0;
1360 }
1361 }
1362 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1363 tx_ring->buffer_info[i].skb = skb;
1364 tx_ring->buffer_info[first].next_to_watch = i;
1365
1366 return count;
1367}
1368
1369static inline void
1370ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1371{
1372 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1373 struct ixgb_tx_desc *tx_desc = NULL;
1374 struct ixgb_buffer *buffer_info;
1375 uint32_t cmd_type_len = adapter->tx_cmd_type;
1376 uint8_t status = 0;
1377 uint8_t popts = 0;
1378 unsigned int i;
1379
1380 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1381 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1382 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1383 }
1384
1385 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1386 popts |= IXGB_TX_DESC_POPTS_TXSM;
1387
1388 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1389 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1390 }
1391
1392 i = tx_ring->next_to_use;
1393
1394 while(count--) {
1395 buffer_info = &tx_ring->buffer_info[i];
1396 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1397 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1398 tx_desc->cmd_type_len =
1399 cpu_to_le32(cmd_type_len | buffer_info->length);
1400 tx_desc->status = status;
1401 tx_desc->popts = popts;
1402 tx_desc->vlan = cpu_to_le16(vlan_id);
1403
1404 if(++i == tx_ring->count) i = 0;
1405 }
1406
1407 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1408 | IXGB_TX_DESC_CMD_RS );
1409
1410 /* Force memory writes to complete before letting h/w
1411 * know there are new descriptors to fetch. (Only
1412 * applicable for weak-ordered memory model archs,
1413 * such as IA-64). */
1414 wmb();
1415
1416 tx_ring->next_to_use = i;
1417 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1418}
1419
1420/* Tx Descriptors needed, worst case */
1421#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1422 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1423#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
96f9c2e2
AK		 1424 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
1425 /* one more for TSO workaround */ + 1
1da177e4
LT		 1426
1427static int
1428ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1429{
8908c6cd 1430 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1431 unsigned int first;
1432 unsigned int tx_flags = 0;
1433 unsigned long flags;
1434 int vlan_id = 0;
1435 int tso;
1436
1437 if(skb->len <= 0) {
1438 dev_kfree_skb_any(skb);
1439 return 0;
1440 }
1441
f017f14b
AK		 1442#ifdef NETIF_F_LLTX
1443 local_irq_save(flags);
1444 if (!spin_trylock(&adapter->tx_lock)) {
1445 /* Collision - tell upper layer to requeue */
1446 local_irq_restore(flags);
1447 return NETDEV_TX_LOCKED;
1448 }
1449#else
1da177e4 1450 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1451#endif
1452
1da177e4
LT		 1453 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1454 netif_stop_queue(netdev);
1455 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1456 return NETDEV_TX_BUSY;
1da177e4 1457 }
f017f14b
AK		 1458
1459#ifndef NETIF_F_LLTX
1da177e4 1460 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1461#endif
1da177e4
LT		 1462
1463 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1464 tx_flags |= IXGB_TX_FLAGS_VLAN;
1465 vlan_id = vlan_tx_tag_get(skb);
1466 }
1467
1468 first = adapter->tx_ring.next_to_use;
1469
1470 tso = ixgb_tso(adapter, skb);
1471 if (tso < 0) {
1472 dev_kfree_skb_any(skb);
f017f14b
AK		 1473#ifdef NETIF_F_LLTX
1474 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1475#endif
1da177e4
LT		 1476 return NETDEV_TX_OK;
1477 }
1478
96f9c2e2 1479 if (likely(tso))
1da177e4
LT		 1480 tx_flags |= IXGB_TX_FLAGS_TSO;
1481 else if(ixgb_tx_csum(adapter, skb))
1482 tx_flags |= IXGB_TX_FLAGS_CSUM;
1483
1484 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1485 tx_flags);
1486
1487 netdev->trans_start = jiffies;
1488
f017f14b
AK		 1489#ifdef NETIF_F_LLTX
1490 /* Make sure there is space in the ring for the next send. */
1491 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1492 netif_stop_queue(netdev);
1493
1494 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1495
1496#endif
1497 return NETDEV_TX_OK;
1da177e4
LT		 1498}
1499
1500/**
1501 * ixgb_tx_timeout - Respond to a Tx Hang
1502 * @netdev: network interface device structure
1503 **/
1504
1505static void
1506ixgb_tx_timeout(struct net_device *netdev)
1507{
8908c6cd 1508 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1509
1510 /* Do the reset outside of interrupt context */
1511 schedule_work(&adapter->tx_timeout_task);
1512}
1513
1514static void
1515ixgb_tx_timeout_task(struct net_device *netdev)
1516{
8908c6cd 1517 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1518
9b8118df 1519 adapter->tx_timeout_count++;
1da177e4
LT		 1520 ixgb_down(adapter, TRUE);
1521 ixgb_up(adapter);
1522}
1523
1524/**
1525 * ixgb_get_stats - Get System Network Statistics
1526 * @netdev: network interface device structure
1527 *
1528 * Returns the address of the device statistics structure.
1529 * The statistics are actually updated from the timer callback.
1530 **/
1531
1532static struct net_device_stats *
1533ixgb_get_stats(struct net_device *netdev)
1534{
8908c6cd 1535 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1536
1537 return &adapter->net_stats;
1538}
1539
1540/**
1541 * ixgb_change_mtu - Change the Maximum Transfer Unit
1542 * @netdev: network interface device structure
1543 * @new_mtu: new value for maximum frame size
1544 *
1545 * Returns 0 on success, negative on failure
1546 **/
1547
1548static int
1549ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1550{
8908c6cd 1551 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1552 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1553 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1554
1555
1556 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1557 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1558 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1559 return -EINVAL;
1560 }
1561
1562 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1563 || (max_frame <= IXGB_RXBUFFER_2048)) {
1564 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1565
1566 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1567 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1568
1569 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1570 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1571
1572 } else {
1573 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1574 }
1575
1576 netdev->mtu = new_mtu;
1577
1578 if(old_max_frame != max_frame && netif_running(netdev)) {
1579
1580 ixgb_down(adapter, TRUE);
1581 ixgb_up(adapter);
1582 }
1583
1584 return 0;
1585}
1586
1587/**
1588 * ixgb_update_stats - Update the board statistics counters.
1589 * @adapter: board private structure
1590 **/
1591
1592void
1593ixgb_update_stats(struct ixgb_adapter *adapter)
1594{
5633684d
MC		 1595 struct net_device *netdev = adapter->netdev;
1596
1597 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1598 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1599 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1600 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1601 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1602 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1603
1604 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1605 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1606 if(multi >= bcast)
1607 multi -= bcast;
5633684d
MC		 1608
1609 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1610 adapter->stats.mprch += (multi >> 32);
1611 adapter->stats.bprcl += bcast_l;
1612 adapter->stats.bprch += bcast_h;
1613 } else {
1614 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1615 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1616 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1617 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1618 }
1da177e4
LT		 1619 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1620 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1621 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1622 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1623 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1624 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1625 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1626 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1627 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1628 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1629 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1630 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1631 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1632 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1633 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1634 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1635 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1636 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1637 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1638 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1639 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1640 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1641 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1642 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1643 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1644 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1645 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1646 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1647 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1648 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1649 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1650 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1651 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1652 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1653 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1654 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1655 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1656 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1657 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1658 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1659 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1660 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1661 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1662 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1663 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1664 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1665 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1666 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1667 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1668 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1669 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1670 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1671 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1672 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1673 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1674 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1675
1676 /* Fill out the OS statistics structure */
1677
1678 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1679 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1680 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1681 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1682 adapter->net_stats.multicast = adapter->stats.mprcl;
1683 adapter->net_stats.collisions = 0;
1684
1685 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1686 * with a length in the type/len field */
1687 adapter->net_stats.rx_errors =
1688 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1689 adapter->stats.ruc +
1690 adapter->stats.roc /*+ adapter->stats.rlec */ +
1691 adapter->stats.icbc +
1692 adapter->stats.ecbc + adapter->stats.mpc;
1693
1da177e4
LT		 1694 /* see above
1695 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1696 */
1697
1698 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1699 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1700 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1701 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1702
1703 adapter->net_stats.tx_errors = 0;
1704 adapter->net_stats.rx_frame_errors = 0;
1705 adapter->net_stats.tx_aborted_errors = 0;
1706 adapter->net_stats.tx_carrier_errors = 0;
1707 adapter->net_stats.tx_fifo_errors = 0;
1708 adapter->net_stats.tx_heartbeat_errors = 0;
1709 adapter->net_stats.tx_window_errors = 0;
1710}
1711
1712#define IXGB_MAX_INTR 10
1713/**
1714 * ixgb_intr - Interrupt Handler
1715 * @irq: interrupt number
1716 * @data: pointer to a network interface device structure
1717 * @pt_regs: CPU registers structure
1718 **/
1719
1720static irqreturn_t
1721ixgb_intr(int irq, void *data, struct pt_regs *regs)
1722{
1723 struct net_device *netdev = data;
8908c6cd 1724 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1725 struct ixgb_hw *hw = &adapter->hw;
1726 uint32_t icr = IXGB_READ_REG(hw, ICR);
1727#ifndef CONFIG_IXGB_NAPI
1728 unsigned int i;
1729#endif
1730
1731 if(unlikely(!icr))
1732 return IRQ_NONE; /* Not our interrupt */
1733
1734 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1735 mod_timer(&adapter->watchdog_timer, jiffies);
1736 }
1737
1738#ifdef CONFIG_IXGB_NAPI
1739 if(netif_rx_schedule_prep(netdev)) {
1740
1741 /* Disable interrupts and register for poll. The flush
1742 of the posted write is intentionally left out.
1743 */
1744
1745 atomic_inc(&adapter->irq_sem);
1746 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1747 __netif_rx_schedule(netdev);
1748 }
1749#else
1750 /* yes, that is actually a & and it is meant to make sure that
1751 * every pass through this for loop checks both receive and
1752 * transmit queues for completed descriptors, intended to
1753 * avoid starvation issues and assist tx/rx fairness. */
1754 for(i = 0; i < IXGB_MAX_INTR; i++)
1755 if(!ixgb_clean_rx_irq(adapter) &
1756 !ixgb_clean_tx_irq(adapter))
1757 break;
1758#endif
1759 return IRQ_HANDLED;
1760}
1761
1762#ifdef CONFIG_IXGB_NAPI
1763/**
1764 * ixgb_clean - NAPI Rx polling callback
1765 * @adapter: board private structure
1766 **/
1767
1768static int
1769ixgb_clean(struct net_device *netdev, int *budget)
1770{
8908c6cd 1771 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1772 int work_to_do = min(*budget, netdev->quota);
1773 int tx_cleaned;
1774 int work_done = 0;
1775
1776 tx_cleaned = ixgb_clean_tx_irq(adapter);
1777 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1778
1779 *budget -= work_done;
1780 netdev->quota -= work_done;
1781
1782 /* if no Tx and not enough Rx work done, exit the polling mode */
1783 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1784 netif_rx_complete(netdev);
1785 ixgb_irq_enable(adapter);
1786 return 0;
1787 }
1788
1789 return 1;
1790}
1791#endif
1792
1793/**
1794 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1795 * @adapter: board private structure
1796 **/
1797
1798static boolean_t
1799ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1800{
1801 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1802 struct net_device *netdev = adapter->netdev;
1803 struct ixgb_tx_desc *tx_desc, *eop_desc;
1804 struct ixgb_buffer *buffer_info;
1805 unsigned int i, eop;
1806 boolean_t cleaned = FALSE;
1807
1808 i = tx_ring->next_to_clean;
1809 eop = tx_ring->buffer_info[i].next_to_watch;
1810 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1811
1812 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1813
1814 for(cleaned = FALSE; !cleaned; ) {
1815 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1816 buffer_info = &tx_ring->buffer_info[i];
1817
1818 if (tx_desc->popts
1819 & (IXGB_TX_DESC_POPTS_TXSM |
1820 IXGB_TX_DESC_POPTS_IXSM))
1821 adapter->hw_csum_tx_good++;
1822
1823 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1824
1825 *(uint32_t *)&(tx_desc->status) = 0;
1826
1827 cleaned = (i == eop);
1828 if(++i == tx_ring->count) i = 0;
1829 }
1830
1831 eop = tx_ring->buffer_info[i].next_to_watch;
1832 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1833 }
1834
1835 tx_ring->next_to_clean = i;
1836
1837 spin_lock(&adapter->tx_lock);
1838 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1839 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1840
1841 netif_wake_queue(netdev);
1842 }
1843 spin_unlock(&adapter->tx_lock);
1844
1845 if(adapter->detect_tx_hung) {
1846 /* detect a transmit hang in hardware, this serializes the
1847 * check with the clearing of time_stamp and movement of i */
1848 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1849 if (tx_ring->buffer_info[eop].dma &&
1850 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1851 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1852 IXGB_STATUS_TXOFF)) {
1853 /* detected Tx unit hang */
1854 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1855 " TDH <%x>\n"
1856 " TDT <%x>\n"
1857 " next_to_use <%x>\n"
1858 " next_to_clean <%x>\n"
1859 "buffer_info[next_to_clean]\n"
1860 " time_stamp <%lx>\n"
1861 " next_to_watch <%x>\n"
1862 " jiffies <%lx>\n"
1863 " next_to_watch.status <%x>\n",
1864 IXGB_READ_REG(&adapter->hw, TDH),
1865 IXGB_READ_REG(&adapter->hw, TDT),
1866 tx_ring->next_to_use,
1867 tx_ring->next_to_clean,
1868 tx_ring->buffer_info[eop].time_stamp,
1869 eop,
1870 jiffies,
1871 eop_desc->status);
1da177e4 1872 netif_stop_queue(netdev);
9b8118df 1873 }
1da177e4
LT		 1874 }
1875
1876 return cleaned;
1877}
1878
1879/**
1880 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1881 * @adapter: board private structure
1882 * @rx_desc: receive descriptor
1883 * @sk_buff: socket buffer with received data
1884 **/
1885
1886static inline void
1887ixgb_rx_checksum(struct ixgb_adapter *adapter,
1888 struct ixgb_rx_desc *rx_desc,
1889 struct sk_buff *skb)
1890{
1891 /* Ignore Checksum bit is set OR
1892 * TCP Checksum has not been calculated
1893 */
1894 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1895 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1896 skb->ip_summed = CHECKSUM_NONE;
1897 return;
1898 }
1899
1900 /* At this point we know the hardware did the TCP checksum */
1901 /* now look at the TCP checksum error bit */
1902 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1903 /* let the stack verify checksum errors */
1904 skb->ip_summed = CHECKSUM_NONE;
1905 adapter->hw_csum_rx_error++;
1906 } else {
1907 /* TCP checksum is good */
1908 skb->ip_summed = CHECKSUM_UNNECESSARY;
1909 adapter->hw_csum_rx_good++;
1910 }
1911}
1912
1913/**
1914 * ixgb_clean_rx_irq - Send received data up the network stack,
1915 * @adapter: board private structure
1916 **/
1917
1918static boolean_t
1919#ifdef CONFIG_IXGB_NAPI
1920ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1921#else
1922ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1923#endif
1924{
1925 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1926 struct net_device *netdev = adapter->netdev;
1927 struct pci_dev *pdev = adapter->pdev;
1928 struct ixgb_rx_desc *rx_desc, *next_rxd;
1929 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1930 uint32_t length;
1931 unsigned int i, j;
1932 boolean_t cleaned = FALSE;
1933
1934 i = rx_ring->next_to_clean;
1935 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1936 buffer_info = &rx_ring->buffer_info[i];
1937
1938 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1939 struct sk_buff *skb, *next_skb;
1940 u8 status;
1da177e4
LT		 1941
1942#ifdef CONFIG_IXGB_NAPI
1943 if(*work_done >= work_to_do)
1944 break;
1945
1946 (*work_done)++;
1947#endif
f404de1c 1948 status = rx_desc->status;
1da177e4 1949 skb = buffer_info->skb;
1dfdd7df 1950 buffer_info->skb = NULL;
f404de1c 1951
1da177e4
LT		 1952 prefetch(skb->data);
1953
1954 if(++i == rx_ring->count) i = 0;
1955 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1956 prefetch(next_rxd);
1957
1958 if((j = i + 1) == rx_ring->count) j = 0;
1959 next2_buffer = &rx_ring->buffer_info[j];
1960 prefetch(next2_buffer);
1961
1962 next_buffer = &rx_ring->buffer_info[i];
1963 next_skb = next_buffer->skb;
1964 prefetch(next_skb);
1965
1da177e4
LT		 1966 cleaned = TRUE;
1967
1968 pci_unmap_single(pdev,
1969 buffer_info->dma,
1970 buffer_info->length,
1971 PCI_DMA_FROMDEVICE);
1972
1973 length = le16_to_cpu(rx_desc->length);
1974
f404de1c 1975 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1976
1977 /* All receives must fit into a single buffer */
1978
1979 IXGB_DBG("Receive packet consumed multiple buffers "
1980 "length<%x>\n", length);
1981
1982 dev_kfree_skb_irq(skb);
f404de1c 1983 goto rxdesc_done;
1da177e4
LT		 1984 }
1985
1986 if (unlikely(rx_desc->errors
1987 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1988 | IXGB_RX_DESC_ERRORS_P |
1989 IXGB_RX_DESC_ERRORS_RXE))) {
1990
1991 dev_kfree_skb_irq(skb);
f404de1c 1992 goto rxdesc_done;
1da177e4
LT		 1993 }
1994
6b900bb4
AK		 1995 /* code added for copybreak, this should improve
1996 * performance for small packets with large amounts
1997 * of reassembly being done in the stack */
1998#define IXGB_CB_LENGTH 256
1999 if (length < IXGB_CB_LENGTH) {
2000 struct sk_buff *new_skb =
2001 dev_alloc_skb(length + NET_IP_ALIGN);
2002 if (new_skb) {
2003 skb_reserve(new_skb, NET_IP_ALIGN);
2004 new_skb->dev = netdev;
2005 memcpy(new_skb->data - NET_IP_ALIGN,
2006 skb->data - NET_IP_ALIGN,
2007 length + NET_IP_ALIGN);
2008 /* save the skb in buffer_info as good */
2009 buffer_info->skb = skb;
2010 skb = new_skb;
2011 }
2012 }
2013 /* end copybreak code */
2014
1da177e4
LT		 2015 /* Good Receive */
2016 skb_put(skb, length);
2017
2018 /* Receive Checksum Offload */
2019 ixgb_rx_checksum(adapter, rx_desc, skb);
2020
2021 skb->protocol = eth_type_trans(skb, netdev);
2022#ifdef CONFIG_IXGB_NAPI
f404de1c 2023 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2024 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2025 le16_to_cpu(rx_desc->special) &
2026 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2027 } else {
2028 netif_receive_skb(skb);
2029 }
2030#else /* CONFIG_IXGB_NAPI */
f404de1c 2031 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2032 vlan_hwaccel_rx(skb, adapter->vlgrp,
2033 le16_to_cpu(rx_desc->special) &
2034 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2035 } else {
2036 netif_rx(skb);
2037 }
2038#endif /* CONFIG_IXGB_NAPI */
2039 netdev->last_rx = jiffies;
2040
f404de1c
MC		 2041rxdesc_done:
2042 /* clean up descriptor, might be written over by hw */
1da177e4 2043 rx_desc->status = 0;
1da177e4 2044
f404de1c 2045 /* use prefetched values */
1da177e4
LT		 2046 rx_desc = next_rxd;
2047 buffer_info = next_buffer;
2048 }
2049
2050 rx_ring->next_to_clean = i;
2051
2052 ixgb_alloc_rx_buffers(adapter);
2053
2054 return cleaned;
2055}
2056
2057/**
2058 * ixgb_alloc_rx_buffers - Replace used receive buffers
2059 * @adapter: address of board private structure
2060 **/
2061
2062static void
2063ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2064{
2065 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2066 struct net_device *netdev = adapter->netdev;
2067 struct pci_dev *pdev = adapter->pdev;
2068 struct ixgb_rx_desc *rx_desc;
2069 struct ixgb_buffer *buffer_info;
2070 struct sk_buff *skb;
2071 unsigned int i;
2072 int num_group_tail_writes;
2073 long cleancount;
2074
2075 i = rx_ring->next_to_use;
2076 buffer_info = &rx_ring->buffer_info[i];
2077 cleancount = IXGB_DESC_UNUSED(rx_ring);
2078
2079 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2080
41639fed
MC		 2081 /* leave three descriptors unused */
2082 while(--cleancount > 2) {
1dfdd7df
AK		 2083 /* recycle! its good for you */
2084 if (!(skb = buffer_info->skb))
2085 skb = dev_alloc_skb(adapter->rx_buffer_len
2086 + NET_IP_ALIGN);
2087 else {
2088 skb_trim(skb, 0);
2089 goto map_skb;
2090 }
1da177e4 2091
1dfdd7df 2092 if (unlikely(!skb)) {
1da177e4 2093 /* Better luck next round */
1dfdd7df 2094 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2095 break;
2096 }
2097
2098 /* Make buffer alignment 2 beyond a 16 byte boundary
2099 * this will result in a 16 byte aligned IP header after
2100 * the 14 byte MAC header is removed
2101 */
2102 skb_reserve(skb, NET_IP_ALIGN);
2103
2104 skb->dev = netdev;
2105
2106 buffer_info->skb = skb;
2107 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2108map_skb:
2109 buffer_info->dma = pci_map_single(pdev,
2110 skb->data,
2111 adapter->rx_buffer_len,
2112 PCI_DMA_FROMDEVICE);
1da177e4 2113
1dfdd7df 2114 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2115 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2116 /* guarantee DD bit not set now before h/w gets descriptor
2117 * this is the rest of the workaround for h/w double
2118 * writeback. */
2119 rx_desc->status = 0;
1da177e4 2120
1da177e4
LT		 2121
2122 if(++i == rx_ring->count) i = 0;
2123 buffer_info = &rx_ring->buffer_info[i];
2124 }
2125
1dfdd7df
AK		 2126 if (likely(rx_ring->next_to_use != i)) {
2127 rx_ring->next_to_use = i;
2128 if (unlikely(i-- == 0))
2129 i = (rx_ring->count - 1);
2130
2131 /* Force memory writes to complete before letting h/w
2132 * know there are new descriptors to fetch. (Only
2133 * applicable for weak-ordered memory model archs, such
2134 * as IA-64). */
2135 wmb();
2136 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2137 }
1da177e4
LT		 2138}
2139
2140/**
2141 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2142 *
2143 * @param netdev network interface device structure
2144 * @param grp indicates to enable or disable tagging/stripping
2145 **/
2146static void
2147ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2148{
8908c6cd 2149 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2150 uint32_t ctrl, rctl;
2151
2152 ixgb_irq_disable(adapter);
2153 adapter->vlgrp = grp;
2154
2155 if(grp) {
2156 /* enable VLAN tag insert/strip */
2157 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2158 ctrl |= IXGB_CTRL0_VME;
2159 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2160
2161 /* enable VLAN receive filtering */
2162
2163 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2164 rctl |= IXGB_RCTL_VFE;
2165 rctl &= ~IXGB_RCTL_CFIEN;
2166 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2167 } else {
2168 /* disable VLAN tag insert/strip */
2169
2170 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2171 ctrl &= ~IXGB_CTRL0_VME;
2172 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2173
2174 /* disable VLAN filtering */
2175
2176 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2177 rctl &= ~IXGB_RCTL_VFE;
2178 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2179 }
2180
2181 ixgb_irq_enable(adapter);
2182}
2183
2184static void
2185ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2186{
8908c6cd 2187 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2188 uint32_t vfta, index;
2189
2190 /* add VID to filter table */
2191
2192 index = (vid >> 5) & 0x7F;
2193 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2194 vfta |= (1 << (vid & 0x1F));
2195 ixgb_write_vfta(&adapter->hw, index, vfta);
2196}
2197
2198static void
2199ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2200{
8908c6cd 2201 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2202 uint32_t vfta, index;
2203
2204 ixgb_irq_disable(adapter);
2205
2206 if(adapter->vlgrp)
2207 adapter->vlgrp->vlan_devices[vid] = NULL;
2208
2209 ixgb_irq_enable(adapter);
2210
2211 /* remove VID from filter table*/
2212
2213 index = (vid >> 5) & 0x7F;
2214 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2215 vfta &= ~(1 << (vid & 0x1F));
2216 ixgb_write_vfta(&adapter->hw, index, vfta);
2217}
2218
2219static void
2220ixgb_restore_vlan(struct ixgb_adapter *adapter)
2221{
2222 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2223
2224 if(adapter->vlgrp) {
2225 uint16_t vid;
2226 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2227 if(!adapter->vlgrp->vlan_devices[vid])
2228 continue;
2229 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2230 }
2231 }
2232}
2233
1da177e4
LT		 2234#ifdef CONFIG_NET_POLL_CONTROLLER
2235/*
2236 * Polling 'interrupt' - used by things like netconsole to send skbs
2237 * without having to re-enable interrupts. It's not called while
2238 * the interrupt routine is executing.
2239 */
2240
2241static void ixgb_netpoll(struct net_device *dev)
2242{
2243 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2244
1da177e4
LT		 2245 disable_irq(adapter->pdev->irq);
2246 ixgb_intr(adapter->pdev->irq, dev, NULL);
2247 enable_irq(adapter->pdev->irq);
2248}
2249#endif
2250
2251/* ixgb_main.c */