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Merge remote-tracking branch 'asoc/fix/wm0010' into asoc-linus
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ieee802154 / at86rf230.c
CommitLineData
7b8e19b6 1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/mutex.h>
29#include <linux/workqueue.h>
30#include <linux/spinlock.h>
31#include <linux/spi/spi.h>
32#include <linux/spi/at86rf230.h>
33#include <linux/skbuff.h>
34
35#include <net/mac802154.h>
36#include <net/wpan-phy.h>
37
38struct at86rf230_local {
39 struct spi_device *spi;
40 int rstn, slp_tr, dig2;
41
42 u8 part;
43 u8 vers;
44
45 u8 buf[2];
46 struct mutex bmux;
47
48 struct work_struct irqwork;
49 struct completion tx_complete;
50
51 struct ieee802154_dev *dev;
52
53 spinlock_t lock;
057dad6f 54 bool irq_busy;
7b8e19b6 55 bool is_tx;
56};
57
58#define RG_TRX_STATUS (0x01)
59#define SR_TRX_STATUS 0x01, 0x1f, 0
60#define SR_RESERVED_01_3 0x01, 0x20, 5
61#define SR_CCA_STATUS 0x01, 0x40, 6
62#define SR_CCA_DONE 0x01, 0x80, 7
63#define RG_TRX_STATE (0x02)
64#define SR_TRX_CMD 0x02, 0x1f, 0
65#define SR_TRAC_STATUS 0x02, 0xe0, 5
66#define RG_TRX_CTRL_0 (0x03)
67#define SR_CLKM_CTRL 0x03, 0x07, 0
68#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
69#define SR_PAD_IO_CLKM 0x03, 0x30, 4
70#define SR_PAD_IO 0x03, 0xc0, 6
71#define RG_TRX_CTRL_1 (0x04)
72#define SR_IRQ_POLARITY 0x04, 0x01, 0
73#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
74#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
75#define SR_RX_BL_CTRL 0x04, 0x10, 4
76#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
77#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
78#define SR_PA_EXT_EN 0x04, 0x80, 7
79#define RG_PHY_TX_PWR (0x05)
80#define SR_TX_PWR 0x05, 0x0f, 0
81#define SR_PA_LT 0x05, 0x30, 4
82#define SR_PA_BUF_LT 0x05, 0xc0, 6
83#define RG_PHY_RSSI (0x06)
84#define SR_RSSI 0x06, 0x1f, 0
85#define SR_RND_VALUE 0x06, 0x60, 5
86#define SR_RX_CRC_VALID 0x06, 0x80, 7
87#define RG_PHY_ED_LEVEL (0x07)
88#define SR_ED_LEVEL 0x07, 0xff, 0
89#define RG_PHY_CC_CCA (0x08)
90#define SR_CHANNEL 0x08, 0x1f, 0
91#define SR_CCA_MODE 0x08, 0x60, 5
92#define SR_CCA_REQUEST 0x08, 0x80, 7
93#define RG_CCA_THRES (0x09)
94#define SR_CCA_ED_THRES 0x09, 0x0f, 0
95#define SR_RESERVED_09_1 0x09, 0xf0, 4
96#define RG_RX_CTRL (0x0a)
97#define SR_PDT_THRES 0x0a, 0x0f, 0
98#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
99#define RG_SFD_VALUE (0x0b)
100#define SR_SFD_VALUE 0x0b, 0xff, 0
101#define RG_TRX_CTRL_2 (0x0c)
102#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
103#define SR_RESERVED_0c_2 0x0c, 0x7c, 2
104#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
105#define RG_ANT_DIV (0x0d)
106#define SR_ANT_CTRL 0x0d, 0x03, 0
107#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
108#define SR_ANT_DIV_EN 0x0d, 0x08, 3
109#define SR_RESERVED_0d_2 0x0d, 0x70, 4
110#define SR_ANT_SEL 0x0d, 0x80, 7
111#define RG_IRQ_MASK (0x0e)
112#define SR_IRQ_MASK 0x0e, 0xff, 0
113#define RG_IRQ_STATUS (0x0f)
114#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
115#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
116#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
117#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
118#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
119#define SR_IRQ_5_AMI 0x0f, 0x20, 5
120#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
121#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
122#define RG_VREG_CTRL (0x10)
123#define SR_RESERVED_10_6 0x10, 0x03, 0
124#define SR_DVDD_OK 0x10, 0x04, 2
125#define SR_DVREG_EXT 0x10, 0x08, 3
126#define SR_RESERVED_10_3 0x10, 0x30, 4
127#define SR_AVDD_OK 0x10, 0x40, 6
128#define SR_AVREG_EXT 0x10, 0x80, 7
129#define RG_BATMON (0x11)
130#define SR_BATMON_VTH 0x11, 0x0f, 0
131#define SR_BATMON_HR 0x11, 0x10, 4
132#define SR_BATMON_OK 0x11, 0x20, 5
133#define SR_RESERVED_11_1 0x11, 0xc0, 6
134#define RG_XOSC_CTRL (0x12)
135#define SR_XTAL_TRIM 0x12, 0x0f, 0
136#define SR_XTAL_MODE 0x12, 0xf0, 4
137#define RG_RX_SYN (0x15)
138#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
139#define SR_RESERVED_15_2 0x15, 0x70, 4
140#define SR_RX_PDT_DIS 0x15, 0x80, 7
141#define RG_XAH_CTRL_1 (0x17)
142#define SR_RESERVED_17_8 0x17, 0x01, 0
143#define SR_AACK_PROM_MODE 0x17, 0x02, 1
144#define SR_AACK_ACK_TIME 0x17, 0x04, 2
145#define SR_RESERVED_17_5 0x17, 0x08, 3
146#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
147#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
148#define SR_RESERVED_17_2 0x17, 0x40, 6
149#define SR_RESERVED_17_1 0x17, 0x80, 7
150#define RG_FTN_CTRL (0x18)
151#define SR_RESERVED_18_2 0x18, 0x7f, 0
152#define SR_FTN_START 0x18, 0x80, 7
153#define RG_PLL_CF (0x1a)
154#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
155#define SR_PLL_CF_START 0x1a, 0x80, 7
156#define RG_PLL_DCU (0x1b)
157#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
158#define SR_RESERVED_1b_2 0x1b, 0x40, 6
159#define SR_PLL_DCU_START 0x1b, 0x80, 7
160#define RG_PART_NUM (0x1c)
161#define SR_PART_NUM 0x1c, 0xff, 0
162#define RG_VERSION_NUM (0x1d)
163#define SR_VERSION_NUM 0x1d, 0xff, 0
164#define RG_MAN_ID_0 (0x1e)
165#define SR_MAN_ID_0 0x1e, 0xff, 0
166#define RG_MAN_ID_1 (0x1f)
167#define SR_MAN_ID_1 0x1f, 0xff, 0
168#define RG_SHORT_ADDR_0 (0x20)
169#define SR_SHORT_ADDR_0 0x20, 0xff, 0
170#define RG_SHORT_ADDR_1 (0x21)
171#define SR_SHORT_ADDR_1 0x21, 0xff, 0
172#define RG_PAN_ID_0 (0x22)
173#define SR_PAN_ID_0 0x22, 0xff, 0
174#define RG_PAN_ID_1 (0x23)
175#define SR_PAN_ID_1 0x23, 0xff, 0
176#define RG_IEEE_ADDR_0 (0x24)
177#define SR_IEEE_ADDR_0 0x24, 0xff, 0
178#define RG_IEEE_ADDR_1 (0x25)
179#define SR_IEEE_ADDR_1 0x25, 0xff, 0
180#define RG_IEEE_ADDR_2 (0x26)
181#define SR_IEEE_ADDR_2 0x26, 0xff, 0
182#define RG_IEEE_ADDR_3 (0x27)
183#define SR_IEEE_ADDR_3 0x27, 0xff, 0
184#define RG_IEEE_ADDR_4 (0x28)
185#define SR_IEEE_ADDR_4 0x28, 0xff, 0
186#define RG_IEEE_ADDR_5 (0x29)
187#define SR_IEEE_ADDR_5 0x29, 0xff, 0
188#define RG_IEEE_ADDR_6 (0x2a)
189#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
190#define RG_IEEE_ADDR_7 (0x2b)
191#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
192#define RG_XAH_CTRL_0 (0x2c)
193#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
194#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
195#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
196#define RG_CSMA_SEED_0 (0x2d)
197#define SR_CSMA_SEED_0 0x2d, 0xff, 0
198#define RG_CSMA_SEED_1 (0x2e)
199#define SR_CSMA_SEED_1 0x2e, 0x07, 0
200#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
201#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
202#define SR_AACK_SET_PD 0x2e, 0x20, 5
203#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
204#define RG_CSMA_BE (0x2f)
205#define SR_MIN_BE 0x2f, 0x0f, 0
206#define SR_MAX_BE 0x2f, 0xf0, 4
207
208#define CMD_REG 0x80
209#define CMD_REG_MASK 0x3f
210#define CMD_WRITE 0x40
211#define CMD_FB 0x20
212
213#define IRQ_BAT_LOW (1 << 7)
214#define IRQ_TRX_UR (1 << 6)
215#define IRQ_AMI (1 << 5)
216#define IRQ_CCA_ED (1 << 4)
217#define IRQ_TRX_END (1 << 3)
218#define IRQ_RX_START (1 << 2)
219#define IRQ_PLL_UNL (1 << 1)
220#define IRQ_PLL_LOCK (1 << 0)
221
43b5abe0
SH		 222#define IRQ_ACTIVE_HIGH 0
223#define IRQ_ACTIVE_LOW 1
224
7b8e19b6 225#define STATE_P_ON 0x00 /* BUSY */
226#define STATE_BUSY_RX 0x01
227#define STATE_BUSY_TX 0x02
228#define STATE_FORCE_TRX_OFF 0x03
229#define STATE_FORCE_TX_ON 0x04 /* IDLE */
230/* 0x05 */ /* INVALID_PARAMETER */
231#define STATE_RX_ON 0x06
232/* 0x07 */ /* SUCCESS */
233#define STATE_TRX_OFF 0x08
234#define STATE_TX_ON 0x09
235/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
236#define STATE_SLEEP 0x0F
237#define STATE_BUSY_RX_AACK 0x11
238#define STATE_BUSY_TX_ARET 0x12
028889b0 239#define STATE_RX_AACK_ON 0x16
240#define STATE_TX_ARET_ON 0x19
7b8e19b6 241#define STATE_RX_ON_NOCLK 0x1C
242#define STATE_RX_AACK_ON_NOCLK 0x1D
243#define STATE_BUSY_RX_AACK_NOCLK 0x1E
244#define STATE_TRANSITION_IN_PROGRESS 0x1F
245
246static int
247__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
248{
249 u8 *buf = lp->buf;
250 int status;
251 struct spi_message msg;
252 struct spi_transfer xfer = {
253 .len = 2,
254 .tx_buf = buf,
255 };
256
257 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
258 buf[1] = data;
259 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
260 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
261 spi_message_init(&msg);
262 spi_message_add_tail(&xfer, &msg);
263
264 status = spi_sync(lp->spi, &msg);
265 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
266 if (msg.status)
267 status = msg.status;
268
269 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
270 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
271 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
272
273 return status;
274}
275
276static int
277__at86rf230_read_subreg(struct at86rf230_local *lp,
278 u8 addr, u8 mask, int shift, u8 *data)
279{
280 u8 *buf = lp->buf;
281 int status;
282 struct spi_message msg;
283 struct spi_transfer xfer = {
284 .len = 2,
285 .tx_buf = buf,
286 .rx_buf = buf,
287 };
288
289 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
290 buf[1] = 0xff;
291 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
292 spi_message_init(&msg);
293 spi_message_add_tail(&xfer, &msg);
294
295 status = spi_sync(lp->spi, &msg);
296 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
297 if (msg.status)
298 status = msg.status;
299
300 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
301 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
302 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
303
304 if (status == 0)
305 *data = buf[1];
306
307 return status;
308}
309
310static int
311at86rf230_read_subreg(struct at86rf230_local *lp,
312 u8 addr, u8 mask, int shift, u8 *data)
313{
314 int status;
315
316 mutex_lock(&lp->bmux);
317 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
318 mutex_unlock(&lp->bmux);
319
320 return status;
321}
322
323static int
324at86rf230_write_subreg(struct at86rf230_local *lp,
325 u8 addr, u8 mask, int shift, u8 data)
326{
327 int status;
328 u8 val;
329
330 mutex_lock(&lp->bmux);
331 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
332 if (status)
333 goto out;
334
335 val &= ~mask;
336 val |= (data << shift) & mask;
337
338 status = __at86rf230_write(lp, addr, val);
339out:
340 mutex_unlock(&lp->bmux);
341
342 return status;
343}
344
345static int
346at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
347{
348 u8 *buf = lp->buf;
349 int status;
350 struct spi_message msg;
351 struct spi_transfer xfer_head = {
352 .len = 2,
353 .tx_buf = buf,
354
355 };
356 struct spi_transfer xfer_buf = {
357 .len = len,
358 .tx_buf = data,
359 };
360
361 mutex_lock(&lp->bmux);
362 buf[0] = CMD_WRITE | CMD_FB;
363 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
364
365 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
366 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
367
368 spi_message_init(&msg);
369 spi_message_add_tail(&xfer_head, &msg);
370 spi_message_add_tail(&xfer_buf, &msg);
371
372 status = spi_sync(lp->spi, &msg);
373 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
374 if (msg.status)
375 status = msg.status;
376
377 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
378 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
379 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
380
381 mutex_unlock(&lp->bmux);
382 return status;
383}
384
385static int
386at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
387{
388 u8 *buf = lp->buf;
389 int status;
390 struct spi_message msg;
391 struct spi_transfer xfer_head = {
392 .len = 2,
393 .tx_buf = buf,
394 .rx_buf = buf,
395 };
396 struct spi_transfer xfer_head1 = {
397 .len = 2,
398 .tx_buf = buf,
399 .rx_buf = buf,
400 };
401 struct spi_transfer xfer_buf = {
402 .len = 0,
403 .rx_buf = data,
404 };
405
406 mutex_lock(&lp->bmux);
407
408 buf[0] = CMD_FB;
409 buf[1] = 0x00;
410
411 spi_message_init(&msg);
412 spi_message_add_tail(&xfer_head, &msg);
413
414 status = spi_sync(lp->spi, &msg);
415 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
416
417 xfer_buf.len = *(buf + 1) + 1;
418 *len = buf[1];
419
420 buf[0] = CMD_FB;
421 buf[1] = 0x00;
422
423 spi_message_init(&msg);
424 spi_message_add_tail(&xfer_head1, &msg);
425 spi_message_add_tail(&xfer_buf, &msg);
426
427 status = spi_sync(lp->spi, &msg);
428
429 if (msg.status)
430 status = msg.status;
431
432 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
433 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
434 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
435
436 if (status) {
437 if (lqi && (*len > lp->buf[1]))
438 *lqi = data[lp->buf[1]];
439 }
440 mutex_unlock(&lp->bmux);
441
442 return status;
443}
444
445static int
446at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
447{
448 might_sleep();
449 BUG_ON(!level);
450 *level = 0xbe;
451 return 0;
452}
453
454static int
455at86rf230_state(struct ieee802154_dev *dev, int state)
456{
457 struct at86rf230_local *lp = dev->priv;
458 int rc;
459 u8 val;
460 u8 desired_status;
461
462 might_sleep();
463
464 if (state == STATE_FORCE_TX_ON)
465 desired_status = STATE_TX_ON;
466 else if (state == STATE_FORCE_TRX_OFF)
467 desired_status = STATE_TRX_OFF;
468 else
469 desired_status = state;
470
471 do {
472 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
473 if (rc)
474 goto err;
475 } while (val == STATE_TRANSITION_IN_PROGRESS);
476
477 if (val == desired_status)
478 return 0;
479
480 /* state is equal to phy states */
481 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
482 if (rc)
483 goto err;
484
485 do {
486 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
487 if (rc)
488 goto err;
489 } while (val == STATE_TRANSITION_IN_PROGRESS);
490
491
492 if (val == desired_status)
493 return 0;
494
495 pr_err("unexpected state change: %d, asked for %d\n", val, state);
496 return -EBUSY;
497
498err:
499 pr_err("error: %d\n", rc);
500 return rc;
501}
502
503static int
504at86rf230_start(struct ieee802154_dev *dev)
505{
506 struct at86rf230_local *lp = dev->priv;
507 u8 rc;
508
509 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
510 if (rc)
511 return rc;
512
513 return at86rf230_state(dev, STATE_RX_ON);
514}
515
516static void
517at86rf230_stop(struct ieee802154_dev *dev)
518{
519 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
520}
521
522static int
523at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
524{
525 struct at86rf230_local *lp = dev->priv;
526 int rc;
527
528 might_sleep();
529
530 if (page != 0 || channel < 11 || channel > 26) {
531 WARN_ON(1);
532 return -EINVAL;
533 }
534
535 rc = at86rf230_write_subreg(lp, SR_CHANNEL, channel);
536 msleep(1); /* Wait for PLL */
537 dev->phy->current_channel = channel;
538
539 return 0;
540}
541
542static int
543at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
544{
545 struct at86rf230_local *lp = dev->priv;
546 int rc;
547 unsigned long flags;
548
5b00f2ee 549 spin_lock(&lp->lock);
057dad6f 550 if (lp->irq_busy) {
5b00f2ee 551 spin_unlock(&lp->lock);
552 return -EBUSY;
553 }
554 spin_unlock(&lp->lock);
555
7b8e19b6 556 might_sleep();
557
558 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
559 if (rc)
560 goto err;
561
562 spin_lock_irqsave(&lp->lock, flags);
563 lp->is_tx = 1;
564 INIT_COMPLETION(lp->tx_complete);
565 spin_unlock_irqrestore(&lp->lock, flags);
566
567 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
568 if (rc)
569 goto err_rx;
570
571 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
572 if (rc)
573 goto err_rx;
574
575 rc = wait_for_completion_interruptible(&lp->tx_complete);
576 if (rc < 0)
577 goto err_rx;
578
579 rc = at86rf230_start(dev);
580
581 return rc;
582
583err_rx:
584 at86rf230_start(dev);
585err:
586 pr_err("error: %d\n", rc);
587
588 spin_lock_irqsave(&lp->lock, flags);
589 lp->is_tx = 0;
590 spin_unlock_irqrestore(&lp->lock, flags);
591
592 return rc;
593}
594
595static int at86rf230_rx(struct at86rf230_local *lp)
596{
597 u8 len = 128, lqi = 0;
7b8e19b6 598 struct sk_buff *skb;
599
600 skb = alloc_skb(len, GFP_KERNEL);
601
602 if (!skb)
603 return -ENOMEM;
604
5b00f2ee 605 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
7b8e19b6 606 goto err;
7b8e19b6 607
608 if (len < 2)
609 goto err;
610
611 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
612
613 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
614
23c34215 615 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
7b8e19b6 616
617 return 0;
618err:
619 pr_debug("received frame is too small\n");
620
621 kfree_skb(skb);
622 return -EINVAL;
623}
624
1486774d 625static int
626at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
627 struct ieee802154_hw_addr_filt *filt,
628 unsigned long changed)
629{
630 struct at86rf230_local *lp = dev->priv;
631
632 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
633 dev_vdbg(&lp->spi->dev,
634 "at86rf230_set_hw_addr_filt called for saddr\n");
635 __at86rf230_write(lp, RG_SHORT_ADDR_0, filt->short_addr);
636 __at86rf230_write(lp, RG_SHORT_ADDR_1, filt->short_addr >> 8);
637 }
638
639 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
640 dev_vdbg(&lp->spi->dev,
641 "at86rf230_set_hw_addr_filt called for pan id\n");
642 __at86rf230_write(lp, RG_PAN_ID_0, filt->pan_id);
643 __at86rf230_write(lp, RG_PAN_ID_1, filt->pan_id >> 8);
644 }
645
646 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
647 dev_vdbg(&lp->spi->dev,
648 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
649 at86rf230_write_subreg(lp, SR_IEEE_ADDR_0, filt->ieee_addr[7]);
650 at86rf230_write_subreg(lp, SR_IEEE_ADDR_1, filt->ieee_addr[6]);
651 at86rf230_write_subreg(lp, SR_IEEE_ADDR_2, filt->ieee_addr[5]);
652 at86rf230_write_subreg(lp, SR_IEEE_ADDR_3, filt->ieee_addr[4]);
653 at86rf230_write_subreg(lp, SR_IEEE_ADDR_4, filt->ieee_addr[3]);
654 at86rf230_write_subreg(lp, SR_IEEE_ADDR_5, filt->ieee_addr[2]);
655 at86rf230_write_subreg(lp, SR_IEEE_ADDR_6, filt->ieee_addr[1]);
656 at86rf230_write_subreg(lp, SR_IEEE_ADDR_7, filt->ieee_addr[0]);
657 }
658
659 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
660 dev_vdbg(&lp->spi->dev,
661 "at86rf230_set_hw_addr_filt called for panc change\n");
662 if (filt->pan_coord)
663 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
664 else
665 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
666 }
667
668 return 0;
669}
670
7b8e19b6 671static struct ieee802154_ops at86rf230_ops = {
672 .owner = THIS_MODULE,
673 .xmit = at86rf230_xmit,
674 .ed = at86rf230_ed,
675 .set_channel = at86rf230_channel,
676 .start = at86rf230_start,
677 .stop = at86rf230_stop,
1486774d 678 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
7b8e19b6 679};
680
681static void at86rf230_irqwork(struct work_struct *work)
682{
683 struct at86rf230_local *lp =
684 container_of(work, struct at86rf230_local, irqwork);
685 u8 status = 0, val;
686 int rc;
687 unsigned long flags;
688
7b8e19b6 689 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
690 status |= val;
691
692 status &= ~IRQ_PLL_LOCK; /* ignore */
693 status &= ~IRQ_RX_START; /* ignore */
694 status &= ~IRQ_AMI; /* ignore */
695 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
696
697 if (status & IRQ_TRX_END) {
5b00f2ee 698 spin_lock_irqsave(&lp->lock, flags);
7b8e19b6 699 status &= ~IRQ_TRX_END;
700 if (lp->is_tx) {
701 lp->is_tx = 0;
5b00f2ee 702 spin_unlock_irqrestore(&lp->lock, flags);
7b8e19b6 703 complete(&lp->tx_complete);
704 } else {
5b00f2ee 705 spin_unlock_irqrestore(&lp->lock, flags);
7b8e19b6 706 at86rf230_rx(lp);
707 }
708 }
709
5b00f2ee 710 spin_lock_irqsave(&lp->lock, flags);
057dad6f 711 lp->irq_busy = 0;
7b8e19b6 712 spin_unlock_irqrestore(&lp->lock, flags);
057dad6f
SH		 713}
714
715static void at86rf230_irqwork_level(struct work_struct *work)
716{
717 struct at86rf230_local *lp =
718 container_of(work, struct at86rf230_local, irqwork);
719
720 at86rf230_irqwork(work);
5b00f2ee 721
722 enable_irq(lp->spi->irq);
7b8e19b6 723}
724
725static irqreturn_t at86rf230_isr(int irq, void *data)
726{
727 struct at86rf230_local *lp = data;
728
729 spin_lock(&lp->lock);
057dad6f 730 lp->irq_busy = 1;
7b8e19b6 731 spin_unlock(&lp->lock);
732
733 schedule_work(&lp->irqwork);
734
735 return IRQ_HANDLED;
736}
737
057dad6f
SH		 738static irqreturn_t at86rf230_isr_level(int irq, void *data)
739{
740 disable_irq_nosync(irq);
741
742 return at86rf230_isr(irq, data);
743}
744
43b5abe0
SH		 745static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
746{
747 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
748}
7b8e19b6 749
750static int at86rf230_hw_init(struct at86rf230_local *lp)
751{
43b5abe0
SH		 752 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
753 int rc, irq_pol;
7b8e19b6 754 u8 status;
7b8e19b6 755
756 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
757 if (rc)
758 return rc;
759
760 dev_info(&lp->spi->dev, "Status: %02x\n", status);
761 if (status == STATE_P_ON) {
762 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TRX_OFF);
763 if (rc)
764 return rc;
765 msleep(1);
766 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
767 if (rc)
768 return rc;
769 dev_info(&lp->spi->dev, "Status: %02x\n", status);
770 }
771
43b5abe0
SH		 772 /* configure irq polarity, defaults to high active */
773 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
774 irq_pol = IRQ_ACTIVE_LOW;
775 else
776 irq_pol = IRQ_ACTIVE_HIGH;
777
778 rc = at86rf230_irq_polarity(lp, irq_pol);
779 if (rc)
780 return rc;
781
057dad6f 782 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
7b8e19b6 783 if (rc)
784 return rc;
785
786 /* CLKM changes are applied immediately */
787 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
788 if (rc)
789 return rc;
790
791 /* Turn CLKM Off */
792 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
793 if (rc)
794 return rc;
795 /* Wait the next SLEEP cycle */
796 msleep(100);
797
798 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ON);
799 if (rc)
800 return rc;
801 msleep(1);
802
803 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
804 if (rc)
805 return rc;
806 dev_info(&lp->spi->dev, "Status: %02x\n", status);
807
808 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
809 if (rc)
810 return rc;
811 if (!status) {
812 dev_err(&lp->spi->dev, "DVDD error\n");
813 return -EINVAL;
814 }
815
816 rc = at86rf230_read_subreg(lp, SR_AVDD_OK, &status);
817 if (rc)
818 return rc;
819 if (!status) {
820 dev_err(&lp->spi->dev, "AVDD error\n");
821 return -EINVAL;
822 }
823
824 return 0;
825}
826
43b5abe0 827static void at86rf230_fill_data(struct spi_device *spi)
7b8e19b6 828{
829 struct at86rf230_local *lp = spi_get_drvdata(spi);
830 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
831
7b8e19b6 832 lp->rstn = pdata->rstn;
833 lp->slp_tr = pdata->slp_tr;
834 lp->dig2 = pdata->dig2;
7b8e19b6 835}
836
bb1f4606 837static int at86rf230_probe(struct spi_device *spi)
7b8e19b6 838{
43b5abe0 839 struct at86rf230_platform_data *pdata;
7b8e19b6 840 struct ieee802154_dev *dev;
841 struct at86rf230_local *lp;
057dad6f
SH		 842 u8 man_id_0, man_id_1, status;
843 irq_handler_t irq_handler;
844 work_func_t irq_worker;
43b5abe0 845 int rc, supported = 0;
7b8e19b6 846 const char *chip;
7b8e19b6 847
848 if (!spi->irq) {
849 dev_err(&spi->dev, "no IRQ specified\n");
850 return -EINVAL;
851 }
852
43b5abe0
SH		 853 pdata = spi->dev.platform_data;
854 if (!pdata) {
855 dev_err(&spi->dev, "no platform_data\n");
856 return -EINVAL;
857 }
858
7b8e19b6 859 dev = ieee802154_alloc_device(sizeof(*lp), &at86rf230_ops);
860 if (!dev)
861 return -ENOMEM;
862
863 lp = dev->priv;
864 lp->dev = dev;
865
866 lp->spi = spi;
867
7b8e19b6 868 dev->parent = &spi->dev;
869 dev->extra_tx_headroom = 0;
870 /* We do support only 2.4 Ghz */
871 dev->phy->channels_supported[0] = 0x7FFF800;
872 dev->flags = IEEE802154_HW_OMIT_CKSUM;
873
057dad6f
SH		 874 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
875 irq_worker = at86rf230_irqwork;
876 irq_handler = at86rf230_isr;
877 } else {
878 irq_worker = at86rf230_irqwork_level;
879 irq_handler = at86rf230_isr_level;
880 }
881
7b8e19b6 882 mutex_init(&lp->bmux);
057dad6f 883 INIT_WORK(&lp->irqwork, irq_worker);
7b8e19b6 884 spin_lock_init(&lp->lock);
885 init_completion(&lp->tx_complete);
886
887 spi_set_drvdata(spi, lp);
888
43b5abe0 889 at86rf230_fill_data(spi);
7b8e19b6 890
891 rc = gpio_request(lp->rstn, "rstn");
892 if (rc)
893 goto err_rstn;
894
895 if (gpio_is_valid(lp->slp_tr)) {
896 rc = gpio_request(lp->slp_tr, "slp_tr");
897 if (rc)
898 goto err_slp_tr;
899 }
900
901 rc = gpio_direction_output(lp->rstn, 1);
902 if (rc)
903 goto err_gpio_dir;
904
905 if (gpio_is_valid(lp->slp_tr)) {
906 rc = gpio_direction_output(lp->slp_tr, 0);
907 if (rc)
908 goto err_gpio_dir;
909 }
910
911 /* Reset */
912 msleep(1);
913 gpio_set_value(lp->rstn, 0);
914 msleep(1);
915 gpio_set_value(lp->rstn, 1);
916 msleep(1);
917
918 rc = at86rf230_read_subreg(lp, SR_MAN_ID_0, &man_id_0);
919 if (rc)
920 goto err_gpio_dir;
921 rc = at86rf230_read_subreg(lp, SR_MAN_ID_1, &man_id_1);
922 if (rc)
923 goto err_gpio_dir;
924
925 if (man_id_1 != 0x00 || man_id_0 != 0x1f) {
926 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
927 man_id_1, man_id_0);
928 rc = -EINVAL;
929 goto err_gpio_dir;
930 }
931
932 rc = at86rf230_read_subreg(lp, SR_PART_NUM, &lp->part);
933 if (rc)
934 goto err_gpio_dir;
935
936 rc = at86rf230_read_subreg(lp, SR_VERSION_NUM, &lp->vers);
937 if (rc)
938 goto err_gpio_dir;
939
940 switch (lp->part) {
941 case 2:
942 chip = "at86rf230";
943 /* supported = 1; FIXME: should be easy to support; */
944 break;
945 case 3:
946 chip = "at86rf231";
947 supported = 1;
948 break;
949 default:
950 chip = "UNKNOWN";
951 break;
952 }
953
954 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, lp->vers);
955 if (!supported) {
956 rc = -ENOTSUPP;
957 goto err_gpio_dir;
958 }
959
960 rc = at86rf230_hw_init(lp);
961 if (rc)
962 goto err_gpio_dir;
963
057dad6f 964 rc = request_irq(spi->irq, irq_handler,
43b5abe0 965 IRQF_SHARED | pdata->irq_type,
7b8e19b6 966 dev_name(&spi->dev), lp);
967 if (rc)
968 goto err_gpio_dir;
969
057dad6f
SH		 970 /* Read irq status register to reset irq line */
971 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
972 if (rc)
973 goto err_irq;
974
7b8e19b6 975 rc = ieee802154_register_device(lp->dev);
976 if (rc)
977 goto err_irq;
978
979 return rc;
980
7b8e19b6 981err_irq:
982 free_irq(spi->irq, lp);
983 flush_work(&lp->irqwork);
984err_gpio_dir:
985 if (gpio_is_valid(lp->slp_tr))
986 gpio_free(lp->slp_tr);
987err_slp_tr:
988 gpio_free(lp->rstn);
989err_rstn:
7b8e19b6 990 spi_set_drvdata(spi, NULL);
991 mutex_destroy(&lp->bmux);
992 ieee802154_free_device(lp->dev);
993 return rc;
994}
995
bb1f4606 996static int at86rf230_remove(struct spi_device *spi)
7b8e19b6 997{
998 struct at86rf230_local *lp = spi_get_drvdata(spi);
999
1000 ieee802154_unregister_device(lp->dev);
1001
1002 free_irq(spi->irq, lp);
1003 flush_work(&lp->irqwork);
1004
1005 if (gpio_is_valid(lp->slp_tr))
1006 gpio_free(lp->slp_tr);
1007 gpio_free(lp->rstn);
1008
1009 spi_set_drvdata(spi, NULL);
1010 mutex_destroy(&lp->bmux);
1011 ieee802154_free_device(lp->dev);
1012
1013 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1014 return 0;
1015}
1016
1017static struct spi_driver at86rf230_driver = {
1018 .driver = {
1019 .name = "at86rf230",
1020 .owner = THIS_MODULE,
1021 },
1022 .probe = at86rf230_probe,
bb1f4606 1023 .remove = at86rf230_remove,
7b8e19b6 1024};
1025
395a5738 1026module_spi_driver(at86rf230_driver);
7b8e19b6 1027
1028MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1029MODULE_LICENSE("GPL v2");
kernel source for telekom puls (alcatel/mediatek)