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[RT2x00]: add driver for Ralink wireless hardware
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ewrk3.c
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1da177e4
LT		 1/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146#include <linux/module.h>
147#include <linux/kernel.h>
148#include <linux/string.h>
149#include <linux/errno.h>
150#include <linux/ioport.h>
151#include <linux/slab.h>
152#include <linux/interrupt.h>
153#include <linux/delay.h>
154#include <linux/init.h>
155#include <linux/crc32.h>
156#include <linux/netdevice.h>
157#include <linux/etherdevice.h>
158#include <linux/skbuff.h>
159#include <linux/ethtool.h>
160#include <linux/time.h>
161#include <linux/types.h>
162#include <linux/unistd.h>
163#include <linux/ctype.h>
164#include <linux/bitops.h>
165
166#include <asm/io.h>
167#include <asm/dma.h>
168#include <asm/uaccess.h>
169
170#include "ewrk3.h"
171
172#define DRV_NAME "ewrk3"
173#define DRV_VERSION "0.48"
174
175static char version[] __initdata =
176DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178#ifdef EWRK3_DEBUG
179static int ewrk3_debug = EWRK3_DEBUG;
180#else
181static int ewrk3_debug = 1;
182#endif
183
184#define EWRK3_NDA 0xffe0 /* No Device Address */
185
186#define PROBE_LENGTH 32
187#define ETH_PROM_SIG 0xAA5500FFUL
188
189#ifndef EWRK3_SIGNATURE
190#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191#define EWRK3_STRLEN 8
192#endif
193
194#ifndef EWRK3_RAM_BASE_ADDRESSES
195#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196#endif
197
198/*
199 ** Sets up the I/O area for the autoprobe.
200 */
201#define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202#define EWRK3_IOP_INC 0x20 /* I/O address increment */
203#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205#ifndef MAX_NUM_EWRK3S
206#define MAX_NUM_EWRK3S 21
207#endif
208
209#ifndef EWRK3_EISA_IO_PORTS
210#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211#endif
212
213#ifndef MAX_EISA_SLOTS
214#define MAX_EISA_SLOTS 16
215#define EISA_SLOT_INC 0x1000
216#endif
217
218#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220/*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223#define IO_ONLY 0x00
224#define SHMEM_2K 0x800
225#define SHMEM_32K 0x8000
226#define SHMEM_64K 0x10000
227
228/*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231#define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234}
235
236#define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240}
241
242/*
243 ** EtherWORKS 3 START/STOP
244 */
245#define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249}
250
251#define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254}
255
256/*
257 ** The EtherWORKS 3 private structure
258 */
259#define EWRK3_PKT_STAT_SZ 16
260#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271};
272
273struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
1da177e4
LT		 278 struct ewrk3_stats pktStats; /* Private stats counters */
279 u_char irq_mask; /* Adapter IRQ mask bits */
280 u_char mPage; /* Maximum 2kB Page number */
281 u_char lemac; /* Chip rev. level */
282 u_char hard_strapped; /* Don't allow a full open */
283 u_char txc; /* Transmit cut through */
284 void __iomem *mctbl; /* Pointer to the multicast table */
285 u_char led_mask; /* Used to reserve LED access for ethtool */
286 spinlock_t hw_lock;
287};
288
289/*
290 ** Force the EtherWORKS 3 card to be in 2kB MODE
291 */
292#define FORCE_2K_MODE { \
293 shmem_length = SHMEM_2K;\
294 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
295}
296
297/*
298 ** Public Functions
299 */
300static int ewrk3_open(struct net_device *dev);
301static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
7d12e780 302static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
1da177e4 303static int ewrk3_close(struct net_device *dev);
1da177e4
LT		 304static void set_multicast_list(struct net_device *dev);
305static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491
JG		 306static const struct ethtool_ops ethtool_ops_203;
307static const struct ethtool_ops ethtool_ops;
1da177e4
LT		 308
309/*
310 ** Private functions
311 */
312static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
313static void ewrk3_init(struct net_device *dev);
314static int ewrk3_rx(struct net_device *dev);
315static int ewrk3_tx(struct net_device *dev);
316static void ewrk3_timeout(struct net_device *dev);
317
318static void EthwrkSignature(char *name, char *eeprom_image);
319static int DevicePresent(u_long iobase);
320static void SetMulticastFilter(struct net_device *dev);
321static int EISA_signature(char *name, s32 eisa_id);
322
323static int Read_EEPROM(u_long iobase, u_char eaddr);
324static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
325static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
326
327static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
328static int isa_probe(struct net_device *dev, u_long iobase);
329static int eisa_probe(struct net_device *dev, u_long iobase);
330
331static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
332
333static char name[EWRK3_STRLEN + 1];
334static int num_ewrks3s;
335
336/*
337 ** Miscellaneous defines...
338 */
339#define INIT_EWRK3 {\
340 outb(EEPROM_INIT, EWRK3_IOPR);\
341 mdelay(1);\
342}
343
344#ifndef MODULE
345struct net_device * __init ewrk3_probe(int unit)
346{
347 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
348 int err;
349
350 if (!dev)
351 return ERR_PTR(-ENOMEM);
352
353 if (unit >= 0) {
354 sprintf(dev->name, "eth%d", unit);
355 netdev_boot_setup_check(dev);
356 }
1da177e4
LT		 357
358 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
6aa20a22 359 if (err)
1da177e4
LT		 360 goto out;
361 return dev;
362out:
363 free_netdev(dev);
364 return ERR_PTR(err);
6aa20a22 365
1da177e4
LT		 366}
367#endif
368
369static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
370{
371 int err;
372
373 dev->base_addr = iobase;
374 dev->irq = irq;
375
376 /* Address PROM pattern */
377 err = isa_probe(dev, iobase);
6aa20a22 378 if (err != 0)
1da177e4
LT		 379 err = eisa_probe(dev, iobase);
380
381 if (err)
382 return err;
383
384 err = register_netdev(dev);
385 if (err)
386 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
387
388 return err;
389}
390
6aa20a22 391static int __init
1da177e4
LT		 392ewrk3_hw_init(struct net_device *dev, u_long iobase)
393{
394 struct ewrk3_private *lp;
395 int i, status = 0;
396 u_long mem_start, shmem_length;
397 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
398 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
399
400 /*
401 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
402 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
403 */
404 if (iobase > 0x400)
405 eisa_cr = inb(EISA_CR);
406 INIT_EWRK3;
407
408 nicsr = inb(EWRK3_CSR);
409
410 icr = inb(EWRK3_ICR);
411 icr &= 0x70;
412 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
413
991b5557 414 if (nicsr != (CSR_TXD | CSR_RXD))
1da177e4
LT		 415 return -ENXIO;
416
1da177e4
LT		 417 /* Check that the EEPROM is alive and well and not living on Pluto... */
418 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
419 union {
420 short val;
421 char c[2];
422 } tmp;
423
424 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
425 eeprom_image[i] = tmp.c[0];
426 eeprom_image[i + 1] = tmp.c[1];
427 chksum += eeprom_image[i] + eeprom_image[i + 1];
428 }
429
430 if (chksum != 0) { /* Bad EEPROM Data! */
431 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
432 return -ENXIO;
433 }
6aa20a22 434
1da177e4 435 EthwrkSignature(name, eeprom_image);
6aa20a22 436 if (*name == '\0')
1da177e4
LT		 437 return -ENXIO;
438
439 dev->base_addr = iobase;
6aa20a22 440
1da177e4
LT		 441 if (iobase > 0x400) {
442 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
443 }
444 lemac = eeprom_image[EEPROM_CHIPVER];
445 cmr = inb(EWRK3_CMR);
6aa20a22 446
1da177e4
LT		 447 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
448 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
449 printk("%s: %s at %#4lx", dev->name, name, iobase);
450 hard_strapped = 1;
451 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
452 /* EISA slot address */
453 printk("%s: %s at %#4lx (EISA slot %ld)",
454 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
455 } else { /* ISA port address */
456 printk("%s: %s at %#4lx", dev->name, name, iobase);
457 }
458
459 printk(", h/w address ");
460 if (lemac != LeMAC2)
461 DevicePresent(iobase); /* need after EWRK3_INIT */
462 status = get_hw_addr(dev, eeprom_image, lemac);
463 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
464 printk("%2.2x:", dev->dev_addr[i]);
465 }
466 printk("%2.2x,\n", dev->dev_addr[i]);
6aa20a22 467
1da177e4
LT		 468 if (status) {
469 printk(" which has an EEPROM CRC error.\n");
470 return -ENXIO;
471 }
472
473 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
474 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
475 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
476 cmr |= CMR_RA;
477 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
478 cmr |= CMR_WB;
479 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
480 cmr |= CMR_POLARITY;
481 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
482 cmr |= CMR_LINK;
483 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
484 cmr |= CMR_0WS;
485 }
486 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
487 cmr |= CMR_DRAM;
488 outb(cmr, EWRK3_CMR);
6aa20a22 489
1da177e4
LT		 490 cr = inb(EWRK3_CR); /* Set up the Control Register */
491 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
492 if (cr & SETUP_APD)
493 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
494 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
495 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
496 outb(cr, EWRK3_CR);
497
498 /*
499 ** Determine the base address and window length for the EWRK3
500 ** RAM from the memory base register.
501 */
502 mem_start = inb(EWRK3_MBR);
503 shmem_length = 0;
504 if (mem_start != 0) {
505 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
506 mem_start *= SHMEM_64K;
507 shmem_length = SHMEM_64K;
508 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
509 mem_start *= SHMEM_32K;
510 shmem_length = SHMEM_32K;
511 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
512 mem_start = mem_start * SHMEM_2K + 0x80000;
513 shmem_length = SHMEM_2K;
514 } else {
515 return -ENXIO;
516 }
517 }
518 /*
519 ** See the top of this source code for comments about
520 ** uncommenting this line.
521 */
522/* FORCE_2K_MODE; */
6aa20a22 523
1da177e4
LT		 524 if (hard_strapped) {
525 printk(" is hard strapped.\n");
526 } else if (mem_start) {
527 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
528 printk(" at 0x%.5lx", mem_start);
529 } else {
530 printk(" is in I/O only mode");
531 }
532
533 lp = netdev_priv(dev);
534 lp->shmem_base = mem_start;
535 lp->shmem = ioremap(mem_start, shmem_length);
536 if (!lp->shmem)
537 return -ENOMEM;
538 lp->shmem_length = shmem_length;
539 lp->lemac = lemac;
540 lp->hard_strapped = hard_strapped;
541 lp->led_mask = CR_LED;
542 spin_lock_init(&lp->hw_lock);
6aa20a22 543
1da177e4
LT		 544 lp->mPage = 64;
545 if (cmr & CMR_DRAM)
546 lp->mPage <<= 1; /* 2 DRAMS on module */
6aa20a22 547
1da177e4 548 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
6aa20a22 549
1da177e4 550 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
6aa20a22 551
1da177e4
LT		 552 if (!hard_strapped) {
553 /*
554 ** Enable EWRK3 board interrupts for autoprobing
555 */
556 icr |= ICR_IE; /* Enable interrupts */
557 outb(icr, EWRK3_ICR);
6aa20a22 558
1da177e4
LT		 559 /* The DMA channel may be passed in on this parameter. */
560 dev->dma = 0;
6aa20a22 561
1da177e4
LT		 562 /* To auto-IRQ we enable the initialization-done and DMA err,
563 interrupts. For now we will always get a DMA error. */
564 if (dev->irq < 2) {
565#ifndef MODULE
566 u_char irqnum;
567 unsigned long irq_mask;
6aa20a22 568
1da177e4
LT		 569
570 irq_mask = probe_irq_on();
6aa20a22 571
1da177e4
LT		 572 /*
573 ** Trigger a TNE interrupt.
574 */
575 icr |= ICR_TNEM;
576 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
577 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
6aa20a22 578
1da177e4 579 irqnum = irq[((icr & IRQ_SEL) >> 4)];
6aa20a22 580
1da177e4
LT		 581 mdelay(20);
582 dev->irq = probe_irq_off(irq_mask);
583 if ((dev->irq) && (irqnum == dev->irq)) {
584 printk(" and uses IRQ%d.\n", dev->irq);
585 } else {
586 if (!dev->irq) {
587 printk(" and failed to detect IRQ line.\n");
588 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
589 printk(" and an illegal IRQ line detected.\n");
590 } else {
591 printk(", but incorrect IRQ line detected.\n");
592 }
593 iounmap(lp->shmem);
594 return -ENXIO;
595 }
596
597 DISABLE_IRQs; /* Mask all interrupts */
598
599#endif /* MODULE */
600 } else {
601 printk(" and requires IRQ%d.\n", dev->irq);
602 }
603 }
604
605 if (ewrk3_debug > 1) {
606 printk(version);
607 }
608 /* The EWRK3-specific entries in the device structure. */
609 dev->open = ewrk3_open;
610 dev->hard_start_xmit = ewrk3_queue_pkt;
611 dev->stop = ewrk3_close;
1da177e4
LT		 612 dev->set_multicast_list = set_multicast_list;
613 dev->do_ioctl = ewrk3_ioctl;
614 if (lp->adapter_name[4] == '3')
615 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
616 else
617 SET_ETHTOOL_OPS(dev, &ethtool_ops);
618 dev->tx_timeout = ewrk3_timeout;
619 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
6aa20a22 620
1da177e4
LT		 621 dev->mem_start = 0;
622
623 return 0;
624}
6aa20a22 625
1da177e4
LT		 626
627static int ewrk3_open(struct net_device *dev)
628{
629 struct ewrk3_private *lp = netdev_priv(dev);
630 u_long iobase = dev->base_addr;
631 int i, status = 0;
632 u_char icr, csr;
633
634 /*
635 ** Stop the TX and RX...
636 */
637 STOP_EWRK3;
638
639 if (!lp->hard_strapped) {
640 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
641 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
642 status = -EAGAIN;
643 } else {
644
645 /*
646 ** Re-initialize the EWRK3...
647 */
648 ewrk3_init(dev);
649
650 if (ewrk3_debug > 1) {
651 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
652 printk(" physical address: ");
653 for (i = 0; i < 5; i++) {
654 printk("%2.2x:", (u_char) dev->dev_addr[i]);
655 }
656 printk("%2.2x\n", (u_char) dev->dev_addr[i]);
657 if (lp->shmem_length == 0) {
658 printk(" no shared memory, I/O only mode\n");
659 } else {
660 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
661 printk(" window length: 0x%04lx\n", lp->shmem_length);
662 }
663 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
664 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
665 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
666 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
667 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
668 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
669 }
670 netif_start_queue(dev);
671 /*
672 ** Unmask EWRK3 board interrupts
673 */
674 icr = inb(EWRK3_ICR);
675 ENABLE_IRQs;
676
677 }
678 } else {
679 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
680 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
681 return -EINVAL;
682 }
683
684 return status;
685}
686
687/*
688 ** Initialize the EtherWORKS 3 operating conditions
689 */
690static void ewrk3_init(struct net_device *dev)
691{
692 struct ewrk3_private *lp = netdev_priv(dev);
693 u_char csr, page;
694 u_long iobase = dev->base_addr;
695 int i;
696
697 /*
698 ** Enable any multicasts
699 */
700 set_multicast_list(dev);
701
702 /*
703 ** Set hardware MAC address. Address is initialized from the EEPROM
704 ** during startup but may have since been changed by the user.
705 */
706 for (i=0; i<ETH_ALEN; i++)
707 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
708
709 /*
710 ** Clean out any remaining entries in all the queues here
711 */
712 while (inb(EWRK3_TQ));
713 while (inb(EWRK3_TDQ));
714 while (inb(EWRK3_RQ));
715 while (inb(EWRK3_FMQ));
716
717 /*
718 ** Write a clean free memory queue
719 */
720 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
721 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
722 }
723
724 START_EWRK3; /* Enable the TX and/or RX */
725}
726
727/*
728 * Transmit timeout
729 */
6aa20a22 730
1da177e4
LT		 731static void ewrk3_timeout(struct net_device *dev)
732{
733 struct ewrk3_private *lp = netdev_priv(dev);
734 u_char icr, csr;
735 u_long iobase = dev->base_addr;
6aa20a22
JG		 736
737 if (!lp->hard_strapped)
1da177e4
LT		 738 {
739 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
740 dev->name, inb(EWRK3_CSR));
741
742 /*
743 ** Mask all board interrupts
744 */
745 DISABLE_IRQs;
746
747 /*
748 ** Stop the TX and RX...
749 */
750 STOP_EWRK3;
751
752 ewrk3_init(dev);
753
754 /*
755 ** Unmask EWRK3 board interrupts
756 */
757 ENABLE_IRQs;
758
759 dev->trans_start = jiffies;
760 netif_wake_queue(dev);
761 }
762}
763
764/*
765 ** Writes a socket buffer to the free page queue
766 */
767static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
768{
769 struct ewrk3_private *lp = netdev_priv(dev);
770 u_long iobase = dev->base_addr;
771 void __iomem *buf = NULL;
772 u_char icr;
773 u_char page;
774
775 spin_lock_irq (&lp->hw_lock);
776 DISABLE_IRQs;
777
778 /* if no resources available, exit, request packet be queued */
779 if (inb (EWRK3_FMQC) == 0) {
780 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
781 dev->name);
782 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
783 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
784 inb (EWRK3_FMQC));
785 goto err_out;
786 }
787
788 /*
789 ** Get a free page from the FMQ
790 */
791 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
792 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
793 (u_char) page);
794 goto err_out;
795 }
796
797
798 /*
799 ** Set up shared memory window and pointer into the window
800 */
801 if (lp->shmem_length == IO_ONLY) {
802 outb (page, EWRK3_IOPR);
803 } else if (lp->shmem_length == SHMEM_2K) {
804 buf = lp->shmem;
805 outb (page, EWRK3_MPR);
806 } else if (lp->shmem_length == SHMEM_32K) {
807 buf = (((short) page << 11) & 0x7800) + lp->shmem;
808 outb ((page >> 4), EWRK3_MPR);
809 } else if (lp->shmem_length == SHMEM_64K) {
810 buf = (((short) page << 11) & 0xf800) + lp->shmem;
811 outb ((page >> 5), EWRK3_MPR);
812 } else {
813 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
814 dev->name);
815 BUG ();
816 }
817
818 /*
819 ** Set up the buffer control structures and copy the data from
820 ** the socket buffer to the shared memory .
821 */
822 if (lp->shmem_length == IO_ONLY) {
823 int i;
824 u_char *p = skb->data;
825 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
826 outb ((char) (skb->len & 0xff), EWRK3_DATA);
827 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
828 outb ((char) 0x04, EWRK3_DATA);
829 for (i = 0; i < skb->len; i++) {
830 outb (*p++, EWRK3_DATA);
831 }
832 outb (page, EWRK3_TQ); /* Start sending pkt */
833 } else {
834 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
835 buf += 1;
836 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
837 buf += 1;
838 if (lp->txc) {
839 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
840 buf += 1;
841 writeb (0x04, buf); /* index byte */
842 buf += 1;
843 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
844 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
845 outb (page, EWRK3_TQ); /* Start sending pkt */
846 memcpy_toio (buf + PRELOAD,
847 skb->data + PRELOAD,
848 skb->len - PRELOAD);
849 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
850 } else {
851 writeb ((skb->len >> 8) & 0xff, buf);
852 buf += 1;
853 writeb (0x04, buf); /* index byte */
854 buf += 1;
855 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
856 outb (page, EWRK3_TQ); /* Start sending pkt */
857 }
858 }
859
860 ENABLE_IRQs;
861 spin_unlock_irq (&lp->hw_lock);
862
09f75cd7 863 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 864 dev->trans_start = jiffies;
865 dev_kfree_skb (skb);
866
867 /* Check for free resources: stop Tx queue if there are none */
868 if (inb (EWRK3_FMQC) == 0)
869 netif_stop_queue (dev);
870
871 return 0;
872
873err_out:
874 ENABLE_IRQs;
875 spin_unlock_irq (&lp->hw_lock);
876 return 1;
877}
878
879/*
880 ** The EWRK3 interrupt handler.
881 */
7d12e780 882static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
1da177e4
LT		 883{
884 struct net_device *dev = dev_id;
885 struct ewrk3_private *lp;
886 u_long iobase;
887 u_char icr, cr, csr;
888
889 lp = netdev_priv(dev);
890 iobase = dev->base_addr;
891
892 /* get the interrupt information */
893 csr = inb(EWRK3_CSR);
894
895 /*
896 ** Mask the EWRK3 board interrupts and turn on the LED
897 */
898 spin_lock(&lp->hw_lock);
899 DISABLE_IRQs;
900
901 cr = inb(EWRK3_CR);
902 cr |= lp->led_mask;
903 outb(cr, EWRK3_CR);
904
905 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
906 ewrk3_rx(dev);
907
908 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
909 ewrk3_tx(dev);
910
911 /*
912 ** Now deal with the TX/RX disable flags. These are set when there
913 ** are no more resources. If resources free up then enable these
914 ** interrupts, otherwise mask them - failure to do this will result
915 ** in the system hanging in an interrupt loop.
916 */
917 if (inb(EWRK3_FMQC)) { /* any resources available? */
918 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
919 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
920 outb(csr, EWRK3_CSR);
921 netif_wake_queue(dev);
922 } else {
923 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
924 }
925
926 /* Unmask the EWRK3 board interrupts and turn off the LED */
927 cr &= ~(lp->led_mask);
928 outb(cr, EWRK3_CR);
929 ENABLE_IRQs;
930 spin_unlock(&lp->hw_lock);
931 return IRQ_HANDLED;
932}
933
934/* Called with lp->hw_lock held */
935static int ewrk3_rx(struct net_device *dev)
936{
937 struct ewrk3_private *lp = netdev_priv(dev);
938 u_long iobase = dev->base_addr;
939 int i, status = 0;
940 u_char page;
941 void __iomem *buf = NULL;
942
943 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
944 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
945 /*
946 ** Set up shared memory window and pointer into the window
947 */
948 if (lp->shmem_length == IO_ONLY) {
949 outb(page, EWRK3_IOPR);
950 } else if (lp->shmem_length == SHMEM_2K) {
951 buf = lp->shmem;
952 outb(page, EWRK3_MPR);
953 } else if (lp->shmem_length == SHMEM_32K) {
954 buf = (((short) page << 11) & 0x7800) + lp->shmem;
955 outb((page >> 4), EWRK3_MPR);
956 } else if (lp->shmem_length == SHMEM_64K) {
957 buf = (((short) page << 11) & 0xf800) + lp->shmem;
958 outb((page >> 5), EWRK3_MPR);
959 } else {
960 status = -1;
961 printk("%s: Oops - your private data area is hosed!\n", dev->name);
962 }
963
964 if (!status) {
965 char rx_status;
966 int pkt_len;
967
968 if (lp->shmem_length == IO_ONLY) {
969 rx_status = inb(EWRK3_DATA);
970 pkt_len = inb(EWRK3_DATA);
971 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
972 } else {
973 rx_status = readb(buf);
974 buf += 1;
975 pkt_len = readw(buf);
976 buf += 3;
977 }
978
979 if (!(rx_status & R_ROK)) { /* There was an error. */
09f75cd7 980 dev->stats.rx_errors++; /* Update the error stats. */
1da177e4 981 if (rx_status & R_DBE)
09f75cd7 982 dev->stats.rx_frame_errors++;
1da177e4 983 if (rx_status & R_CRC)
09f75cd7 984 dev->stats.rx_crc_errors++;
1da177e4 985 if (rx_status & R_PLL)
09f75cd7 986 dev->stats.rx_fifo_errors++;
1da177e4
LT		 987 } else {
988 struct sk_buff *skb;
989
990 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
991 unsigned char *p;
1da177e4
LT		 992 skb_reserve(skb, 2); /* Align to 16 bytes */
993 p = skb_put(skb, pkt_len);
994
995 if (lp->shmem_length == IO_ONLY) {
996 *p = inb(EWRK3_DATA); /* dummy read */
997 for (i = 0; i < pkt_len; i++) {
998 *p++ = inb(EWRK3_DATA);
999 }
1000 } else {
1001 memcpy_fromio(p, buf, pkt_len);
1002 }
1003
1004 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1005 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1006 lp->pktStats.bins[i]++;
1007 i = EWRK3_PKT_STAT_SZ;
1008 }
1009 }
1010 p = skb->data; /* Look at the dest addr */
1011 if (p[0] & 0x01) { /* Multicast/Broadcast */
1012 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1013 lp->pktStats.broadcast++;
1014 } else {
1015 lp->pktStats.multicast++;
1016 }
1017 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1018 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1019 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1020 lp->pktStats.unicast++;
1021 }
1022 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1023 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1024 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1025 }
1026 /*
1027 ** Notify the upper protocol layers that there is another
1028 ** packet to handle
1029 */
1030 skb->protocol = eth_type_trans(skb, dev);
1031 netif_rx(skb);
1032
1033 /*
1034 ** Update stats
1035 */
1036 dev->last_rx = jiffies;
09f75cd7
JG		 1037 dev->stats.rx_packets++;
1038 dev->stats.rx_bytes += pkt_len;
1da177e4
LT		 1039 } else {
1040 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
09f75cd7 1041 dev->stats.rx_dropped++; /* Really, deferred. */
1da177e4
LT		 1042 break;
1043 }
1044 }
1045 }
1046 /*
1047 ** Return the received buffer to the free memory queue
1048 */
1049 outb(page, EWRK3_FMQ);
1050 } else {
1051 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1052 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1053 }
1054 }
1055 return status;
1056}
1057
1058/*
1059** Buffer sent - check for TX buffer errors.
1060** Called with lp->hw_lock held
1061*/
1062static int ewrk3_tx(struct net_device *dev)
1063{
1064 struct ewrk3_private *lp = netdev_priv(dev);
1065 u_long iobase = dev->base_addr;
1066 u_char tx_status;
1067
1068 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1069 if (tx_status & T_VSTS) { /* The status is valid */
1070 if (tx_status & T_TXE) {
09f75cd7 1071 dev->stats.tx_errors++;
1da177e4 1072 if (tx_status & T_NCL)
09f75cd7 1073 dev->stats.tx_carrier_errors++;
1da177e4 1074 if (tx_status & T_LCL)
09f75cd7 1075 dev->stats.tx_window_errors++;
1da177e4
LT		 1076 if (tx_status & T_CTU) {
1077 if ((tx_status & T_COLL) ^ T_XUR) {
1078 lp->pktStats.tx_underruns++;
1079 } else {
1080 lp->pktStats.excessive_underruns++;
1081 }
1082 } else if (tx_status & T_COLL) {
1083 if ((tx_status & T_COLL) ^ T_XCOLL) {
09f75cd7 1084 dev->stats.collisions++;
1da177e4
LT		 1085 } else {
1086 lp->pktStats.excessive_collisions++;
1087 }
1088 }
1089 } else {
09f75cd7 1090 dev->stats.tx_packets++;
1da177e4
LT		 1091 }
1092 }
1093 }
1094
1095 return 0;
1096}
1097
1098static int ewrk3_close(struct net_device *dev)
1099{
1100 struct ewrk3_private *lp = netdev_priv(dev);
1101 u_long iobase = dev->base_addr;
1102 u_char icr, csr;
1103
1104 netif_stop_queue(dev);
6aa20a22 1105
1da177e4
LT		 1106 if (ewrk3_debug > 1) {
1107 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1108 dev->name, inb(EWRK3_CSR));
1109 }
1110 /*
1111 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1112 */
1113 DISABLE_IRQs;
1114
1115 STOP_EWRK3;
1116
1117 /*
1118 ** Clean out the TX and RX queues here (note that one entry
1119 ** may get added to either the TXD or RX queues if the TX or RX
1120 ** just starts processing a packet before the STOP_EWRK3 command
1121 ** is received. This will be flushed in the ewrk3_open() call).
1122 */
1123 while (inb(EWRK3_TQ));
1124 while (inb(EWRK3_TDQ));
1125 while (inb(EWRK3_RQ));
1126
1127 if (!lp->hard_strapped) {
1128 free_irq(dev->irq, dev);
1129 }
1130 return 0;
1131}
1132
1da177e4
LT		 1133/*
1134 ** Set or clear the multicast filter for this adapter.
1135 */
1136static void set_multicast_list(struct net_device *dev)
1137{
1138 struct ewrk3_private *lp = netdev_priv(dev);
1139 u_long iobase = dev->base_addr;
1140 u_char csr;
1141
1142 csr = inb(EWRK3_CSR);
1143
1144 if (lp->shmem_length == IO_ONLY) {
1145 lp->mctbl = NULL;
1146 } else {
1147 lp->mctbl = lp->shmem + PAGE0_HTE;
1148 }
1149
1150 csr &= ~(CSR_PME | CSR_MCE);
1151 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1152 csr |= CSR_PME;
1153 outb(csr, EWRK3_CSR);
1154 } else {
1155 SetMulticastFilter(dev);
1156 csr |= CSR_MCE;
1157 outb(csr, EWRK3_CSR);
1158 }
1159}
1160
1161/*
1162 ** Calculate the hash code and update the logical address filter
1163 ** from a list of ethernet multicast addresses.
1164 ** Little endian crc one liner from Matt Thomas, DEC.
1165 **
1166 ** Note that when clearing the table, the broadcast bit must remain asserted
1167 ** to receive broadcast messages.
1168 */
1169static void SetMulticastFilter(struct net_device *dev)
1170{
1171 struct ewrk3_private *lp = netdev_priv(dev);
1172 struct dev_mc_list *dmi = dev->mc_list;
1173 u_long iobase = dev->base_addr;
1174 int i;
1175 char *addrs, bit, byte;
1176 short __iomem *p = lp->mctbl;
1177 u16 hashcode;
1178 u32 crc;
1179
1180 spin_lock_irq(&lp->hw_lock);
1181
1182 if (lp->shmem_length == IO_ONLY) {
1183 outb(0, EWRK3_IOPR);
1184 outw(PAGE0_HTE, EWRK3_PIR1);
1185 } else {
1186 outb(0, EWRK3_MPR);
1187 }
1188
1189 if (dev->flags & IFF_ALLMULTI) {
1190 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1191 if (lp->shmem_length == IO_ONLY) {
1192 outb(0xff, EWRK3_DATA);
1193 } else { /* memset didn't work here */
1194 writew(0xffff, p);
1195 p++;
1196 i++;
1197 }
1198 }
1199 } else {
1200 /* Clear table except for broadcast bit */
1201 if (lp->shmem_length == IO_ONLY) {
1202 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1203 outb(0x00, EWRK3_DATA);
1204 }
1205 outb(0x80, EWRK3_DATA);
1206 i++; /* insert the broadcast bit */
1207 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1208 outb(0x00, EWRK3_DATA);
1209 }
1210 } else {
1211 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1212 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1213 }
1214
1215 /* Update table */
1216 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1217 addrs = dmi->dmi_addr;
1218 dmi = dmi->next;
1219 if ((*addrs & 0x01) == 1) { /* multicast address? */
1220 crc = ether_crc_le(ETH_ALEN, addrs);
1221 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1222
1223 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1224 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1225
1226 if (lp->shmem_length == IO_ONLY) {
1227 u_char tmp;
1228
1229 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1230 tmp = inb(EWRK3_DATA);
1231 tmp |= bit;
1232 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1233 outb(tmp, EWRK3_DATA);
1234 } else {
1235 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1236 }
1237 }
1238 }
1239 }
1240
1241 spin_unlock_irq(&lp->hw_lock);
1242}
1243
1244/*
1245 ** ISA bus I/O device probe
1246 */
1247static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1248{
1249 int i = num_ewrks3s, maxSlots;
1250 int ret = -ENODEV;
1251
1252 u_long iobase;
1253
1254 if (ioaddr >= 0x400)
1255 goto out;
1256
1257 if (ioaddr == 0) { /* Autoprobing */
1258 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1259 maxSlots = 24;
1260 } else { /* Probe a specific location */
1261 iobase = ioaddr;
1262 maxSlots = i + 1;
1263 }
1264
1265 for (; (i < maxSlots) && (dev != NULL);
1266 iobase += EWRK3_IOP_INC, i++)
1267 {
1268 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1269 if (DevicePresent(iobase) == 0) {
1270 int irq = dev->irq;
1271 ret = ewrk3_hw_init(dev, iobase);
1272 if (!ret)
1273 break;
1274 dev->irq = irq;
1275 }
1276 release_region(iobase, EWRK3_TOTAL_SIZE);
1277 }
1278 }
1279 out:
1280
1281 return ret;
1282}
1283
1284/*
1285 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1286 ** the motherboard.
1287 */
1288static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1289{
1290 int i, maxSlots;
1291 u_long iobase;
1292 int ret = -ENODEV;
1293
1294 if (ioaddr < 0x1000)
1295 goto out;
1296
6835d09a
AB		 1297 iobase = ioaddr;
1298 i = (ioaddr >> 12);
1299 maxSlots = i + 1;
1da177e4
LT		 1300
1301 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1302 if (EISA_signature(name, EISA_ID) == 0) {
1303 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1304 DevicePresent(iobase) == 0) {
1305 int irq = dev->irq;
1306 ret = ewrk3_hw_init(dev, iobase);
1307 if (!ret)
1308 break;
1309 dev->irq = irq;
1310 }
1311 release_region(iobase, EWRK3_TOTAL_SIZE);
1312 }
1313 }
1314
1315 out:
1316 return ret;
1317}
1318
1319
1320/*
1321 ** Read the EWRK3 EEPROM using this routine
1322 */
1323static int Read_EEPROM(u_long iobase, u_char eaddr)
1324{
1325 int i;
1326
1327 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1328 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1329 for (i = 0; i < 5000; i++)
1330 inb(EWRK3_CSR); /* wait 1msec */
1331
1332 return inw(EWRK3_EPROM1); /* 16 bits data return */
1333}
1334
1335/*
1336 ** Write the EWRK3 EEPROM using this routine
1337 */
1338static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1339{
1340 int i;
1341
1342 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1343 for (i = 0; i < 5000; i++)
1344 inb(EWRK3_CSR); /* wait 1msec */
1345 outw(data, EWRK3_EPROM1); /* write data to register */
1346 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1347 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1348 for (i = 0; i < 75000; i++)
1349 inb(EWRK3_CSR); /* wait 15msec */
1350 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1351 for (i = 0; i < 5000; i++)
1352 inb(EWRK3_CSR); /* wait 1msec */
1353
1354 return 0;
1355}
1356
1357/*
1358 ** Look for a particular board name in the on-board EEPROM.
1359 */
1360static void __init EthwrkSignature(char *name, char *eeprom_image)
1361{
1362 int i;
1363 char *signatures[] = EWRK3_SIGNATURE;
1364
1365 for (i=0; *signatures[i] != '\0'; i++)
1366 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1367 break;
1368
1369 if (*signatures[i] != '\0') {
1370 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1371 name[EWRK3_STRLEN] = '\0';
1372 } else
1373 name[0] = '\0';
1374
1375 return;
1376}
1377
1378/*
1379 ** Look for a special sequence in the Ethernet station address PROM that
1380 ** is common across all EWRK3 products.
1381 **
1382 ** Search the Ethernet address ROM for the signature. Since the ROM address
1383 ** counter can start at an arbitrary point, the search must include the entire
1384 ** probe sequence length plus the (length_of_the_signature - 1).
1385 ** Stop the search IMMEDIATELY after the signature is found so that the
1386 ** PROM address counter is correctly positioned at the start of the
1387 ** ethernet address for later read out.
1388 */
1389
1390static int __init DevicePresent(u_long iobase)
1391{
1392 union {
1393 struct {
1394 u32 a;
1395 u32 b;
1396 } llsig;
1397 char Sig[sizeof(u32) << 1];
1398 }
1399 dev;
1400 short sigLength;
1401 char data;
1402 int i, j, status = 0;
1403
1404 dev.llsig.a = ETH_PROM_SIG;
1405 dev.llsig.b = ETH_PROM_SIG;
1406 sigLength = sizeof(u32) << 1;
1407
1408 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1409 data = inb(EWRK3_APROM);
1410 if (dev.Sig[j] == data) { /* track signature */
1411 j++;
1412 } else { /* lost signature; begin search again */
1413 if (data == dev.Sig[0]) {
1414 j = 1;
1415 } else {
1416 j = 0;
1417 }
1418 }
1419 }
1420
1421 if (j != sigLength) {
1422 status = -ENODEV; /* search failed */
1423 }
1424 return status;
1425}
1426
1427static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1428{
1429 int i, j, k;
1430 u_short chksum;
1431 u_char crc, lfsr, sd, status = 0;
1432 u_long iobase = dev->base_addr;
1433 u16 tmp;
1434
1435 if (chipType == LeMAC2) {
1436 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1437 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1438 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1439 for (k = 0; k < 8; k++, sd >>= 1) {
1440 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1441 crc = (crc >> 1) + lfsr;
1442 }
1443 }
1444 if (crc != eeprom_image[EEPROM_PA_CRC])
1445 status = -1;
1446 } else {
1447 for (i = 0, k = 0; i < ETH_ALEN;) {
1448 k <<= 1;
1449 if (k > 0xffff)
1450 k -= 0xffff;
1451
1452 k += (u_char) (tmp = inb(EWRK3_APROM));
1453 dev->dev_addr[i] = (u_char) tmp;
1454 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1455 i++;
1456 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1457 dev->dev_addr[i] = (u_char) tmp;
1458 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1459 i++;
1460
1461 if (k > 0xffff)
1462 k -= 0xffff;
1463 }
1464 if (k == 0xffff)
1465 k = 0;
1466 chksum = inb(EWRK3_APROM);
1467 chksum |= (inb(EWRK3_APROM) << 8);
1468 if (k != chksum)
1469 status = -1;
1470 }
1471
1472 return status;
1473}
1474
1475/*
1476 ** Look for a particular board name in the EISA configuration space
1477 */
1478static int __init EISA_signature(char *name, s32 eisa_id)
1479{
1480 u_long i;
1481 char *signatures[] = EWRK3_SIGNATURE;
1482 char ManCode[EWRK3_STRLEN];
1483 union {
1484 s32 ID;
1485 char Id[4];
1486 } Eisa;
1487 int status = 0;
1488
1489 *name = '\0';
1490 for (i = 0; i < 4; i++) {
1491 Eisa.Id[i] = inb(eisa_id + i);
1492 }
1493
1494 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1495 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1496 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1497 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1498 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1499 ManCode[5] = '\0';
1500
1501 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1502 if (strstr(ManCode, signatures[i]) != NULL) {
1503 strcpy(name, ManCode);
1504 status = 1;
1505 }
1506 }
1507
1508 return status; /* return the device name string */
1509}
1510
1511static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1512{
1513 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1514
1515 strcpy(info->driver, DRV_NAME);
1516 strcpy(info->version, DRV_VERSION);
1517 sprintf(info->fw_version, "%d", fwrev);
1518 strcpy(info->bus_info, "N/A");
1519 info->eedump_len = EEPROM_MAX;
1520}
1521
1522static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1523{
1524 struct ewrk3_private *lp = netdev_priv(dev);
1525 unsigned long iobase = dev->base_addr;
1526 u8 cr = inb(EWRK3_CR);
1527
1528 switch (lp->adapter_name[4]) {
1529 case '3': /* DE203 */
1530 ecmd->supported = SUPPORTED_BNC;
1531 ecmd->port = PORT_BNC;
1532 break;
1533
1534 case '4': /* DE204 */
1535 ecmd->supported = SUPPORTED_TP;
1536 ecmd->port = PORT_TP;
1537 break;
1538
1539 case '5': /* DE205 */
1540 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1541 ecmd->autoneg = !(cr & CR_APD);
1542 /*
1543 ** Port is only valid if autoneg is disabled
1544 ** and even then we don't know if AUI is jumpered.
1545 */
1546 if (!ecmd->autoneg)
1547 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1548 break;
1549 }
1550
1551 ecmd->supported |= SUPPORTED_10baseT_Half;
1552 ecmd->speed = SPEED_10;
1553 ecmd->duplex = DUPLEX_HALF;
1554 return 0;
1555}
1556
1557static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1558{
1559 struct ewrk3_private *lp = netdev_priv(dev);
1560 unsigned long iobase = dev->base_addr;
1561 unsigned long flags;
1562 u8 cr;
1563
1564 /* DE205 is the only card with anything to set */
1565 if (lp->adapter_name[4] != '5')
1566 return -EOPNOTSUPP;
1567
1568 /* Sanity-check parameters */
1569 if (ecmd->speed != SPEED_10)
1570 return -EINVAL;
1571 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1572 return -EINVAL; /* AUI is not software-selectable */
1573 if (ecmd->transceiver != XCVR_INTERNAL)
1574 return -EINVAL;
1575 if (ecmd->duplex != DUPLEX_HALF)
1576 return -EINVAL;
1577 if (ecmd->phy_address != 0)
1578 return -EINVAL;
1579
1580 spin_lock_irqsave(&lp->hw_lock, flags);
1581 cr = inb(EWRK3_CR);
1582
1583 /* If Autoneg is set, change to Auto Port mode */
1584 /* Otherwise, disable Auto Port and set port explicitly */
1585 if (ecmd->autoneg) {
1586 cr &= ~CR_APD;
1587 } else {
1588 cr |= CR_APD;
1589 if (ecmd->port == PORT_TP)
1590 cr &= ~CR_PSEL; /* Force TP */
1591 else
1592 cr |= CR_PSEL; /* Force BNC */
1593 }
1594
1595 /* Commit the changes */
1596 outb(cr, EWRK3_CR);
1597 spin_unlock_irqrestore(&lp->hw_lock, flags);
1598 return 0;
1599}
1600
1601static u32 ewrk3_get_link(struct net_device *dev)
1602{
1603 unsigned long iobase = dev->base_addr;
1604 u8 cmr = inb(EWRK3_CMR);
1605 /* DE203 has BNC only and link status does not apply */
1606 /* On DE204 this is always valid since TP is the only port. */
1607 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1608 return !(cmr & CMR_LINK);
1609}
1610
1611static int ewrk3_phys_id(struct net_device *dev, u32 data)
1612{
1613 struct ewrk3_private *lp = netdev_priv(dev);
1614 unsigned long iobase = dev->base_addr;
1615 unsigned long flags;
1616 u8 cr;
1617 int count;
1618
1619 /* Toggle LED 4x per second */
1620 count = data << 2;
1621
1622 spin_lock_irqsave(&lp->hw_lock, flags);
1623
1624 /* Bail if a PHYS_ID is already in progress */
1625 if (lp->led_mask == 0) {
1626 spin_unlock_irqrestore(&lp->hw_lock, flags);
1627 return -EBUSY;
1628 }
1629
1630 /* Prevent ISR from twiddling the LED */
1631 lp->led_mask = 0;
1632
1633 while (count--) {
1634 /* Toggle the LED */
1635 cr = inb(EWRK3_CR);
1636 outb(cr ^ CR_LED, EWRK3_CR);
1637
1638 /* Wait a little while */
1639 spin_unlock_irqrestore(&lp->hw_lock, flags);
1640 msleep(250);
1641 spin_lock_irqsave(&lp->hw_lock, flags);
1642
1643 /* Exit if we got a signal */
1644 if (signal_pending(current))
1645 break;
1646 }
1647
1648 lp->led_mask = CR_LED;
1649 cr = inb(EWRK3_CR);
1650 outb(cr & ~CR_LED, EWRK3_CR);
1651 spin_unlock_irqrestore(&lp->hw_lock, flags);
1652 return signal_pending(current) ? -ERESTARTSYS : 0;
1653}
1654
7282d491 1655static const struct ethtool_ops ethtool_ops_203 = {
1da177e4
LT		 1656 .get_drvinfo = ewrk3_get_drvinfo,
1657 .get_settings = ewrk3_get_settings,
1658 .set_settings = ewrk3_set_settings,
1659 .phys_id = ewrk3_phys_id,
1660};
1661
7282d491 1662static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1663 .get_drvinfo = ewrk3_get_drvinfo,
1664 .get_settings = ewrk3_get_settings,
1665 .set_settings = ewrk3_set_settings,
1666 .get_link = ewrk3_get_link,
1667 .phys_id = ewrk3_phys_id,
1668};
1669
1670/*
1671 ** Perform IOCTL call functions here. Some are privileged operations and the
1672 ** effective uid is checked in those cases.
1673 */
1674static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1675{
1676 struct ewrk3_private *lp = netdev_priv(dev);
1677 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1678 u_long iobase = dev->base_addr;
1679 int i, j, status = 0;
1680 u_char csr;
1681 unsigned long flags;
1682 union ewrk3_addr {
1683 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1684 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1685 };
6aa20a22 1686
1da177e4
LT		 1687 union ewrk3_addr *tmp;
1688
1689 /* All we handle are private IOCTLs */
1690 if (cmd != EWRK3IOCTL)
1691 return -EOPNOTSUPP;
1692
1693 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1694 if(tmp==NULL)
1695 return -ENOMEM;
1696
1697 switch (ioc->cmd) {
1698 case EWRK3_GET_HWADDR: /* Get the hardware address */
1699 for (i = 0; i < ETH_ALEN; i++) {
1700 tmp->addr[i] = dev->dev_addr[i];
1701 }
1702 ioc->len = ETH_ALEN;
1703 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1704 status = -EFAULT;
1705 break;
6aa20a22 1706
1da177e4
LT		 1707 case EWRK3_SET_HWADDR: /* Set the hardware address */
1708 if (capable(CAP_NET_ADMIN)) {
1709 spin_lock_irqsave(&lp->hw_lock, flags);
1710 csr = inb(EWRK3_CSR);
1711 csr |= (CSR_TXD | CSR_RXD);
1712 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1713 spin_unlock_irqrestore(&lp->hw_lock, flags);
1714
1715 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1716 status = -EFAULT;
1717 break;
1718 }
1719 spin_lock_irqsave(&lp->hw_lock, flags);
1720 for (i = 0; i < ETH_ALEN; i++) {
1721 dev->dev_addr[i] = tmp->addr[i];
1722 outb(tmp->addr[i], EWRK3_PAR0 + i);
1723 }
1724
1725 csr = inb(EWRK3_CSR);
1726 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1727 outb(csr, EWRK3_CSR);
1728 spin_unlock_irqrestore(&lp->hw_lock, flags);
1729 } else {
1730 status = -EPERM;
1731 }
1732
1733 break;
1734 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1735 if (capable(CAP_NET_ADMIN)) {
1736 spin_lock_irqsave(&lp->hw_lock, flags);
1737 csr = inb(EWRK3_CSR);
1738 csr |= CSR_PME;
1739 csr &= ~CSR_MCE;
1740 outb(csr, EWRK3_CSR);
1741 spin_unlock_irqrestore(&lp->hw_lock, flags);
1742 } else {
1743 status = -EPERM;
1744 }
1745
1746 break;
1747 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1748 if (capable(CAP_NET_ADMIN)) {
1749 spin_lock_irqsave(&lp->hw_lock, flags);
1750 csr = inb(EWRK3_CSR);
1751 csr &= ~CSR_PME;
1752 outb(csr, EWRK3_CSR);
1753 spin_unlock_irqrestore(&lp->hw_lock, flags);
1754 } else {
1755 status = -EPERM;
1756 }
1757
1758 break;
1759 case EWRK3_GET_MCA: /* Get the multicast address table */
1760 spin_lock_irqsave(&lp->hw_lock, flags);
1761 if (lp->shmem_length == IO_ONLY) {
1762 outb(0, EWRK3_IOPR);
1763 outw(PAGE0_HTE, EWRK3_PIR1);
1764 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1765 tmp->addr[i] = inb(EWRK3_DATA);
1766 }
1767 } else {
1768 outb(0, EWRK3_MPR);
1769 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1770 }
1771 spin_unlock_irqrestore(&lp->hw_lock, flags);
1772
1773 ioc->len = (HASH_TABLE_LEN >> 3);
1774 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1775 status = -EFAULT;
1776
1777 break;
1778 case EWRK3_SET_MCA: /* Set a multicast address */
1779 if (capable(CAP_NET_ADMIN)) {
1780 if (ioc->len > 1024)
1781 {
1782 status = -EINVAL;
1783 break;
1784 }
1785 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1786 status = -EFAULT;
1787 break;
1788 }
1789 set_multicast_list(dev);
1790 } else {
1791 status = -EPERM;
1792 }
1793
1794 break;
1795 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1796 if (capable(CAP_NET_ADMIN)) {
1797 set_multicast_list(dev);
1798 } else {
1799 status = -EPERM;
1800 }
1801
1802 break;
1803 case EWRK3_MCA_EN: /* Enable multicast addressing */
1804 if (capable(CAP_NET_ADMIN)) {
1805 spin_lock_irqsave(&lp->hw_lock, flags);
1806 csr = inb(EWRK3_CSR);
1807 csr |= CSR_MCE;
1808 csr &= ~CSR_PME;
1809 outb(csr, EWRK3_CSR);
1810 spin_unlock_irqrestore(&lp->hw_lock, flags);
1811 } else {
1812 status = -EPERM;
1813 }
1814
1815 break;
1816 case EWRK3_GET_STATS: { /* Get the driver statistics */
1817 struct ewrk3_stats *tmp_stats =
1818 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1819 if (!tmp_stats) {
1820 status = -ENOMEM;
1821 break;
1822 }
1823
1824 spin_lock_irqsave(&lp->hw_lock, flags);
1825 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1826 spin_unlock_irqrestore(&lp->hw_lock, flags);
1827
1828 ioc->len = sizeof(lp->pktStats);
1829 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1830 status = -EFAULT;
1831 kfree(tmp_stats);
1832 break;
1833 }
1834 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1835 if (capable(CAP_NET_ADMIN)) {
1836 spin_lock_irqsave(&lp->hw_lock, flags);
1837 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1838 spin_unlock_irqrestore(&lp->hw_lock,flags);
1839 } else {
1840 status = -EPERM;
1841 }
1842
1843 break;
1844 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1845 tmp->addr[0] = inb(EWRK3_CSR);
1846 ioc->len = 1;
1847 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1848 status = -EFAULT;
1849 break;
1850 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1851 if (capable(CAP_NET_ADMIN)) {
1852 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1853 status = -EFAULT;
1854 break;
1855 }
1856 outb(tmp->addr[0], EWRK3_CSR);
1857 } else {
1858 status = -EPERM;
1859 }
1860
1861 break;
1862 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1863 if (capable(CAP_NET_ADMIN)) {
1864 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1865 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1866 }
1867 i = EEPROM_MAX;
1868 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1869 for (j = 0; j < ETH_ALEN; j++) {
1870 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1871 }
1872 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1873 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1874 status = -EFAULT;
1875 } else {
1876 status = -EPERM;
1877 }
1878
1879 break;
1880 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1881 if (capable(CAP_NET_ADMIN)) {
1882 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1883 status = -EFAULT;
1884 break;
1885 }
1886 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1887 Write_EEPROM(tmp->val[i], iobase, i);
1888 }
1889 } else {
1890 status = -EPERM;
1891 }
1892
1893 break;
1894 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1895 tmp->addr[0] = inb(EWRK3_CMR);
1896 ioc->len = 1;
1897 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1898 status = -EFAULT;
1899 break;
1900 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1901 if (capable(CAP_NET_ADMIN)) {
1902 lp->txc = 1;
1903 } else {
1904 status = -EPERM;
1905 }
1906
1907 break;
1908 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1909 if (capable(CAP_NET_ADMIN)) {
1910 lp->txc = 0;
1911 } else {
1912 status = -EPERM;
1913 }
1914
1915 break;
1916 default:
1917 status = -EOPNOTSUPP;
1918 }
1919 kfree(tmp);
1920 return status;
1921}
1922
1923#ifdef MODULE
1924static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1925static int ndevs;
1926static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1927
1928/* '21' below should really be 'MAX_NUM_EWRK3S' */
1929module_param_array(io, int, NULL, 0);
1930module_param_array(irq, int, NULL, 0);
1931MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1932MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1933
1934static __exit void ewrk3_exit_module(void)
1935{
1936 int i;
1937
1938 for( i=0; i<ndevs; i++ ) {
1939 struct net_device *dev = ewrk3_devs[i];
1940 struct ewrk3_private *lp = netdev_priv(dev);
1941 ewrk3_devs[i] = NULL;
1942 unregister_netdev(dev);
1943 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1944 iounmap(lp->shmem);
1945 free_netdev(dev);
1946 }
1947}
1948
1949static __init int ewrk3_init_module(void)
1950{
1951 int i=0;
1952
1953 while( io[i] && irq[i] ) {
1954 struct net_device *dev
1955 = alloc_etherdev(sizeof(struct ewrk3_private));
1956
1957 if (!dev)
1958 break;
1959
1960 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1961 free_netdev(dev);
1962 break;
1963 }
1964
1965 ewrk3_devs[ndevs++] = dev;
1966 i++;
1967 }
1968
1969 return ndevs ? 0 : -EIO;
1970}
1971
1972
1973/* Hack for breakage in new module stuff */
1974module_exit(ewrk3_exit_module);
1975module_init(ewrk3_init_module);
1976#endif /* MODULE */
1977MODULE_LICENSE("GPL");
1978
6aa20a22 1979
1da177e4
LT		 1980
1981/*
1982 * Local variables:
1983 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1984 *
1985 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1986 * End:
1987 */
kernel source for telekom puls (alcatel/mediatek)