Commit | Line | Data |
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3273c2e8 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
3 | * Copyright 2005-2006 Fen Systems Ltd. | |
0a6f40c6 | 4 | * Copyright 2006-2010 Solarflare Communications Inc. |
3273c2e8 BH |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
11 | #include <linux/netdevice.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/kernel_stat.h> | |
15 | #include <linux/pci.h> | |
16 | #include <linux/ethtool.h> | |
17 | #include <linux/ip.h> | |
18 | #include <linux/in.h> | |
19 | #include <linux/udp.h> | |
20 | #include <linux/rtnetlink.h> | |
5a0e3ad6 | 21 | #include <linux/slab.h> |
3273c2e8 | 22 | #include "net_driver.h" |
3273c2e8 | 23 | #include "efx.h" |
744093c9 | 24 | #include "nic.h" |
3273c2e8 | 25 | #include "selftest.h" |
3273c2e8 | 26 | #include "workarounds.h" |
3273c2e8 | 27 | |
93e5dfa5 BH |
28 | /* IRQ latency can be enormous because: |
29 | * - All IRQs may be disabled on a CPU for a *long* time by e.g. a | |
30 | * slow serial console or an old IDE driver doing error recovery | |
31 | * - The PREEMPT_RT patches mostly deal with this, but also allow a | |
32 | * tasklet or normal task to be given higher priority than our IRQ | |
33 | * threads | |
34 | * Try to avoid blaming the hardware for this. | |
35 | */ | |
36 | #define IRQ_TIMEOUT HZ | |
37 | ||
3273c2e8 BH |
38 | /* |
39 | * Loopback test packet structure | |
40 | * | |
41 | * The self-test should stress every RSS vector, and unfortunately | |
42 | * Falcon only performs RSS on TCP/UDP packets. | |
43 | */ | |
44 | struct efx_loopback_payload { | |
45 | struct ethhdr header; | |
46 | struct iphdr ip; | |
47 | struct udphdr udp; | |
48 | __be16 iteration; | |
49 | const char msg[64]; | |
ba2d3587 | 50 | } __packed; |
3273c2e8 BH |
51 | |
52 | /* Loopback test source MAC address */ | |
53 | static const unsigned char payload_source[ETH_ALEN] = { | |
54 | 0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b, | |
55 | }; | |
56 | ||
94de803d | 57 | static const char payload_msg[] = |
3273c2e8 BH |
58 | "Hello world! This is an Efx loopback test in progress!"; |
59 | ||
d215697f | 60 | /* Interrupt mode names */ |
61 | static const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX; | |
18e83e4c | 62 | static const char *const efx_interrupt_mode_names[] = { |
d215697f | 63 | [EFX_INT_MODE_MSIX] = "MSI-X", |
64 | [EFX_INT_MODE_MSI] = "MSI", | |
65 | [EFX_INT_MODE_LEGACY] = "legacy", | |
66 | }; | |
67 | #define INT_MODE(efx) \ | |
68 | STRING_TABLE_LOOKUP(efx->interrupt_mode, efx_interrupt_mode) | |
69 | ||
3273c2e8 | 70 | /** |
8c8661e4 | 71 | * efx_loopback_state - persistent state during a loopback selftest |
3273c2e8 BH |
72 | * @flush: Drop all packets in efx_loopback_rx_packet |
73 | * @packet_count: Number of packets being used in this test | |
74 | * @skbs: An array of skbs transmitted | |
f30eb23e | 75 | * @offload_csum: Checksums are being offloaded |
3273c2e8 BH |
76 | * @rx_good: RX good packet count |
77 | * @rx_bad: RX bad packet count | |
78 | * @payload: Payload used in tests | |
79 | */ | |
8c8661e4 | 80 | struct efx_loopback_state { |
dc8cfa55 | 81 | bool flush; |
3273c2e8 BH |
82 | int packet_count; |
83 | struct sk_buff **skbs; | |
dc8cfa55 | 84 | bool offload_csum; |
3273c2e8 BH |
85 | atomic_t rx_good; |
86 | atomic_t rx_bad; | |
87 | struct efx_loopback_payload payload; | |
88 | }; | |
89 | ||
93e5dfa5 BH |
90 | /* How long to wait for all the packets to arrive (in ms) */ |
91 | #define LOOPBACK_TIMEOUT_MS 1000 | |
92 | ||
3273c2e8 BH |
93 | /************************************************************************** |
94 | * | |
8c8661e4 | 95 | * MII, NVRAM and register tests |
3273c2e8 BH |
96 | * |
97 | **************************************************************************/ | |
98 | ||
4f16c073 | 99 | static int efx_test_phy_alive(struct efx_nic *efx, struct efx_self_tests *tests) |
8c8661e4 BH |
100 | { |
101 | int rc = 0; | |
8c8661e4 | 102 | |
4f16c073 BH |
103 | if (efx->phy_op->test_alive) { |
104 | rc = efx->phy_op->test_alive(efx); | |
105 | tests->phy_alive = rc ? -1 : 1; | |
8c8661e4 BH |
106 | } |
107 | ||
8c8661e4 BH |
108 | return rc; |
109 | } | |
110 | ||
111 | static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests) | |
112 | { | |
0aa3fbaa BH |
113 | int rc = 0; |
114 | ||
115 | if (efx->type->test_nvram) { | |
116 | rc = efx->type->test_nvram(efx); | |
117 | tests->nvram = rc ? -1 : 1; | |
118 | } | |
8c8661e4 | 119 | |
8c8661e4 BH |
120 | return rc; |
121 | } | |
122 | ||
123 | static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests) | |
124 | { | |
9bfc4bb1 | 125 | int rc = 0; |
8c8661e4 | 126 | |
9bfc4bb1 BH |
127 | /* Test register access */ |
128 | if (efx->type->test_registers) { | |
129 | rc = efx->type->test_registers(efx); | |
130 | tests->registers = rc ? -1 : 1; | |
131 | } | |
8c8661e4 | 132 | |
8c8661e4 BH |
133 | return rc; |
134 | } | |
3273c2e8 BH |
135 | |
136 | /************************************************************************** | |
137 | * | |
138 | * Interrupt and event queue testing | |
139 | * | |
140 | **************************************************************************/ | |
141 | ||
142 | /* Test generation and receipt of interrupts */ | |
143 | static int efx_test_interrupts(struct efx_nic *efx, | |
144 | struct efx_self_tests *tests) | |
145 | { | |
93e5dfa5 | 146 | unsigned long timeout, wait; |
1646a6f3 BH |
147 | int cpu; |
148 | ||
62776d03 | 149 | netif_dbg(efx, drv, efx->net_dev, "testing interrupts\n"); |
3273c2e8 BH |
150 | tests->interrupt = -1; |
151 | ||
eee6f6a9 | 152 | efx_nic_irq_test_start(efx); |
93e5dfa5 BH |
153 | timeout = jiffies + IRQ_TIMEOUT; |
154 | wait = 1; | |
3273c2e8 BH |
155 | |
156 | /* Wait for arrival of test interrupt. */ | |
62776d03 | 157 | netif_dbg(efx, drv, efx->net_dev, "waiting for test interrupt\n"); |
93e5dfa5 BH |
158 | do { |
159 | schedule_timeout_uninterruptible(wait); | |
eee6f6a9 | 160 | cpu = efx_nic_irq_test_irq_cpu(efx); |
93e5dfa5 BH |
161 | if (cpu >= 0) |
162 | goto success; | |
163 | wait *= 2; | |
164 | } while (time_before(jiffies, timeout)); | |
3273c2e8 | 165 | |
62776d03 | 166 | netif_err(efx, drv, efx->net_dev, "timed out waiting for interrupt\n"); |
3273c2e8 BH |
167 | return -ETIMEDOUT; |
168 | ||
169 | success: | |
62776d03 | 170 | netif_dbg(efx, drv, efx->net_dev, "%s test interrupt seen on CPU%d\n", |
1646a6f3 | 171 | INT_MODE(efx), cpu); |
3273c2e8 BH |
172 | tests->interrupt = 1; |
173 | return 0; | |
174 | } | |
175 | ||
3273c2e8 | 176 | /* Test generation and receipt of interrupting events */ |
ed74f480 | 177 | static int efx_test_eventq_irq(struct efx_nic *efx, |
3273c2e8 BH |
178 | struct efx_self_tests *tests) |
179 | { | |
ed74f480 BH |
180 | struct efx_channel *channel; |
181 | unsigned int read_ptr[EFX_MAX_CHANNELS]; | |
182 | unsigned long napi_ran = 0, dma_pend = 0, int_pend = 0; | |
93e5dfa5 | 183 | unsigned long timeout, wait; |
3273c2e8 | 184 | |
ed74f480 BH |
185 | BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); |
186 | ||
187 | efx_for_each_channel(channel, efx) { | |
188 | read_ptr[channel->channel] = channel->eventq_read_ptr; | |
189 | set_bit(channel->channel, &dma_pend); | |
190 | set_bit(channel->channel, &int_pend); | |
eee6f6a9 | 191 | efx_nic_event_test_start(channel); |
ed74f480 | 192 | } |
3273c2e8 | 193 | |
93e5dfa5 BH |
194 | timeout = jiffies + IRQ_TIMEOUT; |
195 | wait = 1; | |
3273c2e8 | 196 | |
ed74f480 | 197 | /* Wait for arrival of interrupts. NAPI processing may or may |
0fb53faa BH |
198 | * not complete in time, but we can cope in any case. |
199 | */ | |
93e5dfa5 BH |
200 | do { |
201 | schedule_timeout_uninterruptible(wait); | |
202 | ||
ed74f480 BH |
203 | efx_for_each_channel(channel, efx) { |
204 | napi_disable(&channel->napi_str); | |
205 | if (channel->eventq_read_ptr != | |
206 | read_ptr[channel->channel]) { | |
207 | set_bit(channel->channel, &napi_ran); | |
208 | clear_bit(channel->channel, &dma_pend); | |
209 | clear_bit(channel->channel, &int_pend); | |
210 | } else { | |
211 | if (efx_nic_event_present(channel)) | |
212 | clear_bit(channel->channel, &dma_pend); | |
eee6f6a9 | 213 | if (efx_nic_event_test_irq_cpu(channel) >= 0) |
ed74f480 BH |
214 | clear_bit(channel->channel, &int_pend); |
215 | } | |
216 | napi_enable(&channel->napi_str); | |
217 | efx_nic_eventq_read_ack(channel); | |
93e5dfa5 | 218 | } |
93e5dfa5 BH |
219 | |
220 | wait *= 2; | |
ed74f480 | 221 | } while ((dma_pend || int_pend) && time_before(jiffies, timeout)); |
0fb53faa | 222 | |
ed74f480 BH |
223 | efx_for_each_channel(channel, efx) { |
224 | bool dma_seen = !test_bit(channel->channel, &dma_pend); | |
225 | bool int_seen = !test_bit(channel->channel, &int_pend); | |
226 | ||
227 | tests->eventq_dma[channel->channel] = dma_seen ? 1 : -1; | |
228 | tests->eventq_int[channel->channel] = int_seen ? 1 : -1; | |
229 | ||
230 | if (dma_seen && int_seen) { | |
231 | netif_dbg(efx, drv, efx->net_dev, | |
232 | "channel %d event queue passed (with%s NAPI)\n", | |
233 | channel->channel, | |
234 | test_bit(channel->channel, &napi_ran) ? | |
235 | "" : "out"); | |
236 | } else { | |
237 | /* Report failure and whether either interrupt or DMA | |
238 | * worked | |
239 | */ | |
0fb53faa | 240 | netif_err(efx, drv, efx->net_dev, |
ed74f480 | 241 | "channel %d timed out waiting for event queue\n", |
0fb53faa | 242 | channel->channel); |
ed74f480 BH |
243 | if (int_seen) |
244 | netif_err(efx, drv, efx->net_dev, | |
245 | "channel %d saw interrupt " | |
246 | "during event queue test\n", | |
247 | channel->channel); | |
248 | if (dma_seen) | |
249 | netif_err(efx, drv, efx->net_dev, | |
250 | "channel %d event was generated, but " | |
251 | "failed to trigger an interrupt\n", | |
252 | channel->channel); | |
253 | } | |
3273c2e8 | 254 | } |
ed74f480 BH |
255 | |
256 | return (dma_pend || int_pend) ? -ETIMEDOUT : 0; | |
3273c2e8 BH |
257 | } |
258 | ||
1796721a BH |
259 | static int efx_test_phy(struct efx_nic *efx, struct efx_self_tests *tests, |
260 | unsigned flags) | |
3273c2e8 | 261 | { |
8c8661e4 | 262 | int rc; |
3273c2e8 | 263 | |
1796721a | 264 | if (!efx->phy_op->run_tests) |
3273c2e8 | 265 | return 0; |
3273c2e8 | 266 | |
8c8661e4 | 267 | mutex_lock(&efx->mac_lock); |
4f16c073 | 268 | rc = efx->phy_op->run_tests(efx, tests->phy_ext, flags); |
8c8661e4 | 269 | mutex_unlock(&efx->mac_lock); |
8c8661e4 | 270 | return rc; |
3273c2e8 BH |
271 | } |
272 | ||
273 | /************************************************************************** | |
274 | * | |
275 | * Loopback testing | |
276 | * NB Only one loopback test can be executing concurrently. | |
277 | * | |
278 | **************************************************************************/ | |
279 | ||
280 | /* Loopback test RX callback | |
281 | * This is called for each received packet during loopback testing. | |
282 | */ | |
283 | void efx_loopback_rx_packet(struct efx_nic *efx, | |
284 | const char *buf_ptr, int pkt_len) | |
285 | { | |
8c8661e4 | 286 | struct efx_loopback_state *state = efx->loopback_selftest; |
3273c2e8 BH |
287 | struct efx_loopback_payload *received; |
288 | struct efx_loopback_payload *payload; | |
289 | ||
290 | BUG_ON(!buf_ptr); | |
291 | ||
292 | /* If we are just flushing, then drop the packet */ | |
293 | if ((state == NULL) || state->flush) | |
294 | return; | |
295 | ||
296 | payload = &state->payload; | |
8c8661e4 | 297 | |
d3208b5e | 298 | received = (struct efx_loopback_payload *) buf_ptr; |
3273c2e8 | 299 | received->ip.saddr = payload->ip.saddr; |
60ac1065 BH |
300 | if (state->offload_csum) |
301 | received->ip.check = payload->ip.check; | |
302 | ||
3273c2e8 BH |
303 | /* Check that header exists */ |
304 | if (pkt_len < sizeof(received->header)) { | |
62776d03 BH |
305 | netif_err(efx, drv, efx->net_dev, |
306 | "saw runt RX packet (length %d) in %s loopback " | |
307 | "test\n", pkt_len, LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
308 | goto err; |
309 | } | |
310 | ||
311 | /* Check that the ethernet header exists */ | |
312 | if (memcmp(&received->header, &payload->header, ETH_HLEN) != 0) { | |
62776d03 BH |
313 | netif_err(efx, drv, efx->net_dev, |
314 | "saw non-loopback RX packet in %s loopback test\n", | |
315 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
316 | goto err; |
317 | } | |
318 | ||
319 | /* Check packet length */ | |
320 | if (pkt_len != sizeof(*payload)) { | |
62776d03 BH |
321 | netif_err(efx, drv, efx->net_dev, |
322 | "saw incorrect RX packet length %d (wanted %d) in " | |
323 | "%s loopback test\n", pkt_len, (int)sizeof(*payload), | |
324 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
325 | goto err; |
326 | } | |
327 | ||
328 | /* Check that IP header matches */ | |
329 | if (memcmp(&received->ip, &payload->ip, sizeof(payload->ip)) != 0) { | |
62776d03 BH |
330 | netif_err(efx, drv, efx->net_dev, |
331 | "saw corrupted IP header in %s loopback test\n", | |
332 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
333 | goto err; |
334 | } | |
335 | ||
336 | /* Check that msg and padding matches */ | |
337 | if (memcmp(&received->msg, &payload->msg, sizeof(received->msg)) != 0) { | |
62776d03 BH |
338 | netif_err(efx, drv, efx->net_dev, |
339 | "saw corrupted RX packet in %s loopback test\n", | |
340 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
341 | goto err; |
342 | } | |
343 | ||
344 | /* Check that iteration matches */ | |
345 | if (received->iteration != payload->iteration) { | |
62776d03 BH |
346 | netif_err(efx, drv, efx->net_dev, |
347 | "saw RX packet from iteration %d (wanted %d) in " | |
348 | "%s loopback test\n", ntohs(received->iteration), | |
349 | ntohs(payload->iteration), LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
350 | goto err; |
351 | } | |
352 | ||
353 | /* Increase correct RX count */ | |
62776d03 BH |
354 | netif_vdbg(efx, drv, efx->net_dev, |
355 | "got loopback RX in %s loopback test\n", LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
356 | |
357 | atomic_inc(&state->rx_good); | |
358 | return; | |
359 | ||
360 | err: | |
5f3f9d6c | 361 | #ifdef DEBUG |
3273c2e8 | 362 | if (atomic_read(&state->rx_bad) == 0) { |
62776d03 | 363 | netif_err(efx, drv, efx->net_dev, "received packet:\n"); |
3273c2e8 BH |
364 | print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1, |
365 | buf_ptr, pkt_len, 0); | |
62776d03 | 366 | netif_err(efx, drv, efx->net_dev, "expected packet:\n"); |
3273c2e8 BH |
367 | print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1, |
368 | &state->payload, sizeof(state->payload), 0); | |
369 | } | |
370 | #endif | |
371 | atomic_inc(&state->rx_bad); | |
372 | } | |
373 | ||
374 | /* Initialise an efx_selftest_state for a new iteration */ | |
375 | static void efx_iterate_state(struct efx_nic *efx) | |
376 | { | |
8c8661e4 | 377 | struct efx_loopback_state *state = efx->loopback_selftest; |
3273c2e8 BH |
378 | struct net_device *net_dev = efx->net_dev; |
379 | struct efx_loopback_payload *payload = &state->payload; | |
380 | ||
381 | /* Initialise the layerII header */ | |
382 | memcpy(&payload->header.h_dest, net_dev->dev_addr, ETH_ALEN); | |
383 | memcpy(&payload->header.h_source, &payload_source, ETH_ALEN); | |
384 | payload->header.h_proto = htons(ETH_P_IP); | |
385 | ||
386 | /* saddr set later and used as incrementing count */ | |
387 | payload->ip.daddr = htonl(INADDR_LOOPBACK); | |
388 | payload->ip.ihl = 5; | |
389 | payload->ip.check = htons(0xdead); | |
390 | payload->ip.tot_len = htons(sizeof(*payload) - sizeof(struct ethhdr)); | |
391 | payload->ip.version = IPVERSION; | |
392 | payload->ip.protocol = IPPROTO_UDP; | |
393 | ||
394 | /* Initialise udp header */ | |
395 | payload->udp.source = 0; | |
396 | payload->udp.len = htons(sizeof(*payload) - sizeof(struct ethhdr) - | |
397 | sizeof(struct iphdr)); | |
398 | payload->udp.check = 0; /* checksum ignored */ | |
399 | ||
400 | /* Fill out payload */ | |
401 | payload->iteration = htons(ntohs(payload->iteration) + 1); | |
402 | memcpy(&payload->msg, payload_msg, sizeof(payload_msg)); | |
403 | ||
404 | /* Fill out remaining state members */ | |
405 | atomic_set(&state->rx_good, 0); | |
406 | atomic_set(&state->rx_bad, 0); | |
407 | smp_wmb(); | |
408 | } | |
409 | ||
b9aafb0e | 410 | static int efx_begin_loopback(struct efx_tx_queue *tx_queue) |
3273c2e8 BH |
411 | { |
412 | struct efx_nic *efx = tx_queue->efx; | |
8c8661e4 | 413 | struct efx_loopback_state *state = efx->loopback_selftest; |
3273c2e8 BH |
414 | struct efx_loopback_payload *payload; |
415 | struct sk_buff *skb; | |
61357325 SH |
416 | int i; |
417 | netdev_tx_t rc; | |
3273c2e8 BH |
418 | |
419 | /* Transmit N copies of buffer */ | |
420 | for (i = 0; i < state->packet_count; i++) { | |
8c8661e4 | 421 | /* Allocate an skb, holding an extra reference for |
3273c2e8 BH |
422 | * transmit completion counting */ |
423 | skb = alloc_skb(sizeof(state->payload), GFP_KERNEL); | |
424 | if (!skb) | |
425 | return -ENOMEM; | |
426 | state->skbs[i] = skb; | |
427 | skb_get(skb); | |
428 | ||
429 | /* Copy the payload in, incrementing the source address to | |
430 | * exercise the rss vectors */ | |
431 | payload = ((struct efx_loopback_payload *) | |
432 | skb_put(skb, sizeof(state->payload))); | |
433 | memcpy(payload, &state->payload, sizeof(state->payload)); | |
434 | payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2)); | |
435 | ||
436 | /* Ensure everything we've written is visible to the | |
437 | * interrupt handler. */ | |
438 | smp_wmb(); | |
439 | ||
73ba7b68 | 440 | netif_tx_lock_bh(efx->net_dev); |
497f5ba3 | 441 | rc = efx_enqueue_skb(tx_queue, skb); |
73ba7b68 | 442 | netif_tx_unlock_bh(efx->net_dev); |
3273c2e8 BH |
443 | |
444 | if (rc != NETDEV_TX_OK) { | |
62776d03 BH |
445 | netif_err(efx, drv, efx->net_dev, |
446 | "TX queue %d could not transmit packet %d of " | |
447 | "%d in %s loopback test\n", tx_queue->queue, | |
448 | i + 1, state->packet_count, | |
449 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
450 | |
451 | /* Defer cleaning up the other skbs for the caller */ | |
452 | kfree_skb(skb); | |
453 | return -EPIPE; | |
454 | } | |
455 | } | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
b9aafb0e BH |
460 | static int efx_poll_loopback(struct efx_nic *efx) |
461 | { | |
8c8661e4 | 462 | struct efx_loopback_state *state = efx->loopback_selftest; |
b9aafb0e BH |
463 | struct efx_channel *channel; |
464 | ||
465 | /* NAPI polling is not enabled, so process channels | |
466 | * synchronously */ | |
64ee3120 | 467 | efx_for_each_channel(channel, efx) { |
b9aafb0e BH |
468 | if (channel->work_pending) |
469 | efx_process_channel_now(channel); | |
470 | } | |
471 | return atomic_read(&state->rx_good) == state->packet_count; | |
472 | } | |
473 | ||
474 | static int efx_end_loopback(struct efx_tx_queue *tx_queue, | |
475 | struct efx_loopback_self_tests *lb_tests) | |
3273c2e8 BH |
476 | { |
477 | struct efx_nic *efx = tx_queue->efx; | |
8c8661e4 | 478 | struct efx_loopback_state *state = efx->loopback_selftest; |
3273c2e8 BH |
479 | struct sk_buff *skb; |
480 | int tx_done = 0, rx_good, rx_bad; | |
481 | int i, rc = 0; | |
482 | ||
73ba7b68 | 483 | netif_tx_lock_bh(efx->net_dev); |
3273c2e8 BH |
484 | |
485 | /* Count the number of tx completions, and decrement the refcnt. Any | |
486 | * skbs not already completed will be free'd when the queue is flushed */ | |
9c636baf | 487 | for (i = 0; i < state->packet_count; i++) { |
3273c2e8 BH |
488 | skb = state->skbs[i]; |
489 | if (skb && !skb_shared(skb)) | |
490 | ++tx_done; | |
491 | dev_kfree_skb_any(skb); | |
492 | } | |
493 | ||
73ba7b68 | 494 | netif_tx_unlock_bh(efx->net_dev); |
3273c2e8 BH |
495 | |
496 | /* Check TX completion and received packet counts */ | |
497 | rx_good = atomic_read(&state->rx_good); | |
498 | rx_bad = atomic_read(&state->rx_bad); | |
499 | if (tx_done != state->packet_count) { | |
500 | /* Don't free the skbs; they will be picked up on TX | |
501 | * overflow or channel teardown. | |
502 | */ | |
62776d03 BH |
503 | netif_err(efx, drv, efx->net_dev, |
504 | "TX queue %d saw only %d out of an expected %d " | |
505 | "TX completion events in %s loopback test\n", | |
506 | tx_queue->queue, tx_done, state->packet_count, | |
507 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
508 | rc = -ETIMEDOUT; |
509 | /* Allow to fall through so we see the RX errors as well */ | |
510 | } | |
511 | ||
512 | /* We may always be up to a flush away from our desired packet total */ | |
513 | if (rx_good != state->packet_count) { | |
62776d03 BH |
514 | netif_dbg(efx, drv, efx->net_dev, |
515 | "TX queue %d saw only %d out of an expected %d " | |
516 | "received packets in %s loopback test\n", | |
517 | tx_queue->queue, rx_good, state->packet_count, | |
518 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
519 | rc = -ETIMEDOUT; |
520 | /* Fall through */ | |
521 | } | |
522 | ||
523 | /* Update loopback test structure */ | |
524 | lb_tests->tx_sent[tx_queue->queue] += state->packet_count; | |
525 | lb_tests->tx_done[tx_queue->queue] += tx_done; | |
526 | lb_tests->rx_good += rx_good; | |
527 | lb_tests->rx_bad += rx_bad; | |
528 | ||
529 | return rc; | |
530 | } | |
531 | ||
532 | static int | |
533 | efx_test_loopback(struct efx_tx_queue *tx_queue, | |
534 | struct efx_loopback_self_tests *lb_tests) | |
535 | { | |
536 | struct efx_nic *efx = tx_queue->efx; | |
8c8661e4 | 537 | struct efx_loopback_state *state = efx->loopback_selftest; |
b9aafb0e | 538 | int i, begin_rc, end_rc; |
3273c2e8 | 539 | |
8c8661e4 | 540 | for (i = 0; i < 3; i++) { |
3273c2e8 | 541 | /* Determine how many packets to send */ |
ecc910f5 | 542 | state->packet_count = efx->txq_entries / 3; |
3273c2e8 | 543 | state->packet_count = min(1 << (i << 2), state->packet_count); |
c2e4e25a TM |
544 | state->skbs = kcalloc(state->packet_count, |
545 | sizeof(state->skbs[0]), GFP_KERNEL); | |
9b7bfc4c BH |
546 | if (!state->skbs) |
547 | return -ENOMEM; | |
dc8cfa55 | 548 | state->flush = false; |
3273c2e8 | 549 | |
62776d03 BH |
550 | netif_dbg(efx, drv, efx->net_dev, |
551 | "TX queue %d testing %s loopback with %d packets\n", | |
552 | tx_queue->queue, LOOPBACK_MODE(efx), | |
553 | state->packet_count); | |
3273c2e8 BH |
554 | |
555 | efx_iterate_state(efx); | |
b9aafb0e BH |
556 | begin_rc = efx_begin_loopback(tx_queue); |
557 | ||
558 | /* This will normally complete very quickly, but be | |
93e5dfa5 | 559 | * prepared to wait much longer. */ |
b9aafb0e BH |
560 | msleep(1); |
561 | if (!efx_poll_loopback(efx)) { | |
93e5dfa5 | 562 | msleep(LOOPBACK_TIMEOUT_MS); |
b9aafb0e | 563 | efx_poll_loopback(efx); |
3273c2e8 BH |
564 | } |
565 | ||
b9aafb0e | 566 | end_rc = efx_end_loopback(tx_queue, lb_tests); |
3273c2e8 BH |
567 | kfree(state->skbs); |
568 | ||
b9aafb0e | 569 | if (begin_rc || end_rc) { |
3273c2e8 BH |
570 | /* Wait a while to ensure there are no packets |
571 | * floating around after a failure. */ | |
572 | schedule_timeout_uninterruptible(HZ / 10); | |
b9aafb0e | 573 | return begin_rc ? begin_rc : end_rc; |
3273c2e8 BH |
574 | } |
575 | } | |
576 | ||
62776d03 BH |
577 | netif_dbg(efx, drv, efx->net_dev, |
578 | "TX queue %d passed %s loopback test with a burst length " | |
579 | "of %d packets\n", tx_queue->queue, LOOPBACK_MODE(efx), | |
580 | state->packet_count); | |
3273c2e8 | 581 | |
a0c2c190 | 582 | return 0; |
3273c2e8 BH |
583 | } |
584 | ||
78c1f0a0 SH |
585 | /* Wait for link up. On Falcon, we would prefer to rely on efx_monitor, but |
586 | * any contention on the mac lock (via e.g. efx_mac_mcast_work) causes it | |
587 | * to delay and retry. Therefore, it's safer to just poll directly. Wait | |
588 | * for link up and any faults to dissipate. */ | |
589 | static int efx_wait_for_link(struct efx_nic *efx) | |
590 | { | |
591 | struct efx_link_state *link_state = &efx->link_state; | |
901d3fe8 | 592 | int count, link_up_count = 0; |
78c1f0a0 SH |
593 | bool link_up; |
594 | ||
595 | for (count = 0; count < 40; count++) { | |
596 | schedule_timeout_uninterruptible(HZ / 10); | |
597 | ||
598 | if (efx->type->monitor != NULL) { | |
599 | mutex_lock(&efx->mac_lock); | |
600 | efx->type->monitor(efx); | |
601 | mutex_unlock(&efx->mac_lock); | |
602 | } else { | |
f7d12cdc | 603 | struct efx_channel *channel = efx_get_channel(efx, 0); |
78c1f0a0 SH |
604 | if (channel->work_pending) |
605 | efx_process_channel_now(channel); | |
606 | } | |
607 | ||
608 | mutex_lock(&efx->mac_lock); | |
609 | link_up = link_state->up; | |
610 | if (link_up) | |
710b208d | 611 | link_up = !efx->type->check_mac_fault(efx); |
78c1f0a0 SH |
612 | mutex_unlock(&efx->mac_lock); |
613 | ||
901d3fe8 SH |
614 | if (link_up) { |
615 | if (++link_up_count == 2) | |
616 | return 0; | |
617 | } else { | |
618 | link_up_count = 0; | |
619 | } | |
78c1f0a0 SH |
620 | } |
621 | ||
622 | return -ETIMEDOUT; | |
623 | } | |
624 | ||
a5692e49 | 625 | static int efx_test_loopbacks(struct efx_nic *efx, struct efx_self_tests *tests, |
3273c2e8 BH |
626 | unsigned int loopback_modes) |
627 | { | |
8c8661e4 BH |
628 | enum efx_loopback_mode mode; |
629 | struct efx_loopback_state *state; | |
f7d12cdc | 630 | struct efx_channel *channel = efx_get_channel(efx, 0); |
3273c2e8 | 631 | struct efx_tx_queue *tx_queue; |
78c1f0a0 | 632 | int rc = 0; |
3273c2e8 | 633 | |
8c8661e4 BH |
634 | /* Set the port loopback_selftest member. From this point on |
635 | * all received packets will be dropped. Mark the state as | |
636 | * "flushing" so all inflight packets are dropped */ | |
637 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
638 | if (state == NULL) | |
639 | return -ENOMEM; | |
640 | BUG_ON(efx->loopback_selftest); | |
641 | state->flush = true; | |
642 | efx->loopback_selftest = state; | |
3273c2e8 BH |
643 | |
644 | /* Test all supported loopback modes */ | |
8c8661e4 | 645 | for (mode = LOOPBACK_NONE; mode <= LOOPBACK_TEST_MAX; mode++) { |
3273c2e8 BH |
646 | if (!(loopback_modes & (1 << mode))) |
647 | continue; | |
648 | ||
649 | /* Move the port into the specified loopback mode. */ | |
dc8cfa55 | 650 | state->flush = true; |
78c1f0a0 | 651 | mutex_lock(&efx->mac_lock); |
3273c2e8 | 652 | efx->loopback_mode = mode; |
78c1f0a0 SH |
653 | rc = __efx_reconfigure_port(efx); |
654 | mutex_unlock(&efx->mac_lock); | |
655 | if (rc) { | |
62776d03 BH |
656 | netif_err(efx, drv, efx->net_dev, |
657 | "unable to move into %s loopback\n", | |
658 | LOOPBACK_MODE(efx)); | |
78c1f0a0 SH |
659 | goto out; |
660 | } | |
3273c2e8 | 661 | |
78c1f0a0 SH |
662 | rc = efx_wait_for_link(efx); |
663 | if (rc) { | |
62776d03 BH |
664 | netif_err(efx, drv, efx->net_dev, |
665 | "loopback %s never came up\n", | |
666 | LOOPBACK_MODE(efx)); | |
3273c2e8 BH |
667 | goto out; |
668 | } | |
669 | ||
94b274bf | 670 | /* Test all enabled types of TX queue */ |
f7d12cdc | 671 | efx_for_each_channel_tx_queue(tx_queue, channel) { |
a4900ac9 BH |
672 | state->offload_csum = (tx_queue->queue & |
673 | EFX_TXQ_TYPE_OFFLOAD); | |
f8ea0b67 BH |
674 | rc = efx_test_loopback(tx_queue, |
675 | &tests->loopback[mode]); | |
3273c2e8 BH |
676 | if (rc) |
677 | goto out; | |
678 | } | |
679 | } | |
680 | ||
681 | out: | |
8c8661e4 | 682 | /* Remove the flush. The caller will remove the loopback setting */ |
dc8cfa55 | 683 | state->flush = true; |
8c8661e4 BH |
684 | efx->loopback_selftest = NULL; |
685 | wmb(); | |
686 | kfree(state); | |
3273c2e8 BH |
687 | |
688 | return rc; | |
689 | } | |
690 | ||
691 | /************************************************************************** | |
692 | * | |
2ef3068e | 693 | * Entry point |
3273c2e8 BH |
694 | * |
695 | *************************************************************************/ | |
696 | ||
2ef3068e BH |
697 | int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests, |
698 | unsigned flags) | |
3273c2e8 | 699 | { |
2ef3068e BH |
700 | enum efx_loopback_mode loopback_mode = efx->loopback_mode; |
701 | int phy_mode = efx->phy_mode; | |
4b988280 | 702 | enum reset_type reset_method = RESET_TYPE_INVISIBLE; |
2ef3068e BH |
703 | int rc_test = 0, rc_reset = 0, rc; |
704 | ||
dd40781e BH |
705 | efx_selftest_async_cancel(efx); |
706 | ||
2ef3068e BH |
707 | /* Online (i.e. non-disruptive) testing |
708 | * This checks interrupt generation, event delivery and PHY presence. */ | |
8c8661e4 | 709 | |
4f16c073 | 710 | rc = efx_test_phy_alive(efx, tests); |
2ef3068e BH |
711 | if (rc && !rc_test) |
712 | rc_test = rc; | |
8c8661e4 BH |
713 | |
714 | rc = efx_test_nvram(efx, tests); | |
2ef3068e BH |
715 | if (rc && !rc_test) |
716 | rc_test = rc; | |
3273c2e8 | 717 | |
f8ea0b67 | 718 | rc = efx_test_interrupts(efx, tests); |
2ef3068e BH |
719 | if (rc && !rc_test) |
720 | rc_test = rc; | |
8c8661e4 | 721 | |
ed74f480 BH |
722 | rc = efx_test_eventq_irq(efx, tests); |
723 | if (rc && !rc_test) | |
724 | rc_test = rc; | |
8c8661e4 | 725 | |
2ef3068e BH |
726 | if (rc_test) |
727 | return rc_test; | |
3273c2e8 | 728 | |
2ef3068e | 729 | if (!(flags & ETH_TEST_FL_OFFLINE)) |
1796721a | 730 | return efx_test_phy(efx, tests, flags); |
2ef3068e BH |
731 | |
732 | /* Offline (i.e. disruptive) testing | |
733 | * This checks MAC and PHY loopback on the specified port. */ | |
8c8661e4 | 734 | |
e4abce85 BH |
735 | /* Detach the device so the kernel doesn't transmit during the |
736 | * loopback test and the watchdog timeout doesn't fire. | |
8c8661e4 | 737 | */ |
e4abce85 BH |
738 | netif_device_detach(efx->net_dev); |
739 | ||
8c8661e4 | 740 | mutex_lock(&efx->mac_lock); |
6f158d5f BH |
741 | if (efx->loopback_modes) { |
742 | /* We need the 312 clock from the PHY to test the XMAC | |
743 | * registers, so move into XGMII loopback if available */ | |
744 | if (efx->loopback_modes & (1 << LOOPBACK_XGMII)) | |
745 | efx->loopback_mode = LOOPBACK_XGMII; | |
746 | else | |
747 | efx->loopback_mode = __ffs(efx->loopback_modes); | |
748 | } | |
749 | ||
8c8661e4 BH |
750 | __efx_reconfigure_port(efx); |
751 | mutex_unlock(&efx->mac_lock); | |
752 | ||
753 | /* free up all consumers of SRAM (including all the queues) */ | |
d3245b28 | 754 | efx_reset_down(efx, reset_method); |
8c8661e4 BH |
755 | |
756 | rc = efx_test_chip(efx, tests); | |
2ef3068e BH |
757 | if (rc && !rc_test) |
758 | rc_test = rc; | |
8c8661e4 BH |
759 | |
760 | /* reset the chip to recover from the register test */ | |
ef2b90ee | 761 | rc_reset = efx->type->reset(efx, reset_method); |
8c8661e4 | 762 | |
a5692e49 BH |
763 | /* Ensure that the phy is powered and out of loopback |
764 | * for the bist and loopback tests */ | |
765 | efx->phy_mode &= ~PHY_MODE_LOW_POWER; | |
8c8661e4 | 766 | efx->loopback_mode = LOOPBACK_NONE; |
3273c2e8 | 767 | |
d3245b28 | 768 | rc = efx_reset_up(efx, reset_method, rc_reset == 0); |
2ef3068e BH |
769 | if (rc && !rc_reset) |
770 | rc_reset = rc; | |
771 | ||
772 | if (rc_reset) { | |
62776d03 BH |
773 | netif_err(efx, drv, efx->net_dev, |
774 | "Unable to recover from chip test\n"); | |
8c8661e4 | 775 | efx_schedule_reset(efx, RESET_TYPE_DISABLE); |
2ef3068e | 776 | return rc_reset; |
8c8661e4 | 777 | } |
3273c2e8 | 778 | |
1796721a | 779 | rc = efx_test_phy(efx, tests, flags); |
2ef3068e BH |
780 | if (rc && !rc_test) |
781 | rc_test = rc; | |
3273c2e8 | 782 | |
2ef3068e BH |
783 | rc = efx_test_loopbacks(efx, tests, efx->loopback_modes); |
784 | if (rc && !rc_test) | |
785 | rc_test = rc; | |
3273c2e8 | 786 | |
8c8661e4 | 787 | /* restore the PHY to the previous state */ |
d3245b28 | 788 | mutex_lock(&efx->mac_lock); |
8c8661e4 | 789 | efx->phy_mode = phy_mode; |
d3245b28 BH |
790 | efx->loopback_mode = loopback_mode; |
791 | __efx_reconfigure_port(efx); | |
792 | mutex_unlock(&efx->mac_lock); | |
8c8661e4 | 793 | |
e4abce85 | 794 | netif_device_attach(efx->net_dev); |
9d1aea62 | 795 | |
2ef3068e | 796 | return rc_test; |
3273c2e8 BH |
797 | } |
798 | ||
dd40781e BH |
799 | void efx_selftest_async_start(struct efx_nic *efx) |
800 | { | |
801 | struct efx_channel *channel; | |
802 | ||
803 | efx_for_each_channel(channel, efx) | |
804 | efx_nic_event_test_start(channel); | |
805 | schedule_delayed_work(&efx->selftest_work, IRQ_TIMEOUT); | |
806 | } | |
807 | ||
808 | void efx_selftest_async_cancel(struct efx_nic *efx) | |
809 | { | |
810 | cancel_delayed_work_sync(&efx->selftest_work); | |
811 | } | |
812 | ||
813 | void efx_selftest_async_work(struct work_struct *data) | |
814 | { | |
815 | struct efx_nic *efx = container_of(data, struct efx_nic, | |
816 | selftest_work.work); | |
817 | struct efx_channel *channel; | |
818 | int cpu; | |
819 | ||
820 | efx_for_each_channel(channel, efx) { | |
821 | cpu = efx_nic_event_test_irq_cpu(channel); | |
822 | if (cpu < 0) | |
823 | netif_err(efx, ifup, efx->net_dev, | |
824 | "channel %d failed to trigger an interrupt\n", | |
825 | channel->channel); | |
826 | else | |
827 | netif_dbg(efx, ifup, efx->net_dev, | |
828 | "channel %d triggered interrupt on CPU %d\n", | |
829 | channel->channel, cpu); | |
830 | } | |
831 | } |