[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / sfc / nic.h

/****************************************************************************
 * Driver for Solarflare Solarstorm network controllers and boards
 * Copyright 2005-2006 Fen Systems Ltd.
 * Copyright 2006-2011 Solarflare Communications Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation, incorporated herein by reference.
 */

#ifndef EFX_NIC_H
#define EFX_NIC_H

#include <linux/i2c-algo-bit.h>
#include "net_driver.h"
#include "efx.h"
#include "mcdi.h"
#include "spi.h"

/*
 * Falcon hardware control
 */

enum {
	EFX_REV_FALCON_A0 = 0,
	EFX_REV_FALCON_A1 = 1,
	EFX_REV_FALCON_B0 = 2,
	EFX_REV_SIENA_A0 = 3,
};

static inline int efx_nic_rev(struct efx_nic *efx)
{
	return efx->type->revision;
}

extern u32 efx_nic_fpga_ver(struct efx_nic *efx);

/* NIC has two interlinked PCI functions for the same port. */
static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
{
	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
}

enum {
	PHY_TYPE_NONE = 0,
	PHY_TYPE_TXC43128 = 1,
	PHY_TYPE_88E1111 = 2,
	PHY_TYPE_SFX7101 = 3,
	PHY_TYPE_QT2022C2 = 4,
	PHY_TYPE_PM8358 = 6,
	PHY_TYPE_SFT9001A = 8,
	PHY_TYPE_QT2025C = 9,
	PHY_TYPE_SFT9001B = 10,
};

#define FALCON_XMAC_LOOPBACKS			\
	((1 << LOOPBACK_XGMII) |		\
	 (1 << LOOPBACK_XGXS) |			\
	 (1 << LOOPBACK_XAUI))

#define FALCON_GMAC_LOOPBACKS			\
	(1 << LOOPBACK_GMAC)

/* Alignment of PCIe DMA boundaries (4KB) */
#define EFX_PAGE_SIZE	4096
/* Size and alignment of buffer table entries (same) */
#define EFX_BUF_SIZE	EFX_PAGE_SIZE

/**
 * struct falcon_board_type - board operations and type information
 * @id: Board type id, as found in NVRAM
 * @init: Allocate resources and initialise peripheral hardware
 * @init_phy: Do board-specific PHY initialisation
 * @fini: Shut down hardware and free resources
 * @set_id_led: Set state of identifying LED or revert to automatic function
 * @monitor: Board-specific health check function
 */
struct falcon_board_type {
	u8 id;
	int (*init) (struct efx_nic *nic);
	void (*init_phy) (struct efx_nic *efx);
	void (*fini) (struct efx_nic *nic);
	void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
	int (*monitor) (struct efx_nic *nic);
};

/**
 * struct falcon_board - board information
 * @type: Type of board
 * @major: Major rev. ('A', 'B' ...)
 * @minor: Minor rev. (0, 1, ...)
 * @i2c_adap: I2C adapter for on-board peripherals
 * @i2c_data: Data for bit-banging algorithm
 * @hwmon_client: I2C client for hardware monitor
 * @ioexp_client: I2C client for power/port control
 */
struct falcon_board {
	const struct falcon_board_type *type;
	int major;
	int minor;
	struct i2c_adapter i2c_adap;
	struct i2c_algo_bit_data i2c_data;
	struct i2c_client *hwmon_client, *ioexp_client;
};

/**
 * struct falcon_nic_data - Falcon NIC state
 * @pci_dev2: Secondary function of Falcon A
 * @board: Board state and functions
 * @stats_disable_count: Nest count for disabling statistics fetches
 * @stats_pending: Is there a pending DMA of MAC statistics.
 * @stats_timer: A timer for regularly fetching MAC statistics.
 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
 * @spi_flash: SPI flash device
 * @spi_eeprom: SPI EEPROM device
 * @spi_lock: SPI bus lock
 * @mdio_lock: MDIO bus lock
 * @xmac_poll_required: XMAC link state needs polling
 */
struct falcon_nic_data {
	struct pci_dev *pci_dev2;
	struct falcon_board board;
	unsigned int stats_disable_count;
	bool stats_pending;
	struct timer_list stats_timer;
	u32 *stats_dma_done;
	struct efx_spi_device spi_flash;
	struct efx_spi_device spi_eeprom;
	struct mutex spi_lock;
	struct mutex mdio_lock;
	bool xmac_poll_required;
};

static inline struct falcon_board *falcon_board(struct efx_nic *efx)
{
	struct falcon_nic_data *data = efx->nic_data;
	return &data->board;
}

/**
 * struct siena_nic_data - Siena NIC state
 * @mcdi: Management-Controller-to-Driver Interface
 * @wol_filter_id: Wake-on-LAN packet filter id
 * @hwmon: Hardware monitor state
 */
struct siena_nic_data {
	struct efx_mcdi_iface mcdi;
	int wol_filter_id;
#ifdef CONFIG_SFC_MCDI_MON
	struct efx_mcdi_mon hwmon;
#endif
};

#ifdef CONFIG_SFC_MCDI_MON
static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
{
	struct siena_nic_data *nic_data;
	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	nic_data = efx->nic_data;
	return &nic_data->hwmon;
}
#endif

/*
 * On the SFC9000 family each port is associated with 1 PCI physical
 * function (PF) handled by sfc and a configurable number of virtual
 * functions (VFs) that may be handled by some other driver, often in
 * a VM guest.  The queue pointer registers are mapped in both PF and
 * VF BARs such that an 8K region provides access to a single RX, TX
 * and event queue (collectively a Virtual Interface, VI or VNIC).
 *
 * The PF has access to all 1024 VIs while VFs are mapped to VIs
 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
 * The number of VIs and the VI_SCALE value are configurable but must
 * be established at boot time by firmware.
 */

/* Maximum VI_SCALE parameter supported by Siena */
#define EFX_VI_SCALE_MAX 6
/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
 * so this is the smallest allowed value. */
#define EFX_VI_BASE 128U
/* Maximum number of VFs allowed */
#define EFX_VF_COUNT_MAX 127
/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
#define EFX_MAX_VF_EVQ_SIZE 8192UL
/* The number of buffer table entries reserved for each VI on a VF */
#define EFX_VF_BUFTBL_PER_VI					\
	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *	\
	 sizeof(efx_qword_t) / EFX_BUF_SIZE)

#ifdef CONFIG_SFC_SRIOV

static inline bool efx_sriov_wanted(struct efx_nic *efx)
{
	return efx->vf_count != 0;
}
static inline bool efx_sriov_enabled(struct efx_nic *efx)
{
	return efx->vf_init_count != 0;
}
static inline unsigned int efx_vf_size(struct efx_nic *efx)
{
	return 1 << efx->vi_scale;
}

extern int efx_init_sriov(void);
extern void efx_sriov_probe(struct efx_nic *efx);
extern int efx_sriov_init(struct efx_nic *efx);
extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
extern void efx_sriov_reset(struct efx_nic *efx);
extern void efx_sriov_fini(struct efx_nic *efx);
extern void efx_fini_sriov(void);

#else

static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }

static inline int efx_init_sriov(void) { return 0; }
static inline void efx_sriov_probe(struct efx_nic *efx) {}
static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_event(struct efx_channel *channel,
				   efx_qword_t *event) {}
static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
static inline void efx_sriov_reset(struct efx_nic *efx) {}
static inline void efx_sriov_fini(struct efx_nic *efx) {}
static inline void efx_fini_sriov(void) {}

#endif

extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
				 u16 vlan, u8 qos);
extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
				   struct ifla_vf_info *ivf);
extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
				     bool spoofchk);

extern const struct efx_nic_type falcon_a1_nic_type;
extern const struct efx_nic_type falcon_b0_nic_type;
extern const struct efx_nic_type siena_a0_nic_type;

/**************************************************************************
 *
 * Externs
 *
 **************************************************************************
 */

extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);

/* TX data path */
extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);

/* RX data path */
extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);

/* Event data path */
extern int efx_nic_probe_eventq(struct efx_channel *channel);
extern void efx_nic_init_eventq(struct efx_channel *channel);
extern void efx_nic_fini_eventq(struct efx_channel *channel);
extern void efx_nic_remove_eventq(struct efx_channel *channel);
extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
extern bool efx_nic_event_present(struct efx_channel *channel);

/* MAC/PHY */
extern void falcon_drain_tx_fifo(struct efx_nic *efx);
extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
extern bool falcon_xmac_check_fault(struct efx_nic *efx);
extern int falcon_reconfigure_xmac(struct efx_nic *efx);
extern void falcon_update_stats_xmac(struct efx_nic *efx);

/* Interrupts and test events */
extern int efx_nic_init_interrupt(struct efx_nic *efx);
extern void efx_nic_enable_interrupts(struct efx_nic *efx);
extern void efx_nic_event_test_start(struct efx_channel *channel);
extern void efx_nic_irq_test_start(struct efx_nic *efx);
extern void efx_nic_disable_interrupts(struct efx_nic *efx);
extern void efx_nic_fini_interrupt(struct efx_nic *efx);
extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
extern void falcon_irq_ack_a1(struct efx_nic *efx);

static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
{
	return ACCESS_ONCE(channel->event_test_cpu);
}
static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
{
	return ACCESS_ONCE(efx->last_irq_cpu);
}

/* Global Resources */
extern int efx_nic_flush_queues(struct efx_nic *efx);
extern void falcon_start_nic_stats(struct efx_nic *efx);
extern void falcon_stop_nic_stats(struct efx_nic *efx);
extern void falcon_setup_xaui(struct efx_nic *efx);
extern int falcon_reset_xaui(struct efx_nic *efx);
extern void
efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
extern void efx_nic_init_common(struct efx_nic *efx);
extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);

int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
			 unsigned int len);
void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);

/* Tests */
struct efx_nic_register_test {
	unsigned address;
	efx_oword_t mask;
};
extern int efx_nic_test_registers(struct efx_nic *efx,
				  const struct efx_nic_register_test *regs,
				  size_t n_regs);

extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);

/**************************************************************************
 *
 * Falcon MAC stats
 *
 **************************************************************************
 */

#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)

/* Retrieve statistic from statistics block */
#define FALCON_STAT(efx, falcon_stat, efx_stat) do {		\
	if (FALCON_STAT_WIDTH(falcon_stat) == 16)		\
		(efx)->mac_stats.efx_stat += le16_to_cpu(	\
			*((__force __le16 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else if (FALCON_STAT_WIDTH(falcon_stat) == 32)		\
		(efx)->mac_stats.efx_stat += le32_to_cpu(	\
			*((__force __le32 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else							\
		(efx)->mac_stats.efx_stat += le64_to_cpu(	\
			*((__force __le64 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	} while (0)

#define FALCON_MAC_STATS_SIZE 0x100

#define MAC_DATA_LBN 0
#define MAC_DATA_WIDTH 32

extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
			       efx_qword_t *event);

extern void falcon_poll_xmac(struct efx_nic *efx);

#endif /* EFX_NIC_H */
Commit	Line	Data
8ceee660 BH	1	/****************************************************************************
	2	* Driver for Solarflare Solarstorm network controllers and boards
	3	* Copyright 2005-2006 Fen Systems Ltd.
0a6f40c6	4	* Copyright 2006-2011 Solarflare Communications Inc.
8ceee660 BH	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License version 2 as published
	8	* by the Free Software Foundation, incorporated herein by reference.
	9	*/
	10
744093c9 BH	11	#ifndef EFX_NIC_H
744093c9 BH	12	#define EFX_NIC_H
8ceee660	13
5c16a96c	14	#include <linux/i2c-algo-bit.h>
8ceee660	15	#include "net_driver.h"
177dfcd8	16	#include "efx.h"
8880f4ec	17	#include "mcdi.h"
4de92180	18	#include "spi.h"
8ceee660 BH	19
	20	/*
	21	* Falcon hardware control
	22	*/
	23
daeda630 BH	24	enum {
	25	EFX_REV_FALCON_A0 = 0,
	26	EFX_REV_FALCON_A1 = 1,
	27	EFX_REV_FALCON_B0 = 2,
8880f4ec	28	EFX_REV_SIENA_A0 = 3,
8ceee660 BH	29	};
8ceee660 BH	30
daeda630	31	static inline int efx_nic_rev(struct efx_nic *efx)
55668611	32	{
daeda630	33	return efx->type->revision;
55668611	34	}
8ceee660	35
152b6a62 BH	36	extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
	37
	38	/* NIC has two interlinked PCI functions for the same port. */
	39	static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
	40	{
	41	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
	42	}
	43
c1c4f453 BH	44	enum {
	45	PHY_TYPE_NONE = 0,
	46	PHY_TYPE_TXC43128 = 1,
	47	PHY_TYPE_88E1111 = 2,
	48	PHY_TYPE_SFX7101 = 3,
	49	PHY_TYPE_QT2022C2 = 4,
	50	PHY_TYPE_PM8358 = 6,
	51	PHY_TYPE_SFT9001A = 8,
	52	PHY_TYPE_QT2025C = 9,
	53	PHY_TYPE_SFT9001B = 10,
	54	};
	55
	56	#define FALCON_XMAC_LOOPBACKS \
	57	((1 << LOOPBACK_XGMII) \| \
	58	(1 << LOOPBACK_XGXS) \| \
	59	(1 << LOOPBACK_XAUI))
	60
	61	#define FALCON_GMAC_LOOPBACKS \
	62	(1 << LOOPBACK_GMAC)
	63
5b6262d0 BH	64	/* Alignment of PCIe DMA boundaries (4KB) */
	65	#define EFX_PAGE_SIZE 4096
	66	/* Size and alignment of buffer table entries (same) */
	67	#define EFX_BUF_SIZE EFX_PAGE_SIZE
	68
3759433d	69	/**
44838a44 BH	70	* struct falcon_board_type - board operations and type information
44838a44 BH	71	* @id: Board type id, as found in NVRAM
3759433d BH	72	* @init: Allocate resources and initialise peripheral hardware
3759433d BH	73	* @init_phy: Do board-specific PHY initialisation
44838a44	74	* @fini: Shut down hardware and free resources
3759433d BH	75	* @set_id_led: Set state of identifying LED or revert to automatic function
3759433d BH	76	* @monitor: Board-specific health check function
44838a44 BH	77	*/
	78	struct falcon_board_type {
	79	u8 id;
44838a44 BH	80	int (init) (struct efx_nic nic);
	81	void (init_phy) (struct efx_nic efx);
	82	void (fini) (struct efx_nic nic);
	83	void (set_id_led) (struct efx_nic efx, enum efx_led_mode mode);
	84	int (monitor) (struct efx_nic nic);
	85	};
	86
	87	/**
	88	* struct falcon_board - board information
	89	* @type: Type of board
	90	* @major: Major rev. ('A', 'B' ...)
	91	* @minor: Minor rev. (0, 1, ...)
e775fb93 BH	92	* @i2c_adap: I2C adapter for on-board peripherals
e775fb93 BH	93	* @i2c_data: Data for bit-banging algorithm
3759433d BH	94	* @hwmon_client: I2C client for hardware monitor
	95	* @ioexp_client: I2C client for power/port control
	96	*/
	97	struct falcon_board {
44838a44	98	const struct falcon_board_type *type;
3759433d BH	99	int major;
3759433d BH	100	int minor;
e775fb93 BH	101	struct i2c_adapter i2c_adap;
e775fb93 BH	102	struct i2c_algo_bit_data i2c_data;
3759433d BH	103	struct i2c_client hwmon_client, ioexp_client;
	104	};
	105
5c16a96c BH	106	/**
5c16a96c BH	107	* struct falcon_nic_data - Falcon NIC state
8986352a	108	* @pci_dev2: Secondary function of Falcon A
3759433d	109	* @board: Board state and functions
55edc6e6 BH	110	* @stats_disable_count: Nest count for disabling statistics fetches
	111	* @stats_pending: Is there a pending DMA of MAC statistics.
	112	* @stats_timer: A timer for regularly fetching MAC statistics.
	113	* @stats_dma_done: Pointer to the flag which indicates DMA completion.
4de92180 BH	114	* @spi_flash: SPI flash device
	115	* @spi_eeprom: SPI EEPROM device
	116	* @spi_lock: SPI bus lock
4833f02a	117	* @mdio_lock: MDIO bus lock
cef68bde	118	* @xmac_poll_required: XMAC link state needs polling
5c16a96c BH	119	*/
	120	struct falcon_nic_data {
	121	struct pci_dev *pci_dev2;
3759433d	122	struct falcon_board board;
55edc6e6 BH	123	unsigned int stats_disable_count;
	124	bool stats_pending;
	125	struct timer_list stats_timer;
	126	u32 *stats_dma_done;
4de92180 BH	127	struct efx_spi_device spi_flash;
	128	struct efx_spi_device spi_eeprom;
	129	struct mutex spi_lock;
4833f02a	130	struct mutex mdio_lock;
cef68bde	131	bool xmac_poll_required;
5c16a96c BH	132	};
5c16a96c BH	133
278c0621 BH	134	static inline struct falcon_board falcon_board(struct efx_nic efx)
278c0621 BH	135	{
3759433d BH	136	struct falcon_nic_data *data = efx->nic_data;
3759433d BH	137	return &data->board;
278c0621 BH	138	}
278c0621 BH	139
8880f4ec BH	140	/**
8880f4ec BH	141	* struct siena_nic_data - Siena NIC state
8880f4ec BH	142	* @mcdi: Management-Controller-to-Driver Interface
8880f4ec BH	143	* @wol_filter_id: Wake-on-LAN packet filter id
55c5e0f8	144	* @hwmon: Hardware monitor state
8880f4ec BH	145	*/
8880f4ec BH	146	struct siena_nic_data {
8880f4ec BH	147	struct efx_mcdi_iface mcdi;
8880f4ec BH	148	int wol_filter_id;
55c5e0f8 BH	149	#ifdef CONFIG_SFC_MCDI_MON
	150	struct efx_mcdi_mon hwmon;
	151	#endif
8880f4ec BH	152	};
8880f4ec BH	153
55c5e0f8 BH	154	#ifdef CONFIG_SFC_MCDI_MON
	155	static inline struct efx_mcdi_mon efx_mcdi_mon(struct efx_nic efx)
	156	{
	157	struct siena_nic_data *nic_data;
	158	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	159	nic_data = efx->nic_data;
	160	return &nic_data->hwmon;
	161	}
	162	#endif
	163
cd2d5b52 BH	164	/*
	165	* On the SFC9000 family each port is associated with 1 PCI physical
	166	* function (PF) handled by sfc and a configurable number of virtual
	167	* functions (VFs) that may be handled by some other driver, often in
	168	* a VM guest. The queue pointer registers are mapped in both PF and
	169	* VF BARs such that an 8K region provides access to a single RX, TX
	170	* and event queue (collectively a Virtual Interface, VI or VNIC).
	171	*
	172	* The PF has access to all 1024 VIs while VFs are mapped to VIs
	173	* according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
	174	* in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
	175	* The number of VIs and the VI_SCALE value are configurable but must
	176	* be established at boot time by firmware.
	177	*/
	178
	179	/* Maximum VI_SCALE parameter supported by Siena */
	180	#define EFX_VI_SCALE_MAX 6
	181	/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
	182	* so this is the smallest allowed value. */
	183	#define EFX_VI_BASE 128U
	184	/* Maximum number of VFs allowed */
	185	#define EFX_VF_COUNT_MAX 127
	186	/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
	187	#define EFX_MAX_VF_EVQ_SIZE 8192UL
	188	/* The number of buffer table entries reserved for each VI on a VF */
	189	#define EFX_VF_BUFTBL_PER_VI \
	190	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
	191	sizeof(efx_qword_t) / EFX_BUF_SIZE)
	192
	193	#ifdef CONFIG_SFC_SRIOV
	194
	195	static inline bool efx_sriov_wanted(struct efx_nic *efx)
	196	{
	197	return efx->vf_count != 0;
	198	}
	199	static inline bool efx_sriov_enabled(struct efx_nic *efx)
	200	{
	201	return efx->vf_init_count != 0;
	202	}
	203	static inline unsigned int efx_vf_size(struct efx_nic *efx)
	204	{
	205	return 1 << efx->vi_scale;
	206	}
	207
	208	extern int efx_init_sriov(void);
	209	extern void efx_sriov_probe(struct efx_nic *efx);
	210	extern int efx_sriov_init(struct efx_nic *efx);
	211	extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
	212	extern void efx_sriov_tx_flush_done(struct efx_nic efx, efx_qword_t event);
	213	extern void efx_sriov_rx_flush_done(struct efx_nic efx, efx_qword_t event);
	214	extern void efx_sriov_event(struct efx_channel channel, efx_qword_t event);
	215	extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
	216	extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
	217	extern void efx_sriov_reset(struct efx_nic *efx);
	218	extern void efx_sriov_fini(struct efx_nic *efx);
	219	extern void efx_fini_sriov(void);
	220
	221	#else
	222
	223	static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
	224	static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
	225	static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
	226
	227	static inline int efx_init_sriov(void) { return 0; }
228	static inline void efx_sriov_probe(struct efx_nic *efx) {}
229	static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
230	static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
231	static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
232	efx_qword_t *event) {}
233	static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
234	efx_qword_t *event) {}
235	static inline void efx_sriov_event(struct efx_channel *channel,
236	efx_qword_t *event) {}
237	static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
238	static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
239	static inline void efx_sriov_reset(struct efx_nic *efx) {}
240	static inline void efx_sriov_fini(struct efx_nic *efx) {}
241	static inline void efx_fini_sriov(void) {}
242
243	#endif
244
245	extern int efx_sriov_set_vf_mac(struct net_device dev, int vf, u8 mac);
246	extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
247	u16 vlan, u8 qos);
248	extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
249	struct ifla_vf_info *ivf);
250	extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
251	bool spoofchk);
252
6c8c2513	253	extern const struct efx_nic_type falcon_a1_nic_type;
	254	extern const struct efx_nic_type falcon_b0_nic_type;
	255	extern const struct efx_nic_type siena_a0_nic_type;
8ceee660 BH	256
	257	/**************************************************************************
	258	*
	259	* Externs
	260	*
	261	**************************************************************************
	262	*/
	263
e41c11ee	264	extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
5087b54d	265
8ceee660	266	/* TX data path */
152b6a62 BH	267	extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
	268	extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
	269	extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
	270	extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
	271	extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
8ceee660 BH	272
8ceee660 BH	273	/* RX data path */
152b6a62 BH	274	extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
	275	extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
	276	extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
	277	extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
	278	extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
2ae75dac	279	extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
8ceee660 BH	280
8ceee660 BH	281	/* Event data path */
152b6a62 BH	282	extern int efx_nic_probe_eventq(struct efx_channel *channel);
	283	extern void efx_nic_init_eventq(struct efx_channel *channel);
	284	extern void efx_nic_fini_eventq(struct efx_channel *channel);
	285	extern void efx_nic_remove_eventq(struct efx_channel *channel);
	286	extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
	287	extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
d4fabcc8	288	extern bool efx_nic_event_present(struct efx_channel *channel);
8ceee660	289
8ceee660	290	/* MAC/PHY */
8ceee660	291	extern void falcon_drain_tx_fifo(struct efx_nic *efx);
8ceee660	292	extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
710b208d BH	293	extern bool falcon_xmac_check_fault(struct efx_nic *efx);
	294	extern int falcon_reconfigure_xmac(struct efx_nic *efx);
	295	extern void falcon_update_stats_xmac(struct efx_nic *efx);
8ceee660 BH	296
8ceee660 BH	297	/* Interrupts and test events */
152b6a62 BH	298	extern int efx_nic_init_interrupt(struct efx_nic *efx);
152b6a62 BH	299	extern void efx_nic_enable_interrupts(struct efx_nic *efx);
eee6f6a9 BH	300	extern void efx_nic_event_test_start(struct efx_channel *channel);
eee6f6a9 BH	301	extern void efx_nic_irq_test_start(struct efx_nic *efx);
152b6a62 BH	302	extern void efx_nic_disable_interrupts(struct efx_nic *efx);
	303	extern void efx_nic_fini_interrupt(struct efx_nic *efx);
	304	extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
	305	extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
	306	extern void falcon_irq_ack_a1(struct efx_nic *efx);
	307
eee6f6a9 BH	308	static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
eee6f6a9 BH	309	{
dd40781e	310	return ACCESS_ONCE(channel->event_test_cpu);
eee6f6a9 BH	311	}
	312	static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
	313	{
	314	return ACCESS_ONCE(efx->last_irq_cpu);
	315	}
	316
8ceee660	317	/* Global Resources */
152b6a62	318	extern int efx_nic_flush_queues(struct efx_nic *efx);
55edc6e6 BH	319	extern void falcon_start_nic_stats(struct efx_nic *efx);
55edc6e6 BH	320	extern void falcon_stop_nic_stats(struct efx_nic *efx);
b7b40eeb	321	extern void falcon_setup_xaui(struct efx_nic *efx);
8ceee660	322	extern int falcon_reset_xaui(struct efx_nic *efx);
28e47c49 BH	323	extern void
28e47c49 BH	324	efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
152b6a62	325	extern void efx_nic_init_common(struct efx_nic *efx);
765c9f46	326	extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
152b6a62 BH	327
	328	int efx_nic_alloc_buffer(struct efx_nic efx, struct efx_buffer buffer,
	329	unsigned int len);
	330	void efx_nic_free_buffer(struct efx_nic efx, struct efx_buffer buffer);
8ceee660	331
8c8661e4	332	/* Tests */
152b6a62 BH	333	struct efx_nic_register_test {
	334	unsigned address;
	335	efx_oword_t mask;
	336	};
	337	extern int efx_nic_test_registers(struct efx_nic *efx,
	338	const struct efx_nic_register_test *regs,
	339	size_t n_regs);
8c8661e4	340
5b98c1bf BH	341	extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
	342	extern void efx_nic_get_regs(struct efx_nic efx, void buf);
	343
8ceee660 BH	344	/**************************************************************************
	345	*
	346	* Falcon MAC stats
	347	*
	348	**************************************************************************
	349	*/
	350
	351	#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
	352	#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
	353
	354	/* Retrieve statistic from statistics block */
	355	#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
	356	if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
	357	(efx)->mac_stats.efx_stat += le16_to_cpu( \
	358	((__force __le16 ) \
	359	(efx->stats_buffer.addr + \
	360	FALCON_STAT_OFFSET(falcon_stat)))); \
	361	else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
	362	(efx)->mac_stats.efx_stat += le32_to_cpu( \
	363	((__force __le32 ) \
	364	(efx->stats_buffer.addr + \
	365	FALCON_STAT_OFFSET(falcon_stat)))); \
	366	else \
	367	(efx)->mac_stats.efx_stat += le64_to_cpu( \
	368	((__force __le64 ) \
	369	(efx->stats_buffer.addr + \
	370	FALCON_STAT_OFFSET(falcon_stat)))); \
	371	} while (0)
	372
	373	#define FALCON_MAC_STATS_SIZE 0x100
	374
	375	#define MAC_DATA_LBN 0
	376	#define MAC_DATA_WIDTH 32
	377
90893000 BH	378	extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
90893000 BH	379	efx_qword_t *event);
8ceee660	380
9007b9fa BH	381	extern void falcon_poll_xmac(struct efx_nic *efx);
9007b9fa BH	382
744093c9	383	#endif /* EFX_NIC_H */