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Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / intel / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
94971820 4 Copyright(c) 1999 - 2012 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
8de8b2e6 39#define BIT_APP_UPCHG 0x10
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
aacc1bea
ME		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *scfg,
48 struct ixgbe_dcb_config *dcfg, int tc_max)
2f90b865 49{
aacc1bea
ME		 50 struct tc_configuration *src = NULL;
51 struct tc_configuration *dst = NULL;
52 int i, j;
53 int tx = DCB_TX_CONFIG;
54 int rx = DCB_RX_CONFIG;
55 int changes = 0;
2f90b865 56
aacc1bea
ME		 57 if (!scfg || !dcfg)
58 return changes;
2f90b865
AD		 59
60 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
aacc1bea
ME		 61 src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0];
62 dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0];
2f90b865 63
aacc1bea
ME		 64 if (dst->path[tx].prio_type != src->path[tx].prio_type) {
65 dst->path[tx].prio_type = src->path[tx].prio_type;
66 changes |= BIT_PG_TX;
67 }
2f90b865 68
aacc1bea
ME		 69 if (dst->path[tx].bwg_id != src->path[tx].bwg_id) {
70 dst->path[tx].bwg_id = src->path[tx].bwg_id;
71 changes |= BIT_PG_TX;
72 }
2f90b865 73
aacc1bea
ME		 74 if (dst->path[tx].bwg_percent != src->path[tx].bwg_percent) {
75 dst->path[tx].bwg_percent = src->path[tx].bwg_percent;
76 changes |= BIT_PG_TX;
77 }
2f90b865 78
aacc1bea
ME		 79 if (dst->path[tx].up_to_tc_bitmap !=
80 src->path[tx].up_to_tc_bitmap) {
81 dst->path[tx].up_to_tc_bitmap =
82 src->path[tx].up_to_tc_bitmap;
83 changes |= (BIT_PG_TX | BIT_PFC | BIT_APP_UPCHG);
84 }
2f90b865 85
aacc1bea
ME		 86 if (dst->path[rx].prio_type != src->path[rx].prio_type) {
87 dst->path[rx].prio_type = src->path[rx].prio_type;
88 changes |= BIT_PG_RX;
89 }
2f90b865 90
aacc1bea
ME		 91 if (dst->path[rx].bwg_id != src->path[rx].bwg_id) {
92 dst->path[rx].bwg_id = src->path[rx].bwg_id;
93 changes |= BIT_PG_RX;
94 }
2f90b865 95
aacc1bea
ME		 96 if (dst->path[rx].bwg_percent != src->path[rx].bwg_percent) {
97 dst->path[rx].bwg_percent = src->path[rx].bwg_percent;
98 changes |= BIT_PG_RX;
99 }
2f90b865 100
aacc1bea
ME		 101 if (dst->path[rx].up_to_tc_bitmap !=
102 src->path[rx].up_to_tc_bitmap) {
103 dst->path[rx].up_to_tc_bitmap =
104 src->path[rx].up_to_tc_bitmap;
105 changes |= (BIT_PG_RX | BIT_PFC | BIT_APP_UPCHG);
106 }
2f90b865
AD		 107 }
108
109 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
aacc1bea
ME		 110 j = i - DCB_PG_ATTR_BW_ID_0;
111 if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) {
112 dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j];
113 changes |= BIT_PG_TX;
114 }
115 if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) {
116 dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j];
117 changes |= BIT_PG_RX;
118 }
2f90b865
AD		 119 }
120
121 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
aacc1bea
ME		 122 j = i - DCB_PFC_UP_ATTR_0;
123 if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) {
124 dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc;
125 changes |= BIT_PFC;
126 }
2f90b865
AD		 127 }
128
aacc1bea
ME		 129 if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) {
130 dcfg->pfc_mode_enable = scfg->pfc_mode_enable;
131 changes |= BIT_PFC;
132 }
ea4af4f4 133
aacc1bea 134 return changes;
2f90b865
AD		 135}
136
137static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
138{
139 struct ixgbe_adapter *adapter = netdev_priv(netdev);
140
2f90b865
AD		 141 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
142}
143
1486a61e 144static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 145{
89d27a3c 146 int err = 0;
5facb8e0
JF		 147 u8 prio_tc[MAX_USER_PRIORITY] = {0};
148 int i;
2f90b865
AD		 149 struct ixgbe_adapter *adapter = netdev_priv(netdev);
150
4c09f3a0
JF		 151 /* Fail command if not in CEE mode */
152 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
153 return 1;
154
03ecf91a
AD		 155 /* verify there is something to do, if not then exit */
156 if (!!state != !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
89d27a3c 157 goto out;
03ecf91a 158
5facb8e0 159 if (state > 0) {
32701dc2 160 err = ixgbe_setup_tc(netdev, adapter->dcb_cfg.num_tcs.pg_tcs);
5facb8e0
JF		 161 ixgbe_dcb_unpack_map(&adapter->dcb_cfg, DCB_TX_CONFIG, prio_tc);
162 } else {
e7589eab 163 err = ixgbe_setup_tc(netdev, 0);
5facb8e0
JF		 164 }
165
89d27a3c
JF		 166 if (err)
167 goto out;
168
5facb8e0
JF		 169 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
170 netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
1fcd86b5 171
89d27a3c
JF		 172out:
173 return err ? 1 : 0;
2f90b865
AD		 174}
175
176static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
177 u8 *perm_addr)
178{
179 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 180 int i, j;
2f90b865 181
86e713a0
LL		 182 memset(perm_addr, 0xff, MAX_ADDR_LEN);
183
2f90b865
AD		 184 for (i = 0; i < netdev->addr_len; i++)
185 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7 186
b93a2226
DS		 187 switch (adapter->hw.mac.type) {
188 case ixgbe_mac_82599EB:
189 case ixgbe_mac_X540:
aca6bee7
WJP		 190 for (j = 0; j < netdev->addr_len; j++, i++)
191 perm_addr[i] = adapter->hw.mac.san_addr[j];
b93a2226
DS		 192 break;
193 default:
194 break;
aca6bee7 195 }
2f90b865
AD		 196}
197
198static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
199 u8 prio, u8 bwg_id, u8 bw_pct,
200 u8 up_map)
201{
202 struct ixgbe_adapter *adapter = netdev_priv(netdev);
203
204 if (prio != DCB_ATTR_VALUE_UNDEFINED)
205 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
206 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
207 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
208 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
209 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
210 bw_pct;
211 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
212 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
213 up_map;
2f90b865
AD		 214}
215
216static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
217 u8 bw_pct)
218{
219 struct ixgbe_adapter *adapter = netdev_priv(netdev);
220
221 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
2f90b865
AD		 222}
223
224static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
225 u8 prio, u8 bwg_id, u8 bw_pct,
226 u8 up_map)
227{
228 struct ixgbe_adapter *adapter = netdev_priv(netdev);
229
230 if (prio != DCB_ATTR_VALUE_UNDEFINED)
231 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
232 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
233 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
234 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
235 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
236 bw_pct;
237 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
238 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
239 up_map;
2f90b865
AD		 240}
241
242static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
243 u8 bw_pct)
244{
245 struct ixgbe_adapter *adapter = netdev_priv(netdev);
246
247 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
2f90b865
AD		 248}
249
250static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
251 u8 *prio, u8 *bwg_id, u8 *bw_pct,
252 u8 *up_map)
253{
254 struct ixgbe_adapter *adapter = netdev_priv(netdev);
255
256 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
257 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
258 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
259 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
260}
261
262static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
263 u8 *bw_pct)
264{
265 struct ixgbe_adapter *adapter = netdev_priv(netdev);
266
267 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
268}
269
270static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
271 u8 *prio, u8 *bwg_id, u8 *bw_pct,
272 u8 *up_map)
273{
274 struct ixgbe_adapter *adapter = netdev_priv(netdev);
275
276 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
277 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
278 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
279 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
280}
281
282static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
283 u8 *bw_pct)
284{
285 struct ixgbe_adapter *adapter = netdev_priv(netdev);
286
287 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
288}
289
290static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
291 u8 setting)
292{
293 struct ixgbe_adapter *adapter = netdev_priv(netdev);
294
295 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
296 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
aacc1bea 297 adapter->dcb_cfg.tc_config[priority].dcb_pfc)
ea4af4f4 298 adapter->temp_dcb_cfg.pfc_mode_enable = true;
2f90b865
AD		 299}
300
301static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
302 u8 *setting)
303{
304 struct ixgbe_adapter *adapter = netdev_priv(netdev);
305
306 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
307}
308
4909fe97
JF		 309#ifdef IXGBE_FCOE
310static void ixgbe_dcbnl_devreset(struct net_device *dev)
311{
312 struct ixgbe_adapter *adapter = netdev_priv(dev);
313
314 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
315 usleep_range(1000, 2000);
316
317 if (netif_running(dev))
318 dev->netdev_ops->ndo_stop(dev);
319
320 ixgbe_clear_interrupt_scheme(adapter);
321 ixgbe_init_interrupt_scheme(adapter);
322
323 if (netif_running(dev))
324 dev->netdev_ops->ndo_open(dev);
325
326 clear_bit(__IXGBE_RESETTING, &adapter->state);
327}
328#endif
329
2f90b865
AD		 330static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
331{
332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aacc1bea
ME		 333 int ret = DCB_NO_HW_CHG;
334 int i;
9372453e 335#ifdef IXGBE_FCOE
c8ca76eb
JF		 336 struct dcb_app app = {
337 .selector = DCB_APP_IDTYPE_ETHTYPE,
338 .protocol = ETH_P_FCOE,
339 };
15d447ec
MR		 340 u8 up;
341
342 /* In IEEE mode, use the IEEE Ethertype selector value */
343 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) {
344 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
345 up = dcb_ieee_getapp_mask(netdev, &app);
346 } else {
347 up = dcb_getapp(netdev, &app);
348 }
9372453e 349#endif
2f90b865 350
4c09f3a0
JF		 351 /* Fail command if not in CEE mode */
352 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
aacc1bea 353 return ret;
4c09f3a0 354
aacc1bea
ME		 355 adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg,
356 &adapter->dcb_cfg,
357 MAX_TRAFFIC_CLASS);
358 if (!adapter->dcb_set_bitmap)
359 return ret;
3ce1cc52 360
264857b8 361 if (adapter->dcb_cfg.pfc_mode_enable) {
b93a2226
DS		 362 switch (adapter->hw.mac.type) {
363 case ixgbe_mac_82599EB:
364 case ixgbe_mac_X540:
365 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
366 adapter->last_lfc_mode =
367 adapter->hw.fc.current_mode;
368 break;
369 default:
370 break;
371 }
264857b8
PWJ		 372 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
373 } else {
b93a2226
DS		 374 switch (adapter->hw.mac.type) {
375 case ixgbe_mac_82598EB:
264857b8 376 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS		 377 break;
378 case ixgbe_mac_82599EB:
379 case ixgbe_mac_X540:
380 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
381 break;
382 default:
383 break;
384 }
264857b8
PWJ		 385 }
386
d43f5c21
JF		 387 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
388 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
389 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
17049d30 390 /* Priority to TC mapping in CEE case default to 1:1 */
32701dc2 391 u8 prio_tc[MAX_USER_PRIORITY];
d43f5c21
JF		 392 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
393
971060b1 394#ifdef IXGBE_FCOE
d43f5c21
JF		 395 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
396 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
397#endif
398
399 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
400 max_frame, DCB_TX_CONFIG);
401 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
402 max_frame, DCB_RX_CONFIG);
403
404 ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
405 DCB_TX_CONFIG, refill);
406 ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
407 ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
408 DCB_TX_CONFIG, bwg_id);
409 ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
410 DCB_TX_CONFIG, prio_type);
32701dc2
JF		 411 ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
412 DCB_TX_CONFIG, prio_tc);
d43f5c21
JF		 413
414 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
17049d30 415 bwg_id, prio_type, prio_tc);
32701dc2
JF		 416
417 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
418 netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
aacc1bea
ME		 419
420 ret = DCB_HW_CHG_RST;
32701dc2
JF		 421 }
422
423 if (adapter->dcb_set_bitmap & BIT_PFC) {
424 u8 pfc_en;
425 u8 prio_tc[MAX_USER_PRIORITY];
426
427 ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
428 DCB_TX_CONFIG, prio_tc);
429 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
430 ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en, prio_tc);
aacc1bea
ME		 431 if (ret != DCB_HW_CHG_RST)
432 ret = DCB_HW_CHG;
d43f5c21
JF		 433 }
434
264857b8
PWJ		 435 if (adapter->dcb_cfg.pfc_mode_enable)
436 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
437
4909fe97 438#ifdef IXGBE_FCOE
43497cc2
JF		 439 /* Reprogam FCoE hardware offloads when the traffic class
440 * FCoE is using changes. This happens if the APP info
441 * changes or the up2tc mapping is updated.
442 */
443 if ((up && !(up & (1 << adapter->fcoe.up))) ||
444 (adapter->dcb_set_bitmap & BIT_APP_UPCHG)) {
4909fe97
JF		 445 adapter->fcoe.up = ffs(up) - 1;
446 ixgbe_dcbnl_devreset(netdev);
447 ret = DCB_HW_CHG_RST;
448 }
449#endif
450
2f90b865 451 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 452 return ret;
453}
454
46132188
AD		 455static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
456{
457 struct ixgbe_adapter *adapter = netdev_priv(netdev);
46132188 458
3032309b
JF		 459 switch (capid) {
460 case DCB_CAP_ATTR_PG:
461 *cap = true;
462 break;
463 case DCB_CAP_ATTR_PFC:
464 *cap = true;
465 break;
466 case DCB_CAP_ATTR_UP2TC:
467 *cap = false;
468 break;
469 case DCB_CAP_ATTR_PG_TCS:
470 *cap = 0x80;
471 break;
472 case DCB_CAP_ATTR_PFC_TCS:
473 *cap = 0x80;
474 break;
475 case DCB_CAP_ATTR_GSP:
476 *cap = true;
477 break;
478 case DCB_CAP_ATTR_BCN:
479 *cap = false;
480 break;
481 case DCB_CAP_ATTR_DCBX:
482 *cap = adapter->dcbx_cap;
483 break;
484 default:
485 *cap = false;
486 break;
46132188
AD		 487 }
488
3032309b 489 return 0;
46132188
AD		 490}
491
2b88f2de 492static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
33dbabc4
AD		 493{
494 struct ixgbe_adapter *adapter = netdev_priv(netdev);
495 u8 rval = 0;
496
497 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
498 switch (tcid) {
499 case DCB_NUMTCS_ATTR_PG:
32701dc2 500 *num = adapter->dcb_cfg.num_tcs.pg_tcs;
33dbabc4
AD		 501 break;
502 case DCB_NUMTCS_ATTR_PFC:
32701dc2 503 *num = adapter->dcb_cfg.num_tcs.pfc_tcs;
33dbabc4
AD		 504 break;
505 default:
506 rval = -EINVAL;
507 break;
508 }
509 } else {
510 rval = -EINVAL;
511 }
512
513 return rval;
514}
515
2b88f2de 516static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
33dbabc4
AD		 517{
518 return -EINVAL;
519}
520
0eb3aa9b
AD		 521static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
522{
523 struct ixgbe_adapter *adapter = netdev_priv(netdev);
524
264857b8 525 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 526}
527
528static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
529{
264857b8
PWJ		 530 struct ixgbe_adapter *adapter = netdev_priv(netdev);
531
532 adapter->temp_dcb_cfg.pfc_mode_enable = state;
0eb3aa9b
AD		 533}
534
6ee16520
YZ		 535/**
536 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
537 * @netdev : the corresponding netdev
538 * @idtype : identifies the id as ether type or TCP/UDP port number
539 * @id: id is either ether type or TCP/UDP port number
540 *
541 * Returns : on success, returns a non-zero 802.1p user priority bitmap
542 * otherwise returns 0 as the invalid user priority bitmap to indicate an
543 * error.
544 */
545static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
546{
3032309b 547 struct ixgbe_adapter *adapter = netdev_priv(netdev);
dc166e22
JF		 548 struct dcb_app app = {
549 .selector = idtype,
550 .protocol = id,
551 };
6ee16520 552
3032309b 553 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
dc166e22 554 return 0;
3032309b 555
dc166e22 556 return dcb_getapp(netdev, &app);
6ee16520
YZ		 557}
558
d033d526
JF		 559static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
560 struct ieee_ets *ets)
561{
562 struct ixgbe_adapter *adapter = netdev_priv(dev);
563 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
564
8599e251
JF		 565 ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs;
566
d033d526
JF		 567 /* No IEEE PFC settings available */
568 if (!my_ets)
8599e251 569 return 0;
d033d526 570
d033d526
JF		 571 ets->cbs = my_ets->cbs;
572 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
573 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
574 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
575 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
576 return 0;
577}
578
579static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
580 struct ieee_ets *ets)
581{
582 struct ixgbe_adapter *adapter = netdev_priv(dev);
d033d526 583 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
89d27a3c 584 int i, err = 0;
4c09f3a0 585 __u8 max_tc = 0;
d033d526 586
3032309b
JF		 587 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
588 return -EINVAL;
589
d033d526
JF		 590 if (!adapter->ixgbe_ieee_ets) {
591 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
592 GFP_KERNEL);
593 if (!adapter->ixgbe_ieee_ets)
594 return -ENOMEM;
595 }
596
d033d526
JF		 597 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
598
3b97fd69 599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
4c09f3a0
JF		 600 if (ets->prio_tc[i] > max_tc)
601 max_tc = ets->prio_tc[i];
3b97fd69
JF		 602 }
603
4c09f3a0
JF		 604 if (max_tc)
605 max_tc++;
17049d30 606
32701dc2
JF		 607 if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs)
608 return -EINVAL;
609
4c09f3a0 610 if (max_tc != netdev_get_num_tc(dev))
89d27a3c
JF		 611 err = ixgbe_setup_tc(dev, max_tc);
612
613 if (err)
614 goto err_out;
4c09f3a0 615
e886c44f
JF		 616 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
617 netdev_set_prio_tc_map(dev, i, ets->prio_tc[i]);
618
89d27a3c
JF		 619 err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame);
620err_out:
621 return err;
d033d526
JF		 622}
623
624static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
625 struct ieee_pfc *pfc)
626{
627 struct ixgbe_adapter *adapter = netdev_priv(dev);
628 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
629 int i;
630
8599e251
JF		 631 pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs;
632
d033d526
JF		 633 /* No IEEE PFC settings available */
634 if (!my_pfc)
8599e251 635 return 0;
d033d526 636
d033d526
JF		 637 pfc->pfc_en = my_pfc->pfc_en;
638 pfc->mbc = my_pfc->mbc;
639 pfc->delay = my_pfc->delay;
640
641 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
642 pfc->requests[i] = adapter->stats.pxoffrxc[i];
643 pfc->indications[i] = adapter->stats.pxofftxc[i];
644 }
645
646 return 0;
647}
648
649static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
650 struct ieee_pfc *pfc)
651{
652 struct ixgbe_adapter *adapter = netdev_priv(dev);
32701dc2 653 u8 *prio_tc;
d033d526 654
3032309b
JF		 655 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
656 return -EINVAL;
657
d033d526
JF		 658 if (!adapter->ixgbe_ieee_pfc) {
659 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
660 GFP_KERNEL);
661 if (!adapter->ixgbe_ieee_pfc)
662 return -ENOMEM;
663 }
664
32701dc2 665 prio_tc = adapter->ixgbe_ieee_ets->prio_tc;
d033d526 666 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
32701dc2 667 return ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en, prio_tc);
d033d526
JF		 668}
669
f8628d40
JF		 670static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,
671 struct dcb_app *app)
672{
673 struct ixgbe_adapter *adapter = netdev_priv(dev);
9372453e 674 int err = -EINVAL;
f8628d40
JF		 675
676 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
9372453e 677 return err;
f8628d40 678
9372453e 679 err = dcb_ieee_setapp(dev, app);
f8628d40 680
c8ca76eb 681#ifdef IXGBE_FCOE
9372453e
JF		 682 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
683 app->protocol == ETH_P_FCOE) {
684 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
685
686 if (app_mask & (1 << adapter->fcoe.up))
687 return err;
688
689 adapter->fcoe.up = app->priority;
42532da6
JF		 690 ixgbe_dcbnl_devreset(dev);
691 }
692#endif
693 return 0;
694}
695
696static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,
697 struct dcb_app *app)
698{
699 struct ixgbe_adapter *adapter = netdev_priv(dev);
700 int err;
701
702 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
703 return -EINVAL;
9372453e 704
42532da6 705 err = dcb_ieee_delapp(dev, app);
9372453e 706
42532da6
JF		 707#ifdef IXGBE_FCOE
708 if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
709 app->protocol == ETH_P_FCOE) {
710 u8 app_mask = dcb_ieee_getapp_mask(dev, app);
711
712 if (app_mask & (1 << adapter->fcoe.up))
713 return err;
9372453e 714
42532da6
JF		 715 adapter->fcoe.up = app_mask ?
716 ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC;
717 ixgbe_dcbnl_devreset(dev);
9372453e 718 }
f8628d40 719#endif
9372453e 720 return err;
f8628d40
JF		 721}
722
3032309b
JF		 723static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
724{
725 struct ixgbe_adapter *adapter = netdev_priv(dev);
726 return adapter->dcbx_cap;
727}
728
729static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
730{
731 struct ixgbe_adapter *adapter = netdev_priv(dev);
732 struct ieee_ets ets = {0};
733 struct ieee_pfc pfc = {0};
89d27a3c 734 int err = 0;
3032309b
JF		 735
736 /* no support for LLD_MANAGED modes or CEE+IEEE */
737 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
738 ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) ||
739 !(mode & DCB_CAP_DCBX_HOST))
740 return 1;
741
742 if (mode == adapter->dcbx_cap)
743 return 0;
744
745 adapter->dcbx_cap = mode;
746
747 /* ETS and PFC defaults */
748 ets.ets_cap = 8;
749 pfc.pfc_cap = 8;
750
751 if (mode & DCB_CAP_DCBX_VER_IEEE) {
752 ixgbe_dcbnl_ieee_setets(dev, &ets);
753 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
754 } else if (mode & DCB_CAP_DCBX_VER_CEE) {
43497cc2
JF		 755 u8 mask = BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG;
756
757 adapter->dcb_set_bitmap |= mask;
3032309b
JF		 758 ixgbe_dcbnl_set_all(dev);
759 } else {
760 /* Drop into single TC mode strict priority as this
761 * indicates CEE and IEEE versions are disabled
762 */
763 ixgbe_dcbnl_ieee_setets(dev, &ets);
764 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
89d27a3c 765 err = ixgbe_setup_tc(dev, 0);
3032309b
JF		 766 }
767
89d27a3c 768 return err ? 1 : 0;
3032309b
JF		 769}
770
32953543 771const struct dcbnl_rtnl_ops dcbnl_ops = {
d033d526
JF		 772 .ieee_getets = ixgbe_dcbnl_ieee_getets,
773 .ieee_setets = ixgbe_dcbnl_ieee_setets,
774 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
775 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
f8628d40 776 .ieee_setapp = ixgbe_dcbnl_ieee_setapp,
42532da6 777 .ieee_delapp = ixgbe_dcbnl_ieee_delapp,
2f90b865
AD		 778 .getstate = ixgbe_dcbnl_get_state,
779 .setstate = ixgbe_dcbnl_set_state,
780 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
781 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
782 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
783 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
784 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
785 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
786 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
787 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
788 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
789 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
790 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 791 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 792 .getcap = ixgbe_dcbnl_getcap,
793 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 794 .setnumtcs = ixgbe_dcbnl_setnumtcs,
795 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 796 .setpfcstate = ixgbe_dcbnl_setpfcstate,
6ee16520 797 .getapp = ixgbe_dcbnl_getapp,
3032309b
JF		 798 .getdcbx = ixgbe_dcbnl_getdcbx,
799 .setdcbx = ixgbe_dcbnl_setdcbx,
2f90b865 800};
kernel source for telekom puls (alcatel/mediatek)