ipv4: PKTINFO doesnt need dst reference
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / emulex / benet / be.h
CommitLineData
6b7c5b94 1/*
d2145cde 2 * Copyright (C) 2005 - 2011 Emulex
6b7c5b94
SP
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
d2145cde 11 * linux-drivers@emulex.com
6b7c5b94 12 *
d2145cde
AK
13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
6b7c5b94
SP
16 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
6b7c5b94
SP
23#include <linux/delay.h>
24#include <net/tcp.h>
25#include <net/ip.h>
26#include <net/ipv6.h>
27#include <linux/if_vlan.h>
28#include <linux/workqueue.h>
29#include <linux/interrupt.h>
84517482 30#include <linux/firmware.h>
5a0e3ad6 31#include <linux/slab.h>
ab1594e9 32#include <linux/u64_stats_sync.h>
6b7c5b94
SP
33
34#include "be_hw.h"
35
c888385a 36#define DRV_VER "4.0.100u"
6b7c5b94
SP
37#define DRV_NAME "be2net"
38#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
12d7ea2c 39#define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
c4ca2374 40#define OC_NAME "Emulex OneConnect 10Gbps NIC"
fe6d2a38
SP
41#define OC_NAME_BE OC_NAME "(be3)"
42#define OC_NAME_LANCER OC_NAME "(Lancer)"
35ecf03c 43#define DRV_DESC "ServerEngines BladeEngine 10Gbps NIC Driver"
6b7c5b94 44
c4ca2374 45#define BE_VENDOR_ID 0x19a2
fe6d2a38 46#define EMULEX_VENDOR_ID 0x10df
c4ca2374 47#define BE_DEVICE_ID1 0x211
12d7ea2c 48#define BE_DEVICE_ID2 0x221
fe6d2a38
SP
49#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
50#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
51#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
12f4d0a8 52#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
c4ca2374
AK
53
54static inline char *nic_name(struct pci_dev *pdev)
55{
12d7ea2c
AK
56 switch (pdev->device) {
57 case OC_DEVICE_ID1:
c4ca2374 58 return OC_NAME;
e254f6ec 59 case OC_DEVICE_ID2:
fe6d2a38
SP
60 return OC_NAME_BE;
61 case OC_DEVICE_ID3:
12f4d0a8 62 case OC_DEVICE_ID4:
fe6d2a38 63 return OC_NAME_LANCER;
12d7ea2c
AK
64 case BE_DEVICE_ID2:
65 return BE3_NAME;
66 default:
c4ca2374 67 return BE_NAME;
12d7ea2c 68 }
c4ca2374
AK
69}
70
6b7c5b94 71/* Number of bytes of an RX frame that are copied to skb->data */
2e588f84 72#define BE_HDR_LEN ((u16) 64)
6b7c5b94
SP
73#define BE_MAX_JUMBO_FRAME_SIZE 9018
74#define BE_MIN_MTU 256
75
76#define BE_NUM_VLANS_SUPPORTED 64
77#define BE_MAX_EQD 96
78#define BE_MAX_TX_FRAG_COUNT 30
79
80#define EVNT_Q_LEN 1024
81#define TX_Q_LEN 2048
82#define TX_CQ_LEN 1024
83#define RX_Q_LEN 1024 /* Does not support any other value */
84#define RX_CQ_LEN 1024
5fb379ee 85#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
6b7c5b94
SP
86#define MCC_CQ_LEN 256
87
3abcdeda 88#define MAX_RSS_QS 4 /* BE limit is 4 queues/port */
ac6a0c4a 89#define MAX_RX_QS (MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
3c8def97 90#define MAX_TX_QS 8
ac6a0c4a 91#define BE_MAX_MSIX_VECTORS (MAX_RX_QS + 1)/* RX + TX */
6b7c5b94
SP
92#define BE_NAPI_WEIGHT 64
93#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
94#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
95
8788fdc2
SP
96#define FW_VER_LEN 32
97
6b7c5b94
SP
98struct be_dma_mem {
99 void *va;
100 dma_addr_t dma;
101 u32 size;
102};
103
104struct be_queue_info {
105 struct be_dma_mem dma_mem;
106 u16 len;
107 u16 entry_size; /* Size of an element in the queue */
108 u16 id;
109 u16 tail, head;
110 bool created;
111 atomic_t used; /* Number of valid elements in the queue */
112};
113
5fb379ee
SP
114static inline u32 MODULO(u16 val, u16 limit)
115{
116 BUG_ON(limit & (limit - 1));
117 return val & (limit - 1);
118}
119
120static inline void index_adv(u16 *index, u16 val, u16 limit)
121{
122 *index = MODULO((*index + val), limit);
123}
124
125static inline void index_inc(u16 *index, u16 limit)
126{
127 *index = MODULO((*index + 1), limit);
128}
129
130static inline void *queue_head_node(struct be_queue_info *q)
131{
132 return q->dma_mem.va + q->head * q->entry_size;
133}
134
135static inline void *queue_tail_node(struct be_queue_info *q)
136{
137 return q->dma_mem.va + q->tail * q->entry_size;
138}
139
3de09455
SK
140static inline void *queue_index_node(struct be_queue_info *q, u16 index)
141{
142 return q->dma_mem.va + index * q->entry_size;
143}
144
5fb379ee
SP
145static inline void queue_head_inc(struct be_queue_info *q)
146{
147 index_inc(&q->head, q->len);
148}
149
150static inline void queue_tail_inc(struct be_queue_info *q)
151{
152 index_inc(&q->tail, q->len);
153}
154
5fb379ee
SP
155struct be_eq_obj {
156 struct be_queue_info q;
157 char desc[32];
158
159 /* Adaptive interrupt coalescing (AIC) info */
160 bool enable_aic;
161 u16 min_eqd; /* in usecs */
162 u16 max_eqd; /* in usecs */
163 u16 cur_eqd; /* in usecs */
ecd62107 164 u8 eq_idx;
5fb379ee
SP
165
166 struct napi_struct napi;
167};
168
169struct be_mcc_obj {
170 struct be_queue_info q;
171 struct be_queue_info cq;
7a1e9b20 172 bool rearm_cq;
5fb379ee
SP
173};
174
3abcdeda 175struct be_tx_stats {
ac124ff9
SP
176 u64 tx_bytes;
177 u64 tx_pkts;
178 u64 tx_reqs;
179 u64 tx_wrbs;
180 u64 tx_compl;
181 ulong tx_jiffies;
182 u32 tx_stops;
ab1594e9
SP
183 struct u64_stats_sync sync;
184 struct u64_stats_sync sync_compl;
6b7c5b94
SP
185};
186
6b7c5b94
SP
187struct be_tx_obj {
188 struct be_queue_info q;
189 struct be_queue_info cq;
190 /* Remember the skbs that were transmitted */
191 struct sk_buff *sent_skb_list[TX_Q_LEN];
3c8def97 192 struct be_tx_stats stats;
6b7c5b94
SP
193};
194
195/* Struct to remember the pages posted for rx frags */
196struct be_rx_page_info {
197 struct page *page;
fac6da5b 198 DEFINE_DMA_UNMAP_ADDR(bus);
6b7c5b94
SP
199 u16 page_offset;
200 bool last_page_user;
201};
202
3abcdeda 203struct be_rx_stats {
3abcdeda 204 u64 rx_bytes;
3abcdeda 205 u64 rx_pkts;
ac124ff9
SP
206 u64 rx_pkts_prev;
207 ulong rx_jiffies;
208 u32 rx_drops_no_skbs; /* skb allocation errors */
209 u32 rx_drops_no_frags; /* HW has no fetched frags */
210 u32 rx_post_fail; /* page post alloc failures */
211 u32 rx_polls; /* NAPI calls */
212 u32 rx_events;
213 u32 rx_compl;
3abcdeda 214 u32 rx_mcast_pkts;
ac124ff9
SP
215 u32 rx_compl_err; /* completions with err set */
216 u32 rx_pps; /* pkts per second */
ab1594e9 217 struct u64_stats_sync sync;
3abcdeda
SP
218};
219
2e588f84
SP
220struct be_rx_compl_info {
221 u32 rss_hash;
6709d952 222 u16 vlan_tag;
2e588f84
SP
223 u16 pkt_size;
224 u16 rxq_idx;
12004ae9 225 u16 port;
2e588f84
SP
226 u8 vlanf;
227 u8 num_rcvd;
228 u8 err;
229 u8 ipf;
230 u8 tcpf;
231 u8 udpf;
232 u8 ip_csum;
233 u8 l4_csum;
234 u8 ipv6;
235 u8 vtm;
236 u8 pkt_type;
237};
238
6b7c5b94 239struct be_rx_obj {
3abcdeda 240 struct be_adapter *adapter;
6b7c5b94
SP
241 struct be_queue_info q;
242 struct be_queue_info cq;
2e588f84 243 struct be_rx_compl_info rxcp;
6b7c5b94 244 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
3abcdeda
SP
245 struct be_eq_obj rx_eq;
246 struct be_rx_stats stats;
247 u8 rss_id;
248 bool rx_post_starved; /* Zero rx frags have been posted to BE */
e80d9da6 249 u32 cache_line_barrier[16];
6b7c5b94
SP
250};
251
609ff3bb 252struct be_drv_stats {
9ae081c6 253 u32 be_on_die_temperature;
ac124ff9
SP
254 u32 tx_events;
255 u32 eth_red_drops;
256 u32 rx_drops_no_pbuf;
257 u32 rx_drops_no_txpb;
258 u32 rx_drops_no_erx_descr;
259 u32 rx_drops_no_tpre_descr;
260 u32 rx_drops_too_many_frags;
261 u32 rx_drops_invalid_ring;
262 u32 forwarded_packets;
263 u32 rx_drops_mtu;
264 u32 rx_crc_errors;
265 u32 rx_alignment_symbol_errors;
266 u32 rx_pause_frames;
267 u32 rx_priority_pause_frames;
268 u32 rx_control_frames;
269 u32 rx_in_range_errors;
270 u32 rx_out_range_errors;
271 u32 rx_frame_too_long;
272 u32 rx_address_match_errors;
273 u32 rx_dropped_too_small;
274 u32 rx_dropped_too_short;
275 u32 rx_dropped_header_too_small;
276 u32 rx_dropped_tcp_length;
277 u32 rx_dropped_runt;
278 u32 rx_ip_checksum_errs;
279 u32 rx_tcp_checksum_errs;
280 u32 rx_udp_checksum_errs;
281 u32 tx_pauseframes;
282 u32 tx_priority_pauseframes;
283 u32 tx_controlframes;
284 u32 rxpp_fifo_overflow_drop;
285 u32 rx_input_fifo_overflow_drop;
286 u32 pmem_fifo_overflow_drop;
287 u32 jabber_events;
609ff3bb
AK
288};
289
64600ea5
AK
290struct be_vf_cfg {
291 unsigned char vf_mac_addr[ETH_ALEN];
292 u32 vf_if_handle;
293 u32 vf_pmac_id;
1da87b7f 294 u16 vf_vlan_tag;
e1d18735 295 u32 vf_tx_rate;
64600ea5
AK
296};
297
9cd9000b 298#define BE_INVALID_PMAC_ID 0xffffffff
609ff3bb 299
6b7c5b94
SP
300struct be_adapter {
301 struct pci_dev *pdev;
302 struct net_device *netdev;
303
8788fdc2
SP
304 u8 __iomem *csr;
305 u8 __iomem *db; /* Door Bell */
8788fdc2 306
2984961c 307 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
8788fdc2
SP
308 struct be_dma_mem mbox_mem;
309 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
310 * is stored for freeing purpose */
311 struct be_dma_mem mbox_mem_alloced;
312
313 struct be_mcc_obj mcc_obj;
314 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
315 spinlock_t mcc_cq_lock;
6b7c5b94 316
3abcdeda 317 struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
ac6a0c4a 318 u32 num_msix_vec;
6b7c5b94
SP
319 bool isr_registered;
320
321 /* TX Rings */
322 struct be_eq_obj tx_eq;
3c8def97
SP
323 struct be_tx_obj tx_obj[MAX_TX_QS];
324 u8 num_tx_qs;
6b7c5b94
SP
325
326 u32 cache_line_break[8];
327
328 /* Rx rings */
ac6a0c4a 329 struct be_rx_obj rx_obj[MAX_RX_QS];
3abcdeda 330 u32 num_rx_qs;
6b7c5b94
SP
331 u32 big_page_size; /* Compounded page size shared by rx wrbs */
332
ecd62107 333 u8 eq_next_idx;
609ff3bb 334 struct be_drv_stats drv_stats;
fe6d2a38 335
82903e4b
AK
336 u16 vlans_added;
337 u16 max_vlans; /* Number of vlans supported */
b738127d 338 u8 vlan_tag[VLAN_N_VID];
cc4ce020
SK
339 u8 vlan_prio_bmap; /* Available Priority BitMap */
340 u16 recommended_prio; /* Recommended Priority */
5b8821b7 341 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
6b7c5b94 342
3abcdeda 343 struct be_dma_mem stats_cmd;
6b7c5b94
SP
344 /* Work queue used to perform periodic tasks like getting statistics */
345 struct delayed_work work;
609ff3bb 346 u16 work_counter;
6b7c5b94
SP
347
348 /* Ethtool knobs and info */
6b7c5b94
SP
349 char fw_ver[FW_VER_LEN];
350 u32 if_handle; /* Used to configure filtering */
351 u32 pmac_id; /* MAC addr handle used by BE card */
1a642469 352 u32 beacon_state; /* for set_phys_id */
6b7c5b94 353
cf588477 354 bool eeh_err;
6b7c5b94 355 u32 port_num;
24307eef 356 bool promiscuous;
71d8d1b5 357 bool wol;
3486be29 358 u32 function_mode;
3abcdeda 359 u32 function_caps;
9e90c961
AK
360 u32 rx_fc; /* Rx flow control */
361 u32 tx_fc; /* Tx flow control */
7c185276 362 bool ue_detected;
b2aebe6d 363 bool stats_cmd_sent;
0dffc83e
AK
364 int link_speed;
365 u8 port_type;
16c02145 366 u8 transceiver;
ee3cb629 367 u8 autoneg;
7b139c83 368 u8 generation; /* BladeEngine ASIC generation */
dd131e76
SB
369 u32 flash_status;
370 struct completion flash_compl;
ba343c77 371
2e588f84 372 bool be3_native;
ba343c77 373 bool sriov_enabled;
48f5a191 374 struct be_vf_cfg *vf_cfg;
344dbf10 375 u8 is_virtfn;
fe6d2a38 376 u32 sli_family;
9e1453c5 377 u8 hba_port_num;
3968fa1e 378 u16 pvid;
6b7c5b94
SP
379};
380
344dbf10 381#define be_physfn(adapter) (!adapter->is_virtfn)
ba343c77 382
7b139c83
AK
383/* BladeEngine Generation numbers */
384#define BE_GEN2 2
385#define BE_GEN3 3
386
5b8821b7
SP
387#define ON 1
388#define OFF 0
12f4d0a8
ME
389#define lancer_chip(adapter) ((adapter->pdev->device == OC_DEVICE_ID3) || \
390 (adapter->pdev->device == OC_DEVICE_ID4))
fe6d2a38 391
0fc0b732 392extern const struct ethtool_ops be_ethtool_ops;
6b7c5b94 393
ac6a0c4a 394#define msix_enabled(adapter) (adapter->num_msix_vec > 0)
3c8def97 395#define tx_stats(txo) (&txo->stats)
3abcdeda 396#define rx_stats(rxo) (&rxo->stats)
6b7c5b94
SP
397
398#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
399
3abcdeda
SP
400#define for_all_rx_queues(adapter, rxo, i) \
401 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
402 i++, rxo++)
403
404/* Just skip the first default non-rss queue */
405#define for_all_rss_queues(adapter, rxo, i) \
406 for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
407 i++, rxo++)
408
3c8def97
SP
409#define for_all_tx_queues(adapter, txo, i) \
410 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
411 i++, txo++)
412
6b7c5b94
SP
413#define PAGE_SHIFT_4K 12
414#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
415
416/* Returns number of pages spanned by the data starting at the given addr */
417#define PAGES_4K_SPANNED(_address, size) \
418 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
419 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
420
421/* Byte offset into the page corresponding to given address */
422#define OFFSET_IN_PAGE(addr) \
423 ((size_t)(addr) & (PAGE_SIZE_4K-1))
424
425/* Returns bit offset within a DWORD of a bitfield */
426#define AMAP_BIT_OFFSET(_struct, field) \
427 (((size_t)&(((_struct *)0)->field))%32)
428
429/* Returns the bit mask of the field that is NOT shifted into location. */
430static inline u32 amap_mask(u32 bitsize)
431{
432 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
433}
434
435static inline void
436amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
437{
438 u32 *dw = (u32 *) ptr + dw_offset;
439 *dw &= ~(mask << offset);
440 *dw |= (mask & value) << offset;
441}
442
443#define AMAP_SET_BITS(_struct, field, ptr, val) \
444 amap_set(ptr, \
445 offsetof(_struct, field)/32, \
446 amap_mask(sizeof(((_struct *)0)->field)), \
447 AMAP_BIT_OFFSET(_struct, field), \
448 val)
449
450static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
451{
452 u32 *dw = (u32 *) ptr;
453 return mask & (*(dw + dw_offset) >> offset);
454}
455
456#define AMAP_GET_BITS(_struct, field, ptr) \
457 amap_get(ptr, \
458 offsetof(_struct, field)/32, \
459 amap_mask(sizeof(((_struct *)0)->field)), \
460 AMAP_BIT_OFFSET(_struct, field))
461
462#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
463#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
464static inline void swap_dws(void *wrb, int len)
465{
466#ifdef __BIG_ENDIAN
467 u32 *dw = wrb;
468 BUG_ON(len % 4);
469 do {
470 *dw = cpu_to_le32(*dw);
471 dw++;
472 len -= 4;
473 } while (len);
474#endif /* __BIG_ENDIAN */
475}
476
477static inline u8 is_tcp_pkt(struct sk_buff *skb)
478{
479 u8 val = 0;
480
481 if (ip_hdr(skb)->version == 4)
482 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
483 else if (ip_hdr(skb)->version == 6)
484 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
485
486 return val;
487}
488
489static inline u8 is_udp_pkt(struct sk_buff *skb)
490{
491 u8 val = 0;
492
493 if (ip_hdr(skb)->version == 4)
494 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
495 else if (ip_hdr(skb)->version == 6)
496 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
497
498 return val;
499}
500
344dbf10
SB
501static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
502{
fe6d2a38
SP
503 u32 sli_intf;
504
b0060586
AK
505 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
506 adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
344dbf10
SB
507}
508
6d87f5c3
AK
509static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
510{
511 u32 addr;
512
513 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
514
515 mac[5] = (u8)(addr & 0xFF);
516 mac[4] = (u8)((addr >> 8) & 0xFF);
517 mac[3] = (u8)((addr >> 16) & 0xFF);
7a2414a5
AK
518 /* Use the OUI from the current MAC address */
519 memcpy(mac, adapter->netdev->dev_addr, 3);
6d87f5c3
AK
520}
521
4b972914
AK
522static inline bool be_multi_rxq(const struct be_adapter *adapter)
523{
524 return adapter->num_rx_qs > 1;
525}
526
8788fdc2 527extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
5fb379ee 528 u16 num_popped);
ea172a01 529extern void be_link_status_update(struct be_adapter *adapter, u32 link_status);
89a88ab8 530extern void be_parse_stats(struct be_adapter *adapter);
84517482 531extern int be_load_fw(struct be_adapter *adapter, u8 *func);
6b7c5b94 532#endif /* BE_H */