[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / cisco / enic / enic.h

/*
 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 *
 * This program is free software; you may redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#ifndef _ENIC_H_
#define _ENIC_H_

#include "vnic_enet.h"
#include "vnic_dev.h"
#include "vnic_wq.h"
#include "vnic_rq.h"
#include "vnic_cq.h"
#include "vnic_intr.h"
#include "vnic_stats.h"
#include "vnic_nic.h"
#include "vnic_rss.h"

#define DRV_NAME		"enic"
#define DRV_DESCRIPTION		"Cisco VIC Ethernet NIC Driver"
#define DRV_VERSION		"2.1.1.31"
#define DRV_COPYRIGHT		"Copyright 2008-2011 Cisco Systems, Inc"

#define ENIC_BARS_MAX		6

#define ENIC_WQ_MAX		1
#define ENIC_RQ_MAX		1
#define ENIC_CQ_MAX		(ENIC_WQ_MAX + ENIC_RQ_MAX)
#define ENIC_INTR_MAX		(ENIC_CQ_MAX + 2)

struct enic_msix_entry {
	int requested;
	char devname[IFNAMSIZ];
	irqreturn_t (*isr)(int, void *);
	void *devid;
};

/* priv_flags */
#define ENIC_SRIOV_ENABLED		(1 << 0)

/* enic port profile set flags */
#define ENIC_PORT_REQUEST_APPLIED	(1 << 0)
#define ENIC_SET_REQUEST		(1 << 1)
#define ENIC_SET_NAME			(1 << 2)
#define ENIC_SET_INSTANCE		(1 << 3)
#define ENIC_SET_HOST			(1 << 4)

struct enic_port_profile {
	u32 set;
	u8 request;
	char name[PORT_PROFILE_MAX];
	u8 instance_uuid[PORT_UUID_MAX];
	u8 host_uuid[PORT_UUID_MAX];
	u8 vf_mac[ETH_ALEN];
	u8 mac_addr[ETH_ALEN];
};

/* Per-instance private data structure */
struct enic {
	struct net_device *netdev;
	struct pci_dev *pdev;
	struct vnic_enet_config config;
	struct vnic_dev_bar bar[ENIC_BARS_MAX];
	struct vnic_dev *vdev;
	struct timer_list notify_timer;
	struct work_struct reset;
	struct work_struct change_mtu_work;
	struct msix_entry msix_entry[ENIC_INTR_MAX];
	struct enic_msix_entry msix[ENIC_INTR_MAX];
	u32 msg_enable;
	spinlock_t devcmd_lock;
	u8 mac_addr[ETH_ALEN];
	u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
	u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
	unsigned int flags;
	unsigned int priv_flags;
	unsigned int mc_count;
	unsigned int uc_count;
	u32 port_mtu;
	u32 rx_coalesce_usecs;
	u32 tx_coalesce_usecs;
#ifdef CONFIG_PCI_IOV
	u32 num_vfs;
#endif
	struct enic_port_profile *pp;

	/* work queue cache line section */
	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
	spinlock_t wq_lock[ENIC_WQ_MAX];
	unsigned int wq_count;
	u16 loop_enable;
	u16 loop_tag;

	/* receive queue cache line section */
	____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
	unsigned int rq_count;
	u64 rq_truncated_pkts;
	u64 rq_bad_fcs;
	struct napi_struct napi[ENIC_RQ_MAX];

	/* interrupt resource cache line section */
	____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
	unsigned int intr_count;
	u32 __iomem *legacy_pba;		/* memory-mapped */

	/* completion queue cache line section */
	____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
	unsigned int cq_count;
};

static inline struct device *enic_get_dev(struct enic *enic)
{
	return &(enic->pdev->dev);
}

void enic_reset_addr_lists(struct enic *enic);
int enic_sriov_enabled(struct enic *enic);
int enic_is_valid_vf(struct enic *enic, int vf);
int enic_is_dynamic(struct enic *enic);

#endif /* _ENIC_H_ */
Commit	Line	Data
01f2e4ea	1	/*
29046f9b	2	* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea SF	3	* Copyright 2007 Nuova Systems, Inc. All rights reserved.
	4	*
	5	* This program is free software; you may redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; version 2 of the License.
	8	*
	9	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	10	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	11	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	12	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	13	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	14	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	15	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	16	* SOFTWARE.
	17	*
	18	*/
	19
	20	#ifndef _ENIC_H_
	21	#define _ENIC_H_
	22
01f2e4ea SF	23	#include "vnic_enet.h"
	24	#include "vnic_dev.h"
	25	#include "vnic_wq.h"
	26	#include "vnic_rq.h"
	27	#include "vnic_cq.h"
	28	#include "vnic_intr.h"
	29	#include "vnic_stats.h"
6ba9cdc0	30	#include "vnic_nic.h"
717258ba	31	#include "vnic_rss.h"
01f2e4ea SF	32
01f2e4ea SF	33	#define DRV_NAME "enic"
641cb85e	34	#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver"
3a4adef5	35	#define DRV_VERSION "2.1.1.31"
4dce2396	36	#define DRV_COPYRIGHT "Copyright 2008-2011 Cisco Systems, Inc"
01f2e4ea	37
27e6c7d3 SF	38	#define ENIC_BARS_MAX 6
27e6c7d3 SF	39
1cbb1a61 VK	40	#define ENIC_WQ_MAX 1
1cbb1a61 VK	41	#define ENIC_RQ_MAX 1
6ba9cdc0 SF	42	#define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX)
	43	#define ENIC_INTR_MAX (ENIC_CQ_MAX + 2)
	44
01f2e4ea SF	45	struct enic_msix_entry {
	46	int requested;
	47	char devname[IFNAMSIZ];
	48	irqreturn_t (isr)(int, void );
	49	void *devid;
	50	};
	51
8749b427 RP	52	/* priv_flags */
	53	#define ENIC_SRIOV_ENABLED (1 << 0)
	54
	55	/* enic port profile set flags */
4dce2396	56	#define ENIC_PORT_REQUEST_APPLIED (1 << 0)
08f382eb SF	57	#define ENIC_SET_REQUEST (1 << 1)
	58	#define ENIC_SET_NAME (1 << 2)
	59	#define ENIC_SET_INSTANCE (1 << 3)
	60	#define ENIC_SET_HOST (1 << 4)
	61
f8bd9091	62	struct enic_port_profile {
08f382eb	63	u32 set;
f8bd9091 SF	64	u8 request;
	65	char name[PORT_PROFILE_MAX];
	66	u8 instance_uuid[PORT_UUID_MAX];
	67	u8 host_uuid[PORT_UUID_MAX];
0b1c00fc	68	u8 vf_mac[ETH_ALEN];
29639059	69	u8 mac_addr[ETH_ALEN];
f8bd9091 SF	70	};
f8bd9091 SF	71
01f2e4ea SF	72	/* Per-instance private data structure */
	73	struct enic {
	74	struct net_device *netdev;
	75	struct pci_dev *pdev;
	76	struct vnic_enet_config config;
27e6c7d3	77	struct vnic_dev_bar bar[ENIC_BARS_MAX];
01f2e4ea	78	struct vnic_dev *vdev;
01f2e4ea SF	79	struct timer_list notify_timer;
01f2e4ea SF	80	struct work_struct reset;
c97c894d	81	struct work_struct change_mtu_work;
717258ba VK	82	struct msix_entry msix_entry[ENIC_INTR_MAX];
717258ba VK	83	struct enic_msix_entry msix[ENIC_INTR_MAX];
01f2e4ea SF	84	u32 msg_enable;
	85	spinlock_t devcmd_lock;
	86	u8 mac_addr[ETH_ALEN];
	87	u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
319d7e84	88	u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
9959a185	89	unsigned int flags;
8749b427	90	unsigned int priv_flags;
01f2e4ea	91	unsigned int mc_count;
319d7e84	92	unsigned int uc_count;
01f2e4ea	93	u32 port_mtu;
7c844599 SF	94	u32 rx_coalesce_usecs;
7c844599 SF	95	u32 tx_coalesce_usecs;
8749b427 RP	96	#ifdef CONFIG_PCI_IOV
	97	u32 num_vfs;
	98	#endif
3f192795	99	struct enic_port_profile *pp;
01f2e4ea SF	100
01f2e4ea SF	101	/* work queue cache line section */
6ba9cdc0 SF	102	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];
6ba9cdc0 SF	103	spinlock_t wq_lock[ENIC_WQ_MAX];
01f2e4ea	104	unsigned int wq_count;
1825aca6 VK	105	u16 loop_enable;
1825aca6 VK	106	u16 loop_tag;
01f2e4ea SF	107
01f2e4ea SF	108	/* receive queue cache line section */
6ba9cdc0	109	____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];
01f2e4ea	110	unsigned int rq_count;
350991e1	111	u64 rq_truncated_pkts;
bd9fb1a4	112	u64 rq_bad_fcs;
717258ba	113	struct napi_struct napi[ENIC_RQ_MAX];
01f2e4ea SF	114
01f2e4ea SF	115	/* interrupt resource cache line section */
6ba9cdc0	116	____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];
01f2e4ea SF	117	unsigned int intr_count;
	118	u32 __iomem legacy_pba; / memory-mapped */
	119
	120	/* completion queue cache line section */
	121	____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];
	122	unsigned int cq_count;
	123	};
	124
a7a79deb VK	125	static inline struct device enic_get_dev(struct enic enic)
	126	{
	127	return &(enic->pdev->dev);
	128	}
	129
b3abfbd2	130	void enic_reset_addr_lists(struct enic *enic);
8749b427	131	int enic_sriov_enabled(struct enic *enic);
889d13f5	132	int enic_is_valid_vf(struct enic *enic, int vf);
3f192795	133	int enic_is_dynamic(struct enic *enic);
b3abfbd2	134
01f2e4ea	135	#endif /* _ENIC_H_ */