Commit | Line | Data |
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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | ||
19 | #ifndef __BFA_IOC_H__ | |
20 | #define __BFA_IOC_H__ | |
21 | ||
758ccc34 | 22 | #include "bfa_cs.h" |
8b230ed8 RM |
23 | #include "bfi.h" |
24 | #include "cna.h" | |
25 | ||
26 | #define BFA_IOC_TOV 3000 /* msecs */ | |
27 | #define BFA_IOC_HWSEM_TOV 500 /* msecs */ | |
28 | #define BFA_IOC_HB_TOV 500 /* msecs */ | |
078086f3 | 29 | #define BFA_IOC_POLL_TOV 200 /* msecs */ |
7afc5dbd KG |
30 | #define BNA_DBG_FWTRC_LEN (BFI_IOC_TRC_ENTS * BFI_IOC_TRC_ENT_SZ + \ |
31 | BFI_IOC_TRC_HDR_SZ) | |
8b230ed8 | 32 | |
1aa8b471 | 33 | /* PCI device information required by IOC */ |
8b230ed8 RM |
34 | struct bfa_pcidev { |
35 | int pci_slot; | |
36 | u8 pci_func; | |
37 | u16 device_id; | |
586b2816 | 38 | u16 ssid; |
8b230ed8 RM |
39 | void __iomem *pci_bar_kva; |
40 | }; | |
41 | ||
1aa8b471 | 42 | /* Structure used to remember the DMA-able memory block's KVA and Physical |
8b230ed8 RM |
43 | * Address |
44 | */ | |
45 | struct bfa_dma { | |
46 | void *kva; /* ! Kernel virtual address */ | |
47 | u64 pa; /* ! Physical address */ | |
48 | }; | |
49 | ||
50 | #define BFA_DMA_ALIGN_SZ 256 | |
51 | ||
1aa8b471 | 52 | /* smem size for Crossbow and Catapult */ |
8b230ed8 RM |
53 | #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */ |
54 | #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */ | |
55 | ||
1aa8b471 | 56 | /* BFA dma address assignment macro. (big endian format) */ |
8b230ed8 RM |
57 | #define bfa_dma_be_addr_set(dma_addr, pa) \ |
58 | __bfa_dma_be_addr_set(&dma_addr, (u64)pa) | |
59 | static inline void | |
60 | __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa) | |
61 | { | |
62 | dma_addr->a32.addr_lo = (u32) htonl(pa); | |
63 | dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa)); | |
64 | } | |
65 | ||
72a9730b KG |
66 | #define bfa_alen_set(__alen, __len, __pa) \ |
67 | __bfa_alen_set(__alen, __len, (u64)__pa) | |
68 | ||
69 | static inline void | |
70 | __bfa_alen_set(struct bfi_alen *alen, u32 len, u64 pa) | |
71 | { | |
72 | alen->al_len = cpu_to_be32(len); | |
73 | bfa_dma_be_addr_set(alen->al_addr, pa); | |
74 | } | |
75 | ||
8b230ed8 RM |
76 | struct bfa_ioc_regs { |
77 | void __iomem *hfn_mbox_cmd; | |
78 | void __iomem *hfn_mbox; | |
79 | void __iomem *lpu_mbox_cmd; | |
80 | void __iomem *lpu_mbox; | |
be3a84d1 | 81 | void __iomem *lpu_read_stat; |
8b230ed8 RM |
82 | void __iomem *pss_ctl_reg; |
83 | void __iomem *pss_err_status_reg; | |
84 | void __iomem *app_pll_fast_ctl_reg; | |
85 | void __iomem *app_pll_slow_ctl_reg; | |
86 | void __iomem *ioc_sem_reg; | |
87 | void __iomem *ioc_usage_sem_reg; | |
88 | void __iomem *ioc_init_sem_reg; | |
89 | void __iomem *ioc_usage_reg; | |
90 | void __iomem *host_page_num_fn; | |
91 | void __iomem *heartbeat; | |
92 | void __iomem *ioc_fwstate; | |
1d32f769 | 93 | void __iomem *alt_ioc_fwstate; |
8b230ed8 | 94 | void __iomem *ll_halt; |
1d32f769 | 95 | void __iomem *alt_ll_halt; |
8b230ed8 | 96 | void __iomem *err_set; |
1d32f769 | 97 | void __iomem *ioc_fail_sync; |
8b230ed8 RM |
98 | void __iomem *shirq_isr_next; |
99 | void __iomem *shirq_msk_next; | |
100 | void __iomem *smem_page_start; | |
101 | u32 smem_pg0; | |
102 | }; | |
103 | ||
1aa8b471 | 104 | /* IOC Mailbox structures */ |
bd5a92e9 | 105 | typedef void (*bfa_mbox_cmd_cbfn_t)(void *cbarg); |
8b230ed8 RM |
106 | struct bfa_mbox_cmd { |
107 | struct list_head qe; | |
bd5a92e9 RM |
108 | bfa_mbox_cmd_cbfn_t cbfn; |
109 | void *cbarg; | |
110 | u32 msg[BFI_IOC_MSGSZ]; | |
8b230ed8 RM |
111 | }; |
112 | ||
1aa8b471 | 113 | /* IOC mailbox module */ |
8b230ed8 RM |
114 | typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m); |
115 | struct bfa_ioc_mbox_mod { | |
116 | struct list_head cmd_q; /*!< pending mbox queue */ | |
117 | int nmclass; /*!< number of handlers */ | |
118 | struct { | |
119 | bfa_ioc_mbox_mcfunc_t cbfn; /*!< message handlers */ | |
120 | void *cbarg; | |
121 | } mbhdlr[BFI_MC_MAX]; | |
122 | }; | |
123 | ||
1aa8b471 | 124 | /* IOC callback function interfaces */ |
8b230ed8 RM |
125 | typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status); |
126 | typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa); | |
127 | typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa); | |
128 | typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa); | |
129 | struct bfa_ioc_cbfn { | |
130 | bfa_ioc_enable_cbfn_t enable_cbfn; | |
131 | bfa_ioc_disable_cbfn_t disable_cbfn; | |
132 | bfa_ioc_hbfail_cbfn_t hbfail_cbfn; | |
133 | bfa_ioc_reset_cbfn_t reset_cbfn; | |
134 | }; | |
135 | ||
1aa8b471 | 136 | /* IOC event notification mechanism. */ |
bd5a92e9 RM |
137 | enum bfa_ioc_event { |
138 | BFA_IOC_E_ENABLED = 1, | |
139 | BFA_IOC_E_DISABLED = 2, | |
140 | BFA_IOC_E_FAILED = 3, | |
141 | }; | |
142 | ||
143 | typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event); | |
144 | ||
145 | struct bfa_ioc_notify { | |
146 | struct list_head qe; | |
147 | bfa_ioc_notify_cbfn_t cbfn; | |
148 | void *cbarg; | |
149 | }; | |
150 | ||
1aa8b471 | 151 | /* Initialize a IOC event notification structure */ |
bd5a92e9 | 152 | #define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do { \ |
8b230ed8 RM |
153 | (__notify)->cbfn = (__cbfn); \ |
154 | (__notify)->cbarg = (__cbarg); \ | |
155 | } while (0) | |
156 | ||
1d32f769 RM |
157 | struct bfa_iocpf { |
158 | bfa_fsm_t fsm; | |
159 | struct bfa_ioc *ioc; | |
078086f3 | 160 | bool fw_mismatch_notified; |
1d32f769 | 161 | bool auto_recover; |
078086f3 | 162 | u32 poll_time; |
1d32f769 RM |
163 | }; |
164 | ||
8b230ed8 RM |
165 | struct bfa_ioc { |
166 | bfa_fsm_t fsm; | |
0120b99c RM |
167 | struct bfa *bfa; |
168 | struct bfa_pcidev pcidev; | |
169 | struct timer_list ioc_timer; | |
170 | struct timer_list iocpf_timer; | |
171 | struct timer_list sem_timer; | |
8b230ed8 RM |
172 | struct timer_list hb_timer; |
173 | u32 hb_count; | |
bd5a92e9 | 174 | struct list_head notify_q; |
8b230ed8 RM |
175 | void *dbg_fwsave; |
176 | int dbg_fwsave_len; | |
177 | bool dbg_fwsave_once; | |
078086f3 | 178 | enum bfi_pcifn_class clscode; |
0120b99c | 179 | struct bfa_ioc_regs ioc_regs; |
8b230ed8 | 180 | struct bfa_ioc_drv_stats stats; |
8b230ed8 | 181 | bool fcmode; |
8b230ed8 | 182 | bool pllinit; |
0120b99c | 183 | bool stats_busy; /*!< outstanding stats */ |
8b230ed8 RM |
184 | u8 port_id; |
185 | ||
186 | struct bfa_dma attr_dma; | |
187 | struct bfi_ioc_attr *attr; | |
188 | struct bfa_ioc_cbfn *cbfn; | |
189 | struct bfa_ioc_mbox_mod mbox_mod; | |
d91d25d5 | 190 | const struct bfa_ioc_hwif *ioc_hwif; |
1d32f769 | 191 | struct bfa_iocpf iocpf; |
078086f3 RM |
192 | enum bfi_asic_gen asic_gen; |
193 | enum bfi_asic_mode asic_mode; | |
194 | enum bfi_port_mode port0_mode; | |
195 | enum bfi_port_mode port1_mode; | |
196 | enum bfa_mode port_mode; | |
197 | u8 ad_cap_bm; /*!< adapter cap bit mask */ | |
198 | u8 port_mode_cfg; /*!< config port mode */ | |
8b230ed8 RM |
199 | }; |
200 | ||
201 | struct bfa_ioc_hwif { | |
078086f3 RM |
202 | enum bfa_status (*ioc_pll_init) (void __iomem *rb, |
203 | enum bfi_asic_mode m); | |
8b230ed8 RM |
204 | bool (*ioc_firmware_lock) (struct bfa_ioc *ioc); |
205 | void (*ioc_firmware_unlock) (struct bfa_ioc *ioc); | |
206 | void (*ioc_reg_init) (struct bfa_ioc *ioc); | |
207 | void (*ioc_map_port) (struct bfa_ioc *ioc); | |
208 | void (*ioc_isr_mode_set) (struct bfa_ioc *ioc, | |
209 | bool msix); | |
1d32f769 | 210 | void (*ioc_notify_fail) (struct bfa_ioc *ioc); |
8b230ed8 | 211 | void (*ioc_ownership_reset) (struct bfa_ioc *ioc); |
79ea6c89 | 212 | bool (*ioc_sync_start) (struct bfa_ioc *ioc); |
1d32f769 RM |
213 | void (*ioc_sync_join) (struct bfa_ioc *ioc); |
214 | void (*ioc_sync_leave) (struct bfa_ioc *ioc); | |
215 | void (*ioc_sync_ack) (struct bfa_ioc *ioc); | |
216 | bool (*ioc_sync_complete) (struct bfa_ioc *ioc); | |
078086f3 | 217 | bool (*ioc_lpu_read_stat) (struct bfa_ioc *ioc); |
8b230ed8 RM |
218 | }; |
219 | ||
220 | #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func) | |
221 | #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id) | |
222 | #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva) | |
223 | #define bfa_ioc_portid(__ioc) ((__ioc)->port_id) | |
078086f3 | 224 | #define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen) |
8b230ed8 RM |
225 | #define bfa_ioc_fetch_stats(__ioc, __stats) \ |
226 | (((__stats)->drv_stats) = (__ioc)->stats) | |
227 | #define bfa_ioc_clr_stats(__ioc) \ | |
228 | memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats)) | |
229 | #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize) | |
230 | #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit) | |
231 | #define bfa_ioc_speed_sup(__ioc) \ | |
232 | BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop) | |
233 | #define bfa_ioc_get_nports(__ioc) \ | |
234 | BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop) | |
235 | ||
236 | #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++) | |
9b08a4fc RM |
237 | #define bfa_ioc_stats_hb_count(_ioc, _hb_count) \ |
238 | ((_ioc)->stats.hb_count = (_hb_count)) | |
8b230ed8 | 239 | #define BFA_IOC_FWIMG_MINSZ (16 * 1024) |
8b230ed8 | 240 | #define BFA_IOC_FW_SMEM_SIZE(__ioc) \ |
078086f3 RM |
241 | ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \ |
242 | ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE) | |
8b230ed8 RM |
243 | #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS) |
244 | #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS) | |
245 | #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS) | |
246 | ||
1aa8b471 | 247 | /* IOC mailbox interface */ |
af027a34 RM |
248 | bool bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, |
249 | struct bfa_mbox_cmd *cmd, | |
250 | bfa_mbox_cmd_cbfn_t cbfn, void *cbarg); | |
8a891429 RM |
251 | void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc); |
252 | void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc, | |
8b230ed8 RM |
253 | bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg); |
254 | ||
1aa8b471 | 255 | /* IOC interfaces */ |
8b230ed8 RM |
256 | |
257 | #define bfa_ioc_pll_init_asic(__ioc) \ | |
258 | ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \ | |
078086f3 | 259 | (__ioc)->asic_mode)) |
8b230ed8 | 260 | |
772b5235 RM |
261 | #define bfa_ioc_isr_mode_set(__ioc, __msix) do { \ |
262 | if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \ | |
263 | ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \ | |
264 | } while (0) | |
8b230ed8 RM |
265 | #define bfa_ioc_ownership_reset(__ioc) \ |
266 | ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc)) | |
267 | ||
078086f3 RM |
268 | #define bfa_ioc_lpu_read_stat(__ioc) do { \ |
269 | if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \ | |
270 | ((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \ | |
271 | } while (0) | |
272 | ||
8a891429 | 273 | void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc); |
be3a84d1 | 274 | void bfa_nw_ioc_set_ct2_hwif(struct bfa_ioc *ioc); |
70f14381 | 275 | void bfa_nw_ioc_ct2_poweron(struct bfa_ioc *ioc); |
8b230ed8 | 276 | |
8a891429 | 277 | void bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, |
8b230ed8 | 278 | struct bfa_ioc_cbfn *cbfn); |
8a891429 RM |
279 | void bfa_nw_ioc_auto_recover(bool auto_recover); |
280 | void bfa_nw_ioc_detach(struct bfa_ioc *ioc); | |
281 | void bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev, | |
078086f3 | 282 | enum bfi_pcifn_class clscode); |
8a891429 RM |
283 | u32 bfa_nw_ioc_meminfo(void); |
284 | void bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa); | |
285 | void bfa_nw_ioc_enable(struct bfa_ioc *ioc); | |
286 | void bfa_nw_ioc_disable(struct bfa_ioc *ioc); | |
287 | ||
288 | void bfa_nw_ioc_error_isr(struct bfa_ioc *ioc); | |
bd5a92e9 | 289 | bool bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc); |
7afc5dbd | 290 | bool bfa_nw_ioc_is_operational(struct bfa_ioc *ioc); |
8a891429 | 291 | void bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr); |
bd5a92e9 RM |
292 | void bfa_nw_ioc_notify_register(struct bfa_ioc *ioc, |
293 | struct bfa_ioc_notify *notify); | |
8a891429 RM |
294 | bool bfa_nw_ioc_sem_get(void __iomem *sem_reg); |
295 | void bfa_nw_ioc_sem_release(void __iomem *sem_reg); | |
296 | void bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc); | |
297 | void bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, | |
8b230ed8 | 298 | struct bfi_ioc_image_hdr *fwhdr); |
8a891429 | 299 | bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, |
8b230ed8 | 300 | struct bfi_ioc_image_hdr *fwhdr); |
8a891429 | 301 | mac_t bfa_nw_ioc_get_mac(struct bfa_ioc *ioc); |
7afc5dbd KG |
302 | void bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave); |
303 | int bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen); | |
304 | int bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen); | |
8b230ed8 RM |
305 | |
306 | /* | |
307 | * Timeout APIs | |
308 | */ | |
8a891429 RM |
309 | void bfa_nw_ioc_timeout(void *ioc); |
310 | void bfa_nw_ioc_hb_check(void *ioc); | |
1d32f769 RM |
311 | void bfa_nw_iocpf_timeout(void *ioc); |
312 | void bfa_nw_iocpf_sem_timeout(void *ioc); | |
8b230ed8 RM |
313 | |
314 | /* | |
315 | * F/W Image Size & Chunk | |
316 | */ | |
078086f3 RM |
317 | u32 *bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off); |
318 | u32 bfa_cb_image_get_size(enum bfi_asic_gen asic_gen); | |
8b230ed8 | 319 | |
72a9730b KG |
320 | /* |
321 | * Flash module specific | |
322 | */ | |
323 | typedef void (*bfa_cb_flash) (void *cbarg, enum bfa_status status); | |
324 | ||
325 | struct bfa_flash { | |
326 | struct bfa_ioc *ioc; /* back pointer to ioc */ | |
327 | u32 type; /* partition type */ | |
328 | u8 instance; /* partition instance */ | |
329 | u8 rsv[3]; | |
330 | u32 op_busy; /* operation busy flag */ | |
331 | u32 residue; /* residual length */ | |
332 | u32 offset; /* offset */ | |
333 | enum bfa_status status; /* status */ | |
334 | u8 *dbuf_kva; /* dma buf virtual address */ | |
335 | u64 dbuf_pa; /* dma buf physical address */ | |
336 | bfa_cb_flash cbfn; /* user callback function */ | |
337 | void *cbarg; /* user callback arg */ | |
338 | u8 *ubuf; /* user supplied buffer */ | |
339 | u32 addr_off; /* partition address offset */ | |
340 | struct bfa_mbox_cmd mb; /* mailbox */ | |
341 | struct bfa_ioc_notify ioc_notify; /* ioc event notify */ | |
342 | }; | |
343 | ||
344 | enum bfa_status bfa_nw_flash_get_attr(struct bfa_flash *flash, | |
345 | struct bfa_flash_attr *attr, | |
346 | bfa_cb_flash cbfn, void *cbarg); | |
347 | enum bfa_status bfa_nw_flash_update_part(struct bfa_flash *flash, | |
348 | u32 type, u8 instance, void *buf, u32 len, u32 offset, | |
349 | bfa_cb_flash cbfn, void *cbarg); | |
350 | enum bfa_status bfa_nw_flash_read_part(struct bfa_flash *flash, | |
351 | u32 type, u8 instance, void *buf, u32 len, u32 offset, | |
352 | bfa_cb_flash cbfn, void *cbarg); | |
353 | u32 bfa_nw_flash_meminfo(void); | |
354 | void bfa_nw_flash_attach(struct bfa_flash *flash, | |
355 | struct bfa_ioc *ioc, void *dev); | |
356 | void bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa); | |
357 | ||
8b230ed8 | 358 | #endif /* __BFA_IOC_H__ */ |