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1 | /* |
2 | * aQuantia Corporation Network Driver | |
3 | * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | /* File aq_hw.h: Declaraion of abstract interface for NIC hardware specific | |
11 | * functions. | |
12 | */ | |
13 | ||
14 | #ifndef AQ_HW_H | |
15 | #define AQ_HW_H | |
16 | ||
17 | #include "aq_common.h" | |
18 | ||
19 | /* NIC H/W capabilities */ | |
20 | struct aq_hw_caps_s { | |
21 | u64 hw_features; | |
22 | u64 link_speed_msk; | |
23 | unsigned int hw_priv_flags; | |
24 | u32 rxds; | |
25 | u32 txds; | |
26 | u32 txhwb_alignment; | |
27 | u32 irq_mask; | |
28 | u32 vecs; | |
29 | u32 mtu; | |
30 | u32 mac_regs_count; | |
31 | u8 ports; | |
32 | u8 msix_irqs; | |
33 | u8 tcs; | |
34 | u8 rxd_alignment; | |
35 | u8 rxd_size; | |
36 | u8 txd_alignment; | |
37 | u8 txd_size; | |
38 | u8 tx_rings; | |
39 | u8 rx_rings; | |
40 | bool flow_control; | |
41 | bool is_64_dma; | |
42 | u32 fw_ver_expected; | |
43 | }; | |
44 | ||
45 | struct aq_hw_link_status_s { | |
46 | unsigned int mbps; | |
47 | }; | |
48 | ||
49 | #define AQ_HW_IRQ_INVALID 0U | |
50 | #define AQ_HW_IRQ_LEGACY 1U | |
51 | #define AQ_HW_IRQ_MSI 2U | |
52 | #define AQ_HW_IRQ_MSIX 3U | |
53 | ||
54 | #define AQ_HW_POWER_STATE_D0 0U | |
55 | #define AQ_HW_POWER_STATE_D3 3U | |
56 | ||
57 | #define AQ_HW_FLAG_STARTED 0x00000004U | |
58 | #define AQ_HW_FLAG_STOPPING 0x00000008U | |
59 | #define AQ_HW_FLAG_RESETTING 0x00000010U | |
60 | #define AQ_HW_FLAG_CLOSING 0x00000020U | |
61 | #define AQ_HW_LINK_DOWN 0x04000000U | |
62 | #define AQ_HW_FLAG_ERR_UNPLUG 0x40000000U | |
63 | #define AQ_HW_FLAG_ERR_HW 0x80000000U | |
64 | ||
65 | #define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG) | |
66 | ||
67 | struct aq_hw_s { | |
68 | struct aq_obj_s header; | |
69 | struct aq_nic_cfg_s *aq_nic_cfg; | |
70 | struct aq_pci_func_s *aq_pci_func; | |
71 | void __iomem *mmio; | |
72 | unsigned int not_ff_addr; | |
73 | struct aq_hw_link_status_s aq_link_status; | |
74 | }; | |
75 | ||
76 | struct aq_ring_s; | |
77 | struct aq_ring_param_s; | |
78 | struct aq_nic_cfg_s; | |
79 | struct sk_buff; | |
80 | ||
81 | struct aq_hw_ops { | |
82 | struct aq_hw_s *(*create)(struct aq_pci_func_s *aq_pci_func, | |
83 | unsigned int port, struct aq_hw_ops *ops); | |
84 | ||
85 | void (*destroy)(struct aq_hw_s *self); | |
86 | ||
87 | int (*get_hw_caps)(struct aq_hw_s *self, | |
dabd233b IR |
88 | struct aq_hw_caps_s *aq_hw_caps, |
89 | unsigned short device, | |
90 | unsigned short subsystem_device); | |
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91 | |
92 | int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, | |
93 | unsigned int frags); | |
94 | ||
95 | int (*hw_ring_rx_receive)(struct aq_hw_s *self, | |
96 | struct aq_ring_s *aq_ring); | |
97 | ||
98 | int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, | |
99 | unsigned int sw_tail_old); | |
100 | ||
101 | int (*hw_ring_tx_head_update)(struct aq_hw_s *self, | |
102 | struct aq_ring_s *aq_ring); | |
103 | ||
104 | int (*hw_get_mac_permanent)(struct aq_hw_s *self, | |
105 | struct aq_hw_caps_s *aq_hw_caps, | |
106 | u8 *mac); | |
107 | ||
108 | int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr); | |
109 | ||
bd8ed441 | 110 | int (*hw_get_link_status)(struct aq_hw_s *self); |
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111 | |
112 | int (*hw_set_link_speed)(struct aq_hw_s *self, u32 speed); | |
113 | ||
114 | int (*hw_reset)(struct aq_hw_s *self); | |
115 | ||
116 | int (*hw_init)(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg, | |
117 | u8 *mac_addr); | |
118 | ||
119 | int (*hw_start)(struct aq_hw_s *self); | |
120 | ||
121 | int (*hw_stop)(struct aq_hw_s *self); | |
122 | ||
123 | int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, | |
124 | struct aq_ring_param_s *aq_ring_param); | |
125 | ||
126 | int (*hw_ring_tx_start)(struct aq_hw_s *self, | |
127 | struct aq_ring_s *aq_ring); | |
128 | ||
129 | int (*hw_ring_tx_stop)(struct aq_hw_s *self, | |
130 | struct aq_ring_s *aq_ring); | |
131 | ||
132 | int (*hw_ring_rx_init)(struct aq_hw_s *self, | |
133 | struct aq_ring_s *aq_ring, | |
134 | struct aq_ring_param_s *aq_ring_param); | |
135 | ||
136 | int (*hw_ring_rx_start)(struct aq_hw_s *self, | |
137 | struct aq_ring_s *aq_ring); | |
138 | ||
139 | int (*hw_ring_rx_stop)(struct aq_hw_s *self, | |
140 | struct aq_ring_s *aq_ring); | |
141 | ||
142 | int (*hw_irq_enable)(struct aq_hw_s *self, u64 mask); | |
143 | ||
144 | int (*hw_irq_disable)(struct aq_hw_s *self, u64 mask); | |
145 | ||
146 | int (*hw_irq_read)(struct aq_hw_s *self, u64 *mask); | |
147 | ||
148 | int (*hw_packet_filter_set)(struct aq_hw_s *self, | |
149 | unsigned int packet_filter); | |
150 | ||
151 | int (*hw_multicast_list_set)(struct aq_hw_s *self, | |
152 | u8 ar_mac[AQ_CFG_MULTICAST_ADDRESS_MAX] | |
153 | [ETH_ALEN], | |
154 | u32 count); | |
155 | ||
b82ee71a | 156 | int (*hw_interrupt_moderation_set)(struct aq_hw_s *self); |
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157 | |
158 | int (*hw_rss_set)(struct aq_hw_s *self, | |
159 | struct aq_rss_parameters *rss_params); | |
160 | ||
161 | int (*hw_rss_hash_set)(struct aq_hw_s *self, | |
162 | struct aq_rss_parameters *rss_params); | |
163 | ||
164 | int (*hw_get_regs)(struct aq_hw_s *self, | |
165 | struct aq_hw_caps_s *aq_hw_caps, u32 *regs_buff); | |
166 | ||
65e665e6 IR |
167 | int (*hw_update_stats)(struct aq_hw_s *self); |
168 | ||
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169 | int (*hw_get_hw_stats)(struct aq_hw_s *self, u64 *data, |
170 | unsigned int *p_count); | |
171 | ||
172 | int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version); | |
173 | ||
174 | int (*hw_deinit)(struct aq_hw_s *self); | |
175 | ||
176 | int (*hw_set_power)(struct aq_hw_s *self, unsigned int power_state); | |
177 | }; | |
178 | ||
179 | #endif /* AQ_HW_H */ |